1*d40605b6SMurton Liu /* 2*d40605b6SMurton Liu * Copyright 2012-16 Advanced Micro Devices, Inc. 3*d40605b6SMurton Liu * 4*d40605b6SMurton Liu * Permission is hereby granted, free of charge, to any person obtaining a 5*d40605b6SMurton Liu * copy of this software and associated documentation files (the "Software"), 6*d40605b6SMurton Liu * to deal in the Software without restriction, including without limitation 7*d40605b6SMurton Liu * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*d40605b6SMurton Liu * and/or sell copies of the Software, and to permit persons to whom the 9*d40605b6SMurton Liu * Software is furnished to do so, subject to the following conditions: 10*d40605b6SMurton Liu * 11*d40605b6SMurton Liu * The above copyright notice and this permission notice shall be included in 12*d40605b6SMurton Liu * all copies or substantial portions of the Software. 13*d40605b6SMurton Liu * 14*d40605b6SMurton Liu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*d40605b6SMurton Liu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*d40605b6SMurton Liu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*d40605b6SMurton Liu * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*d40605b6SMurton Liu * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*d40605b6SMurton Liu * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*d40605b6SMurton Liu * OTHER DEALINGS IN THE SOFTWARE. 21*d40605b6SMurton Liu * 22*d40605b6SMurton Liu * Authors: AMD 23*d40605b6SMurton Liu * 24*d40605b6SMurton Liu */ 25*d40605b6SMurton Liu 26*d40605b6SMurton Liu #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ 27*d40605b6SMurton Liu #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ 28*d40605b6SMurton Liu 29*d40605b6SMurton Liu #include "gpio_regs.h" 30*d40605b6SMurton Liu 31*d40605b6SMurton Liu #define GENERIC_GPIO_REG_LIST_ENTRY(type, cd, id) \ 32*d40605b6SMurton Liu .type ## _reg = REG(DC_GPIO_GENERIC_## type),\ 33*d40605b6SMurton Liu .type ## _mask = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## _MASK,\ 34*d40605b6SMurton Liu .type ## _shift = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## __SHIFT 35*d40605b6SMurton Liu 36*d40605b6SMurton Liu #define GENERIC_GPIO_REG_LIST(id) \ 37*d40605b6SMurton Liu {\ 38*d40605b6SMurton Liu GENERIC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\ 39*d40605b6SMurton Liu GENERIC_GPIO_REG_LIST_ENTRY(A, cd, id),\ 40*d40605b6SMurton Liu GENERIC_GPIO_REG_LIST_ENTRY(EN, cd, id),\ 41*d40605b6SMurton Liu GENERIC_GPIO_REG_LIST_ENTRY(Y, cd, id)\ 42*d40605b6SMurton Liu } 43*d40605b6SMurton Liu 44*d40605b6SMurton Liu #define GENERIC_REG_LIST(id) \ 45*d40605b6SMurton Liu GENERIC_GPIO_REG_LIST(id), \ 46*d40605b6SMurton Liu .mux = REG(DC_GENERIC ## id),\ 47*d40605b6SMurton Liu 48*d40605b6SMurton Liu #define GENERIC_MASK_SH_LIST(mask_sh, cd) \ 49*d40605b6SMurton Liu {(DC_GENERIC ## cd ##__GENERIC ## cd ##_EN## mask_sh),\ 50*d40605b6SMurton Liu (DC_GENERIC ## cd ##__GENERIC ## cd ##_SEL## mask_sh)} 51*d40605b6SMurton Liu 52*d40605b6SMurton Liu struct generic_registers { 53*d40605b6SMurton Liu struct gpio_registers gpio; 54*d40605b6SMurton Liu uint32_t mux; 55*d40605b6SMurton Liu }; 56*d40605b6SMurton Liu 57*d40605b6SMurton Liu struct generic_sh_mask { 58*d40605b6SMurton Liu /* enable */ 59*d40605b6SMurton Liu uint32_t GENERIC_EN; 60*d40605b6SMurton Liu /* select */ 61*d40605b6SMurton Liu uint32_t GENERIC_SEL; 62*d40605b6SMurton Liu 63*d40605b6SMurton Liu }; 64*d40605b6SMurton Liu 65*d40605b6SMurton Liu 66*d40605b6SMurton Liu #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ */ 67