xref: /linux/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c (revision f9bff0e31881d03badf191d3b0005839391f5f2b)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Author: AMD
23  */
24 
25 #include <drm/display/drm_dp_helper.h>
26 #include <drm/display/drm_dsc_helper.h>
27 #include "dc_hw_types.h"
28 #include "dsc.h"
29 #include "dc.h"
30 #include "rc_calc.h"
31 #include "fixed31_32.h"
32 
33 /* This module's internal functions */
34 
35 /* default DSC policy target bitrate limit is 16bpp */
36 static uint32_t dsc_policy_max_target_bpp_limit = 16;
37 
38 /* default DSC policy enables DSC only when needed */
39 static bool dsc_policy_enable_dsc_when_not_needed;
40 
41 static bool dsc_policy_disable_dsc_stream_overhead;
42 
43 #ifndef MAX
44 #define MAX(X, Y) ((X) > (Y) ? (X) : (Y))
45 #endif
46 #ifndef MIN
47 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
48 #endif
49 
50 uint32_t dc_bandwidth_in_kbps_from_timing(
51 	const struct dc_crtc_timing *timing)
52 {
53 	uint32_t bits_per_channel = 0;
54 	uint32_t kbps;
55 
56 	if (timing->flags.DSC)
57 		return dc_dsc_stream_bandwidth_in_kbps(timing,
58 				timing->dsc_cfg.bits_per_pixel,
59 				timing->dsc_cfg.num_slices_h,
60 				timing->dsc_cfg.is_dp);
61 
62 	switch (timing->display_color_depth) {
63 	case COLOR_DEPTH_666:
64 		bits_per_channel = 6;
65 		break;
66 	case COLOR_DEPTH_888:
67 		bits_per_channel = 8;
68 		break;
69 	case COLOR_DEPTH_101010:
70 		bits_per_channel = 10;
71 		break;
72 	case COLOR_DEPTH_121212:
73 		bits_per_channel = 12;
74 		break;
75 	case COLOR_DEPTH_141414:
76 		bits_per_channel = 14;
77 		break;
78 	case COLOR_DEPTH_161616:
79 		bits_per_channel = 16;
80 		break;
81 	default:
82 		ASSERT(bits_per_channel != 0);
83 		bits_per_channel = 8;
84 		break;
85 	}
86 
87 	kbps = timing->pix_clk_100hz / 10;
88 	kbps *= bits_per_channel;
89 
90 	if (timing->flags.Y_ONLY != 1) {
91 		/*Only YOnly make reduce bandwidth by 1/3 compares to RGB*/
92 		kbps *= 3;
93 		if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
94 			kbps /= 2;
95 		else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422)
96 			kbps = kbps * 2 / 3;
97 	}
98 
99 	return kbps;
100 }
101 
102 
103 /* Forward Declerations */
104 static bool decide_dsc_bandwidth_range(
105 		const uint32_t min_bpp_x16,
106 		const uint32_t max_bpp_x16,
107 		const uint32_t num_slices_h,
108 		const struct dsc_enc_caps *dsc_caps,
109 		const struct dc_crtc_timing *timing,
110 		struct dc_dsc_bw_range *range);
111 
112 static uint32_t compute_bpp_x16_from_target_bandwidth(
113 		const uint32_t bandwidth_in_kbps,
114 		const struct dc_crtc_timing *timing,
115 		const uint32_t num_slices_h,
116 		const uint32_t bpp_increment_div,
117 		const bool is_dp);
118 
119 static void get_dsc_enc_caps(
120 		const struct display_stream_compressor *dsc,
121 		struct dsc_enc_caps *dsc_enc_caps,
122 		int pixel_clock_100Hz);
123 
124 static bool intersect_dsc_caps(
125 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
126 		const struct dsc_enc_caps *dsc_enc_caps,
127 		enum dc_pixel_encoding pixel_encoding,
128 		struct dsc_enc_caps *dsc_common_caps);
129 
130 static bool setup_dsc_config(
131 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
132 		const struct dsc_enc_caps *dsc_enc_caps,
133 		int target_bandwidth_kbps,
134 		const struct dc_crtc_timing *timing,
135 		const struct dc_dsc_config_options *options,
136 		struct dc_dsc_config *dsc_cfg);
137 
138 static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_block_size)
139 {
140 
141 	switch (dpcd_buff_block_size) {
142 	case DP_DSC_RC_BUF_BLK_SIZE_1:
143 		*buff_block_size = 1024;
144 		break;
145 	case DP_DSC_RC_BUF_BLK_SIZE_4:
146 		*buff_block_size = 4 * 1024;
147 		break;
148 	case DP_DSC_RC_BUF_BLK_SIZE_16:
149 		*buff_block_size = 16 * 1024;
150 		break;
151 	case DP_DSC_RC_BUF_BLK_SIZE_64:
152 		*buff_block_size = 64 * 1024;
153 		break;
154 	default: {
155 			dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__);
156 			return false;
157 		}
158 	}
159 
160 	return true;
161 }
162 
163 
164 static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *line_buff_bit_depth)
165 {
166 	if (0 <= dpcd_line_buff_bit_depth && dpcd_line_buff_bit_depth <= 7)
167 		*line_buff_bit_depth = dpcd_line_buff_bit_depth + 9;
168 	else if (dpcd_line_buff_bit_depth == 8)
169 		*line_buff_bit_depth = 8;
170 	else {
171 		dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__);
172 		return false;
173 	}
174 
175 	return true;
176 }
177 
178 
179 static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput)
180 {
181 	switch (dpcd_throughput) {
182 	case DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED:
183 		*throughput = 0;
184 		break;
185 	case DP_DSC_THROUGHPUT_MODE_0_170:
186 		*throughput = 170;
187 		break;
188 	case DP_DSC_THROUGHPUT_MODE_0_340:
189 		*throughput = 340;
190 		break;
191 	case DP_DSC_THROUGHPUT_MODE_0_400:
192 		*throughput = 400;
193 		break;
194 	case DP_DSC_THROUGHPUT_MODE_0_450:
195 		*throughput = 450;
196 		break;
197 	case DP_DSC_THROUGHPUT_MODE_0_500:
198 		*throughput = 500;
199 		break;
200 	case DP_DSC_THROUGHPUT_MODE_0_550:
201 		*throughput = 550;
202 		break;
203 	case DP_DSC_THROUGHPUT_MODE_0_600:
204 		*throughput = 600;
205 		break;
206 	case DP_DSC_THROUGHPUT_MODE_0_650:
207 		*throughput = 650;
208 		break;
209 	case DP_DSC_THROUGHPUT_MODE_0_700:
210 		*throughput = 700;
211 		break;
212 	case DP_DSC_THROUGHPUT_MODE_0_750:
213 		*throughput = 750;
214 		break;
215 	case DP_DSC_THROUGHPUT_MODE_0_800:
216 		*throughput = 800;
217 		break;
218 	case DP_DSC_THROUGHPUT_MODE_0_850:
219 		*throughput = 850;
220 		break;
221 	case DP_DSC_THROUGHPUT_MODE_0_900:
222 		*throughput = 900;
223 		break;
224 	case DP_DSC_THROUGHPUT_MODE_0_950:
225 		*throughput = 950;
226 		break;
227 	case DP_DSC_THROUGHPUT_MODE_0_1000:
228 		*throughput = 1000;
229 		break;
230 	default: {
231 			dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__);
232 			return false;
233 		}
234 	}
235 
236 	return true;
237 }
238 
239 
240 static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div)
241 {
242 	// Mask bpp increment dpcd field to avoid reading other fields
243 	bpp_increment_dpcd &= 0x7;
244 
245 	switch (bpp_increment_dpcd) {
246 	case 0:
247 		*bpp_increment_div = 16;
248 		break;
249 	case 1:
250 		*bpp_increment_div = 8;
251 		break;
252 	case 2:
253 		*bpp_increment_div = 4;
254 		break;
255 	case 3:
256 		*bpp_increment_div = 2;
257 		break;
258 	case 4:
259 		*bpp_increment_div = 1;
260 		break;
261 	default: {
262 		dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__);
263 		return false;
264 	}
265 	}
266 
267 	return true;
268 }
269 
270 
271 
272 bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
273 		const uint8_t *dpcd_dsc_basic_data,
274 		const uint8_t *dpcd_dsc_branch_decoder_caps,
275 		struct dsc_dec_dpcd_caps *dsc_sink_caps)
276 {
277 	if (!dpcd_dsc_basic_data)
278 		return false;
279 
280 	dsc_sink_caps->is_dsc_supported =
281 		(dpcd_dsc_basic_data[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_DECOMPRESSION_IS_SUPPORTED) != 0;
282 	if (!dsc_sink_caps->is_dsc_supported)
283 		return false;
284 
285 	dsc_sink_caps->dsc_version = dpcd_dsc_basic_data[DP_DSC_REV - DP_DSC_SUPPORT];
286 
287 	{
288 		int buff_block_size;
289 		int buff_size;
290 
291 		if (!dsc_buff_block_size_from_dpcd(dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT],
292 										   &buff_block_size))
293 			return false;
294 
295 		buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT] + 1;
296 		dsc_sink_caps->rc_buffer_size = buff_size * buff_block_size;
297 	}
298 
299 	dsc_sink_caps->slice_caps1.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT];
300 	if (!dsc_line_buff_depth_from_dpcd(dpcd_dsc_basic_data[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT],
301 									   &dsc_sink_caps->lb_bit_depth))
302 		return false;
303 
304 	dsc_sink_caps->is_block_pred_supported =
305 		(dpcd_dsc_basic_data[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
306 		 DP_DSC_BLK_PREDICTION_IS_SUPPORTED) != 0;
307 
308 	dsc_sink_caps->edp_max_bits_per_pixel =
309 		dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] |
310 		dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] << 8;
311 
312 	dsc_sink_caps->color_formats.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT];
313 	dsc_sink_caps->color_depth.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT];
314 
315 	{
316 		int dpcd_throughput = dpcd_dsc_basic_data[DP_DSC_PEAK_THROUGHPUT - DP_DSC_SUPPORT];
317 
318 		if (!dsc_throughput_from_dpcd(dpcd_throughput & DP_DSC_THROUGHPUT_MODE_0_MASK,
319 									  &dsc_sink_caps->throughput_mode_0_mps))
320 			return false;
321 
322 		dpcd_throughput = (dpcd_throughput & DP_DSC_THROUGHPUT_MODE_1_MASK) >> DP_DSC_THROUGHPUT_MODE_1_SHIFT;
323 		if (!dsc_throughput_from_dpcd(dpcd_throughput, &dsc_sink_caps->throughput_mode_1_mps))
324 			return false;
325 	}
326 
327 	dsc_sink_caps->max_slice_width = dpcd_dsc_basic_data[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * 320;
328 	dsc_sink_caps->slice_caps2.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT];
329 
330 	if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT],
331 										 &dsc_sink_caps->bpp_increment_div))
332 		return false;
333 
334 	if (dc->debug.dsc_bpp_increment_div) {
335 		/* dsc_bpp_increment_div should onl be 1, 2, 4, 8 or 16, but rather than rejecting invalid values,
336 		 * we'll accept all and get it into range. This also makes the above check against 0 redundant,
337 		 * but that one stresses out the override will be only used if it's not 0.
338 		 */
339 		if (dc->debug.dsc_bpp_increment_div >= 1)
340 			dsc_sink_caps->bpp_increment_div = 1;
341 		if (dc->debug.dsc_bpp_increment_div >= 2)
342 			dsc_sink_caps->bpp_increment_div = 2;
343 		if (dc->debug.dsc_bpp_increment_div >= 4)
344 			dsc_sink_caps->bpp_increment_div = 4;
345 		if (dc->debug.dsc_bpp_increment_div >= 8)
346 			dsc_sink_caps->bpp_increment_div = 8;
347 		if (dc->debug.dsc_bpp_increment_div >= 16)
348 			dsc_sink_caps->bpp_increment_div = 16;
349 	}
350 
351 	/* Extended caps */
352 	if (dpcd_dsc_branch_decoder_caps == NULL) { // branch decoder DPCD DSC data can be null for non branch device
353 		dsc_sink_caps->branch_overall_throughput_0_mps = 0;
354 		dsc_sink_caps->branch_overall_throughput_1_mps = 0;
355 		dsc_sink_caps->branch_max_line_width = 0;
356 		return true;
357 	}
358 
359 	dsc_sink_caps->branch_overall_throughput_0_mps =
360 		dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
361 	if (dsc_sink_caps->branch_overall_throughput_0_mps == 0)
362 		dsc_sink_caps->branch_overall_throughput_0_mps = 0;
363 	else if (dsc_sink_caps->branch_overall_throughput_0_mps == 1)
364 		dsc_sink_caps->branch_overall_throughput_0_mps = 680;
365 	else {
366 		dsc_sink_caps->branch_overall_throughput_0_mps *= 50;
367 		dsc_sink_caps->branch_overall_throughput_0_mps += 600;
368 	}
369 
370 	dsc_sink_caps->branch_overall_throughput_1_mps =
371 		dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
372 	if (dsc_sink_caps->branch_overall_throughput_1_mps == 0)
373 		dsc_sink_caps->branch_overall_throughput_1_mps = 0;
374 	else if (dsc_sink_caps->branch_overall_throughput_1_mps == 1)
375 		dsc_sink_caps->branch_overall_throughput_1_mps = 680;
376 	else {
377 		dsc_sink_caps->branch_overall_throughput_1_mps *= 50;
378 		dsc_sink_caps->branch_overall_throughput_1_mps += 600;
379 	}
380 
381 	dsc_sink_caps->branch_max_line_width =
382 		dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_MAX_LINE_WIDTH - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320;
383 	ASSERT(dsc_sink_caps->branch_max_line_width == 0 || dsc_sink_caps->branch_max_line_width >= 5120);
384 
385 	dsc_sink_caps->is_dp = true;
386 	return true;
387 }
388 
389 
390 /* If DSC is possbile, get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range and
391  * timing's pixel clock and uncompressed bandwidth.
392  * If DSC is not possible, leave '*range' untouched.
393  */
394 bool dc_dsc_compute_bandwidth_range(
395 		const struct display_stream_compressor *dsc,
396 		uint32_t dsc_min_slice_height_override,
397 		uint32_t min_bpp_x16,
398 		uint32_t max_bpp_x16,
399 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
400 		const struct dc_crtc_timing *timing,
401 		struct dc_dsc_bw_range *range)
402 {
403 	bool is_dsc_possible = false;
404 	struct dsc_enc_caps dsc_enc_caps;
405 	struct dsc_enc_caps dsc_common_caps;
406 	struct dc_dsc_config config;
407 	struct dc_dsc_config_options options = {0};
408 
409 	options.dsc_min_slice_height_override = dsc_min_slice_height_override;
410 	options.max_target_bpp_limit_override_x16 = max_bpp_x16;
411 	options.slice_height_granularity = 1;
412 
413 	get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz);
414 
415 	is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps,
416 			timing->pixel_encoding, &dsc_common_caps);
417 
418 	if (is_dsc_possible)
419 		is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing,
420 				&options, &config);
421 
422 	if (is_dsc_possible)
423 		is_dsc_possible = decide_dsc_bandwidth_range(min_bpp_x16, max_bpp_x16,
424 				config.num_slices_h, &dsc_common_caps, timing, range);
425 
426 	return is_dsc_possible;
427 }
428 
429 static void get_dsc_enc_caps(
430 		const struct display_stream_compressor *dsc,
431 		struct dsc_enc_caps *dsc_enc_caps,
432 		int pixel_clock_100Hz)
433 {
434 	// This is a static HW query, so we can use any DSC
435 
436 	memset(dsc_enc_caps, 0, sizeof(struct dsc_enc_caps));
437 	if (dsc) {
438 		if (!dsc->ctx->dc->debug.disable_dsc)
439 			dsc->funcs->dsc_get_enc_caps(dsc_enc_caps, pixel_clock_100Hz);
440 		if (dsc->ctx->dc->debug.native422_support)
441 			dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
442 	}
443 }
444 
445 /* Returns 'false' if no intersection was found for at least one capability.
446  * It also implicitly validates some sink caps against invalid value of zero.
447  */
448 static bool intersect_dsc_caps(
449 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
450 		const struct dsc_enc_caps *dsc_enc_caps,
451 		enum dc_pixel_encoding pixel_encoding,
452 		struct dsc_enc_caps *dsc_common_caps)
453 {
454 	int32_t max_slices;
455 	int32_t total_sink_throughput;
456 
457 	memset(dsc_common_caps, 0, sizeof(struct dsc_enc_caps));
458 
459 	dsc_common_caps->dsc_version = min(dsc_sink_caps->dsc_version, dsc_enc_caps->dsc_version);
460 	if (!dsc_common_caps->dsc_version)
461 		return false;
462 
463 	dsc_common_caps->slice_caps.bits.NUM_SLICES_1 =
464 		dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_1;
465 	dsc_common_caps->slice_caps.bits.NUM_SLICES_2 =
466 		dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_2;
467 	dsc_common_caps->slice_caps.bits.NUM_SLICES_4 =
468 		dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
469 	dsc_common_caps->slice_caps.bits.NUM_SLICES_8 =
470 		dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_8;
471 	if (!dsc_common_caps->slice_caps.raw)
472 		return false;
473 
474 	dsc_common_caps->lb_bit_depth = min(dsc_sink_caps->lb_bit_depth, dsc_enc_caps->lb_bit_depth);
475 	if (!dsc_common_caps->lb_bit_depth)
476 		return false;
477 
478 	dsc_common_caps->is_block_pred_supported =
479 		dsc_sink_caps->is_block_pred_supported && dsc_enc_caps->is_block_pred_supported;
480 
481 	dsc_common_caps->color_formats.raw = dsc_sink_caps->color_formats.raw & dsc_enc_caps->color_formats.raw;
482 	if (!dsc_common_caps->color_formats.raw)
483 		return false;
484 
485 	dsc_common_caps->color_depth.raw = dsc_sink_caps->color_depth.raw & dsc_enc_caps->color_depth.raw;
486 	if (!dsc_common_caps->color_depth.raw)
487 		return false;
488 
489 	max_slices = 0;
490 	if (dsc_common_caps->slice_caps.bits.NUM_SLICES_1)
491 		max_slices = 1;
492 
493 	if (dsc_common_caps->slice_caps.bits.NUM_SLICES_2)
494 		max_slices = 2;
495 
496 	if (dsc_common_caps->slice_caps.bits.NUM_SLICES_4)
497 		max_slices = 4;
498 
499 	total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_0_mps;
500 	if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420)
501 		total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_1_mps;
502 
503 	dsc_common_caps->max_total_throughput_mps = min(total_sink_throughput, dsc_enc_caps->max_total_throughput_mps);
504 
505 	dsc_common_caps->max_slice_width = min(dsc_sink_caps->max_slice_width, dsc_enc_caps->max_slice_width);
506 	if (!dsc_common_caps->max_slice_width)
507 		return false;
508 
509 	dsc_common_caps->bpp_increment_div = min(dsc_sink_caps->bpp_increment_div, dsc_enc_caps->bpp_increment_div);
510 
511 	// TODO DSC: Remove this workaround for N422 and 420 once it's fixed, or move it to get_dsc_encoder_caps()
512 	if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420)
513 		dsc_common_caps->bpp_increment_div = min(dsc_common_caps->bpp_increment_div, (uint32_t)8);
514 
515 	dsc_common_caps->edp_sink_max_bits_per_pixel = dsc_sink_caps->edp_max_bits_per_pixel;
516 	dsc_common_caps->is_dp = dsc_sink_caps->is_dp;
517 	return true;
518 }
519 
520 static inline uint32_t dsc_div_by_10_round_up(uint32_t value)
521 {
522 	return (value + 9) / 10;
523 }
524 
525 static uint32_t compute_bpp_x16_from_target_bandwidth(
526 	const uint32_t bandwidth_in_kbps,
527 	const struct dc_crtc_timing *timing,
528 	const uint32_t num_slices_h,
529 	const uint32_t bpp_increment_div,
530 	const bool is_dp)
531 {
532 	uint32_t overhead_in_kbps;
533 	struct fixed31_32 effective_bandwidth_in_kbps;
534 	struct fixed31_32 bpp_x16;
535 
536 	overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps(
537 				timing, num_slices_h, is_dp);
538 	effective_bandwidth_in_kbps = dc_fixpt_from_int(bandwidth_in_kbps);
539 	effective_bandwidth_in_kbps = dc_fixpt_sub_int(effective_bandwidth_in_kbps,
540 			overhead_in_kbps);
541 	bpp_x16 = dc_fixpt_mul_int(effective_bandwidth_in_kbps, 10);
542 	bpp_x16 = dc_fixpt_div_int(bpp_x16, timing->pix_clk_100hz);
543 	bpp_x16 = dc_fixpt_from_int(dc_fixpt_floor(dc_fixpt_mul_int(bpp_x16, bpp_increment_div)));
544 	bpp_x16 = dc_fixpt_div_int(bpp_x16, bpp_increment_div);
545 	bpp_x16 = dc_fixpt_mul_int(bpp_x16, 16);
546 	return dc_fixpt_floor(bpp_x16);
547 }
548 
549 /* Decide DSC bandwidth range based on signal, timing, specs specific and input min and max
550  * requirements.
551  * The range output includes decided min/max target bpp, the respective bandwidth requirements
552  * and native timing bandwidth requirement when DSC is not used.
553  */
554 static bool decide_dsc_bandwidth_range(
555 		const uint32_t min_bpp_x16,
556 		const uint32_t max_bpp_x16,
557 		const uint32_t num_slices_h,
558 		const struct dsc_enc_caps *dsc_caps,
559 		const struct dc_crtc_timing *timing,
560 		struct dc_dsc_bw_range *range)
561 {
562 	uint32_t preferred_bpp_x16 = timing->dsc_fixed_bits_per_pixel_x16;
563 
564 	memset(range, 0, sizeof(*range));
565 
566 	/* apply signal, timing, specs and explicitly specified DSC range requirements */
567 	if (preferred_bpp_x16) {
568 		if (preferred_bpp_x16 <= max_bpp_x16 &&
569 				preferred_bpp_x16 >= min_bpp_x16) {
570 			range->max_target_bpp_x16 = preferred_bpp_x16;
571 			range->min_target_bpp_x16 = preferred_bpp_x16;
572 		}
573 	}
574 	/* TODO - make this value generic to all signal types */
575 	else if (dsc_caps->edp_sink_max_bits_per_pixel) {
576 		/* apply max bpp limitation from edp sink */
577 		range->max_target_bpp_x16 = MIN(dsc_caps->edp_sink_max_bits_per_pixel,
578 				max_bpp_x16);
579 		range->min_target_bpp_x16 = min_bpp_x16;
580 	}
581 	else {
582 		range->max_target_bpp_x16 = max_bpp_x16;
583 		range->min_target_bpp_x16 = min_bpp_x16;
584 	}
585 
586 	/* populate output structure */
587 	if (range->max_target_bpp_x16 >= range->min_target_bpp_x16 && range->min_target_bpp_x16 > 0) {
588 		/* native stream bandwidth */
589 		range->stream_kbps = dc_bandwidth_in_kbps_from_timing(timing);
590 
591 		/* max dsc target bpp */
592 		range->max_kbps = dc_dsc_stream_bandwidth_in_kbps(timing,
593 				range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp);
594 
595 		/* min dsc target bpp */
596 		range->min_kbps = dc_dsc_stream_bandwidth_in_kbps(timing,
597 				range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp);
598 	}
599 
600 	return range->max_kbps >= range->min_kbps && range->min_kbps > 0;
601 }
602 
603 /* Decides if DSC should be used and calculates target bpp if it should, applying DSC policy.
604  *
605  * Returns:
606  *     - 'true' if target bpp is decided
607  *     - 'false' if target bpp cannot be decided (e.g. cannot fit even with min DSC bpp),
608  */
609 static bool decide_dsc_target_bpp_x16(
610 		const struct dc_dsc_policy *policy,
611 		const struct dsc_enc_caps *dsc_common_caps,
612 		const int target_bandwidth_kbps,
613 		const struct dc_crtc_timing *timing,
614 		const int num_slices_h,
615 		int *target_bpp_x16)
616 {
617 	struct dc_dsc_bw_range range;
618 
619 	*target_bpp_x16 = 0;
620 
621 	if (decide_dsc_bandwidth_range(policy->min_target_bpp * 16, policy->max_target_bpp * 16,
622 			num_slices_h, dsc_common_caps, timing, &range)) {
623 		if (target_bandwidth_kbps >= range.stream_kbps) {
624 			if (policy->enable_dsc_when_not_needed)
625 				/* enable max bpp even dsc is not needed */
626 				*target_bpp_x16 = range.max_target_bpp_x16;
627 		} else if (target_bandwidth_kbps >= range.max_kbps) {
628 			/* use max target bpp allowed */
629 			*target_bpp_x16 = range.max_target_bpp_x16;
630 		} else if (target_bandwidth_kbps >= range.min_kbps) {
631 			/* use target bpp that can take entire target bandwidth */
632 			*target_bpp_x16 = compute_bpp_x16_from_target_bandwidth(
633 					target_bandwidth_kbps, timing, num_slices_h,
634 					dsc_common_caps->bpp_increment_div,
635 					dsc_common_caps->is_dp);
636 		}
637 	}
638 
639 	return *target_bpp_x16 != 0;
640 }
641 
642 #define MIN_AVAILABLE_SLICES_SIZE  6
643 
644 static int get_available_dsc_slices(union dsc_enc_slice_caps slice_caps, int *available_slices)
645 {
646 	int idx = 0;
647 
648 	if (slice_caps.bits.NUM_SLICES_1)
649 		available_slices[idx++] = 1;
650 
651 	if (slice_caps.bits.NUM_SLICES_2)
652 		available_slices[idx++] = 2;
653 
654 	if (slice_caps.bits.NUM_SLICES_4)
655 		available_slices[idx++] = 4;
656 
657 	if (slice_caps.bits.NUM_SLICES_8)
658 		available_slices[idx++] = 8;
659 
660 	return idx;
661 }
662 
663 
664 static int get_max_dsc_slices(union dsc_enc_slice_caps slice_caps)
665 {
666 	int max_slices = 0;
667 	int available_slices[MIN_AVAILABLE_SLICES_SIZE];
668 	int end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
669 
670 	if (end_idx > 0)
671 		max_slices = available_slices[end_idx - 1];
672 
673 	return max_slices;
674 }
675 
676 
677 // Increment slice number in available slice numbers stops if possible, or just increment if not
678 static int inc_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices)
679 {
680 	// Get next bigger num slices available in common caps
681 	int available_slices[MIN_AVAILABLE_SLICES_SIZE];
682 	int end_idx;
683 	int i;
684 	int new_num_slices = num_slices;
685 
686 	end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
687 	if (end_idx == 0) {
688 		// No available slices found
689 		new_num_slices++;
690 		return new_num_slices;
691 	}
692 
693 	// Numbers of slices found - get the next bigger number
694 	for (i = 0; i < end_idx; i++) {
695 		if (new_num_slices < available_slices[i]) {
696 			new_num_slices = available_slices[i];
697 			break;
698 		}
699 	}
700 
701 	if (new_num_slices == num_slices) // No bigger number of slices found
702 		new_num_slices++;
703 
704 	return new_num_slices;
705 }
706 
707 
708 // Decrement slice number in available slice numbers stops if possible, or just decrement if not. Stop at zero.
709 static int dec_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices)
710 {
711 	// Get next bigger num slices available in common caps
712 	int available_slices[MIN_AVAILABLE_SLICES_SIZE];
713 	int end_idx;
714 	int i;
715 	int new_num_slices = num_slices;
716 
717 	end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
718 	if (end_idx == 0 && new_num_slices > 0) {
719 		// No numbers of slices found
720 		new_num_slices++;
721 		return new_num_slices;
722 	}
723 
724 	// Numbers of slices found - get the next smaller number
725 	for (i = end_idx - 1; i >= 0; i--) {
726 		if (new_num_slices > available_slices[i]) {
727 			new_num_slices = available_slices[i];
728 			break;
729 		}
730 	}
731 
732 	if (new_num_slices == num_slices) {
733 		// No smaller number of slices found
734 		new_num_slices--;
735 		if (new_num_slices < 0)
736 			new_num_slices = 0;
737 	}
738 
739 	return new_num_slices;
740 }
741 
742 
743 // Choose next bigger number of slices if the requested number of slices is not available
744 static int fit_num_slices_up(union dsc_enc_slice_caps slice_caps, int num_slices)
745 {
746 	// Get next bigger num slices available in common caps
747 	int available_slices[MIN_AVAILABLE_SLICES_SIZE];
748 	int end_idx;
749 	int i;
750 	int new_num_slices = num_slices;
751 
752 	end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]);
753 	if (end_idx == 0) {
754 		// No available slices found
755 		new_num_slices++;
756 		return new_num_slices;
757 	}
758 
759 	// Numbers of slices found - get the equal or next bigger number
760 	for (i = 0; i < end_idx; i++) {
761 		if (new_num_slices <= available_slices[i]) {
762 			new_num_slices = available_slices[i];
763 			break;
764 		}
765 	}
766 
767 	return new_num_slices;
768 }
769 
770 
771 /* Attempts to set DSC configuration for the stream, applying DSC policy.
772  * Returns 'true' if successful or 'false' if not.
773  *
774  * Parameters:
775  *
776  * dsc_sink_caps       - DSC sink decoder capabilities (from DPCD)
777  *
778  * dsc_enc_caps        - DSC encoder capabilities
779  *
780  * target_bandwidth_kbps  - Target bandwidth to fit the stream into.
781  *                          If 0, do not calculate target bpp.
782  *
783  * timing              - The stream timing to fit into 'target_bandwidth_kbps' or apply
784  *                       maximum compression to, if 'target_badwidth == 0'
785  *
786  * dsc_cfg             - DSC configuration to use if it was possible to come up with
787  *                       one for the given inputs.
788  *                       The target bitrate after DSC can be calculated by multiplying
789  *                       dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g.
790  *
791  *                       dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0);
792  */
793 static bool setup_dsc_config(
794 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
795 		const struct dsc_enc_caps *dsc_enc_caps,
796 		int target_bandwidth_kbps,
797 		const struct dc_crtc_timing *timing,
798 		const struct dc_dsc_config_options *options,
799 		struct dc_dsc_config *dsc_cfg)
800 {
801 	struct dsc_enc_caps dsc_common_caps;
802 	int max_slices_h;
803 	int min_slices_h;
804 	int num_slices_h;
805 	int pic_width;
806 	int slice_width;
807 	int target_bpp;
808 	int sink_per_slice_throughput_mps;
809 	int branch_max_throughput_mps = 0;
810 	bool is_dsc_possible = false;
811 	int pic_height;
812 	int slice_height;
813 	struct dc_dsc_policy policy;
814 
815 	memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
816 
817 	dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy);
818 	pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right;
819 	pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
820 
821 	if (!dsc_sink_caps->is_dsc_supported)
822 		goto done;
823 
824 	if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width)
825 		goto done;
826 
827 	// Intersect decoder with encoder DSC caps and validate DSC settings
828 	is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, dsc_enc_caps, timing->pixel_encoding, &dsc_common_caps);
829 	if (!is_dsc_possible)
830 		goto done;
831 
832 	sink_per_slice_throughput_mps = 0;
833 
834 	// Validate available DSC settings against the mode timing
835 
836 	// Validate color format (and pick up the throughput values)
837 	dsc_cfg->ycbcr422_simple = false;
838 	switch (timing->pixel_encoding)	{
839 	case PIXEL_ENCODING_RGB:
840 		is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.RGB;
841 		sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
842 		branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps;
843 		break;
844 	case PIXEL_ENCODING_YCBCR444:
845 		is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_444;
846 		sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
847 		branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps;
848 		break;
849 	case PIXEL_ENCODING_YCBCR422:
850 		is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_422;
851 		sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps;
852 		branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps;
853 		if (!is_dsc_possible) {
854 			is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_SIMPLE_422;
855 			dsc_cfg->ycbcr422_simple = is_dsc_possible;
856 			sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps;
857 		}
858 		break;
859 	case PIXEL_ENCODING_YCBCR420:
860 		is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_420;
861 		sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps;
862 		branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps;
863 		break;
864 	default:
865 		is_dsc_possible = false;
866 	}
867 
868 	// Validate branch's maximum throughput
869 	if (branch_max_throughput_mps && dsc_div_by_10_round_up(timing->pix_clk_100hz) > branch_max_throughput_mps * 1000)
870 		is_dsc_possible = false;
871 
872 	if (!is_dsc_possible)
873 		goto done;
874 
875 	// Color depth
876 	switch (timing->display_color_depth) {
877 	case COLOR_DEPTH_888:
878 		is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_8_BPC;
879 		break;
880 	case COLOR_DEPTH_101010:
881 		is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_10_BPC;
882 		break;
883 	case COLOR_DEPTH_121212:
884 		is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_12_BPC;
885 		break;
886 	default:
887 		is_dsc_possible = false;
888 	}
889 
890 	if (!is_dsc_possible)
891 		goto done;
892 
893 	// Slice width (i.e. number of slices per line)
894 	max_slices_h = get_max_dsc_slices(dsc_common_caps.slice_caps);
895 
896 	while (max_slices_h > 0) {
897 		if (pic_width % max_slices_h == 0)
898 			break;
899 
900 		max_slices_h = dec_num_slices(dsc_common_caps.slice_caps, max_slices_h);
901 	}
902 
903 	is_dsc_possible = (dsc_common_caps.max_slice_width > 0);
904 	if (!is_dsc_possible)
905 		goto done;
906 
907 	min_slices_h = pic_width / dsc_common_caps.max_slice_width;
908 	if (pic_width % dsc_common_caps.max_slice_width)
909 		min_slices_h++;
910 
911 	min_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, min_slices_h);
912 
913 	while (min_slices_h <= max_slices_h) {
914 		int pix_clk_per_slice_khz = dsc_div_by_10_round_up(timing->pix_clk_100hz) / min_slices_h;
915 		if (pix_clk_per_slice_khz <= sink_per_slice_throughput_mps * 1000)
916 			break;
917 
918 		min_slices_h = inc_num_slices(dsc_common_caps.slice_caps, min_slices_h);
919 	}
920 
921 	is_dsc_possible = (min_slices_h <= max_slices_h);
922 
923 	if (pic_width % min_slices_h != 0)
924 		min_slices_h = 0; // DSC TODO: Maybe try increasing the number of slices first?
925 
926 	if (min_slices_h == 0 && max_slices_h == 0)
927 		is_dsc_possible = false;
928 
929 	if (!is_dsc_possible)
930 		goto done;
931 
932 	if (policy.use_min_slices_h) {
933 		if (min_slices_h > 0)
934 			num_slices_h = min_slices_h;
935 		else if (max_slices_h > 0) { // Fall back to max slices if min slices is not working out
936 			if (policy.max_slices_h)
937 				num_slices_h = min(policy.max_slices_h, max_slices_h);
938 			else
939 				num_slices_h = max_slices_h;
940 		} else
941 			is_dsc_possible = false;
942 	} else {
943 		if (max_slices_h > 0) {
944 			if (policy.max_slices_h)
945 				num_slices_h = min(policy.max_slices_h, max_slices_h);
946 			else
947 				num_slices_h = max_slices_h;
948 		} else if (min_slices_h > 0) // Fall back to min slices if max slices is not possible
949 			num_slices_h = min_slices_h;
950 		else
951 			is_dsc_possible = false;
952 	}
953 	// When we force 2:1 ODM, we can't have 1 slice to divide amongst 2 separate DSC instances
954 	// need to enforce at minimum 2 horizontal slices
955 	if (options->dsc_force_odm_hslice_override) {
956 		num_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, 2);
957 		if (num_slices_h == 0)
958 			is_dsc_possible = false;
959 	}
960 
961 	if (!is_dsc_possible)
962 		goto done;
963 
964 	dsc_cfg->num_slices_h = num_slices_h;
965 	slice_width = pic_width / num_slices_h;
966 
967 	is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width;
968 	if (!is_dsc_possible)
969 		goto done;
970 
971 	// Slice height (i.e. number of slices per column): start with policy and pick the first one that height is divisible by.
972 	// For 4:2:0 make sure the slice height is divisible by 2 as well.
973 	if (options->dsc_min_slice_height_override == 0)
974 		slice_height = min(policy.min_slice_height, pic_height);
975 	else
976 		slice_height = min((int)(options->dsc_min_slice_height_override), pic_height);
977 
978 	while (slice_height < pic_height && (pic_height % slice_height != 0 ||
979 		slice_height % options->slice_height_granularity != 0 ||
980 		(timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0)))
981 		slice_height++;
982 
983 	if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) // For the case when pic_height < dsc_policy.min_sice_height
984 		is_dsc_possible = (slice_height % 2 == 0);
985 
986 	if (!is_dsc_possible)
987 		goto done;
988 
989 	dsc_cfg->num_slices_v = pic_height/slice_height;
990 
991 	if (target_bandwidth_kbps > 0) {
992 		is_dsc_possible = decide_dsc_target_bpp_x16(
993 				&policy,
994 				&dsc_common_caps,
995 				target_bandwidth_kbps,
996 				timing,
997 				num_slices_h,
998 				&target_bpp);
999 		dsc_cfg->bits_per_pixel = target_bpp;
1000 	}
1001 	if (!is_dsc_possible)
1002 		goto done;
1003 
1004 	// Final decission: can we do DSC or not?
1005 	if (is_dsc_possible) {
1006 		// Fill out the rest of DSC settings
1007 		dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported;
1008 		dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth;
1009 		dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4;
1010 		dsc_cfg->is_dp = dsc_sink_caps->is_dp;
1011 	}
1012 
1013 done:
1014 	if (!is_dsc_possible)
1015 		memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
1016 
1017 	return is_dsc_possible;
1018 }
1019 
1020 bool dc_dsc_compute_config(
1021 		const struct display_stream_compressor *dsc,
1022 		const struct dsc_dec_dpcd_caps *dsc_sink_caps,
1023 		const struct dc_dsc_config_options *options,
1024 		uint32_t target_bandwidth_kbps,
1025 		const struct dc_crtc_timing *timing,
1026 		struct dc_dsc_config *dsc_cfg)
1027 {
1028 	bool is_dsc_possible = false;
1029 	struct dsc_enc_caps dsc_enc_caps;
1030 
1031 	get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz);
1032 	is_dsc_possible = setup_dsc_config(dsc_sink_caps,
1033 		&dsc_enc_caps,
1034 		target_bandwidth_kbps,
1035 		timing, options, dsc_cfg);
1036 	return is_dsc_possible;
1037 }
1038 
1039 uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,
1040 	uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp)
1041 {
1042 	uint32_t overhead_in_kbps;
1043 	struct fixed31_32 bpp;
1044 	struct fixed31_32 actual_bandwidth_in_kbps;
1045 
1046 	overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps(
1047 		timing, num_slices_h, is_dp);
1048 	bpp = dc_fixpt_from_fraction(bpp_x16, 16);
1049 	actual_bandwidth_in_kbps = dc_fixpt_from_fraction(timing->pix_clk_100hz, 10);
1050 	actual_bandwidth_in_kbps = dc_fixpt_mul(actual_bandwidth_in_kbps, bpp);
1051 	actual_bandwidth_in_kbps = dc_fixpt_add_int(actual_bandwidth_in_kbps, overhead_in_kbps);
1052 	return dc_fixpt_ceil(actual_bandwidth_in_kbps);
1053 }
1054 
1055 uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
1056 		const struct dc_crtc_timing *timing,
1057 		const int num_slices_h,
1058 		const bool is_dp)
1059 {
1060 	struct fixed31_32 max_dsc_overhead;
1061 	struct fixed31_32 refresh_rate;
1062 
1063 	if (dsc_policy_disable_dsc_stream_overhead || !is_dp)
1064 		return 0;
1065 
1066 	/* use target bpp that can take entire target bandwidth */
1067 	refresh_rate = dc_fixpt_from_int(timing->pix_clk_100hz);
1068 	refresh_rate = dc_fixpt_div_int(refresh_rate, timing->h_total);
1069 	refresh_rate = dc_fixpt_div_int(refresh_rate, timing->v_total);
1070 	refresh_rate = dc_fixpt_mul_int(refresh_rate, 100);
1071 
1072 	max_dsc_overhead = dc_fixpt_from_int(num_slices_h);
1073 	max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, timing->v_total);
1074 	max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, 256);
1075 	max_dsc_overhead = dc_fixpt_div_int(max_dsc_overhead, 1000);
1076 	max_dsc_overhead = dc_fixpt_mul(max_dsc_overhead, refresh_rate);
1077 
1078 	return dc_fixpt_ceil(max_dsc_overhead);
1079 }
1080 
1081 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
1082 		uint32_t max_target_bpp_limit_override_x16,
1083 		struct dc_dsc_policy *policy)
1084 {
1085 	uint32_t bpc = 0;
1086 
1087 	policy->min_target_bpp = 0;
1088 	policy->max_target_bpp = 0;
1089 
1090 	/* DSC Policy: Use minimum number of slices that fits the pixel clock */
1091 	policy->use_min_slices_h = true;
1092 
1093 	/* DSC Policy: Use max available slices
1094 	 * (in our case 4 for or 8, depending on the mode)
1095 	 */
1096 	policy->max_slices_h = 0;
1097 
1098 	/* DSC Policy: Use slice height recommended
1099 	 * by VESA DSC Spreadsheet user guide
1100 	 */
1101 	policy->min_slice_height = 108;
1102 
1103 	/* DSC Policy: follow DP specs with an internal upper limit to 16 bpp
1104 	 * for better interoperability
1105 	 */
1106 	switch (timing->display_color_depth) {
1107 	case COLOR_DEPTH_888:
1108 		bpc = 8;
1109 		break;
1110 	case COLOR_DEPTH_101010:
1111 		bpc = 10;
1112 		break;
1113 	case COLOR_DEPTH_121212:
1114 		bpc = 12;
1115 		break;
1116 	default:
1117 		return;
1118 	}
1119 	switch (timing->pixel_encoding) {
1120 	case PIXEL_ENCODING_RGB:
1121 	case PIXEL_ENCODING_YCBCR444:
1122 	case PIXEL_ENCODING_YCBCR422: /* assume no YCbCr422 native support */
1123 		/* DP specs limits to 8 */
1124 		policy->min_target_bpp = 8;
1125 		/* DP specs limits to 3 x bpc */
1126 		policy->max_target_bpp = 3 * bpc;
1127 		break;
1128 	case PIXEL_ENCODING_YCBCR420:
1129 		/* DP specs limits to 6 */
1130 		policy->min_target_bpp = 6;
1131 		/* DP specs limits to 1.5 x bpc assume bpc is an even number */
1132 		policy->max_target_bpp = bpc * 3 / 2;
1133 		break;
1134 	default:
1135 		return;
1136 	}
1137 
1138 	/* internal upper limit, default 16 bpp */
1139 	if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit)
1140 		policy->max_target_bpp = dsc_policy_max_target_bpp_limit;
1141 
1142 	/* apply override */
1143 	if (max_target_bpp_limit_override_x16 && policy->max_target_bpp > max_target_bpp_limit_override_x16 / 16)
1144 		policy->max_target_bpp = max_target_bpp_limit_override_x16 / 16;
1145 
1146 	/* enable DSC when not needed, default false */
1147 	if (dsc_policy_enable_dsc_when_not_needed)
1148 		policy->enable_dsc_when_not_needed = dsc_policy_enable_dsc_when_not_needed;
1149 	else
1150 		policy->enable_dsc_when_not_needed = false;
1151 }
1152 
1153 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit)
1154 {
1155 	dsc_policy_max_target_bpp_limit = limit;
1156 }
1157 
1158 void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable)
1159 {
1160 	dsc_policy_enable_dsc_when_not_needed = enable;
1161 }
1162 
1163 void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable)
1164 {
1165 	dsc_policy_disable_dsc_stream_overhead = disable;
1166 }
1167 
1168 void dc_dsc_get_default_config_option(const struct dc *dc, struct dc_dsc_config_options *options)
1169 {
1170 	options->dsc_min_slice_height_override = dc->debug.dsc_min_slice_height_override;
1171 	options->dsc_force_odm_hslice_override = dc->debug.force_odm_combine;
1172 	options->max_target_bpp_limit_override_x16 = 0;
1173 	options->slice_height_granularity = 1;
1174 }
1175