1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * This file defines helper functions provided by the Display Manager to 28 * Display Core. 29 */ 30 #ifndef __DM_HELPERS__ 31 #define __DM_HELPERS__ 32 33 #include "modules/inc/mod_info_packet_types.h" 34 #include "dc_types.h" 35 #include "dc.h" 36 37 struct dc_dp_mst_stream_allocation_table; 38 struct aux_payload; 39 enum aux_return_code_type; 40 enum set_config_status; 41 42 /* 43 * Allocate memory accessible by the GPU 44 * 45 * frame buffer allocations must be aligned to a 4096-byte boundary 46 * 47 * Returns virtual address, sets addr to physical address 48 */ 49 void *dm_helpers_allocate_gpu_mem( 50 struct dc_context *ctx, 51 enum dc_gpu_mem_alloc_type type, 52 size_t size, 53 long long *addr); 54 55 /* 56 * Free the GPU-accessible memory at the virtual address pvMem 57 */ 58 void dm_helpers_free_gpu_mem( 59 struct dc_context *ctx, 60 enum dc_gpu_mem_alloc_type type, 61 void *pvMem); 62 63 enum dc_edid_status dm_helpers_parse_edid_caps( 64 struct dc_link *link, 65 const struct dc_edid *edid, 66 struct dc_edid_caps *edid_caps); 67 68 69 /* 70 * Update DP branch info 71 */ 72 void dm_helpers_dp_update_branch_info( 73 struct dc_context *ctx, 74 const struct dc_link *link); 75 76 /* 77 * Writes payload allocation table in immediate downstream device. 78 */ 79 bool dm_helpers_dp_mst_write_payload_allocation_table( 80 struct dc_context *ctx, 81 const struct dc_stream_state *stream, 82 struct dc_dp_mst_stream_allocation_table *proposed_table, 83 bool enable); 84 85 /* 86 * poll pending down reply 87 */ 88 void dm_helpers_dp_mst_poll_pending_down_reply( 89 struct dc_context *ctx, 90 const struct dc_link *link); 91 92 /* 93 * Clear payload allocation table before enable MST DP link. 94 */ 95 void dm_helpers_dp_mst_clear_payload_allocation_table( 96 struct dc_context *ctx, 97 const struct dc_link *link); 98 99 /* 100 * Polls for ACT (allocation change trigger) handled and 101 */ 102 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger( 103 struct dc_context *ctx, 104 const struct dc_stream_state *stream); 105 /* 106 * Sends ALLOCATE_PAYLOAD message. 107 */ 108 void dm_helpers_dp_mst_send_payload_allocation( 109 struct dc_context *ctx, 110 const struct dc_stream_state *stream); 111 112 /* 113 * Update mst manager relevant variables 114 */ 115 void dm_helpers_dp_mst_update_mst_mgr_for_deallocation( 116 struct dc_context *ctx, 117 const struct dc_stream_state *stream); 118 119 bool dm_helpers_dp_mst_start_top_mgr( 120 struct dc_context *ctx, 121 const struct dc_link *link, 122 bool boot); 123 124 bool dm_helpers_dp_mst_stop_top_mgr( 125 struct dc_context *ctx, 126 struct dc_link *link); 127 128 void dm_helpers_dp_mst_update_branch_bandwidth( 129 struct dc_context *ctx, 130 struct dc_link *link); 131 132 /** 133 * OS specific aux read callback. 134 */ 135 bool dm_helpers_dp_read_dpcd( 136 struct dc_context *ctx, 137 const struct dc_link *link, 138 uint32_t address, 139 uint8_t *data, 140 uint32_t size); 141 142 /** 143 * OS specific aux write callback. 144 */ 145 bool dm_helpers_dp_write_dpcd( 146 struct dc_context *ctx, 147 const struct dc_link *link, 148 uint32_t address, 149 const uint8_t *data, 150 uint32_t size); 151 152 bool dm_helpers_submit_i2c( 153 struct dc_context *ctx, 154 const struct dc_link *link, 155 struct i2c_command *cmd); 156 157 bool dm_helpers_execute_fused_io( 158 struct dc_context *ctx, 159 struct dc_link *link, 160 union dmub_rb_cmd *commands, 161 uint8_t count, 162 uint32_t timeout_us 163 ); 164 165 bool dm_helpers_dp_write_dsc_enable( 166 struct dc_context *ctx, 167 const struct dc_stream_state *stream, 168 bool enable 169 ); 170 171 bool dm_helpers_dp_write_hblank_reduction( 172 struct dc_context *ctx, 173 const struct dc_stream_state *stream); 174 175 bool dm_helpers_is_dp_sink_present( 176 struct dc_link *link); 177 178 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream); 179 180 enum dc_edid_status dm_helpers_read_local_edid( 181 struct dc_context *ctx, 182 struct dc_link *link, 183 struct dc_sink *sink); 184 185 void dm_helpers_read_mccs_caps( 186 struct dc_context *ctx, 187 struct dc_link *link, 188 struct dc_sink *sink); 189 190 void dm_helpers_mccs_vcp_set( 191 struct dc_context *ctx, 192 struct dc_link *link, 193 struct dc_sink *sink); 194 195 bool dm_helpers_dp_handle_test_pattern_request( 196 struct dc_context *ctx, 197 const struct dc_link *link, 198 union link_test_pattern dpcd_test_pattern, 199 union test_misc dpcd_test_params); 200 201 void dm_set_dcn_clocks( 202 struct dc_context *ctx, 203 struct dc_clocks *clks); 204 205 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable); 206 207 void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz); 208 209 bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable); 210 211 void dm_helpers_dmu_timeout(struct dc_context *ctx); 212 void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us); 213 214 // 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy 215 #define IS_SMU_TIMEOUT(result) \ 216 (result == 0x0) 217 void dm_helpers_init_panel_settings( 218 struct dc_context *ctx, 219 struct dc_panel_config *config, 220 struct dc_sink *sink); 221 void dm_helpers_override_panel_settings( 222 struct dc_context *ctx, 223 struct dc_link *link); 224 int dm_helper_dmub_aux_transfer_sync( 225 struct dc_context *ctx, 226 const struct dc_link *link, 227 struct aux_payload *payload, 228 enum aux_return_code_type *operation_result); 229 230 int dm_helpers_dmub_set_config_sync(struct dc_context *ctx, 231 const struct dc_link *link, 232 struct set_config_cmd_payload *payload, 233 enum set_config_status *operation_result); 234 enum adaptive_sync_type dm_get_adaptive_sync_support_type(struct dc_link *link); 235 236 enum dc_edid_status dm_helpers_get_sbios_edid(struct dc_link *link, struct dc_edid *edid); 237 238 bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_state *stream); 239 bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *stream); 240 241 #endif /* __DM_HELPERS__ */ 242