xref: /linux/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_opp.c (revision 173b0b5b0e865348684c02bd9cb1d22b5d46e458)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 #include "dcn201_opp.h"
28 #include "reg_helper.h"
29 
30 #define REG(reg) \
31 	(oppn201->regs->reg)
32 
33 #undef FN
34 #define FN(reg_name, field_name) \
35 	oppn201->opp_shift->field_name, oppn201->opp_mask->field_name
36 
37 #define CTX \
38 	oppn201->base.ctx
39 
40 /*****************************************/
41 /* Constructor, Destructor               */
42 /*****************************************/
43 
44 static struct opp_funcs dcn201_opp_funcs = {
45 		.opp_set_dyn_expansion = opp1_set_dyn_expansion,
46 		.opp_program_fmt = opp1_program_fmt,
47 		.opp_program_bit_depth_reduction = opp1_program_bit_depth_reduction,
48 		.opp_program_stereo = opp1_program_stereo,
49 		.opp_pipe_clock_control = opp1_pipe_clock_control,
50 		.opp_set_disp_pattern_generator = opp2_set_disp_pattern_generator,
51 		.opp_program_dpg_dimensions = opp2_program_dpg_dimensions,
52 		.dpg_is_blanked = opp2_dpg_is_blanked,
53 		.dpg_is_pending = opp2_dpg_is_pending,
54 		.opp_dpg_set_blank_color = opp2_dpg_set_blank_color,
55 		.opp_destroy = opp1_destroy,
56 		.opp_program_left_edge_extra_pixel = opp2_program_left_edge_extra_pixel,
57 };
58 
59 void dcn201_opp_construct(struct dcn201_opp *oppn201,
60 	struct dc_context *ctx,
61 	uint32_t inst,
62 	const struct dcn201_opp_registers *regs,
63 	const struct dcn201_opp_shift *opp_shift,
64 	const struct dcn201_opp_mask *opp_mask)
65 {
66 	oppn201->base.ctx = ctx;
67 	oppn201->base.inst = inst;
68 	oppn201->base.funcs = &dcn201_opp_funcs;
69 
70 	oppn201->regs = regs;
71 	oppn201->opp_shift = opp_shift;
72 	oppn201->opp_mask = opp_mask;
73 }
74