1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 bool subvp_limit_cursor_size; /* stream has/is using subvp limiting hw cursor support */ 48 bool cursor_size_limit_subvp; /* stream is using hw cursor config preventing subvp */ 49 }; 50 51 struct dc_stream_status { 52 int primary_otg_inst; 53 int stream_enc_inst; 54 55 /** 56 * @plane_count: Total of planes attached to a single stream 57 */ 58 int plane_count; 59 int audio_inst; 60 struct timing_sync_info timing_sync_info; 61 struct dc_plane_state *plane_states[MAX_SURFACES]; 62 bool is_abm_supported; 63 struct mall_stream_config mall_stream_config; 64 bool fpo_in_use; 65 }; 66 67 68 struct dc_writeback_info { 69 bool wb_enabled; 70 int dwb_pipe_inst; 71 struct dc_dwb_params dwb_params; 72 struct mcif_buf_params mcif_buf_params; 73 struct mcif_warmup_params mcif_warmup_params; 74 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 75 struct dc_plane_state *writeback_source_plane; 76 /* source MPCC instance. for use by internally by dc */ 77 int mpcc_inst; 78 }; 79 80 struct dc_writeback_update { 81 unsigned int num_wb_info; 82 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 83 }; 84 85 enum vertical_interrupt_ref_point { 86 START_V_UPDATE = 0, 87 START_V_SYNC, 88 INVALID_POINT 89 90 //For now, only v_update interrupt is used. 91 //START_V_BLANK, 92 //START_V_ACTIVE 93 }; 94 95 struct periodic_interrupt_config { 96 enum vertical_interrupt_ref_point ref_point; 97 int lines_offset; 98 }; 99 100 struct dc_mst_stream_bw_update { 101 bool is_increase; // is bandwidth reduced or increased 102 uint32_t mst_stream_bw; // new mst bandwidth in kbps 103 }; 104 105 union stream_update_flags { 106 struct { 107 uint32_t scaling:1; 108 uint32_t out_tf:1; 109 uint32_t out_csc:1; 110 uint32_t abm_level:1; 111 uint32_t dpms_off:1; 112 uint32_t gamut_remap:1; 113 uint32_t wb_update:1; 114 uint32_t dsc_changed : 1; 115 uint32_t mst_bw : 1; 116 uint32_t crtc_timing_adjust : 1; 117 uint32_t fams_changed : 1; 118 uint32_t scaler_sharpener : 1; 119 uint32_t sharpening_required : 1; 120 uint32_t cursor_attr : 1; 121 uint32_t cursor_pos : 1; 122 uint32_t periodic_interrupt : 1; 123 uint32_t info_frame : 1; 124 uint32_t dmdata : 1; 125 uint32_t dither : 1; 126 } bits; 127 128 uint32_t raw; 129 }; 130 131 struct test_pattern { 132 enum dp_test_pattern type; 133 enum dp_test_pattern_color_space color_space; 134 struct link_training_settings const *p_link_settings; 135 unsigned char const *p_custom_pattern; 136 unsigned int cust_pattern_size; 137 }; 138 139 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 140 141 struct dc_stream_debug_options { 142 uint8_t force_odm_combine_segments; 143 /* 144 * When force_odm_combine_segments is non zero, allow dc to 145 * temporarily transition to ODM bypass when minimal transition state 146 * is required to prevent visual glitches showing on the screen 147 */ 148 uint8_t allow_transition_for_forced_odm; 149 }; 150 151 #define LUMINANCE_DATA_TABLE_SIZE 10 152 153 struct luminance_data { 154 bool is_valid; 155 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 156 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 157 int flicker_criteria_milli_nits_GAMING; 158 int flicker_criteria_milli_nits_STATIC; 159 int nominal_refresh_rate; 160 int dm_max_decrease_from_nominal; 161 }; 162 163 enum dc_drr_trigger_mode { 164 DRR_TRIGGER_ON_FLIP = 0, 165 DRR_TRIGGER_ON_FLIP_AND_CURSOR, 166 }; 167 168 struct dc_stream_state { 169 // sink is deprecated, new code should not reference 170 // this pointer 171 struct dc_sink *sink; 172 173 struct dc_link *link; 174 /* For dynamic link encoder assignment, update the link encoder assigned to 175 * a stream via the volatile dc_state rather than the static dc_link. 176 */ 177 struct link_encoder *link_enc; 178 struct dc_stream_debug_options debug; 179 struct dc_panel_patch sink_patches; 180 struct dc_crtc_timing timing; 181 struct dc_crtc_timing_adjust adjust; 182 struct dc_info_packet vrr_infopacket; 183 struct dc_info_packet vsc_infopacket; 184 struct dc_info_packet vsp_infopacket; 185 struct dc_info_packet hfvsif_infopacket; 186 struct dc_info_packet vtem_infopacket; 187 struct dc_info_packet adaptive_sync_infopacket; 188 struct dc_info_packet avi_infopacket; 189 uint8_t dsc_packed_pps[128]; 190 struct rect src; /* composition area */ 191 struct rect dst; /* stream addressable area */ 192 193 struct audio_info audio_info; 194 195 struct dc_info_packet hdr_static_metadata; 196 PHYSICAL_ADDRESS_LOC dmdata_address; 197 bool use_dynamic_meta; 198 199 struct dc_transfer_func out_transfer_func; 200 struct colorspace_transform gamut_remap_matrix; 201 struct dc_csc_transform csc_color_matrix; 202 203 enum dc_color_space output_color_space; 204 enum display_content_type content_type; 205 enum dc_dither_option dither_option; 206 207 enum view_3d_format view_format; 208 209 bool use_vsc_sdp_for_colorimetry; 210 bool ignore_msa_timing_param; 211 212 /** 213 * @allow_freesync: 214 * 215 * It say if Freesync is enabled or not. 216 */ 217 bool allow_freesync; 218 219 /** 220 * @vrr_active_variable: 221 * 222 * It describes if VRR is in use. 223 */ 224 bool vrr_active_variable; 225 bool freesync_on_desktop; 226 bool vrr_active_fixed; 227 228 bool converter_disable_audio; 229 uint8_t qs_bit; 230 uint8_t qy_bit; 231 232 /* TODO: custom INFO packets */ 233 /* TODO: ABM info (DMCU) */ 234 /* TODO: CEA VIC */ 235 236 /* DMCU info */ 237 unsigned int abm_level; 238 239 struct periodic_interrupt_config periodic_interrupt; 240 241 /* from core_stream struct */ 242 struct dc_context *ctx; 243 244 /* used by DCP and FMT */ 245 struct bit_depth_reduction_params bit_depth_params; 246 struct clamping_and_pixel_encoding_params clamping; 247 248 int phy_pix_clk; 249 enum signal_type signal; 250 bool dpms_off; 251 252 void *dm_stream_context; 253 254 struct dc_cursor_attributes cursor_attributes; 255 struct dc_cursor_position cursor_position; 256 bool hw_cursor_req; 257 258 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 259 260 /* from stream struct */ 261 struct kref refcount; 262 263 struct crtc_trigger_info triggered_crtc_reset; 264 265 /* writeback */ 266 unsigned int num_wb_info; 267 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 268 const struct dc_transfer_func *func_shaper; 269 const struct dc_3dlut *lut3d_func; 270 /* Computed state bits */ 271 bool mode_changed : 1; 272 273 /* Output from DC when stream state is committed or altered 274 * DC may only access these values during: 275 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 276 * values may not change outside of those calls 277 */ 278 struct { 279 // For interrupt management, some hardware instance 280 // offsets need to be exposed to DM 281 uint8_t otg_offset; 282 } out; 283 284 bool apply_edp_fast_boot_optimization; 285 bool apply_seamless_boot_optimization; 286 uint32_t apply_boot_odm_mode; 287 288 uint32_t stream_id; 289 290 struct test_pattern test_pattern; 291 union stream_update_flags update_flags; 292 293 bool has_non_synchronizable_pclk; 294 bool vblank_synchronized; 295 bool is_phantom; 296 297 struct luminance_data lumin_data; 298 bool scaler_sharpener_update; 299 bool sharpening_required; 300 301 enum dc_drr_trigger_mode drr_trigger_mode; 302 303 struct dc_update_scratch_space *update_scratch; 304 }; 305 306 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 307 308 struct dc_stream_update { 309 struct dc_stream_state *stream; 310 311 struct rect src; 312 struct rect dst; 313 struct dc_transfer_func *out_transfer_func; 314 struct dc_info_packet *hdr_static_metadata; 315 unsigned int *abm_level; 316 317 struct periodic_interrupt_config *periodic_interrupt; 318 319 struct dc_info_packet *vrr_infopacket; 320 struct dc_info_packet *vsc_infopacket; 321 struct dc_info_packet *vsp_infopacket; 322 struct dc_info_packet *hfvsif_infopacket; 323 struct dc_info_packet *vtem_infopacket; 324 struct dc_info_packet *adaptive_sync_infopacket; 325 struct dc_info_packet *avi_infopacket; 326 327 bool *dpms_off; 328 bool integer_scaling_update; 329 bool *allow_freesync; 330 bool *vrr_active_variable; 331 bool *vrr_active_fixed; 332 333 struct colorspace_transform *gamut_remap; 334 enum dc_color_space *output_color_space; 335 enum dc_dither_option *dither_option; 336 337 struct dc_csc_transform *output_csc_transform; 338 339 struct dc_writeback_update *wb_update; 340 struct dc_dsc_config *dsc_config; 341 struct dc_mst_stream_bw_update *mst_bw_update; 342 struct dc_transfer_func *func_shaper; 343 struct dc_3dlut *lut3d_func; 344 345 struct test_pattern *pending_test_pattern; 346 struct dc_crtc_timing_adjust *crtc_timing_adjust; 347 348 struct dc_cursor_attributes *cursor_attributes; 349 struct dc_cursor_position *cursor_position; 350 bool *hw_cursor_req; 351 bool *scaler_sharpener_update; 352 bool *sharpening_required; 353 354 enum dc_drr_trigger_mode *drr_trigger_mode; 355 }; 356 357 bool dc_is_stream_unchanged( 358 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 359 bool dc_is_stream_scaling_unchanged( 360 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 361 362 /* 363 * Setup stream attributes if no stream updates are provided 364 * there will be no impact on the stream parameters 365 * 366 * Set up surface attributes and associate to a stream 367 * The surfaces parameter is an absolute set of all surface active for the stream. 368 * If no surfaces are provided, the stream will be blanked; no memory read. 369 * Any flip related attribute changes must be done through this interface. 370 * 371 * After this call: 372 * Surfaces attributes are programmed and configured to be composed into stream. 373 * This does not trigger a flip. No surface address is programmed. 374 * 375 */ 376 bool dc_update_planes_and_stream(struct dc *dc, 377 struct dc_surface_update *surface_updates, int surface_count, 378 struct dc_stream_state *dc_stream, 379 struct dc_stream_update *stream_update); 380 381 struct dc_update_scratch_space; 382 383 size_t dc_update_scratch_space_size(void); 384 385 struct dc_update_scratch_space *dc_update_planes_and_stream_init( 386 struct dc *dc, 387 struct dc_surface_update *surface_updates, 388 int surface_count, 389 struct dc_stream_state *dc_stream, 390 struct dc_stream_update *stream_update 391 ); 392 393 // Locked, false is failed 394 bool dc_update_planes_and_stream_prepare( 395 struct dc_update_scratch_space *scratch 396 ); 397 398 // Unlocked 399 void dc_update_planes_and_stream_execute( 400 const struct dc_update_scratch_space *scratch 401 ); 402 403 // Locked, true if call again 404 bool dc_update_planes_and_stream_cleanup( 405 struct dc_update_scratch_space *scratch 406 ); 407 408 /* 409 * Set up surface attributes and associate to a stream 410 * The surfaces parameter is an absolute set of all surface active for the stream. 411 * If no surfaces are provided, the stream will be blanked; no memory read. 412 * Any flip related attribute changes must be done through this interface. 413 * 414 * After this call: 415 * Surfaces attributes are programmed and configured to be composed into stream. 416 * This does not trigger a flip. No surface address is programmed. 417 */ 418 void dc_commit_updates_for_stream(struct dc *dc, 419 struct dc_surface_update *srf_updates, 420 int surface_count, 421 struct dc_stream_state *stream, 422 struct dc_stream_update *stream_update, 423 struct dc_state *state); 424 /* 425 * Log the current stream state. 426 */ 427 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 428 429 uint8_t dc_get_current_stream_count(struct dc *dc); 430 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 431 432 /* 433 * Return the current frame counter. 434 */ 435 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 436 437 /* 438 * Send dp sdp message. 439 */ 440 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 441 const uint8_t *custom_sdp_message, 442 unsigned int sdp_message_size); 443 444 /* TODO: Return parsed values rather than direct register read 445 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 446 * being refactored properly to be dce-specific 447 */ 448 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 449 uint32_t *v_blank_start, 450 uint32_t *v_blank_end, 451 uint32_t *h_position, 452 uint32_t *v_position); 453 454 bool dc_stream_add_writeback(struct dc *dc, 455 struct dc_stream_state *stream, 456 struct dc_writeback_info *wb_info); 457 458 bool dc_stream_fc_disable_writeback(struct dc *dc, 459 struct dc_stream_state *stream, 460 uint32_t dwb_pipe_inst); 461 462 bool dc_stream_remove_writeback(struct dc *dc, 463 struct dc_stream_state *stream, 464 uint32_t dwb_pipe_inst); 465 466 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 467 struct dc_state *state, 468 struct dc_stream_state *stream); 469 470 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 471 472 bool dc_stream_set_dynamic_metadata(struct dc *dc, 473 struct dc_stream_state *stream, 474 struct dc_dmdata_attributes *dmdata_attr); 475 476 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 477 478 /* 479 * Enable stereo when commit_streams is not required, 480 * for example, frame alternate. 481 */ 482 void dc_enable_stereo( 483 struct dc *dc, 484 struct dc_state *context, 485 struct dc_stream_state *streams[], 486 uint8_t stream_count); 487 488 /* Triggers multi-stream synchronization. */ 489 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 490 491 struct surface_update_descriptor dc_check_update_surfaces_for_stream( 492 const struct dc_check_config *check_config, 493 struct dc_surface_update *updates, 494 int surface_count, 495 struct dc_stream_update *stream_update); 496 497 struct dc_link *dc_stream_get_link( 498 const struct dc_stream_state *dc_stream); 499 500 /** 501 * Create a new default stream for the requested sink 502 */ 503 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 504 505 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 506 507 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 508 509 void dc_stream_retain(struct dc_stream_state *dc_stream); 510 void dc_stream_release(struct dc_stream_state *dc_stream); 511 512 struct dc_stream_status *dc_stream_get_status(struct dc_stream_state *dc_stream); 513 const struct dc_stream_status *dc_stream_get_status_const(const struct dc_stream_state *dc_stream); 514 515 /******************************************************************************* 516 * Cursor interfaces - To manages the cursor within a stream 517 ******************************************************************************/ 518 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 519 520 void program_cursor_attributes( 521 struct dc *dc, 522 struct dc_stream_state *stream); 523 524 void program_cursor_position( 525 struct dc *dc, 526 struct dc_stream_state *stream); 527 528 bool dc_stream_check_cursor_attributes( 529 const struct dc_stream_state *stream, 530 struct dc_state *state, 531 const struct dc_cursor_attributes *attributes); 532 533 bool dc_stream_set_cursor_attributes( 534 struct dc_stream_state *stream, 535 const struct dc_cursor_attributes *attributes); 536 537 bool dc_stream_program_cursor_attributes( 538 struct dc_stream_state *stream, 539 const struct dc_cursor_attributes *attributes); 540 541 bool dc_stream_set_cursor_position( 542 struct dc_stream_state *stream, 543 const struct dc_cursor_position *position); 544 545 bool dc_stream_program_cursor_position( 546 struct dc_stream_state *stream, 547 const struct dc_cursor_position *position); 548 549 550 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 551 struct dc_stream_state *stream, 552 struct dc_crtc_timing_adjust *adjust); 553 554 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 555 struct dc_stream_state *stream, 556 uint32_t *refresh_rate); 557 558 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 559 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 560 struct rect *rect, 561 uint8_t phy_id, 562 bool is_stop); 563 564 bool dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream, 565 struct crc_window *window, 566 uint8_t phy_id, 567 bool stop); 568 #endif 569 570 bool dc_stream_configure_crc(struct dc *dc, 571 struct dc_stream_state *stream, 572 struct crc_params *crc_window, 573 bool enable, 574 bool continuous, 575 uint8_t idx, 576 bool reset, 577 enum crc_poly_mode crc_poly_mode); 578 579 bool dc_stream_get_crc(struct dc *dc, 580 struct dc_stream_state *stream, 581 uint8_t idx, 582 uint32_t *r_cr, 583 uint32_t *g_y, 584 uint32_t *b_cb); 585 586 void dc_stream_set_static_screen_params(struct dc *dc, 587 struct dc_stream_state **stream, 588 int num_streams, 589 const struct dc_static_screen_params *params); 590 591 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 592 enum dc_dynamic_expansion option); 593 594 void dc_stream_set_dither_option(struct dc_stream_state *stream, 595 enum dc_dither_option option); 596 597 bool dc_stream_set_gamut_remap(struct dc *dc, 598 const struct dc_stream_state *stream); 599 600 bool dc_stream_program_csc_matrix(struct dc *dc, 601 struct dc_stream_state *stream); 602 603 struct dc_rmcm_3dlut *dc_stream_get_3dlut_for_stream( 604 const struct dc *dc, 605 const struct dc_stream_state *stream, 606 bool allocate_one); 607 608 void dc_stream_release_3dlut_for_stream( 609 const struct dc *dc, 610 const struct dc_stream_state *stream); 611 612 void dc_stream_init_rmcm_3dlut(struct dc *dc); 613 614 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 615 616 void dc_dmub_update_dirty_rect(struct dc *dc, 617 int surface_count, 618 struct dc_stream_state *stream, 619 const struct dc_surface_update *srf_updates, 620 struct dc_state *context); 621 622 bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream); 623 bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream); 624 625 #endif /* DC_STREAM_H_ */ 626