1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 bool subvp_limit_cursor_size; /* stream has/is using subvp limiting hw cursor support */ 48 bool cursor_size_limit_subvp; /* stream is using hw cursor config preventing subvp */ 49 }; 50 51 struct dc_stream_status { 52 int primary_otg_inst; 53 int stream_enc_inst; 54 55 /** 56 * @plane_count: Total of planes attached to a single stream 57 */ 58 int plane_count; 59 int audio_inst; 60 struct timing_sync_info timing_sync_info; 61 struct dc_plane_state *plane_states[MAX_SURFACES]; 62 bool is_abm_supported; 63 struct mall_stream_config mall_stream_config; 64 bool fpo_in_use; 65 }; 66 67 68 struct dc_writeback_info { 69 bool wb_enabled; 70 int dwb_pipe_inst; 71 struct dc_dwb_params dwb_params; 72 struct mcif_buf_params mcif_buf_params; 73 struct mcif_warmup_params mcif_warmup_params; 74 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 75 struct dc_plane_state *writeback_source_plane; 76 /* source MPCC instance. for use by internally by dc */ 77 int mpcc_inst; 78 }; 79 80 struct dc_writeback_update { 81 unsigned int num_wb_info; 82 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 83 }; 84 85 enum vertical_interrupt_ref_point { 86 START_V_UPDATE = 0, 87 START_V_SYNC, 88 INVALID_POINT 89 90 //For now, only v_update interrupt is used. 91 //START_V_BLANK, 92 //START_V_ACTIVE 93 }; 94 95 struct periodic_interrupt_config { 96 enum vertical_interrupt_ref_point ref_point; 97 int lines_offset; 98 }; 99 100 struct dc_mst_stream_bw_update { 101 bool is_increase; // is bandwidth reduced or increased 102 uint32_t mst_stream_bw; // new mst bandwidth in kbps 103 }; 104 105 union stream_update_flags { 106 struct { 107 uint32_t scaling:1; 108 uint32_t out_tf:1; 109 uint32_t out_csc:1; 110 uint32_t abm_level:1; 111 uint32_t dpms_off:1; 112 uint32_t gamut_remap:1; 113 uint32_t wb_update:1; 114 uint32_t dsc_changed : 1; 115 uint32_t mst_bw : 1; 116 uint32_t crtc_timing_adjust : 1; 117 uint32_t fams_changed : 1; 118 uint32_t scaler_sharpener : 1; 119 uint32_t sharpening_required : 1; 120 uint32_t cursor_attr : 1; 121 uint32_t cursor_pos : 1; 122 uint32_t periodic_interrupt : 1; 123 uint32_t info_frame : 1; 124 uint32_t dmdata : 1; 125 uint32_t dither : 1; 126 uint32_t func_shaper : 1; 127 uint32_t lut3d_func : 1; 128 uint32_t reserved : 11; /* adjust when adding new flags */ 129 } bits; 130 131 uint32_t raw; 132 }; 133 134 struct test_pattern { 135 enum dp_test_pattern type; 136 enum dp_test_pattern_color_space color_space; 137 struct link_training_settings const *p_link_settings; 138 unsigned char const *p_custom_pattern; 139 unsigned int cust_pattern_size; 140 }; 141 142 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 143 144 struct dc_stream_debug_options { 145 uint8_t force_odm_combine_segments; 146 /* 147 * When force_odm_combine_segments is non zero, allow dc to 148 * temporarily transition to ODM bypass when minimal transition state 149 * is required to prevent visual glitches showing on the screen 150 */ 151 uint8_t allow_transition_for_forced_odm; 152 }; 153 154 #define LUMINANCE_DATA_TABLE_SIZE 10 155 156 struct luminance_data { 157 bool is_valid; 158 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 159 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 160 int flicker_criteria_milli_nits_GAMING; 161 int flicker_criteria_milli_nits_STATIC; 162 unsigned int nominal_refresh_rate; 163 unsigned int dm_max_decrease_from_nominal; 164 }; 165 166 enum dc_drr_trigger_mode { 167 DRR_TRIGGER_ON_FLIP = 0, 168 DRR_TRIGGER_ON_FLIP_AND_CURSOR, 169 }; 170 171 struct dc_stream_state { 172 // sink is deprecated, new code should not reference 173 // this pointer 174 struct dc_sink *sink; 175 176 struct dc_link *link; 177 /* For dynamic link encoder assignment, update the link encoder assigned to 178 * a stream via the volatile dc_state rather than the static dc_link. 179 */ 180 struct link_encoder *link_enc; 181 struct dc_stream_debug_options debug; 182 struct dc_panel_patch sink_patches; 183 struct dc_crtc_timing timing; 184 struct dc_crtc_timing_adjust adjust; 185 struct dc_info_packet vrr_infopacket; 186 struct dc_info_packet vsc_infopacket; 187 struct dc_info_packet vsp_infopacket; 188 struct dc_info_packet hfvsif_infopacket; 189 struct dc_info_packet vtem_infopacket; 190 struct dc_info_packet adaptive_sync_infopacket; 191 struct dc_info_packet avi_infopacket; 192 uint8_t dsc_packed_pps[128]; 193 struct rect src; /* composition area */ 194 struct rect dst; /* stream addressable area */ 195 196 struct audio_info audio_info; 197 198 struct dc_info_packet hdr_static_metadata; 199 PHYSICAL_ADDRESS_LOC dmdata_address; 200 bool use_dynamic_meta; 201 202 struct dc_transfer_func out_transfer_func; 203 struct colorspace_transform gamut_remap_matrix; 204 struct dc_csc_transform csc_color_matrix; 205 206 enum dc_color_space output_color_space; 207 enum display_content_type content_type; 208 enum dc_dither_option dither_option; 209 210 enum view_3d_format view_format; 211 212 bool use_vsc_sdp_for_colorimetry; 213 bool ignore_msa_timing_param; 214 215 /** 216 * @allow_freesync: 217 * 218 * It say if Freesync is enabled or not. 219 */ 220 bool allow_freesync; 221 222 /** 223 * @vrr_active_variable: 224 * 225 * It describes if VRR is in use. 226 */ 227 bool vrr_active_variable; 228 bool freesync_on_desktop; 229 bool vrr_active_fixed; 230 231 bool converter_disable_audio; 232 uint8_t qs_bit; 233 uint8_t qy_bit; 234 235 /* TODO: custom INFO packets */ 236 /* TODO: ABM info (DMCU) */ 237 /* TODO: CEA VIC */ 238 239 /* DMCU info */ 240 unsigned int abm_level; 241 242 struct periodic_interrupt_config periodic_interrupt; 243 244 /* from core_stream struct */ 245 struct dc_context *ctx; 246 247 /* used by DCP and FMT */ 248 struct bit_depth_reduction_params bit_depth_params; 249 struct clamping_and_pixel_encoding_params clamping; 250 251 int phy_pix_clk; 252 enum signal_type signal; 253 bool dpms_off; 254 255 void *dm_stream_context; 256 257 struct dc_cursor_attributes cursor_attributes; 258 struct dc_cursor_position cursor_position; 259 bool hw_cursor_req; 260 261 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 262 263 /* from stream struct */ 264 struct kref refcount; 265 266 struct crtc_trigger_info triggered_crtc_reset; 267 268 /* writeback */ 269 unsigned int num_wb_info; 270 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 271 const struct dc_transfer_func *func_shaper; 272 const struct dc_3dlut *lut3d_func; 273 /* Computed state bits */ 274 bool mode_changed : 1; 275 276 /* Output from DC when stream state is committed or altered 277 * DC may only access these values during: 278 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 279 * values may not change outside of those calls 280 */ 281 struct { 282 // For interrupt management, some hardware instance 283 // offsets need to be exposed to DM 284 uint8_t otg_offset; 285 } out; 286 287 bool apply_edp_fast_boot_optimization; 288 bool apply_seamless_boot_optimization; 289 uint32_t apply_boot_odm_mode; 290 291 uint32_t stream_id; 292 293 struct test_pattern test_pattern; 294 union stream_update_flags update_flags; 295 296 bool has_non_synchronizable_pclk; 297 bool vblank_synchronized; 298 bool is_phantom; 299 300 struct luminance_data lumin_data; 301 bool scaler_sharpener_update; 302 bool sharpening_required; 303 304 enum dc_drr_trigger_mode drr_trigger_mode; 305 306 struct dc_update_scratch_space *update_scratch; 307 bool firmware_controlled_hdr_info_packet; 308 }; 309 310 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 311 312 struct dc_stream_update { 313 struct dc_stream_state *stream; 314 315 struct rect src; 316 struct rect dst; 317 struct dc_transfer_func *out_transfer_func; 318 struct dc_info_packet *hdr_static_metadata; 319 unsigned int *abm_level; 320 321 struct periodic_interrupt_config *periodic_interrupt; 322 323 struct dc_info_packet *vrr_infopacket; 324 struct dc_info_packet *vsc_infopacket; 325 struct dc_info_packet *vsp_infopacket; 326 struct dc_info_packet *hfvsif_infopacket; 327 struct dc_info_packet *vtem_infopacket; 328 struct dc_info_packet *adaptive_sync_infopacket; 329 struct dc_info_packet *avi_infopacket; 330 331 bool *dpms_off; 332 bool integer_scaling_update; 333 bool *allow_freesync; 334 bool *vrr_active_variable; 335 bool *vrr_active_fixed; 336 337 struct colorspace_transform *gamut_remap; 338 enum dc_color_space *output_color_space; 339 enum dc_dither_option *dither_option; 340 341 struct dc_csc_transform *output_csc_transform; 342 343 struct dc_writeback_update *wb_update; 344 struct dc_dsc_config *dsc_config; 345 struct dc_mst_stream_bw_update *mst_bw_update; 346 struct dc_transfer_func *func_shaper; 347 struct dc_3dlut *lut3d_func; 348 349 struct test_pattern *pending_test_pattern; 350 struct dc_crtc_timing_adjust *crtc_timing_adjust; 351 352 struct dc_cursor_attributes *cursor_attributes; 353 struct dc_cursor_position *cursor_position; 354 bool *hw_cursor_req; 355 bool *scaler_sharpener_update; 356 bool *sharpening_required; 357 358 enum dc_drr_trigger_mode *drr_trigger_mode; 359 }; 360 361 bool dc_is_stream_unchanged( 362 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 363 bool dc_is_stream_scaling_unchanged( 364 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 365 366 /* 367 * Setup stream attributes if no stream updates are provided 368 * there will be no impact on the stream parameters 369 * 370 * Set up surface attributes and associate to a stream 371 * The surfaces parameter is an absolute set of all surface active for the stream. 372 * If no surfaces are provided, the stream will be blanked; no memory read. 373 * Any flip related attribute changes must be done through this interface. 374 * 375 * After this call: 376 * Surfaces attributes are programmed and configured to be composed into stream. 377 * This does not trigger a flip. No surface address is programmed. 378 * 379 */ 380 bool dc_update_planes_and_stream(struct dc *dc, 381 struct dc_surface_update *surface_updates, int surface_count, 382 struct dc_stream_state *dc_stream, 383 struct dc_stream_update *stream_update); 384 385 struct dc_update_scratch_space; 386 387 size_t dc_update_scratch_space_size(void); 388 389 struct dc_update_scratch_space *dc_update_planes_and_stream_init( 390 struct dc *dc, 391 struct dc_surface_update *surface_updates, 392 int surface_count, 393 struct dc_stream_state *dc_stream, 394 struct dc_stream_update *stream_update 395 ); 396 397 // Locked, false is failed 398 bool dc_update_planes_and_stream_prepare( 399 struct dc_update_scratch_space *scratch 400 ); 401 402 // Unlocked 403 void dc_update_planes_and_stream_execute( 404 const struct dc_update_scratch_space *scratch 405 ); 406 407 // Locked, true if call again 408 bool dc_update_planes_and_stream_cleanup( 409 struct dc_update_scratch_space *scratch 410 ); 411 412 /* 413 * Set up surface attributes and associate to a stream 414 * The surfaces parameter is an absolute set of all surface active for the stream. 415 * If no surfaces are provided, the stream will be blanked; no memory read. 416 * Any flip related attribute changes must be done through this interface. 417 * 418 * After this call: 419 * Surfaces attributes are programmed and configured to be composed into stream. 420 * This does not trigger a flip. No surface address is programmed. 421 */ 422 void dc_commit_updates_for_stream(struct dc *dc, 423 struct dc_surface_update *srf_updates, 424 int surface_count, 425 struct dc_stream_state *stream, 426 struct dc_stream_update *stream_update, 427 struct dc_state *state); 428 /* 429 * Log the current stream state. 430 */ 431 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 432 433 uint8_t dc_get_current_stream_count(struct dc *dc); 434 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 435 436 /* 437 * Return the current frame counter. 438 */ 439 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 440 441 /* 442 * Send dp sdp message. 443 */ 444 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 445 const uint8_t *custom_sdp_message, 446 unsigned int sdp_message_size); 447 448 /* TODO: Return parsed values rather than direct register read 449 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 450 * being refactored properly to be dce-specific 451 */ 452 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 453 uint32_t *v_blank_start, 454 uint32_t *v_blank_end, 455 uint32_t *h_position, 456 uint32_t *v_position); 457 458 bool dc_stream_add_writeback(struct dc *dc, 459 struct dc_stream_state *stream, 460 struct dc_writeback_info *wb_info); 461 462 bool dc_stream_fc_disable_writeback(struct dc *dc, 463 struct dc_stream_state *stream, 464 uint32_t dwb_pipe_inst); 465 466 bool dc_stream_remove_writeback(struct dc *dc, 467 struct dc_stream_state *stream, 468 uint32_t dwb_pipe_inst); 469 470 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 471 struct dc_state *state, 472 struct dc_stream_state *stream); 473 474 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 475 476 bool dc_stream_set_dynamic_metadata(struct dc *dc, 477 struct dc_stream_state *stream, 478 struct dc_dmdata_attributes *dmdata_attr); 479 480 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 481 482 /* 483 * Enable stereo when commit_streams is not required, 484 * for example, frame alternate. 485 */ 486 void dc_enable_stereo( 487 struct dc *dc, 488 struct dc_state *context, 489 struct dc_stream_state *streams[], 490 uint8_t stream_count); 491 492 /* Triggers multi-stream synchronization. */ 493 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 494 495 struct surface_update_descriptor dc_check_update_surfaces_for_stream( 496 const struct dc_check_config *check_config, 497 struct dc_surface_update *updates, 498 int surface_count, 499 struct dc_stream_update *stream_update); 500 501 struct dc_link *dc_stream_get_link( 502 const struct dc_stream_state *dc_stream); 503 504 /** 505 * Create a new default stream for the requested sink 506 */ 507 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 508 509 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 510 511 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 512 513 void dc_stream_retain(struct dc_stream_state *dc_stream); 514 void dc_stream_release(struct dc_stream_state *dc_stream); 515 516 struct dc_stream_status *dc_stream_get_status(struct dc_stream_state *dc_stream); 517 const struct dc_stream_status *dc_stream_get_status_const(const struct dc_stream_state *dc_stream); 518 519 /******************************************************************************* 520 * Cursor interfaces - To manages the cursor within a stream 521 ******************************************************************************/ 522 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 523 524 void program_cursor_attributes( 525 struct dc *dc, 526 struct dc_stream_state *stream); 527 528 void program_cursor_position( 529 struct dc *dc, 530 struct dc_stream_state *stream); 531 532 bool dc_stream_check_cursor_attributes( 533 const struct dc_stream_state *stream, 534 struct dc_state *state, 535 const struct dc_cursor_attributes *attributes); 536 537 bool dc_stream_set_cursor_attributes( 538 struct dc_stream_state *stream, 539 const struct dc_cursor_attributes *attributes); 540 541 bool dc_stream_program_cursor_attributes( 542 struct dc_stream_state *stream, 543 const struct dc_cursor_attributes *attributes); 544 545 bool dc_stream_set_cursor_position( 546 struct dc_stream_state *stream, 547 const struct dc_cursor_position *position); 548 549 bool dc_stream_program_cursor_position( 550 struct dc_stream_state *stream, 551 const struct dc_cursor_position *position); 552 553 554 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 555 struct dc_stream_state *stream, 556 struct dc_crtc_timing_adjust *adjust); 557 558 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 559 struct dc_stream_state *stream, 560 uint32_t *refresh_rate); 561 562 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 563 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 564 struct rect *rect, 565 uint8_t phy_id, 566 bool is_stop); 567 568 bool dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream, 569 struct crc_window *window, 570 uint8_t phy_id, 571 bool stop); 572 #endif 573 574 bool dc_stream_configure_crc(struct dc *dc, 575 struct dc_stream_state *stream, 576 struct crc_params *crc_window, 577 bool enable, 578 bool continuous, 579 uint8_t idx, 580 bool reset, 581 enum crc_poly_mode crc_poly_mode); 582 583 bool dc_stream_get_crc(struct dc *dc, 584 struct dc_stream_state *stream, 585 uint8_t idx, 586 uint32_t *r_cr, 587 uint32_t *g_y, 588 uint32_t *b_cb); 589 590 void dc_stream_set_static_screen_params(struct dc *dc, 591 struct dc_stream_state **stream, 592 int num_streams, 593 const struct dc_static_screen_params *params); 594 595 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 596 enum dc_dynamic_expansion option); 597 598 void dc_stream_set_dither_option(struct dc_stream_state *stream, 599 enum dc_dither_option option); 600 601 bool dc_stream_set_gamut_remap(struct dc *dc, 602 const struct dc_stream_state *stream); 603 604 bool dc_stream_program_csc_matrix(struct dc *dc, 605 struct dc_stream_state *stream); 606 607 struct dc_rmcm_3dlut *dc_stream_get_3dlut_for_stream( 608 const struct dc *dc, 609 const struct dc_stream_state *stream, 610 bool allocate_one); 611 612 void dc_stream_release_3dlut_for_stream( 613 const struct dc *dc, 614 const struct dc_stream_state *stream); 615 616 void dc_stream_init_rmcm_3dlut(struct dc *dc); 617 618 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 619 620 void dc_dmub_update_dirty_rect(struct dc *dc, 621 int surface_count, 622 struct dc_stream_state *stream, 623 const struct dc_surface_update *srf_updates, 624 struct dc_state *context); 625 626 bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream); 627 bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream); 628 629 #endif /* DC_STREAM_H_ */ 630