xref: /linux/drivers/gpu/drm/amd/display/dc/dc_stream.h (revision 8e1bb4a41aa78d6105e59186af3dcd545fc66e70)
1 /*
2  * Copyright 2012-14 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DC_STREAM_H_
27 #define DC_STREAM_H_
28 
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 
32 /*******************************************************************************
33  * Stream Interfaces
34  ******************************************************************************/
35 struct timing_sync_info {
36 	int group_id;
37 	int group_size;
38 	bool master;
39 };
40 
41 struct mall_stream_config {
42 	/* MALL stream config to indicate if the stream is phantom or not.
43 	 * We will use a phantom stream to indicate that the pipe is phantom.
44 	 */
45 	enum mall_stream_type type;
46 	struct dc_stream_state *paired_stream;	// master / slave stream
47 };
48 
49 struct dc_stream_status {
50 	int primary_otg_inst;
51 	int stream_enc_inst;
52 
53 	/**
54 	 * @plane_count: Total of planes attached to a single stream
55 	 */
56 	int plane_count;
57 	int audio_inst;
58 	struct timing_sync_info timing_sync_info;
59 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
60 	bool is_abm_supported;
61 	struct mall_stream_config mall_stream_config;
62 	bool fpo_in_use;
63 };
64 
65 enum hubp_dmdata_mode {
66 	DMDATA_SW_MODE,
67 	DMDATA_HW_MODE
68 };
69 
70 struct dc_dmdata_attributes {
71 	/* Specifies whether dynamic meta data will be updated by software
72 	 * or has to be fetched by hardware (DMA mode)
73 	 */
74 	enum hubp_dmdata_mode dmdata_mode;
75 	/* Specifies if current dynamic meta data is to be used only for the current frame */
76 	bool dmdata_repeat;
77 	/* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
78 	uint32_t dmdata_size;
79 	/* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
80 	bool dmdata_updated;
81 	/* If hardware mode is used, the base address where DMDATA surface is located */
82 	PHYSICAL_ADDRESS_LOC address;
83 	/* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
84 	bool dmdata_qos_mode;
85 	/* If qos_mode = 1, this is the QOS value to be used: */
86 	uint32_t dmdata_qos_level;
87 	/* Specifies the value in unit of REFCLK cycles to be added to the
88 	 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
89 	 */
90 	uint32_t dmdata_dl_delta;
91 	/* An unbounded array of uint32s, represents software dmdata to be loaded */
92 	uint32_t *dmdata_sw_data;
93 };
94 
95 struct dc_writeback_info {
96 	bool wb_enabled;
97 	int dwb_pipe_inst;
98 	struct dc_dwb_params dwb_params;
99 	struct mcif_buf_params mcif_buf_params;
100 	struct mcif_warmup_params mcif_warmup_params;
101 	/* the plane that is the input to TOP_MUX for MPCC that is the DWB source */
102 	struct dc_plane_state *writeback_source_plane;
103 	/* source MPCC instance.  for use by internally by dc */
104 	int mpcc_inst;
105 };
106 
107 struct dc_writeback_update {
108 	unsigned int num_wb_info;
109 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
110 };
111 
112 enum vertical_interrupt_ref_point {
113 	START_V_UPDATE = 0,
114 	START_V_SYNC,
115 	INVALID_POINT
116 
117 	//For now, only v_update interrupt is used.
118 	//START_V_BLANK,
119 	//START_V_ACTIVE
120 };
121 
122 struct periodic_interrupt_config {
123 	enum vertical_interrupt_ref_point ref_point;
124 	int lines_offset;
125 };
126 
127 struct dc_mst_stream_bw_update {
128 	bool is_increase; // is bandwidth reduced or increased
129 	uint32_t mst_stream_bw; // new mst bandwidth in kbps
130 };
131 
132 union stream_update_flags {
133 	struct {
134 		uint32_t scaling:1;
135 		uint32_t out_tf:1;
136 		uint32_t out_csc:1;
137 		uint32_t abm_level:1;
138 		uint32_t dpms_off:1;
139 		uint32_t gamut_remap:1;
140 		uint32_t wb_update:1;
141 		uint32_t dsc_changed : 1;
142 		uint32_t mst_bw : 1;
143 		uint32_t crtc_timing_adjust : 1;
144 		uint32_t fams_changed : 1;
145 	} bits;
146 
147 	uint32_t raw;
148 };
149 
150 struct test_pattern {
151 	enum dp_test_pattern type;
152 	enum dp_test_pattern_color_space color_space;
153 	struct link_training_settings const *p_link_settings;
154 	unsigned char const *p_custom_pattern;
155 	unsigned int cust_pattern_size;
156 };
157 
158 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR)
159 
160 struct dc_stream_debug_options {
161 	char force_odm_combine_segments;
162 };
163 
164 #define LUMINANCE_DATA_TABLE_SIZE 10
165 
166 struct luminance_data {
167 	bool is_valid;
168 	int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE];
169 	int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE];
170 	int flicker_criteria_milli_nits_GAMING;
171 	int flicker_criteria_milli_nits_STATIC;
172 	int nominal_refresh_rate;
173 	int dm_max_decrease_from_nominal;
174 };
175 
176 struct dc_stream_state {
177 	// sink is deprecated, new code should not reference
178 	// this pointer
179 	struct dc_sink *sink;
180 
181 	struct dc_link *link;
182 	/* For dynamic link encoder assignment, update the link encoder assigned to
183 	 * a stream via the volatile dc_state rather than the static dc_link.
184 	 */
185 	struct link_encoder *link_enc;
186 	struct dc_stream_debug_options debug;
187 	struct dc_panel_patch sink_patches;
188 	struct dc_crtc_timing timing;
189 	struct dc_crtc_timing_adjust adjust;
190 	struct dc_info_packet vrr_infopacket;
191 	struct dc_info_packet vsc_infopacket;
192 	struct dc_info_packet vsp_infopacket;
193 	struct dc_info_packet hfvsif_infopacket;
194 	struct dc_info_packet vtem_infopacket;
195 	struct dc_info_packet adaptive_sync_infopacket;
196 	uint8_t dsc_packed_pps[128];
197 	struct rect src; /* composition area */
198 	struct rect dst; /* stream addressable area */
199 
200 	struct audio_info audio_info;
201 
202 	struct dc_info_packet hdr_static_metadata;
203 	PHYSICAL_ADDRESS_LOC dmdata_address;
204 	bool   use_dynamic_meta;
205 
206 	struct dc_transfer_func out_transfer_func;
207 	struct colorspace_transform gamut_remap_matrix;
208 	struct dc_csc_transform csc_color_matrix;
209 
210 	enum dc_color_space output_color_space;
211 	enum display_content_type content_type;
212 	enum dc_dither_option dither_option;
213 
214 	enum view_3d_format view_format;
215 
216 	bool use_vsc_sdp_for_colorimetry;
217 	bool ignore_msa_timing_param;
218 
219 	/**
220 	 * @allow_freesync:
221 	 *
222 	 * It say if Freesync is enabled or not.
223 	 */
224 	bool allow_freesync;
225 
226 	/**
227 	 * @vrr_active_variable:
228 	 *
229 	 * It describes if VRR is in use.
230 	 */
231 	bool vrr_active_variable;
232 	bool freesync_on_desktop;
233 	bool vrr_active_fixed;
234 
235 	bool converter_disable_audio;
236 	uint8_t qs_bit;
237 	uint8_t qy_bit;
238 
239 	/* TODO: custom INFO packets */
240 	/* TODO: ABM info (DMCU) */
241 	/* TODO: CEA VIC */
242 
243 	/* DMCU info */
244 	unsigned int abm_level;
245 
246 	struct periodic_interrupt_config periodic_interrupt;
247 
248 	/* from core_stream struct */
249 	struct dc_context *ctx;
250 
251 	/* used by DCP and FMT */
252 	struct bit_depth_reduction_params bit_depth_params;
253 	struct clamping_and_pixel_encoding_params clamping;
254 
255 	int phy_pix_clk;
256 	enum signal_type signal;
257 	bool dpms_off;
258 
259 	void *dm_stream_context;
260 
261 	struct dc_cursor_attributes cursor_attributes;
262 	struct dc_cursor_position cursor_position;
263 	uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
264 
265 	/* from stream struct */
266 	struct kref refcount;
267 
268 	struct crtc_trigger_info triggered_crtc_reset;
269 
270 	/* writeback */
271 	unsigned int num_wb_info;
272 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
273 	const struct dc_transfer_func *func_shaper;
274 	const struct dc_3dlut *lut3d_func;
275 	/* Computed state bits */
276 	bool mode_changed : 1;
277 
278 	/* Output from DC when stream state is committed or altered
279 	 * DC may only access these values during:
280 	 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
281 	 * values may not change outside of those calls
282 	 */
283 	struct {
284 		// For interrupt management, some hardware instance
285 		// offsets need to be exposed to DM
286 		uint8_t otg_offset;
287 	} out;
288 
289 	bool apply_edp_fast_boot_optimization;
290 	bool apply_seamless_boot_optimization;
291 	uint32_t apply_boot_odm_mode;
292 
293 	uint32_t stream_id;
294 
295 	struct test_pattern test_pattern;
296 	union stream_update_flags update_flags;
297 
298 	bool has_non_synchronizable_pclk;
299 	bool vblank_synchronized;
300 	bool is_phantom;
301 
302 	struct luminance_data lumin_data;
303 };
304 
305 #define ABM_LEVEL_IMMEDIATE_DISABLE 255
306 
307 struct dc_stream_update {
308 	struct dc_stream_state *stream;
309 
310 	struct rect src;
311 	struct rect dst;
312 	struct dc_transfer_func *out_transfer_func;
313 	struct dc_info_packet *hdr_static_metadata;
314 	unsigned int *abm_level;
315 
316 	struct periodic_interrupt_config *periodic_interrupt;
317 
318 	struct dc_info_packet *vrr_infopacket;
319 	struct dc_info_packet *vsc_infopacket;
320 	struct dc_info_packet *vsp_infopacket;
321 	struct dc_info_packet *hfvsif_infopacket;
322 	struct dc_info_packet *vtem_infopacket;
323 	struct dc_info_packet *adaptive_sync_infopacket;
324 	bool *dpms_off;
325 	bool integer_scaling_update;
326 	bool *allow_freesync;
327 	bool *vrr_active_variable;
328 	bool *vrr_active_fixed;
329 
330 	struct colorspace_transform *gamut_remap;
331 	enum dc_color_space *output_color_space;
332 	enum dc_dither_option *dither_option;
333 
334 	struct dc_csc_transform *output_csc_transform;
335 
336 	struct dc_writeback_update *wb_update;
337 	struct dc_dsc_config *dsc_config;
338 	struct dc_mst_stream_bw_update *mst_bw_update;
339 	struct dc_transfer_func *func_shaper;
340 	struct dc_3dlut *lut3d_func;
341 
342 	struct test_pattern *pending_test_pattern;
343 	struct dc_crtc_timing_adjust *crtc_timing_adjust;
344 
345 	struct dc_cursor_attributes *cursor_attributes;
346 	struct dc_cursor_position *cursor_position;
347 };
348 
349 bool dc_is_stream_unchanged(
350 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
351 bool dc_is_stream_scaling_unchanged(
352 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
353 
354 /*
355  * Setup stream attributes if no stream updates are provided
356  * there will be no impact on the stream parameters
357  *
358  * Set up surface attributes and associate to a stream
359  * The surfaces parameter is an absolute set of all surface active for the stream.
360  * If no surfaces are provided, the stream will be blanked; no memory read.
361  * Any flip related attribute changes must be done through this interface.
362  *
363  * After this call:
364  *   Surfaces attributes are programmed and configured to be composed into stream.
365  *   This does not trigger a flip.  No surface address is programmed.
366  *
367  */
368 bool dc_update_planes_and_stream(struct dc *dc,
369 		struct dc_surface_update *surface_updates, int surface_count,
370 		struct dc_stream_state *dc_stream,
371 		struct dc_stream_update *stream_update);
372 
373 /*
374  * Set up surface attributes and associate to a stream
375  * The surfaces parameter is an absolute set of all surface active for the stream.
376  * If no surfaces are provided, the stream will be blanked; no memory read.
377  * Any flip related attribute changes must be done through this interface.
378  *
379  * After this call:
380  *   Surfaces attributes are programmed and configured to be composed into stream.
381  *   This does not trigger a flip.  No surface address is programmed.
382  */
383 void dc_commit_updates_for_stream(struct dc *dc,
384 		struct dc_surface_update *srf_updates,
385 		int surface_count,
386 		struct dc_stream_state *stream,
387 		struct dc_stream_update *stream_update,
388 		struct dc_state *state);
389 /*
390  * Log the current stream state.
391  */
392 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
393 
394 uint8_t dc_get_current_stream_count(struct dc *dc);
395 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
396 
397 /*
398  * Return the current frame counter.
399  */
400 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
401 
402 /*
403  * Send dp sdp message.
404  */
405 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
406 		const uint8_t *custom_sdp_message,
407 		unsigned int sdp_message_size);
408 
409 /* TODO: Return parsed values rather than direct register read
410  * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
411  * being refactored properly to be dce-specific
412  */
413 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
414 				  uint32_t *v_blank_start,
415 				  uint32_t *v_blank_end,
416 				  uint32_t *h_position,
417 				  uint32_t *v_position);
418 
419 bool dc_stream_add_writeback(struct dc *dc,
420 		struct dc_stream_state *stream,
421 		struct dc_writeback_info *wb_info);
422 
423 bool dc_stream_fc_disable_writeback(struct dc *dc,
424 		struct dc_stream_state *stream,
425 		uint32_t dwb_pipe_inst);
426 
427 bool dc_stream_remove_writeback(struct dc *dc,
428 		struct dc_stream_state *stream,
429 		uint32_t dwb_pipe_inst);
430 
431 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
432 		struct dc_state *state,
433 		struct dc_stream_state *stream);
434 
435 bool dc_stream_warmup_writeback(struct dc *dc,
436 		int num_dwb,
437 		struct dc_writeback_info *wb_info);
438 
439 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
440 
441 bool dc_stream_set_dynamic_metadata(struct dc *dc,
442 		struct dc_stream_state *stream,
443 		struct dc_dmdata_attributes *dmdata_attr);
444 
445 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
446 
447 /*
448  * Enable stereo when commit_streams is not required,
449  * for example, frame alternate.
450  */
451 void dc_enable_stereo(
452 	struct dc *dc,
453 	struct dc_state *context,
454 	struct dc_stream_state *streams[],
455 	uint8_t stream_count);
456 
457 /* Triggers multi-stream synchronization. */
458 void dc_trigger_sync(struct dc *dc, struct dc_state *context);
459 
460 enum surface_update_type dc_check_update_surfaces_for_stream(
461 		struct dc *dc,
462 		struct dc_surface_update *updates,
463 		int surface_count,
464 		struct dc_stream_update *stream_update,
465 		const struct dc_stream_status *stream_status);
466 
467 /**
468  * Create a new default stream for the requested sink
469  */
470 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
471 
472 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
473 
474 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
475 
476 void dc_stream_retain(struct dc_stream_state *dc_stream);
477 void dc_stream_release(struct dc_stream_state *dc_stream);
478 
479 struct dc_stream_status *dc_stream_get_status(
480 	struct dc_stream_state *dc_stream);
481 
482 /*******************************************************************************
483  * Cursor interfaces - To manages the cursor within a stream
484  ******************************************************************************/
485 /* TODO: Deprecated once we switch to dc_set_cursor_position */
486 
487 void program_cursor_attributes(
488 	struct dc *dc,
489 	struct dc_stream_state *stream);
490 
491 void program_cursor_position(
492 	struct dc *dc,
493 	struct dc_stream_state *stream);
494 
495 bool dc_stream_set_cursor_attributes(
496 	struct dc_stream_state *stream,
497 	const struct dc_cursor_attributes *attributes);
498 
499 bool dc_stream_program_cursor_attributes(
500 	struct dc_stream_state *stream,
501 	const struct dc_cursor_attributes *attributes);
502 
503 bool dc_stream_set_cursor_position(
504 	struct dc_stream_state *stream,
505 	const struct dc_cursor_position *position);
506 
507 bool dc_stream_program_cursor_position(
508 	struct dc_stream_state *stream,
509 	const struct dc_cursor_position *position);
510 
511 
512 bool dc_stream_adjust_vmin_vmax(struct dc *dc,
513 				struct dc_stream_state *stream,
514 				struct dc_crtc_timing_adjust *adjust);
515 
516 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc,
517 		struct dc_stream_state *stream,
518 		uint32_t *refresh_rate);
519 
520 bool dc_stream_get_crtc_position(struct dc *dc,
521 				 struct dc_stream_state **stream,
522 				 int num_streams,
523 				 unsigned int *v_pos,
524 				 unsigned int *nom_v_pos);
525 
526 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
527 bool dc_stream_forward_crc_window(struct dc_stream_state *stream,
528 		struct rect *rect,
529 		bool is_stop);
530 #endif
531 
532 bool dc_stream_configure_crc(struct dc *dc,
533 			     struct dc_stream_state *stream,
534 			     struct crc_params *crc_window,
535 			     bool enable,
536 			     bool continuous);
537 
538 bool dc_stream_get_crc(struct dc *dc,
539 		       struct dc_stream_state *stream,
540 		       uint32_t *r_cr,
541 		       uint32_t *g_y,
542 		       uint32_t *b_cb);
543 
544 void dc_stream_set_static_screen_params(struct dc *dc,
545 					struct dc_stream_state **stream,
546 					int num_streams,
547 					const struct dc_static_screen_params *params);
548 
549 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
550 		enum dc_dynamic_expansion option);
551 
552 void dc_stream_set_dither_option(struct dc_stream_state *stream,
553 				 enum dc_dither_option option);
554 
555 bool dc_stream_set_gamut_remap(struct dc *dc,
556 			       const struct dc_stream_state *stream);
557 
558 bool dc_stream_program_csc_matrix(struct dc *dc,
559 				  struct dc_stream_state *stream);
560 
561 bool dc_stream_get_crtc_position(struct dc *dc,
562 				 struct dc_stream_state **stream,
563 				 int num_streams,
564 				 unsigned int *v_pos,
565 				 unsigned int *nom_v_pos);
566 
567 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream);
568 
569 void dc_dmub_update_dirty_rect(struct dc *dc,
570 			       int surface_count,
571 			       struct dc_stream_state *stream,
572 			       struct dc_surface_update *srf_updates,
573 			       struct dc_state *context);
574 #endif /* DC_STREAM_H_ */
575