1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 }; 48 49 struct dc_stream_status { 50 int primary_otg_inst; 51 int stream_enc_inst; 52 53 /** 54 * @plane_count: Total of planes attached to a single stream 55 */ 56 int plane_count; 57 int audio_inst; 58 struct timing_sync_info timing_sync_info; 59 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 60 bool is_abm_supported; 61 struct mall_stream_config mall_stream_config; 62 }; 63 64 enum hubp_dmdata_mode { 65 DMDATA_SW_MODE, 66 DMDATA_HW_MODE 67 }; 68 69 struct dc_dmdata_attributes { 70 /* Specifies whether dynamic meta data will be updated by software 71 * or has to be fetched by hardware (DMA mode) 72 */ 73 enum hubp_dmdata_mode dmdata_mode; 74 /* Specifies if current dynamic meta data is to be used only for the current frame */ 75 bool dmdata_repeat; 76 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 77 uint32_t dmdata_size; 78 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 79 bool dmdata_updated; 80 /* If hardware mode is used, the base address where DMDATA surface is located */ 81 PHYSICAL_ADDRESS_LOC address; 82 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 83 bool dmdata_qos_mode; 84 /* If qos_mode = 1, this is the QOS value to be used: */ 85 uint32_t dmdata_qos_level; 86 /* Specifies the value in unit of REFCLK cycles to be added to the 87 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 88 */ 89 uint32_t dmdata_dl_delta; 90 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 91 uint32_t *dmdata_sw_data; 92 }; 93 94 struct dc_writeback_info { 95 bool wb_enabled; 96 int dwb_pipe_inst; 97 struct dc_dwb_params dwb_params; 98 struct mcif_buf_params mcif_buf_params; 99 struct mcif_warmup_params mcif_warmup_params; 100 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 101 struct dc_plane_state *writeback_source_plane; 102 /* source MPCC instance. for use by internally by dc */ 103 int mpcc_inst; 104 }; 105 106 struct dc_writeback_update { 107 unsigned int num_wb_info; 108 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 109 }; 110 111 enum vertical_interrupt_ref_point { 112 START_V_UPDATE = 0, 113 START_V_SYNC, 114 INVALID_POINT 115 116 //For now, only v_update interrupt is used. 117 //START_V_BLANK, 118 //START_V_ACTIVE 119 }; 120 121 struct periodic_interrupt_config { 122 enum vertical_interrupt_ref_point ref_point; 123 int lines_offset; 124 }; 125 126 struct dc_mst_stream_bw_update { 127 bool is_increase; // is bandwidth reduced or increased 128 uint32_t mst_stream_bw; // new mst bandwidth in kbps 129 }; 130 131 union stream_update_flags { 132 struct { 133 uint32_t scaling:1; 134 uint32_t out_tf:1; 135 uint32_t out_csc:1; 136 uint32_t abm_level:1; 137 uint32_t dpms_off:1; 138 uint32_t gamut_remap:1; 139 uint32_t wb_update:1; 140 uint32_t dsc_changed : 1; 141 uint32_t mst_bw : 1; 142 uint32_t fams_changed : 1; 143 } bits; 144 145 uint32_t raw; 146 }; 147 148 struct test_pattern { 149 enum dp_test_pattern type; 150 enum dp_test_pattern_color_space color_space; 151 struct link_training_settings const *p_link_settings; 152 unsigned char const *p_custom_pattern; 153 unsigned int cust_pattern_size; 154 }; 155 156 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 157 158 struct dc_stream_debug_options { 159 char force_odm_combine_segments; 160 }; 161 162 struct dc_stream_state { 163 // sink is deprecated, new code should not reference 164 // this pointer 165 struct dc_sink *sink; 166 167 struct dc_link *link; 168 /* For dynamic link encoder assignment, update the link encoder assigned to 169 * a stream via the volatile dc_state rather than the static dc_link. 170 */ 171 struct link_encoder *link_enc; 172 struct dc_stream_debug_options debug; 173 struct dc_panel_patch sink_patches; 174 struct dc_crtc_timing timing; 175 struct dc_crtc_timing_adjust adjust; 176 struct dc_info_packet vrr_infopacket; 177 struct dc_info_packet vsc_infopacket; 178 struct dc_info_packet vsp_infopacket; 179 struct dc_info_packet hfvsif_infopacket; 180 struct dc_info_packet vtem_infopacket; 181 struct dc_info_packet adaptive_sync_infopacket; 182 uint8_t dsc_packed_pps[128]; 183 struct rect src; /* composition area */ 184 struct rect dst; /* stream addressable area */ 185 186 struct audio_info audio_info; 187 188 struct dc_info_packet hdr_static_metadata; 189 PHYSICAL_ADDRESS_LOC dmdata_address; 190 bool use_dynamic_meta; 191 192 struct dc_transfer_func *out_transfer_func; 193 struct colorspace_transform gamut_remap_matrix; 194 struct dc_csc_transform csc_color_matrix; 195 196 enum dc_color_space output_color_space; 197 enum display_content_type content_type; 198 enum dc_dither_option dither_option; 199 200 enum view_3d_format view_format; 201 202 bool use_vsc_sdp_for_colorimetry; 203 bool ignore_msa_timing_param; 204 205 /** 206 * @allow_freesync: 207 * 208 * It say if Freesync is enabled or not. 209 */ 210 bool allow_freesync; 211 212 /** 213 * @vrr_active_variable: 214 * 215 * It describes if VRR is in use. 216 */ 217 bool vrr_active_variable; 218 bool freesync_on_desktop; 219 bool vrr_active_fixed; 220 221 bool converter_disable_audio; 222 uint8_t qs_bit; 223 uint8_t qy_bit; 224 225 /* TODO: custom INFO packets */ 226 /* TODO: ABM info (DMCU) */ 227 /* TODO: CEA VIC */ 228 229 /* DMCU info */ 230 unsigned int abm_level; 231 232 struct periodic_interrupt_config periodic_interrupt; 233 234 /* from core_stream struct */ 235 struct dc_context *ctx; 236 237 /* used by DCP and FMT */ 238 struct bit_depth_reduction_params bit_depth_params; 239 struct clamping_and_pixel_encoding_params clamping; 240 241 int phy_pix_clk; 242 enum signal_type signal; 243 bool dpms_off; 244 245 void *dm_stream_context; 246 247 struct dc_cursor_attributes cursor_attributes; 248 struct dc_cursor_position cursor_position; 249 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 250 251 /* from stream struct */ 252 struct kref refcount; 253 254 struct crtc_trigger_info triggered_crtc_reset; 255 256 /* writeback */ 257 unsigned int num_wb_info; 258 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 259 const struct dc_transfer_func *func_shaper; 260 const struct dc_3dlut *lut3d_func; 261 /* Computed state bits */ 262 bool mode_changed : 1; 263 264 /* Output from DC when stream state is committed or altered 265 * DC may only access these values during: 266 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 267 * values may not change outside of those calls 268 */ 269 struct { 270 // For interrupt management, some hardware instance 271 // offsets need to be exposed to DM 272 uint8_t otg_offset; 273 } out; 274 275 bool apply_edp_fast_boot_optimization; 276 bool apply_seamless_boot_optimization; 277 uint32_t apply_boot_odm_mode; 278 279 uint32_t stream_id; 280 281 struct test_pattern test_pattern; 282 union stream_update_flags update_flags; 283 284 bool has_non_synchronizable_pclk; 285 bool vblank_synchronized; 286 bool fpo_in_use; 287 bool is_phantom; 288 }; 289 290 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 291 292 struct dc_stream_update { 293 struct dc_stream_state *stream; 294 295 struct rect src; 296 struct rect dst; 297 struct dc_transfer_func *out_transfer_func; 298 struct dc_info_packet *hdr_static_metadata; 299 unsigned int *abm_level; 300 301 struct periodic_interrupt_config *periodic_interrupt; 302 303 struct dc_info_packet *vrr_infopacket; 304 struct dc_info_packet *vsc_infopacket; 305 struct dc_info_packet *vsp_infopacket; 306 struct dc_info_packet *hfvsif_infopacket; 307 struct dc_info_packet *vtem_infopacket; 308 struct dc_info_packet *adaptive_sync_infopacket; 309 bool *dpms_off; 310 bool integer_scaling_update; 311 bool *allow_freesync; 312 bool *vrr_active_variable; 313 bool *vrr_active_fixed; 314 315 struct colorspace_transform *gamut_remap; 316 enum dc_color_space *output_color_space; 317 enum dc_dither_option *dither_option; 318 319 struct dc_csc_transform *output_csc_transform; 320 321 struct dc_writeback_update *wb_update; 322 struct dc_dsc_config *dsc_config; 323 struct dc_mst_stream_bw_update *mst_bw_update; 324 struct dc_transfer_func *func_shaper; 325 struct dc_3dlut *lut3d_func; 326 327 struct test_pattern *pending_test_pattern; 328 }; 329 330 bool dc_is_stream_unchanged( 331 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 332 bool dc_is_stream_scaling_unchanged( 333 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 334 335 /* 336 * Setup stream attributes if no stream updates are provided 337 * there will be no impact on the stream parameters 338 * 339 * Set up surface attributes and associate to a stream 340 * The surfaces parameter is an absolute set of all surface active for the stream. 341 * If no surfaces are provided, the stream will be blanked; no memory read. 342 * Any flip related attribute changes must be done through this interface. 343 * 344 * After this call: 345 * Surfaces attributes are programmed and configured to be composed into stream. 346 * This does not trigger a flip. No surface address is programmed. 347 * 348 */ 349 bool dc_update_planes_and_stream(struct dc *dc, 350 struct dc_surface_update *surface_updates, int surface_count, 351 struct dc_stream_state *dc_stream, 352 struct dc_stream_update *stream_update); 353 354 /* 355 * Set up surface attributes and associate to a stream 356 * The surfaces parameter is an absolute set of all surface active for the stream. 357 * If no surfaces are provided, the stream will be blanked; no memory read. 358 * Any flip related attribute changes must be done through this interface. 359 * 360 * After this call: 361 * Surfaces attributes are programmed and configured to be composed into stream. 362 * This does not trigger a flip. No surface address is programmed. 363 */ 364 void dc_commit_updates_for_stream(struct dc *dc, 365 struct dc_surface_update *srf_updates, 366 int surface_count, 367 struct dc_stream_state *stream, 368 struct dc_stream_update *stream_update, 369 struct dc_state *state); 370 /* 371 * Log the current stream state. 372 */ 373 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 374 375 uint8_t dc_get_current_stream_count(struct dc *dc); 376 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 377 378 /* 379 * Return the current frame counter. 380 */ 381 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 382 383 /* 384 * Send dp sdp message. 385 */ 386 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 387 const uint8_t *custom_sdp_message, 388 unsigned int sdp_message_size); 389 390 /* TODO: Return parsed values rather than direct register read 391 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 392 * being refactored properly to be dce-specific 393 */ 394 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 395 uint32_t *v_blank_start, 396 uint32_t *v_blank_end, 397 uint32_t *h_position, 398 uint32_t *v_position); 399 400 bool dc_stream_add_writeback(struct dc *dc, 401 struct dc_stream_state *stream, 402 struct dc_writeback_info *wb_info); 403 404 bool dc_stream_fc_disable_writeback(struct dc *dc, 405 struct dc_stream_state *stream, 406 uint32_t dwb_pipe_inst); 407 408 bool dc_stream_remove_writeback(struct dc *dc, 409 struct dc_stream_state *stream, 410 uint32_t dwb_pipe_inst); 411 412 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 413 struct dc_state *state, 414 struct dc_stream_state *stream); 415 416 bool dc_stream_warmup_writeback(struct dc *dc, 417 int num_dwb, 418 struct dc_writeback_info *wb_info); 419 420 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 421 422 bool dc_stream_set_dynamic_metadata(struct dc *dc, 423 struct dc_stream_state *stream, 424 struct dc_dmdata_attributes *dmdata_attr); 425 426 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 427 428 /* 429 * Set up streams and links associated to drive sinks 430 * The streams parameter is an absolute set of all active streams. 431 * 432 * After this call: 433 * Phy, Encoder, Timing Generator are programmed and enabled. 434 * New streams are enabled with blank stream; no memory read. 435 */ 436 /* 437 * Enable stereo when commit_streams is not required, 438 * for example, frame alternate. 439 */ 440 void dc_enable_stereo( 441 struct dc *dc, 442 struct dc_state *context, 443 struct dc_stream_state *streams[], 444 uint8_t stream_count); 445 446 /* Triggers multi-stream synchronization. */ 447 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 448 449 enum surface_update_type dc_check_update_surfaces_for_stream( 450 struct dc *dc, 451 struct dc_surface_update *updates, 452 int surface_count, 453 struct dc_stream_update *stream_update, 454 const struct dc_stream_status *stream_status); 455 456 /** 457 * Create a new default stream for the requested sink 458 */ 459 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 460 461 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 462 463 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 464 465 void dc_stream_retain(struct dc_stream_state *dc_stream); 466 void dc_stream_release(struct dc_stream_state *dc_stream); 467 468 struct dc_stream_status *dc_stream_get_status( 469 struct dc_stream_state *dc_stream); 470 471 /******************************************************************************* 472 * Cursor interfaces - To manages the cursor within a stream 473 ******************************************************************************/ 474 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 475 bool dc_stream_set_cursor_attributes( 476 struct dc_stream_state *stream, 477 const struct dc_cursor_attributes *attributes); 478 479 bool dc_stream_set_cursor_position( 480 struct dc_stream_state *stream, 481 const struct dc_cursor_position *position); 482 483 484 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 485 struct dc_stream_state *stream, 486 struct dc_crtc_timing_adjust *adjust); 487 488 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 489 struct dc_stream_state *stream, 490 uint32_t *refresh_rate); 491 492 bool dc_stream_get_crtc_position(struct dc *dc, 493 struct dc_stream_state **stream, 494 int num_streams, 495 unsigned int *v_pos, 496 unsigned int *nom_v_pos); 497 498 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 499 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 500 struct rect *rect, 501 bool is_stop); 502 #endif 503 504 bool dc_stream_configure_crc(struct dc *dc, 505 struct dc_stream_state *stream, 506 struct crc_params *crc_window, 507 bool enable, 508 bool continuous); 509 510 bool dc_stream_get_crc(struct dc *dc, 511 struct dc_stream_state *stream, 512 uint32_t *r_cr, 513 uint32_t *g_y, 514 uint32_t *b_cb); 515 516 void dc_stream_set_static_screen_params(struct dc *dc, 517 struct dc_stream_state **stream, 518 int num_streams, 519 const struct dc_static_screen_params *params); 520 521 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 522 enum dc_dynamic_expansion option); 523 524 void dc_stream_set_dither_option(struct dc_stream_state *stream, 525 enum dc_dither_option option); 526 527 bool dc_stream_set_gamut_remap(struct dc *dc, 528 const struct dc_stream_state *stream); 529 530 bool dc_stream_program_csc_matrix(struct dc *dc, 531 struct dc_stream_state *stream); 532 533 bool dc_stream_get_crtc_position(struct dc *dc, 534 struct dc_stream_state **stream, 535 int num_streams, 536 unsigned int *v_pos, 537 unsigned int *nom_v_pos); 538 539 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 540 541 void dc_dmub_update_dirty_rect(struct dc *dc, 542 int surface_count, 543 struct dc_stream_state *stream, 544 struct dc_surface_update *srf_updates, 545 struct dc_state *context); 546 #endif /* DC_STREAM_H_ */ 547