1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 bool subvp_limit_cursor_size; /* stream has/is using subvp limiting hw cursor support */ 48 bool cursor_size_limit_subvp; /* stream is using hw cursor config preventing subvp */ 49 }; 50 51 struct dc_stream_status { 52 int primary_otg_inst; 53 int stream_enc_inst; 54 55 /** 56 * @plane_count: Total of planes attached to a single stream 57 */ 58 int plane_count; 59 int audio_inst; 60 struct timing_sync_info timing_sync_info; 61 struct dc_plane_state *plane_states[MAX_SURFACES]; 62 bool is_abm_supported; 63 struct mall_stream_config mall_stream_config; 64 bool fpo_in_use; 65 }; 66 67 68 struct dc_writeback_info { 69 bool wb_enabled; 70 int dwb_pipe_inst; 71 struct dc_dwb_params dwb_params; 72 struct mcif_buf_params mcif_buf_params; 73 struct mcif_warmup_params mcif_warmup_params; 74 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 75 struct dc_plane_state *writeback_source_plane; 76 /* source MPCC instance. for use by internally by dc */ 77 int mpcc_inst; 78 }; 79 80 struct dc_writeback_update { 81 unsigned int num_wb_info; 82 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 83 }; 84 85 enum vertical_interrupt_ref_point { 86 START_V_UPDATE = 0, 87 START_V_SYNC, 88 INVALID_POINT 89 90 //For now, only v_update interrupt is used. 91 //START_V_BLANK, 92 //START_V_ACTIVE 93 }; 94 95 struct periodic_interrupt_config { 96 enum vertical_interrupt_ref_point ref_point; 97 int lines_offset; 98 }; 99 100 struct dc_mst_stream_bw_update { 101 bool is_increase; // is bandwidth reduced or increased 102 uint32_t mst_stream_bw; // new mst bandwidth in kbps 103 }; 104 105 union stream_update_flags { 106 struct { 107 uint32_t scaling:1; 108 uint32_t out_tf:1; 109 uint32_t out_csc:1; 110 uint32_t abm_level:1; 111 uint32_t dpms_off:1; 112 uint32_t gamut_remap:1; 113 uint32_t wb_update:1; 114 uint32_t dsc_changed : 1; 115 uint32_t mst_bw : 1; 116 uint32_t crtc_timing_adjust : 1; 117 uint32_t fams_changed : 1; 118 uint32_t scaler_sharpener : 1; 119 uint32_t sharpening_required : 1; 120 uint32_t cursor_attr : 1; 121 uint32_t cursor_pos : 1; 122 uint32_t periodic_interrupt : 1; 123 uint32_t info_frame : 1; 124 uint32_t dmdata : 1; 125 uint32_t dither : 1; 126 uint32_t func_shaper : 1; 127 uint32_t lut3d_func : 1; 128 uint32_t reserved : 11; /* adjust when adding new flags */ 129 } bits; 130 131 uint32_t raw; 132 }; 133 134 struct test_pattern { 135 enum dp_test_pattern type; 136 enum dp_test_pattern_color_space color_space; 137 struct link_training_settings const *p_link_settings; 138 unsigned char const *p_custom_pattern; 139 unsigned int cust_pattern_size; 140 }; 141 142 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 143 144 struct dc_stream_debug_options { 145 uint8_t force_odm_combine_segments; 146 /* 147 * When force_odm_combine_segments is non zero, allow dc to 148 * temporarily transition to ODM bypass when minimal transition state 149 * is required to prevent visual glitches showing on the screen 150 */ 151 uint8_t allow_transition_for_forced_odm; 152 }; 153 154 #define LUMINANCE_DATA_TABLE_SIZE 10 155 156 struct luminance_data { 157 bool is_valid; 158 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 159 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 160 int flicker_criteria_milli_nits_GAMING; 161 int flicker_criteria_milli_nits_STATIC; 162 int nominal_refresh_rate; 163 int dm_max_decrease_from_nominal; 164 }; 165 166 enum dc_drr_trigger_mode { 167 DRR_TRIGGER_ON_FLIP = 0, 168 DRR_TRIGGER_ON_FLIP_AND_CURSOR, 169 }; 170 171 struct dc_stream_state { 172 // sink is deprecated, new code should not reference 173 // this pointer 174 struct dc_sink *sink; 175 176 struct dc_link *link; 177 /* For dynamic link encoder assignment, update the link encoder assigned to 178 * a stream via the volatile dc_state rather than the static dc_link. 179 */ 180 struct link_encoder *link_enc; 181 struct dc_stream_debug_options debug; 182 struct dc_panel_patch sink_patches; 183 struct dc_crtc_timing timing; 184 struct dc_crtc_timing_adjust adjust; 185 struct dc_info_packet vrr_infopacket; 186 struct dc_info_packet vsc_infopacket; 187 struct dc_info_packet vsp_infopacket; 188 struct dc_info_packet hfvsif_infopacket; 189 struct dc_info_packet vtem_infopacket; 190 struct dc_info_packet adaptive_sync_infopacket; 191 struct dc_info_packet avi_infopacket; 192 uint8_t dsc_packed_pps[128]; 193 struct rect src; /* composition area */ 194 struct rect dst; /* stream addressable area */ 195 196 struct audio_info audio_info; 197 198 struct dc_info_packet hdr_static_metadata; 199 PHYSICAL_ADDRESS_LOC dmdata_address; 200 bool use_dynamic_meta; 201 202 struct dc_transfer_func out_transfer_func; 203 struct colorspace_transform gamut_remap_matrix; 204 struct dc_csc_transform csc_color_matrix; 205 206 enum dc_color_space output_color_space; 207 enum display_content_type content_type; 208 enum dc_dither_option dither_option; 209 210 enum view_3d_format view_format; 211 212 bool use_vsc_sdp_for_colorimetry; 213 bool ignore_msa_timing_param; 214 215 /** 216 * @allow_freesync: 217 * 218 * It say if Freesync is enabled or not. 219 */ 220 bool allow_freesync; 221 222 /** 223 * @vrr_active_variable: 224 * 225 * It describes if VRR is in use. 226 */ 227 bool vrr_active_variable; 228 bool freesync_on_desktop; 229 bool vrr_active_fixed; 230 231 bool converter_disable_audio; 232 uint8_t qs_bit; 233 uint8_t qy_bit; 234 235 /* TODO: custom INFO packets */ 236 /* TODO: ABM info (DMCU) */ 237 /* TODO: CEA VIC */ 238 239 /* DMCU info */ 240 unsigned int abm_level; 241 242 struct periodic_interrupt_config periodic_interrupt; 243 244 /* from core_stream struct */ 245 struct dc_context *ctx; 246 247 /* used by DCP and FMT */ 248 struct bit_depth_reduction_params bit_depth_params; 249 struct clamping_and_pixel_encoding_params clamping; 250 251 int phy_pix_clk; 252 enum signal_type signal; 253 bool dpms_off; 254 255 void *dm_stream_context; 256 257 struct dc_cursor_attributes cursor_attributes; 258 struct dc_cursor_position cursor_position; 259 bool hw_cursor_req; 260 261 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 262 263 /* from stream struct */ 264 struct kref refcount; 265 266 struct crtc_trigger_info triggered_crtc_reset; 267 268 /* writeback */ 269 unsigned int num_wb_info; 270 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 271 const struct dc_transfer_func *func_shaper; 272 const struct dc_3dlut *lut3d_func; 273 /* Computed state bits */ 274 bool mode_changed : 1; 275 276 /* Output from DC when stream state is committed or altered 277 * DC may only access these values during: 278 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 279 * values may not change outside of those calls 280 */ 281 struct { 282 // For interrupt management, some hardware instance 283 // offsets need to be exposed to DM 284 uint8_t otg_offset; 285 } out; 286 287 bool apply_edp_fast_boot_optimization; 288 bool apply_seamless_boot_optimization; 289 uint32_t apply_boot_odm_mode; 290 291 uint32_t stream_id; 292 293 struct test_pattern test_pattern; 294 union stream_update_flags update_flags; 295 296 bool has_non_synchronizable_pclk; 297 bool vblank_synchronized; 298 bool is_phantom; 299 300 struct luminance_data lumin_data; 301 bool scaler_sharpener_update; 302 bool sharpening_required; 303 304 enum dc_drr_trigger_mode drr_trigger_mode; 305 306 struct dc_update_scratch_space *update_scratch; 307 }; 308 309 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 310 311 struct dc_stream_update { 312 struct dc_stream_state *stream; 313 314 struct rect src; 315 struct rect dst; 316 struct dc_transfer_func *out_transfer_func; 317 struct dc_info_packet *hdr_static_metadata; 318 unsigned int *abm_level; 319 320 struct periodic_interrupt_config *periodic_interrupt; 321 322 struct dc_info_packet *vrr_infopacket; 323 struct dc_info_packet *vsc_infopacket; 324 struct dc_info_packet *vsp_infopacket; 325 struct dc_info_packet *hfvsif_infopacket; 326 struct dc_info_packet *vtem_infopacket; 327 struct dc_info_packet *adaptive_sync_infopacket; 328 struct dc_info_packet *avi_infopacket; 329 330 bool *dpms_off; 331 bool integer_scaling_update; 332 bool *allow_freesync; 333 bool *vrr_active_variable; 334 bool *vrr_active_fixed; 335 336 struct colorspace_transform *gamut_remap; 337 enum dc_color_space *output_color_space; 338 enum dc_dither_option *dither_option; 339 340 struct dc_csc_transform *output_csc_transform; 341 342 struct dc_writeback_update *wb_update; 343 struct dc_dsc_config *dsc_config; 344 struct dc_mst_stream_bw_update *mst_bw_update; 345 struct dc_transfer_func *func_shaper; 346 struct dc_3dlut *lut3d_func; 347 348 struct test_pattern *pending_test_pattern; 349 struct dc_crtc_timing_adjust *crtc_timing_adjust; 350 351 struct dc_cursor_attributes *cursor_attributes; 352 struct dc_cursor_position *cursor_position; 353 bool *hw_cursor_req; 354 bool *scaler_sharpener_update; 355 bool *sharpening_required; 356 357 enum dc_drr_trigger_mode *drr_trigger_mode; 358 }; 359 360 bool dc_is_stream_unchanged( 361 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 362 bool dc_is_stream_scaling_unchanged( 363 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 364 365 /* 366 * Setup stream attributes if no stream updates are provided 367 * there will be no impact on the stream parameters 368 * 369 * Set up surface attributes and associate to a stream 370 * The surfaces parameter is an absolute set of all surface active for the stream. 371 * If no surfaces are provided, the stream will be blanked; no memory read. 372 * Any flip related attribute changes must be done through this interface. 373 * 374 * After this call: 375 * Surfaces attributes are programmed and configured to be composed into stream. 376 * This does not trigger a flip. No surface address is programmed. 377 * 378 */ 379 bool dc_update_planes_and_stream(struct dc *dc, 380 struct dc_surface_update *surface_updates, int surface_count, 381 struct dc_stream_state *dc_stream, 382 struct dc_stream_update *stream_update); 383 384 struct dc_update_scratch_space; 385 386 size_t dc_update_scratch_space_size(void); 387 388 struct dc_update_scratch_space *dc_update_planes_and_stream_init( 389 struct dc *dc, 390 struct dc_surface_update *surface_updates, 391 int surface_count, 392 struct dc_stream_state *dc_stream, 393 struct dc_stream_update *stream_update 394 ); 395 396 // Locked, false is failed 397 bool dc_update_planes_and_stream_prepare( 398 struct dc_update_scratch_space *scratch 399 ); 400 401 // Unlocked 402 void dc_update_planes_and_stream_execute( 403 const struct dc_update_scratch_space *scratch 404 ); 405 406 // Locked, true if call again 407 bool dc_update_planes_and_stream_cleanup( 408 struct dc_update_scratch_space *scratch 409 ); 410 411 /* 412 * Set up surface attributes and associate to a stream 413 * The surfaces parameter is an absolute set of all surface active for the stream. 414 * If no surfaces are provided, the stream will be blanked; no memory read. 415 * Any flip related attribute changes must be done through this interface. 416 * 417 * After this call: 418 * Surfaces attributes are programmed and configured to be composed into stream. 419 * This does not trigger a flip. No surface address is programmed. 420 */ 421 void dc_commit_updates_for_stream(struct dc *dc, 422 struct dc_surface_update *srf_updates, 423 int surface_count, 424 struct dc_stream_state *stream, 425 struct dc_stream_update *stream_update, 426 struct dc_state *state); 427 /* 428 * Log the current stream state. 429 */ 430 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 431 432 uint8_t dc_get_current_stream_count(struct dc *dc); 433 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 434 435 /* 436 * Return the current frame counter. 437 */ 438 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 439 440 /* 441 * Send dp sdp message. 442 */ 443 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 444 const uint8_t *custom_sdp_message, 445 unsigned int sdp_message_size); 446 447 /* TODO: Return parsed values rather than direct register read 448 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 449 * being refactored properly to be dce-specific 450 */ 451 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 452 uint32_t *v_blank_start, 453 uint32_t *v_blank_end, 454 uint32_t *h_position, 455 uint32_t *v_position); 456 457 bool dc_stream_add_writeback(struct dc *dc, 458 struct dc_stream_state *stream, 459 struct dc_writeback_info *wb_info); 460 461 bool dc_stream_fc_disable_writeback(struct dc *dc, 462 struct dc_stream_state *stream, 463 uint32_t dwb_pipe_inst); 464 465 bool dc_stream_remove_writeback(struct dc *dc, 466 struct dc_stream_state *stream, 467 uint32_t dwb_pipe_inst); 468 469 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 470 struct dc_state *state, 471 struct dc_stream_state *stream); 472 473 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 474 475 bool dc_stream_set_dynamic_metadata(struct dc *dc, 476 struct dc_stream_state *stream, 477 struct dc_dmdata_attributes *dmdata_attr); 478 479 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 480 481 /* 482 * Enable stereo when commit_streams is not required, 483 * for example, frame alternate. 484 */ 485 void dc_enable_stereo( 486 struct dc *dc, 487 struct dc_state *context, 488 struct dc_stream_state *streams[], 489 uint8_t stream_count); 490 491 /* Triggers multi-stream synchronization. */ 492 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 493 494 struct surface_update_descriptor dc_check_update_surfaces_for_stream( 495 const struct dc_check_config *check_config, 496 struct dc_surface_update *updates, 497 int surface_count, 498 struct dc_stream_update *stream_update); 499 500 struct dc_link *dc_stream_get_link( 501 const struct dc_stream_state *dc_stream); 502 503 /** 504 * Create a new default stream for the requested sink 505 */ 506 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 507 508 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 509 510 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 511 512 void dc_stream_retain(struct dc_stream_state *dc_stream); 513 void dc_stream_release(struct dc_stream_state *dc_stream); 514 515 struct dc_stream_status *dc_stream_get_status(struct dc_stream_state *dc_stream); 516 const struct dc_stream_status *dc_stream_get_status_const(const struct dc_stream_state *dc_stream); 517 518 /******************************************************************************* 519 * Cursor interfaces - To manages the cursor within a stream 520 ******************************************************************************/ 521 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 522 523 void program_cursor_attributes( 524 struct dc *dc, 525 struct dc_stream_state *stream); 526 527 void program_cursor_position( 528 struct dc *dc, 529 struct dc_stream_state *stream); 530 531 bool dc_stream_check_cursor_attributes( 532 const struct dc_stream_state *stream, 533 struct dc_state *state, 534 const struct dc_cursor_attributes *attributes); 535 536 bool dc_stream_set_cursor_attributes( 537 struct dc_stream_state *stream, 538 const struct dc_cursor_attributes *attributes); 539 540 bool dc_stream_program_cursor_attributes( 541 struct dc_stream_state *stream, 542 const struct dc_cursor_attributes *attributes); 543 544 bool dc_stream_set_cursor_position( 545 struct dc_stream_state *stream, 546 const struct dc_cursor_position *position); 547 548 bool dc_stream_program_cursor_position( 549 struct dc_stream_state *stream, 550 const struct dc_cursor_position *position); 551 552 553 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 554 struct dc_stream_state *stream, 555 struct dc_crtc_timing_adjust *adjust); 556 557 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 558 struct dc_stream_state *stream, 559 uint32_t *refresh_rate); 560 561 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 562 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 563 struct rect *rect, 564 uint8_t phy_id, 565 bool is_stop); 566 567 bool dc_stream_forward_multiple_crc_window(struct dc_stream_state *stream, 568 struct crc_window *window, 569 uint8_t phy_id, 570 bool stop); 571 #endif 572 573 bool dc_stream_configure_crc(struct dc *dc, 574 struct dc_stream_state *stream, 575 struct crc_params *crc_window, 576 bool enable, 577 bool continuous, 578 uint8_t idx, 579 bool reset, 580 enum crc_poly_mode crc_poly_mode); 581 582 bool dc_stream_get_crc(struct dc *dc, 583 struct dc_stream_state *stream, 584 uint8_t idx, 585 uint32_t *r_cr, 586 uint32_t *g_y, 587 uint32_t *b_cb); 588 589 void dc_stream_set_static_screen_params(struct dc *dc, 590 struct dc_stream_state **stream, 591 int num_streams, 592 const struct dc_static_screen_params *params); 593 594 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 595 enum dc_dynamic_expansion option); 596 597 void dc_stream_set_dither_option(struct dc_stream_state *stream, 598 enum dc_dither_option option); 599 600 bool dc_stream_set_gamut_remap(struct dc *dc, 601 const struct dc_stream_state *stream); 602 603 bool dc_stream_program_csc_matrix(struct dc *dc, 604 struct dc_stream_state *stream); 605 606 struct dc_rmcm_3dlut *dc_stream_get_3dlut_for_stream( 607 const struct dc *dc, 608 const struct dc_stream_state *stream, 609 bool allocate_one); 610 611 void dc_stream_release_3dlut_for_stream( 612 const struct dc *dc, 613 const struct dc_stream_state *stream); 614 615 void dc_stream_init_rmcm_3dlut(struct dc *dc); 616 617 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 618 619 void dc_dmub_update_dirty_rect(struct dc *dc, 620 int surface_count, 621 struct dc_stream_state *stream, 622 const struct dc_surface_update *srf_updates, 623 struct dc_state *context); 624 625 bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream); 626 bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream); 627 628 #endif /* DC_STREAM_H_ */ 629