xref: /linux/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h (revision 9f2c9170934eace462499ba0bfe042cc72900173)
1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DMUB_DC_SRV_H_
27 #define _DMUB_DC_SRV_H_
28 
29 #include "os_types.h"
30 #include "dmub/dmub_srv.h"
31 
32 struct dmub_srv;
33 struct dc;
34 struct pipe_ctx;
35 struct dc_crtc_timing_adjust;
36 struct dc_crtc_timing;
37 struct dc_state;
38 
39 struct dc_reg_helper_state {
40 	bool gather_in_progress;
41 	uint32_t same_addr_count;
42 	bool should_burst_write;
43 	union dmub_rb_cmd cmd_data;
44 	unsigned int reg_seq_count;
45 };
46 
47 struct dc_dmub_srv {
48 	struct dmub_srv *dmub;
49 	struct dc_reg_helper_state reg_helper_offload;
50 
51 	struct dc_context *ctx;
52 	void *dm;
53 };
54 
55 void dc_dmub_srv_cmd_queue(struct dc_dmub_srv *dc_dmub_srv,
56 			   union dmub_rb_cmd *cmd);
57 
58 void dc_dmub_srv_cmd_execute(struct dc_dmub_srv *dc_dmub_srv);
59 
60 void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);
61 
62 void dc_dmub_srv_wait_phy_init(struct dc_dmub_srv *dc_dmub_srv);
63 
64 bool dc_dmub_srv_cmd_with_reply_data(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd);
65 
66 bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,
67 				    unsigned int stream_mask);
68 
69 bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv);
70 
71 bool dc_dmub_srv_get_dmub_outbox0_msg(const struct dc *dc, struct dmcub_trace_buf_entry *entry);
72 
73 void dc_dmub_trace_event_control(struct dc *dc, bool enable);
74 
75 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max);
76 
77 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst);
78 bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context);
79 
80 void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub);
81 void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx);
82 void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);
83 void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);
84 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data);
85 
86 bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmub_diagnostic_data *dmub_oca);
87 
88 void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, bool enable);
89 void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);
90 
91 void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t pipe_idx);
92 #endif /* _DMUB_DC_SRV_H_ */
93