1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_DC_SRV_H_ 27 #define _DMUB_DC_SRV_H_ 28 29 #include "dm_services_types.h" 30 #include "dmub/dmub_srv.h" 31 32 struct dmub_srv; 33 struct dc; 34 struct pipe_ctx; 35 struct dc_crtc_timing_adjust; 36 struct dc_crtc_timing; 37 struct dc_state; 38 struct dc_surface_update; 39 40 struct dc_reg_helper_state { 41 bool gather_in_progress; 42 uint32_t same_addr_count; 43 bool should_burst_write; 44 union dmub_rb_cmd cmd_data; 45 unsigned int reg_seq_count; 46 }; 47 48 struct dc_dmub_srv { 49 struct dmub_srv *dmub; 50 struct dc_reg_helper_state reg_helper_offload; 51 52 struct dc_context *ctx; 53 void *dm; 54 55 int32_t idle_exit_counter; 56 union dmub_shared_state_ips_driver_signals driver_signals; 57 bool idle_allowed; 58 bool needs_idle_wake; 59 }; 60 61 void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv); 62 63 bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv); 64 65 bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv, 66 unsigned int count, 67 union dmub_rb_cmd *cmd_list); 68 69 bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv, 70 enum dm_dmub_wait_type wait_type, 71 union dmub_rb_cmd *cmd_list); 72 73 bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 74 75 bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type); 76 77 bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv, 78 unsigned int stream_mask); 79 80 bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv); 81 82 bool dc_dmub_srv_get_dmub_outbox0_msg(const struct dc *dc, struct dmcub_trace_buf_entry *entry); 83 84 void dc_dmub_trace_event_control(struct dc *dc, bool enable); 85 86 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max); 87 88 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst); 89 bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context); 90 91 void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv); 92 void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx); 93 void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv); 94 void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv); 95 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data); 96 97 bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmub_diagnostic_data *dmub_oca); 98 99 void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, bool enable); 100 void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv); 101 102 void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t pipe_idx); 103 bool dc_dmub_check_min_version(struct dmub_srv *srv); 104 105 void dc_dmub_srv_enable_dpia_trace(const struct dc *dc); 106 void dc_dmub_srv_subvp_save_surf_addr(const struct dc_dmub_srv *dc_dmub_srv, const struct dc_plane_address *addr, uint8_t subvp_index); 107 108 bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait); 109 110 void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_idle); 111 112 void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state powerState); 113 114 /** 115 * @dc_dmub_srv_should_detect() - Checks if link detection is required. 116 * 117 * While in idle power states we may need driver to manually redetect in 118 * the case of a missing hotplug. Should be called from a polling timer. 119 * 120 * Return: true if redetection is required. 121 */ 122 bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv); 123 124 /** 125 * dc_wake_and_execute_dmub_cmd() - Wrapper for DMUB command execution. 126 * 127 * Refer to dc_wake_and_execute_dmub_cmd_list() for usage and limitations, 128 * This function is a convenience wrapper for a single command execution. 129 * 130 * @ctx: DC context 131 * @cmd: The command to send/receive 132 * @wait_type: The wait behavior for the execution 133 * 134 * Return: true on command submission success, false otherwise 135 */ 136 bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd, 137 enum dm_dmub_wait_type wait_type); 138 139 /** 140 * dc_wake_and_execute_dmub_cmd_list() - Wrapper for DMUB command list execution. 141 * 142 * If the DMCUB hardware was asleep then it wakes the DMUB before 143 * executing the command and attempts to re-enter if the command 144 * submission was successful. 145 * 146 * This should be the preferred command submission interface provided 147 * the DC lock is acquired. 148 * 149 * Entry/exit out of idle power optimizations would need to be 150 * manually performed otherwise through dc_allow_idle_optimizations(). 151 * 152 * @ctx: DC context 153 * @count: Number of commands to send/receive 154 * @cmd: Array of commands to send 155 * @wait_type: The wait behavior for the execution 156 * 157 * Return: true on command submission success, false otherwise 158 */ 159 bool dc_wake_and_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned int count, 160 union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 161 162 /** 163 * dc_wake_and_execute_gpint() 164 * 165 * @ctx: DC context 166 * @command_code: The command ID to send to DMCUB 167 * @param: The parameter to message DMCUB 168 * @response: Optional response out value - may be NULL. 169 * @wait_type: The wait behavior for the execution 170 */ 171 bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_command command_code, 172 uint16_t param, uint32_t *response, enum dm_dmub_wait_type wait_type); 173 174 void dc_dmub_srv_fams2_update_config(struct dc *dc, 175 struct dc_state *context, 176 bool enable); 177 void dc_dmub_srv_fams2_drr_update(struct dc *dc, 178 uint32_t tg_inst, 179 uint32_t vtotal_min, 180 uint32_t vtotal_max, 181 uint32_t vtotal_mid, 182 uint32_t vtotal_mid_frame_num, 183 bool program_manual_trigger); 184 void dc_dmub_srv_fams2_passthrough_flip( 185 struct dc *dc, 186 struct dc_state *state, 187 struct dc_stream_state *stream, 188 struct dc_surface_update *srf_updates, 189 int surface_count); 190 #endif /* _DMUB_DC_SRV_H_ */ 191