1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_INTERFACE_H_ 27 #define DC_INTERFACE_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 #include "logger_types.h" 32 #include "gpio_types.h" 33 #include "link_service_types.h" 34 35 #define MAX_SURFACES 3 36 #define MAX_STREAMS 6 37 #define MAX_SINKS_PER_LINK 4 38 39 /******************************************************************************* 40 * Display Core Interfaces 41 ******************************************************************************/ 42 43 struct dc_caps { 44 uint32_t max_streams; 45 uint32_t max_links; 46 uint32_t max_audios; 47 uint32_t max_slave_planes; 48 uint32_t max_surfaces; 49 uint32_t max_downscale_ratio; 50 uint32_t i2c_speed_in_khz; 51 52 unsigned int max_cursor_size; 53 }; 54 55 56 struct dc_dcc_surface_param { 57 enum surface_pixel_format format; 58 struct dc_size surface_size; 59 enum swizzle_mode_values swizzle_mode; 60 enum dc_scan_direction scan; 61 }; 62 63 struct dc_dcc_setting { 64 unsigned int max_compressed_blk_size; 65 unsigned int max_uncompressed_blk_size; 66 bool independent_64b_blks; 67 }; 68 69 struct dc_surface_dcc_cap { 70 bool capable; 71 bool const_color_support; 72 73 union { 74 struct { 75 struct dc_dcc_setting rgb; 76 } grph; 77 78 struct { 79 struct dc_dcc_setting luma; 80 struct dc_dcc_setting chroma; 81 } video; 82 }; 83 }; 84 85 struct dc_static_screen_events { 86 bool cursor_update; 87 bool surface_update; 88 bool overlay_update; 89 }; 90 91 /* Forward declaration*/ 92 struct dc; 93 struct dc_surface; 94 struct validate_context; 95 96 struct dc_cap_funcs { 97 int i; 98 }; 99 100 struct dc_stream_funcs { 101 bool (*adjust_vmin_vmax)(struct dc *dc, 102 const struct dc_stream **stream, 103 int num_streams, 104 int vmin, 105 int vmax); 106 bool (*get_crtc_position)(struct dc *dc, 107 const struct dc_stream **stream, 108 int num_streams, 109 unsigned int *v_pos, 110 unsigned int *nom_v_pos); 111 112 113 void (*stream_update_scaling)(const struct dc *dc, 114 const struct dc_stream *dc_stream, 115 const struct rect *src, 116 const struct rect *dst); 117 118 bool (*set_gamut_remap)(struct dc *dc, 119 const struct dc_stream **stream, int num_streams); 120 121 void (*set_static_screen_events)(struct dc *dc, 122 const struct dc_stream **stream, 123 int num_streams, 124 const struct dc_static_screen_events *events); 125 126 void (*set_dither_option)(const struct dc_stream *stream, 127 enum dc_dither_option option); 128 }; 129 130 struct link_training_settings; 131 132 struct dc_link_funcs { 133 void (*set_drive_settings)(struct dc *dc, 134 struct link_training_settings *lt_settings, 135 const struct dc_link *link); 136 void (*perform_link_training)(struct dc *dc, 137 struct dc_link_settings *link_setting, 138 bool skip_video_pattern); 139 void (*set_preferred_link_settings)(struct dc *dc, 140 struct dc_link_settings *link_setting, 141 const struct dc_link *link); 142 void (*enable_hpd)(const struct dc_link *link); 143 void (*disable_hpd)(const struct dc_link *link); 144 void (*set_test_pattern)( 145 const struct dc_link *link, 146 enum dp_test_pattern test_pattern, 147 const struct link_training_settings *p_link_settings, 148 const unsigned char *p_custom_pattern, 149 unsigned int cust_pattern_size); 150 }; 151 152 /* Structure to hold configuration flags set by dm at dc creation. */ 153 struct dc_config { 154 bool gpu_vm_support; 155 bool disable_disp_pll_sharing; 156 }; 157 158 struct dc_debug { 159 bool surface_visual_confirm; 160 bool max_disp_clk; 161 bool surface_trace; 162 bool timing_trace; 163 bool validation_trace; 164 bool disable_stutter; 165 bool disable_dcc; 166 bool disable_dfs_bypass; 167 bool disable_pplib_clock_request; 168 bool disable_clock_gate; 169 bool disable_dmcu; 170 bool force_abm_enable; 171 }; 172 173 struct dc { 174 struct dc_caps caps; 175 struct dc_cap_funcs cap_funcs; 176 struct dc_stream_funcs stream_funcs; 177 struct dc_link_funcs link_funcs; 178 struct dc_config config; 179 struct dc_debug debug; 180 }; 181 182 enum frame_buffer_mode { 183 FRAME_BUFFER_MODE_LOCAL_ONLY = 0, 184 FRAME_BUFFER_MODE_ZFB_ONLY, 185 FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL, 186 } ; 187 188 struct dchub_init_data { 189 bool dchub_initialzied; 190 bool dchub_info_valid; 191 int64_t zfb_phys_addr_base; 192 int64_t zfb_mc_base_addr; 193 uint64_t zfb_size_in_byte; 194 enum frame_buffer_mode fb_mode; 195 }; 196 197 struct dc_init_data { 198 struct hw_asic_id asic_id; 199 void *driver; /* ctx */ 200 struct cgs_device *cgs_device; 201 202 int num_virtual_links; 203 /* 204 * If 'vbios_override' not NULL, it will be called instead 205 * of the real VBIOS. Intended use is Diagnostics on FPGA. 206 */ 207 struct dc_bios *vbios_override; 208 enum dce_environment dce_environment; 209 210 struct dc_config flags; 211 }; 212 213 struct dc *dc_create(const struct dc_init_data *init_params); 214 215 void dc_destroy(struct dc **dc); 216 217 bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data); 218 219 /******************************************************************************* 220 * Surface Interfaces 221 ******************************************************************************/ 222 223 enum { 224 TRANSFER_FUNC_POINTS = 1025 225 }; 226 227 struct dc_hdr_static_metadata { 228 bool hdr_supported; 229 bool is_hdr; 230 231 /* display chromaticities and white point in units of 0.00001 */ 232 unsigned int chromaticity_green_x; 233 unsigned int chromaticity_green_y; 234 unsigned int chromaticity_blue_x; 235 unsigned int chromaticity_blue_y; 236 unsigned int chromaticity_red_x; 237 unsigned int chromaticity_red_y; 238 unsigned int chromaticity_white_point_x; 239 unsigned int chromaticity_white_point_y; 240 241 uint32_t min_luminance; 242 uint32_t max_luminance; 243 uint32_t maximum_content_light_level; 244 uint32_t maximum_frame_average_light_level; 245 }; 246 247 enum dc_transfer_func_type { 248 TF_TYPE_PREDEFINED, 249 TF_TYPE_DISTRIBUTED_POINTS, 250 TF_TYPE_BYPASS 251 }; 252 253 struct dc_transfer_func_distributed_points { 254 struct fixed31_32 red[TRANSFER_FUNC_POINTS]; 255 struct fixed31_32 green[TRANSFER_FUNC_POINTS]; 256 struct fixed31_32 blue[TRANSFER_FUNC_POINTS]; 257 258 uint16_t end_exponent; 259 uint16_t x_point_at_y1_red; 260 uint16_t x_point_at_y1_green; 261 uint16_t x_point_at_y1_blue; 262 }; 263 264 enum dc_transfer_func_predefined { 265 TRANSFER_FUNCTION_SRGB, 266 TRANSFER_FUNCTION_BT709, 267 TRANSFER_FUNCTION_PQ, 268 TRANSFER_FUNCTION_LINEAR, 269 }; 270 271 struct dc_transfer_func { 272 enum dc_transfer_func_type type; 273 enum dc_transfer_func_predefined tf; 274 struct dc_transfer_func_distributed_points tf_pts; 275 }; 276 277 struct dc_surface { 278 bool visible; 279 bool flip_immediate; 280 struct dc_plane_address address; 281 282 struct scaling_taps scaling_quality; 283 struct rect src_rect; 284 struct rect dst_rect; 285 struct rect clip_rect; 286 287 union plane_size plane_size; 288 union dc_tiling_info tiling_info; 289 struct dc_plane_dcc_param dcc; 290 enum dc_color_space color_space; 291 292 enum surface_pixel_format format; 293 enum dc_rotation_angle rotation; 294 bool horizontal_mirror; 295 enum plane_stereo_format stereo_format; 296 297 struct dc_hdr_static_metadata hdr_static_ctx; 298 299 const struct dc_gamma *gamma_correction; 300 const struct dc_transfer_func *in_transfer_func; 301 }; 302 303 struct dc_plane_info { 304 union plane_size plane_size; 305 union dc_tiling_info tiling_info; 306 struct dc_plane_dcc_param dcc; 307 enum surface_pixel_format format; 308 enum dc_rotation_angle rotation; 309 bool horizontal_mirror; 310 enum plane_stereo_format stereo_format; 311 enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/ 312 bool visible; 313 }; 314 315 struct dc_scaling_info { 316 struct rect src_rect; 317 struct rect dst_rect; 318 struct rect clip_rect; 319 struct scaling_taps scaling_quality; 320 }; 321 322 struct dc_surface_update { 323 const struct dc_surface *surface; 324 325 /* isr safe update parameters. null means no updates */ 326 struct dc_flip_addrs *flip_addr; 327 struct dc_plane_info *plane_info; 328 struct dc_scaling_info *scaling_info; 329 /* following updates require alloc/sleep/spin that is not isr safe, 330 * null means no updates 331 */ 332 /* gamma TO BE REMOVED */ 333 struct dc_gamma *gamma; 334 struct dc_hdr_static_metadata *hdr_static_metadata; 335 struct dc_transfer_func *in_transfer_func; 336 struct dc_transfer_func *out_transfer_func; 337 338 339 }; 340 /* 341 * This structure is filled in by dc_surface_get_status and contains 342 * the last requested address and the currently active address so the called 343 * can determine if there are any outstanding flips 344 */ 345 struct dc_surface_status { 346 struct dc_plane_address requested_address; 347 struct dc_plane_address current_address; 348 bool is_flip_pending; 349 }; 350 351 /* 352 * Create a new surface with default parameters; 353 */ 354 struct dc_surface *dc_create_surface(const struct dc *dc); 355 const struct dc_surface_status *dc_surface_get_status( 356 const struct dc_surface *dc_surface); 357 358 void dc_surface_retain(const struct dc_surface *dc_surface); 359 void dc_surface_release(const struct dc_surface *dc_surface); 360 361 void dc_gamma_retain(const struct dc_gamma *dc_gamma); 362 void dc_gamma_release(const struct dc_gamma **dc_gamma); 363 struct dc_gamma *dc_create_gamma(void); 364 365 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf); 366 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf); 367 struct dc_transfer_func *dc_create_transfer_func(void); 368 369 /* 370 * This structure holds a surface address. There could be multiple addresses 371 * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such 372 * as frame durations and DCC format can also be set. 373 */ 374 struct dc_flip_addrs { 375 struct dc_plane_address address; 376 bool flip_immediate; 377 /* TODO: add flip duration for FreeSync */ 378 }; 379 380 /* 381 * Optimized flip address update function. 382 * 383 * After this call: 384 * Surface addresses and flip attributes are programmed. 385 * Surface flip occur at next configured time (h_sync or v_sync flip) 386 */ 387 void dc_flip_surface_addrs(struct dc *dc, 388 const struct dc_surface *const surfaces[], 389 struct dc_flip_addrs flip_addrs[], 390 uint32_t count); 391 392 /* 393 * Set up surface attributes and associate to a stream 394 * The surfaces parameter is an absolute set of all surface active for the stream. 395 * If no surfaces are provided, the stream will be blanked; no memory read. 396 * Any flip related attribute changes must be done through this interface. 397 * 398 * After this call: 399 * Surfaces attributes are programmed and configured to be composed into stream. 400 * This does not trigger a flip. No surface address is programmed. 401 */ 402 403 bool dc_commit_surfaces_to_stream( 404 struct dc *dc, 405 const struct dc_surface **dc_surfaces, 406 uint8_t surface_count, 407 const struct dc_stream *stream); 408 409 bool dc_pre_update_surfaces_to_stream( 410 struct dc *dc, 411 const struct dc_surface *const *new_surfaces, 412 uint8_t new_surface_count, 413 const struct dc_stream *stream); 414 415 bool dc_post_update_surfaces_to_stream( 416 struct dc *dc); 417 418 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates, 419 int surface_count, const struct dc_stream *stream); 420 421 enum surface_update_type { 422 UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */ 423 UPDATE_TYPE_MED, /* a lot of programming needed. may need to alloc */ 424 UPDATE_TYPE_FULL, /* may need to shuffle resources */ 425 }; 426 427 /******************************************************************************* 428 * Stream Interfaces 429 ******************************************************************************/ 430 struct dc_stream { 431 const struct dc_sink *sink; 432 struct dc_crtc_timing timing; 433 enum signal_type output_signal; 434 435 enum dc_color_space output_color_space; 436 enum dc_dither_option dither_option; 437 438 struct rect src; /* composition area */ 439 struct rect dst; /* stream addressable area */ 440 441 struct audio_info audio_info; 442 443 bool ignore_msa_timing_param; 444 445 struct freesync_context freesync_ctx; 446 447 const struct dc_transfer_func *out_transfer_func; 448 struct colorspace_transform gamut_remap_matrix; 449 struct csc_transform csc_color_matrix; 450 451 /* TODO: custom INFO packets */ 452 /* TODO: ABM info (DMCU) */ 453 /* TODO: PSR info */ 454 /* TODO: CEA VIC */ 455 }; 456 457 struct dc_stream_update { 458 459 struct rect src; 460 461 struct rect dst; 462 463 }; 464 465 466 /* 467 * Setup stream attributes if no stream updates are provided 468 * there will be no impact on the stream parameters 469 * 470 * Set up surface attributes and associate to a stream 471 * The surfaces parameter is an absolute set of all surface active for the stream. 472 * If no surfaces are provided, the stream will be blanked; no memory read. 473 * Any flip related attribute changes must be done through this interface. 474 * 475 * After this call: 476 * Surfaces attributes are programmed and configured to be composed into stream. 477 * This does not trigger a flip. No surface address is programmed. 478 * 479 */ 480 481 void dc_update_surfaces_and_stream(struct dc *dc, 482 struct dc_surface_update *surface_updates, int surface_count, 483 const struct dc_stream *dc_stream, 484 struct dc_stream_update *stream_update); 485 486 /* 487 * Log the current stream state. 488 */ 489 void dc_stream_log( 490 const struct dc_stream *stream, 491 struct dal_logger *dc_logger, 492 enum dc_log_type log_type); 493 494 uint8_t dc_get_current_stream_count(const struct dc *dc); 495 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i); 496 497 /* 498 * Return the current frame counter. 499 */ 500 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream); 501 502 /* TODO: Return parsed values rather than direct register read 503 * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos) 504 * being refactored properly to be dce-specific 505 */ 506 bool dc_stream_get_scanoutpos(const struct dc_stream *stream, 507 uint32_t *v_blank_start, 508 uint32_t *v_blank_end, 509 uint32_t *h_position, 510 uint32_t *v_position); 511 512 /* 513 * Structure to store surface/stream associations for validation 514 */ 515 struct dc_validation_set { 516 const struct dc_stream *stream; 517 const struct dc_surface *surfaces[MAX_SURFACES]; 518 uint8_t surface_count; 519 }; 520 521 /* 522 * This function takes a set of resources and checks that they are cofunctional. 523 * 524 * After this call: 525 * No hardware is programmed for call. Only validation is done. 526 */ 527 struct validate_context *dc_get_validate_context( 528 const struct dc *dc, 529 const struct dc_validation_set set[], 530 uint8_t set_count); 531 532 bool dc_validate_resources( 533 const struct dc *dc, 534 const struct dc_validation_set set[], 535 uint8_t set_count); 536 537 /* 538 * This function takes a stream and checks if it is guaranteed to be supported. 539 * Guaranteed means that MAX_COFUNC similar streams are supported. 540 * 541 * After this call: 542 * No hardware is programmed for call. Only validation is done. 543 */ 544 545 bool dc_validate_guaranteed( 546 const struct dc *dc, 547 const struct dc_stream *stream); 548 549 void dc_resource_validate_ctx_copy_construct( 550 const struct validate_context *src_ctx, 551 struct validate_context *dst_ctx); 552 553 void dc_resource_validate_ctx_destruct(struct validate_context *context); 554 555 /* 556 * Set up streams and links associated to drive sinks 557 * The streams parameter is an absolute set of all active streams. 558 * 559 * After this call: 560 * Phy, Encoder, Timing Generator are programmed and enabled. 561 * New streams are enabled with blank stream; no memory read. 562 */ 563 bool dc_commit_streams( 564 struct dc *dc, 565 const struct dc_stream *streams[], 566 uint8_t stream_count); 567 568 /** 569 * Create a new default stream for the requested sink 570 */ 571 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink); 572 573 void dc_stream_retain(const struct dc_stream *dc_stream); 574 void dc_stream_release(const struct dc_stream *dc_stream); 575 576 struct dc_stream_status { 577 int primary_otg_inst; 578 int surface_count; 579 const struct dc_surface *surfaces[MAX_SURFACE_NUM]; 580 581 /* 582 * link this stream passes through 583 */ 584 const struct dc_link *link; 585 }; 586 587 const struct dc_stream_status *dc_stream_get_status( 588 const struct dc_stream *dc_stream); 589 590 enum surface_update_type dc_check_update_surfaces_for_stream( 591 struct dc *dc, 592 struct dc_surface_update *updates, 593 int surface_count, 594 struct dc_stream_update *stream_update, 595 const struct dc_stream_status *stream_status); 596 597 /******************************************************************************* 598 * Link Interfaces 599 ******************************************************************************/ 600 601 /* 602 * A link contains one or more sinks and their connected status. 603 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. 604 */ 605 struct dc_link { 606 const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK]; 607 unsigned int sink_count; 608 const struct dc_sink *local_sink; 609 unsigned int link_index; 610 enum dc_connection_type type; 611 enum signal_type connector_signal; 612 enum dc_irq_source irq_source_hpd; 613 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */ 614 /* caps is the same as reported_link_cap. link_traing use 615 * reported_link_cap. Will clean up. TODO 616 */ 617 struct dc_link_settings reported_link_cap; 618 struct dc_link_settings verified_link_cap; 619 struct dc_link_settings max_link_setting; 620 struct dc_link_settings cur_link_settings; 621 struct dc_lane_settings cur_lane_setting; 622 623 uint8_t ddc_hw_inst; 624 uint8_t link_enc_hw_inst; 625 626 bool test_pattern_enabled; 627 union compliance_test_state compliance_test_state; 628 629 void *priv; 630 bool aux_mode; 631 }; 632 633 struct dpcd_caps { 634 union dpcd_rev dpcd_rev; 635 union max_lane_count max_ln_count; 636 union max_down_spread max_down_spread; 637 638 /* dongle type (DP converter, CV smart dongle) */ 639 enum display_dongle_type dongle_type; 640 /* Dongle's downstream count. */ 641 union sink_count sink_count; 642 /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER, 643 indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/ 644 struct dc_dongle_caps dongle_caps; 645 646 bool allow_invalid_MSA_timing_param; 647 bool panel_mode_edp; 648 uint32_t sink_dev_id; 649 uint32_t branch_dev_id; 650 int8_t branch_dev_name[6]; 651 int8_t branch_hw_revision; 652 }; 653 654 struct dc_link_status { 655 struct dpcd_caps *dpcd_caps; 656 }; 657 658 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); 659 660 /* 661 * Return an enumerated dc_link. dc_link order is constant and determined at 662 * boot time. They cannot be created or destroyed. 663 * Use dc_get_caps() to get number of links. 664 */ 665 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index); 666 667 /* Return id of physical connector represented by a dc_link at link_index.*/ 668 const struct graphics_object_id dc_get_link_id_at_index( 669 struct dc *dc, uint32_t link_index); 670 671 /* Set backlight level of an embedded panel (eDP, LVDS). */ 672 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level, 673 uint32_t frame_ramp, const struct dc_stream *stream); 674 675 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable); 676 677 bool dc_link_setup_psr(const struct dc_link *dc_link, 678 const struct dc_stream *stream, struct psr_config *psr_config); 679 680 /* Request DC to detect if there is a Panel connected. 681 * boot - If this call is during initial boot. 682 * Return false for any type of detection failure or MST detection 683 * true otherwise. True meaning further action is required (status update 684 * and OS notification). 685 */ 686 bool dc_link_detect(const struct dc_link *dc_link, bool boot); 687 688 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt). 689 * Return: 690 * true - Downstream port status changed. DM should call DC to do the 691 * detection. 692 * false - no change in Downstream port status. No further action required 693 * from DM. */ 694 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link); 695 696 struct dc_sink_init_data; 697 698 struct dc_sink *dc_link_add_remote_sink( 699 const struct dc_link *dc_link, 700 const uint8_t *edid, 701 int len, 702 struct dc_sink_init_data *init_data); 703 704 void dc_link_remove_remote_sink( 705 const struct dc_link *link, 706 const struct dc_sink *sink); 707 708 /* Used by diagnostics for virtual link at the moment */ 709 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink); 710 711 void dc_link_dp_set_drive_settings( 712 const struct dc_link *link, 713 struct link_training_settings *lt_settings); 714 715 bool dc_link_dp_perform_link_training( 716 struct dc_link *link, 717 const struct dc_link_settings *link_setting, 718 bool skip_video_pattern); 719 720 void dc_link_dp_enable_hpd(const struct dc_link *link); 721 722 void dc_link_dp_disable_hpd(const struct dc_link *link); 723 724 bool dc_link_dp_set_test_pattern( 725 const struct dc_link *link, 726 enum dp_test_pattern test_pattern, 727 const struct link_training_settings *p_link_settings, 728 const unsigned char *p_custom_pattern, 729 unsigned int cust_pattern_size); 730 731 /******************************************************************************* 732 * Sink Interfaces - A sink corresponds to a display output device 733 ******************************************************************************/ 734 735 struct dc_container_id { 736 // 128bit GUID in binary form 737 unsigned char guid[16]; 738 // 8 byte port ID -> ELD.PortID 739 unsigned int portId[2]; 740 // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName 741 unsigned short manufacturerName; 742 // 2 byte product code -> ELD.ProductCode 743 unsigned short productCode; 744 }; 745 746 /* 747 * The sink structure contains EDID and other display device properties 748 */ 749 struct dc_sink { 750 enum signal_type sink_signal; 751 struct dc_edid dc_edid; /* raw edid */ 752 struct dc_edid_caps edid_caps; /* parse display caps */ 753 struct dc_container_id *dc_container_id; 754 uint32_t dongle_max_pix_clk; 755 bool converter_disable_audio; 756 void *priv; 757 }; 758 759 void dc_sink_retain(const struct dc_sink *sink); 760 void dc_sink_release(const struct dc_sink *sink); 761 762 const struct audio **dc_get_audios(struct dc *dc); 763 764 struct dc_sink_init_data { 765 enum signal_type sink_signal; 766 const struct dc_link *link; 767 uint32_t dongle_max_pix_clk; 768 bool converter_disable_audio; 769 }; 770 771 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params); 772 bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id); 773 bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id); 774 775 /******************************************************************************* 776 * Cursor interfaces - To manages the cursor within a stream 777 ******************************************************************************/ 778 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 779 bool dc_stream_set_cursor_attributes( 780 const struct dc_stream *stream, 781 const struct dc_cursor_attributes *attributes); 782 783 bool dc_stream_set_cursor_position( 784 const struct dc_stream *stream, 785 const struct dc_cursor_position *position); 786 787 /* Newer interfaces */ 788 struct dc_cursor { 789 struct dc_plane_address address; 790 struct dc_cursor_attributes attributes; 791 }; 792 793 /******************************************************************************* 794 * Interrupt interfaces 795 ******************************************************************************/ 796 enum dc_irq_source dc_interrupt_to_irq_source( 797 struct dc *dc, 798 uint32_t src_id, 799 uint32_t ext_id); 800 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable); 801 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src); 802 enum dc_irq_source dc_get_hpd_irq_source_at_index( 803 struct dc *dc, uint32_t link_index); 804 805 /******************************************************************************* 806 * Power Interfaces 807 ******************************************************************************/ 808 809 void dc_set_power_state( 810 struct dc *dc, 811 enum dc_acpi_cm_power_state power_state); 812 void dc_resume(const struct dc *dc); 813 814 /******************************************************************************* 815 * DDC Interfaces 816 ******************************************************************************/ 817 818 const struct ddc_service *dc_get_ddc_at_index( 819 struct dc *dc, uint32_t link_index); 820 821 /* 822 * DPCD access interfaces 823 */ 824 825 bool dc_read_aux_dpcd( 826 struct dc *dc, 827 uint32_t link_index, 828 uint32_t address, 829 uint8_t *data, 830 uint32_t size); 831 832 bool dc_write_aux_dpcd( 833 struct dc *dc, 834 uint32_t link_index, 835 uint32_t address, 836 const uint8_t *data, 837 uint32_t size); 838 839 bool dc_read_aux_i2c( 840 struct dc *dc, 841 uint32_t link_index, 842 enum i2c_mot_mode mot, 843 uint32_t address, 844 uint8_t *data, 845 uint32_t size); 846 847 bool dc_write_aux_i2c( 848 struct dc *dc, 849 uint32_t link_index, 850 enum i2c_mot_mode mot, 851 uint32_t address, 852 const uint8_t *data, 853 uint32_t size); 854 855 bool dc_query_ddc_data( 856 struct dc *dc, 857 uint32_t link_index, 858 uint32_t address, 859 uint8_t *write_buf, 860 uint32_t write_size, 861 uint8_t *read_buf, 862 uint32_t read_size); 863 864 bool dc_submit_i2c( 865 struct dc *dc, 866 uint32_t link_index, 867 struct i2c_command *cmd); 868 869 870 #endif /* DC_INTERFACE_H_ */ 871