xref: /linux/drivers/gpu/drm/amd/display/dc/bios/command_table.h (revision 664b0bae0b87f69bc9deb098f5e0158b9cf18e04)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_COMMAND_TABLE_H__
27 #define __DAL_COMMAND_TABLE_H__
28 
29 struct bios_parser;
30 struct bp_encoder_control;
31 
32 struct cmd_tbl {
33 	enum bp_result (*dig_encoder_control)(
34 		struct bios_parser *bp,
35 		struct bp_encoder_control *control);
36 	enum bp_result (*encoder_control_dig1)(
37 		struct bios_parser *bp,
38 		struct bp_encoder_control *control);
39 	enum bp_result (*encoder_control_dig2)(
40 		struct bios_parser *bp,
41 		struct bp_encoder_control *control);
42 	enum bp_result (*transmitter_control)(
43 		struct bios_parser *bp,
44 		struct bp_transmitter_control *control);
45 	enum bp_result (*set_pixel_clock)(
46 		struct bios_parser *bp,
47 		struct bp_pixel_clock_parameters *bp_params);
48 	enum bp_result (*enable_spread_spectrum_on_ppll)(
49 		struct bios_parser *bp,
50 		struct bp_spread_spectrum_parameters *bp_params,
51 		bool enable);
52 	enum bp_result (*adjust_display_pll)(
53 		struct bios_parser *bp,
54 		struct bp_adjust_pixel_clock_parameters *bp_params);
55 	enum bp_result (*dac1_encoder_control)(
56 		struct bios_parser *bp,
57 		bool enable,
58 		uint32_t pixel_clock,
59 		uint8_t dac_standard);
60 	enum bp_result (*dac2_encoder_control)(
61 		struct bios_parser *bp,
62 		bool enable,
63 		uint32_t pixel_clock,
64 		uint8_t dac_standard);
65 	enum bp_result (*dac1_output_control)(
66 		struct bios_parser *bp,
67 		bool enable);
68 	enum bp_result (*dac2_output_control)(
69 		struct bios_parser *bp,
70 		bool enable);
71 	enum bp_result (*set_crtc_timing)(
72 		struct bios_parser *bp,
73 		struct bp_hw_crtc_timing_parameters *bp_params);
74 	enum bp_result (*select_crtc_source)(
75 		struct bios_parser *bp,
76 		struct bp_crtc_source_select *bp_params);
77 	enum bp_result (*enable_crtc)(
78 		struct bios_parser *bp,
79 		enum controller_id controller_id,
80 		bool enable);
81 	enum bp_result (*enable_crtc_mem_req)(
82 		struct bios_parser *bp,
83 		enum controller_id controller_id,
84 		bool enable);
85 	enum bp_result (*program_clock)(
86 		struct bios_parser *bp,
87 		struct bp_pixel_clock_parameters *bp_params);
88 	enum bp_result (*external_encoder_control)(
89 			struct bios_parser *bp,
90 			struct bp_external_encoder_control *cntl);
91 	enum bp_result (*enable_disp_power_gating)(
92 		struct bios_parser *bp,
93 		enum controller_id crtc_id,
94 		enum bp_pipe_control_action action);
95 	enum bp_result (*set_dce_clock)(
96 		struct bios_parser *bp,
97 		struct bp_set_dce_clock_parameters *bp_params);
98 };
99 
100 void dal_bios_parser_init_cmd_tbl(struct bios_parser *bp);
101 
102 #endif
103