1ad808910SAlex Deucher# SPDX-License-Identifier: MIT 24562236bSHarry Wentlandmenu "Display Engine Configuration" 34562236bSHarry Wentland depends on DRM && DRM_AMDGPU 44562236bSHarry Wentland 54562236bSHarry Wentlandconfig DRM_AMD_DC 64562236bSHarry Wentland bool "AMD DC - Enable new display engine" 74562236bSHarry Wentland default y 86f6cb171SLee Jones depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64 96ce8f316SNicholas Kazlauskas select SND_HDA_COMPONENT if SND_HDA_CORE 1079b72db6SAo Zhong # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752 11*901bdf5eSDave Airlie select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG)) 124562236bSHarry Wentland help 134562236bSHarry Wentland Choose this option if you want to use the new display engine 144562236bSHarry Wentland support for AMDGPU. This adds required support for Vega and 154562236bSHarry Wentland Raven ASICs. 164562236bSHarry Wentland 176f6cb171SLee Jones calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64) 186f6cb171SLee Jones architectures built with Clang (all released versions), whereby the stack 196f6cb171SLee Jones frame gets blown up to well over 5k. This would cause an immediate kernel 206f6cb171SLee Jones panic on most architectures. We'll revert this when the following bug report 216f6cb171SLee Jones has been resolved: https://github.com/llvm/llvm-project/issues/41896. 226f6cb171SLee Jones 234652ae7aSHarry Wentlandconfig DRM_AMD_DC_FP 249d1d02ffSLeo (Sunpeng) Li def_bool n 25dc37a9a0SLeo (Sunpeng) Li help 264652ae7aSHarry Wentland Floating point support, required for DCN-based SoCs 2736d26912SBhawanpreet Lakha 285963cddeSMauro Rossiconfig DRM_AMD_DC_SI 295963cddeSMauro Rossi bool "AMD DC support for Southern Islands ASICs" 30c2c15410SAlex Deucher depends on DRM_AMDGPU_SI 31c2c15410SAlex Deucher depends on DRM_AMD_DC 325963cddeSMauro Rossi help 335963cddeSMauro Rossi Choose this option to enable new AMD DC support for SI asics 345963cddeSMauro Rossi by default. This includes Tahiti, Pitcairn, Cape Verde, Oland. 355963cddeSMauro Rossi Hainan is not supported by AMD DC and it has no physical DCE6. 365963cddeSMauro Rossi 374562236bSHarry Wentlandconfig DEBUG_KERNEL_DC 384562236bSHarry Wentland bool "Enable kgdb break in DC" 394562236bSHarry Wentland depends on DRM_AMD_DC 40c5ff0c19STakashi Iwai depends on KGDB 414562236bSHarry Wentland help 4217fd4fe9SRandy Dunlap Choose this option if you want to hit kdgb_break in assert. 434562236bSHarry Wentland 4486bc2219SWayne Linconfig DRM_AMD_SECURE_DISPLAY 4586bc2219SWayne Lin bool "Enable secure display support" 4686bc2219SWayne Lin depends on DEBUG_FS 474652ae7aSHarry Wentland depends on DRM_AMD_DC_FP 4886bc2219SWayne Lin help 49d155cfffSSui Jingfeng Choose this option if you want to support secure display 5086bc2219SWayne Lin 51d155cfffSSui Jingfeng This option enables the calculation of crc of specific region via 52d155cfffSSui Jingfeng debugfs. Cooperate with specific DMCU FW. 5386bc2219SWayne Lin 544562236bSHarry Wentlandendmenu 55