1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/kernel.h> 26 #include <linux/pci.h> 27 #include <linux/errno.h> 28 #include <linux/acpi.h> 29 #include <linux/hash.h> 30 #include <linux/cpufreq.h> 31 #include <linux/log2.h> 32 #include <linux/dmi.h> 33 #include <linux/atomic.h> 34 #include <linux/crc16.h> 35 36 #include "kfd_priv.h" 37 #include "kfd_crat.h" 38 #include "kfd_topology.h" 39 #include "kfd_device_queue_manager.h" 40 #include "kfd_svm.h" 41 #include "kfd_debug.h" 42 #include "amdgpu_amdkfd.h" 43 #include "amdgpu_ras.h" 44 #include "amdgpu.h" 45 46 /* topology_device_list - Master list of all topology devices */ 47 static struct list_head topology_device_list; 48 static struct kfd_system_properties sys_props; 49 50 static DECLARE_RWSEM(topology_lock); 51 static uint32_t topology_crat_proximity_domain; 52 53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 54 uint32_t proximity_domain) 55 { 56 struct kfd_topology_device *top_dev; 57 struct kfd_topology_device *device = NULL; 58 59 list_for_each_entry(top_dev, &topology_device_list, list) 60 if (top_dev->proximity_domain == proximity_domain) { 61 device = top_dev; 62 break; 63 } 64 65 return device; 66 } 67 68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 69 uint32_t proximity_domain) 70 { 71 struct kfd_topology_device *device = NULL; 72 73 down_read(&topology_lock); 74 75 device = kfd_topology_device_by_proximity_domain_no_lock( 76 proximity_domain); 77 up_read(&topology_lock); 78 79 return device; 80 } 81 82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 83 { 84 struct kfd_topology_device *top_dev = NULL; 85 struct kfd_topology_device *ret = NULL; 86 87 down_read(&topology_lock); 88 89 list_for_each_entry(top_dev, &topology_device_list, list) 90 if (top_dev->gpu_id == gpu_id) { 91 ret = top_dev; 92 break; 93 } 94 95 up_read(&topology_lock); 96 97 return ret; 98 } 99 100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id) 101 { 102 struct kfd_topology_device *top_dev; 103 104 top_dev = kfd_topology_device_by_id(gpu_id); 105 if (!top_dev) 106 return NULL; 107 108 return top_dev->gpu; 109 } 110 111 /* Called with write topology_lock acquired */ 112 static void kfd_release_topology_device(struct kfd_topology_device *dev) 113 { 114 struct kfd_mem_properties *mem; 115 struct kfd_cache_properties *cache; 116 struct kfd_iolink_properties *iolink; 117 struct kfd_iolink_properties *p2plink; 118 struct kfd_perf_properties *perf; 119 120 list_del(&dev->list); 121 122 while (dev->mem_props.next != &dev->mem_props) { 123 mem = container_of(dev->mem_props.next, 124 struct kfd_mem_properties, list); 125 list_del(&mem->list); 126 kfree(mem); 127 } 128 129 while (dev->cache_props.next != &dev->cache_props) { 130 cache = container_of(dev->cache_props.next, 131 struct kfd_cache_properties, list); 132 list_del(&cache->list); 133 kfree(cache); 134 } 135 136 while (dev->io_link_props.next != &dev->io_link_props) { 137 iolink = container_of(dev->io_link_props.next, 138 struct kfd_iolink_properties, list); 139 list_del(&iolink->list); 140 kfree(iolink); 141 } 142 143 while (dev->p2p_link_props.next != &dev->p2p_link_props) { 144 p2plink = container_of(dev->p2p_link_props.next, 145 struct kfd_iolink_properties, list); 146 list_del(&p2plink->list); 147 kfree(p2plink); 148 } 149 150 while (dev->perf_props.next != &dev->perf_props) { 151 perf = container_of(dev->perf_props.next, 152 struct kfd_perf_properties, list); 153 list_del(&perf->list); 154 kfree(perf); 155 } 156 157 kfree(dev); 158 } 159 160 void kfd_release_topology_device_list(struct list_head *device_list) 161 { 162 struct kfd_topology_device *dev; 163 164 while (!list_empty(device_list)) { 165 dev = list_first_entry(device_list, 166 struct kfd_topology_device, list); 167 kfd_release_topology_device(dev); 168 } 169 } 170 171 static void kfd_release_live_view(void) 172 { 173 kfd_release_topology_device_list(&topology_device_list); 174 memset(&sys_props, 0, sizeof(sys_props)); 175 } 176 177 struct kfd_topology_device *kfd_create_topology_device( 178 struct list_head *device_list) 179 { 180 struct kfd_topology_device *dev; 181 182 dev = kfd_alloc_struct(dev); 183 if (!dev) { 184 pr_err("No memory to allocate a topology device"); 185 return NULL; 186 } 187 188 INIT_LIST_HEAD(&dev->mem_props); 189 INIT_LIST_HEAD(&dev->cache_props); 190 INIT_LIST_HEAD(&dev->io_link_props); 191 INIT_LIST_HEAD(&dev->p2p_link_props); 192 INIT_LIST_HEAD(&dev->perf_props); 193 194 list_add_tail(&dev->list, device_list); 195 196 return dev; 197 } 198 199 200 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \ 201 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \ 202 fmt, __VA_ARGS__)) 203 #define sysfs_show_32bit_prop(buffer, offs, name, value) \ 204 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value) 205 #define sysfs_show_64bit_prop(buffer, offs, name, value) \ 206 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value) 207 #define sysfs_show_32bit_val(buffer, offs, value) \ 208 sysfs_show_gen_prop(buffer, offs, "%u\n", value) 209 #define sysfs_show_str_val(buffer, offs, value) \ 210 sysfs_show_gen_prop(buffer, offs, "%s\n", value) 211 212 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 213 char *buffer) 214 { 215 int offs = 0; 216 217 /* Making sure that the buffer is an empty string */ 218 buffer[0] = 0; 219 220 if (attr == &sys_props.attr_genid) { 221 sysfs_show_32bit_val(buffer, offs, 222 sys_props.generation_count); 223 } else if (attr == &sys_props.attr_props) { 224 sysfs_show_64bit_prop(buffer, offs, "platform_oem", 225 sys_props.platform_oem); 226 sysfs_show_64bit_prop(buffer, offs, "platform_id", 227 sys_props.platform_id); 228 sysfs_show_64bit_prop(buffer, offs, "platform_rev", 229 sys_props.platform_rev); 230 } else { 231 offs = -EINVAL; 232 } 233 234 return offs; 235 } 236 237 static void kfd_topology_kobj_release(struct kobject *kobj) 238 { 239 kfree(kobj); 240 } 241 242 static const struct sysfs_ops sysprops_ops = { 243 .show = sysprops_show, 244 }; 245 246 static const struct kobj_type sysprops_type = { 247 .release = kfd_topology_kobj_release, 248 .sysfs_ops = &sysprops_ops, 249 }; 250 251 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 252 char *buffer) 253 { 254 int offs = 0; 255 struct kfd_iolink_properties *iolink; 256 257 /* Making sure that the buffer is an empty string */ 258 buffer[0] = 0; 259 260 iolink = container_of(attr, struct kfd_iolink_properties, attr); 261 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 262 return -EPERM; 263 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type); 264 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj); 265 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min); 266 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from); 267 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to); 268 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight); 269 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency); 270 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency); 271 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth", 272 iolink->min_bandwidth); 273 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth", 274 iolink->max_bandwidth); 275 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size", 276 iolink->rec_transfer_size); 277 sysfs_show_32bit_prop(buffer, offs, "recommended_sdma_engine_id_mask", 278 iolink->rec_sdma_eng_id_mask); 279 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags); 280 281 return offs; 282 } 283 284 static const struct sysfs_ops iolink_ops = { 285 .show = iolink_show, 286 }; 287 288 static const struct kobj_type iolink_type = { 289 .release = kfd_topology_kobj_release, 290 .sysfs_ops = &iolink_ops, 291 }; 292 293 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 294 char *buffer) 295 { 296 int offs = 0; 297 struct kfd_mem_properties *mem; 298 299 /* Making sure that the buffer is an empty string */ 300 buffer[0] = 0; 301 302 mem = container_of(attr, struct kfd_mem_properties, attr); 303 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 304 return -EPERM; 305 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type); 306 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes", 307 mem->size_in_bytes); 308 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags); 309 sysfs_show_32bit_prop(buffer, offs, "width", mem->width); 310 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max", 311 mem->mem_clk_max); 312 313 return offs; 314 } 315 316 static const struct sysfs_ops mem_ops = { 317 .show = mem_show, 318 }; 319 320 static const struct kobj_type mem_type = { 321 .release = kfd_topology_kobj_release, 322 .sysfs_ops = &mem_ops, 323 }; 324 325 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 326 char *buffer) 327 { 328 int offs = 0; 329 uint32_t i, j; 330 struct kfd_cache_properties *cache; 331 332 /* Making sure that the buffer is an empty string */ 333 buffer[0] = 0; 334 cache = container_of(attr, struct kfd_cache_properties, attr); 335 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 336 return -EPERM; 337 sysfs_show_32bit_prop(buffer, offs, "processor_id_low", 338 cache->processor_id_low); 339 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); 340 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); 341 sysfs_show_32bit_prop(buffer, offs, "cache_line_size", 342 cache->cacheline_size); 343 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag", 344 cache->cachelines_per_tag); 345 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc); 346 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency); 347 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type); 348 349 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map "); 350 for (i = 0; i < cache->sibling_map_size; i++) 351 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) 352 /* Check each bit */ 353 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,", 354 (cache->sibling_map[i] >> j) & 1); 355 356 /* Replace the last "," with end of line */ 357 buffer[offs-1] = '\n'; 358 return offs; 359 } 360 361 static const struct sysfs_ops cache_ops = { 362 .show = kfd_cache_show, 363 }; 364 365 static const struct kobj_type cache_type = { 366 .release = kfd_topology_kobj_release, 367 .sysfs_ops = &cache_ops, 368 }; 369 370 /****** Sysfs of Performance Counters ******/ 371 372 struct kfd_perf_attr { 373 struct kobj_attribute attr; 374 uint32_t data; 375 }; 376 377 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 378 char *buf) 379 { 380 int offs = 0; 381 struct kfd_perf_attr *attr; 382 383 buf[0] = 0; 384 attr = container_of(attrs, struct kfd_perf_attr, attr); 385 if (!attr->data) /* invalid data for PMC */ 386 return 0; 387 else 388 return sysfs_show_32bit_val(buf, offs, attr->data); 389 } 390 391 #define KFD_PERF_DESC(_name, _data) \ 392 { \ 393 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 394 .data = _data, \ 395 } 396 397 static struct kfd_perf_attr perf_attr_iommu[] = { 398 KFD_PERF_DESC(max_concurrent, 0), 399 KFD_PERF_DESC(num_counters, 0), 400 KFD_PERF_DESC(counter_ids, 0), 401 }; 402 /****************************************/ 403 404 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 405 char *buffer) 406 { 407 int offs = 0; 408 struct kfd_topology_device *dev; 409 uint32_t log_max_watch_addr; 410 411 /* Making sure that the buffer is an empty string */ 412 buffer[0] = 0; 413 414 if (strcmp(attr->name, "gpu_id") == 0) { 415 dev = container_of(attr, struct kfd_topology_device, 416 attr_gpuid); 417 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 418 return -EPERM; 419 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id); 420 } 421 422 if (strcmp(attr->name, "name") == 0) { 423 dev = container_of(attr, struct kfd_topology_device, 424 attr_name); 425 426 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 427 return -EPERM; 428 return sysfs_show_str_val(buffer, offs, dev->node_props.name); 429 } 430 431 dev = container_of(attr, struct kfd_topology_device, 432 attr_props); 433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 434 return -EPERM; 435 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count", 436 dev->node_props.cpu_cores_count); 437 sysfs_show_32bit_prop(buffer, offs, "simd_count", 438 dev->gpu ? dev->node_props.simd_count : 0); 439 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count", 440 dev->node_props.mem_banks_count); 441 sysfs_show_32bit_prop(buffer, offs, "caches_count", 442 dev->node_props.caches_count); 443 sysfs_show_32bit_prop(buffer, offs, "io_links_count", 444 dev->node_props.io_links_count); 445 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count", 446 dev->node_props.p2p_links_count); 447 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base", 448 dev->node_props.cpu_core_id_base); 449 sysfs_show_32bit_prop(buffer, offs, "simd_id_base", 450 dev->node_props.simd_id_base); 451 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd", 452 dev->node_props.max_waves_per_simd); 453 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb", 454 dev->node_props.lds_size_in_kb); 455 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb", 456 dev->node_props.gds_size_in_kb); 457 sysfs_show_32bit_prop(buffer, offs, "num_gws", 458 dev->node_props.num_gws); 459 sysfs_show_32bit_prop(buffer, offs, "wave_front_size", 460 dev->node_props.wave_front_size); 461 sysfs_show_32bit_prop(buffer, offs, "array_count", 462 dev->gpu ? (dev->node_props.array_count * 463 NUM_XCC(dev->gpu->xcc_mask)) : 0); 464 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine", 465 dev->node_props.simd_arrays_per_engine); 466 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array", 467 dev->node_props.cu_per_simd_array); 468 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", 469 dev->node_props.simd_per_cu); 470 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", 471 dev->node_props.max_slots_scratch_cu); 472 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", 473 dev->node_props.gfx_target_version); 474 sysfs_show_32bit_prop(buffer, offs, "vendor_id", 475 dev->node_props.vendor_id); 476 sysfs_show_32bit_prop(buffer, offs, "device_id", 477 dev->node_props.device_id); 478 sysfs_show_32bit_prop(buffer, offs, "location_id", 479 dev->node_props.location_id); 480 sysfs_show_32bit_prop(buffer, offs, "domain", 481 dev->node_props.domain); 482 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor", 483 dev->node_props.drm_render_minor); 484 sysfs_show_64bit_prop(buffer, offs, "hive_id", 485 dev->node_props.hive_id); 486 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines", 487 dev->node_props.num_sdma_engines); 488 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines", 489 dev->node_props.num_sdma_xgmi_engines); 490 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine", 491 dev->node_props.num_sdma_queues_per_engine); 492 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues", 493 dev->node_props.num_cp_queues); 494 495 if (dev->gpu) { 496 log_max_watch_addr = 497 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points); 498 499 if (log_max_watch_addr) { 500 dev->node_props.capability |= 501 HSA_CAP_WATCH_POINTS_SUPPORTED; 502 503 dev->node_props.capability |= 504 ((log_max_watch_addr << 505 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 506 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 507 } 508 509 if (dev->gpu->adev->asic_type == CHIP_TONGA) 510 dev->node_props.capability |= 511 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 512 513 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute", 514 dev->node_props.max_engine_clk_fcompute); 515 516 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL); 517 518 sysfs_show_32bit_prop(buffer, offs, "fw_version", 519 dev->gpu->kfd->mec_fw_version); 520 sysfs_show_32bit_prop(buffer, offs, "capability", 521 dev->node_props.capability); 522 sysfs_show_64bit_prop(buffer, offs, "debug_prop", 523 dev->node_props.debug_prop); 524 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version", 525 dev->gpu->kfd->sdma_fw_version); 526 sysfs_show_64bit_prop(buffer, offs, "unique_id", 527 dev->gpu->adev->unique_id); 528 sysfs_show_32bit_prop(buffer, offs, "num_xcc", 529 NUM_XCC(dev->gpu->xcc_mask)); 530 } 531 532 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute", 533 cpufreq_quick_get_max(0)/1000); 534 } 535 536 static const struct sysfs_ops node_ops = { 537 .show = node_show, 538 }; 539 540 static const struct kobj_type node_type = { 541 .release = kfd_topology_kobj_release, 542 .sysfs_ops = &node_ops, 543 }; 544 545 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 546 { 547 sysfs_remove_file(kobj, attr); 548 kobject_del(kobj); 549 kobject_put(kobj); 550 } 551 552 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 553 { 554 struct kfd_iolink_properties *p2plink; 555 struct kfd_iolink_properties *iolink; 556 struct kfd_cache_properties *cache; 557 struct kfd_mem_properties *mem; 558 struct kfd_perf_properties *perf; 559 560 if (dev->kobj_iolink) { 561 list_for_each_entry(iolink, &dev->io_link_props, list) 562 if (iolink->kobj) { 563 kfd_remove_sysfs_file(iolink->kobj, 564 &iolink->attr); 565 iolink->kobj = NULL; 566 } 567 kobject_del(dev->kobj_iolink); 568 kobject_put(dev->kobj_iolink); 569 dev->kobj_iolink = NULL; 570 } 571 572 if (dev->kobj_p2plink) { 573 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 574 if (p2plink->kobj) { 575 kfd_remove_sysfs_file(p2plink->kobj, 576 &p2plink->attr); 577 p2plink->kobj = NULL; 578 } 579 kobject_del(dev->kobj_p2plink); 580 kobject_put(dev->kobj_p2plink); 581 dev->kobj_p2plink = NULL; 582 } 583 584 if (dev->kobj_cache) { 585 list_for_each_entry(cache, &dev->cache_props, list) 586 if (cache->kobj) { 587 kfd_remove_sysfs_file(cache->kobj, 588 &cache->attr); 589 cache->kobj = NULL; 590 } 591 kobject_del(dev->kobj_cache); 592 kobject_put(dev->kobj_cache); 593 dev->kobj_cache = NULL; 594 } 595 596 if (dev->kobj_mem) { 597 list_for_each_entry(mem, &dev->mem_props, list) 598 if (mem->kobj) { 599 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 600 mem->kobj = NULL; 601 } 602 kobject_del(dev->kobj_mem); 603 kobject_put(dev->kobj_mem); 604 dev->kobj_mem = NULL; 605 } 606 607 if (dev->kobj_perf) { 608 list_for_each_entry(perf, &dev->perf_props, list) { 609 kfree(perf->attr_group); 610 perf->attr_group = NULL; 611 } 612 kobject_del(dev->kobj_perf); 613 kobject_put(dev->kobj_perf); 614 dev->kobj_perf = NULL; 615 } 616 617 if (dev->kobj_node) { 618 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 619 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 620 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 621 kobject_del(dev->kobj_node); 622 kobject_put(dev->kobj_node); 623 dev->kobj_node = NULL; 624 } 625 } 626 627 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 628 uint32_t id) 629 { 630 struct kfd_iolink_properties *p2plink; 631 struct kfd_iolink_properties *iolink; 632 struct kfd_cache_properties *cache; 633 struct kfd_mem_properties *mem; 634 struct kfd_perf_properties *perf; 635 int ret; 636 uint32_t i, num_attrs; 637 struct attribute **attrs; 638 639 if (WARN_ON(dev->kobj_node)) 640 return -EEXIST; 641 642 /* 643 * Creating the sysfs folders 644 */ 645 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 646 if (!dev->kobj_node) 647 return -ENOMEM; 648 649 ret = kobject_init_and_add(dev->kobj_node, &node_type, 650 sys_props.kobj_nodes, "%d", id); 651 if (ret < 0) { 652 kobject_put(dev->kobj_node); 653 return ret; 654 } 655 656 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 657 if (!dev->kobj_mem) 658 return -ENOMEM; 659 660 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 661 if (!dev->kobj_cache) 662 return -ENOMEM; 663 664 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 665 if (!dev->kobj_iolink) 666 return -ENOMEM; 667 668 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node); 669 if (!dev->kobj_p2plink) 670 return -ENOMEM; 671 672 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 673 if (!dev->kobj_perf) 674 return -ENOMEM; 675 676 /* 677 * Creating sysfs files for node properties 678 */ 679 dev->attr_gpuid.name = "gpu_id"; 680 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 681 sysfs_attr_init(&dev->attr_gpuid); 682 dev->attr_name.name = "name"; 683 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 684 sysfs_attr_init(&dev->attr_name); 685 dev->attr_props.name = "properties"; 686 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 687 sysfs_attr_init(&dev->attr_props); 688 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 689 if (ret < 0) 690 return ret; 691 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 692 if (ret < 0) 693 return ret; 694 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 695 if (ret < 0) 696 return ret; 697 698 i = 0; 699 list_for_each_entry(mem, &dev->mem_props, list) { 700 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 701 if (!mem->kobj) 702 return -ENOMEM; 703 ret = kobject_init_and_add(mem->kobj, &mem_type, 704 dev->kobj_mem, "%d", i); 705 if (ret < 0) { 706 kobject_put(mem->kobj); 707 return ret; 708 } 709 710 mem->attr.name = "properties"; 711 mem->attr.mode = KFD_SYSFS_FILE_MODE; 712 sysfs_attr_init(&mem->attr); 713 ret = sysfs_create_file(mem->kobj, &mem->attr); 714 if (ret < 0) 715 return ret; 716 i++; 717 } 718 719 i = 0; 720 list_for_each_entry(cache, &dev->cache_props, list) { 721 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 722 if (!cache->kobj) 723 return -ENOMEM; 724 ret = kobject_init_and_add(cache->kobj, &cache_type, 725 dev->kobj_cache, "%d", i); 726 if (ret < 0) { 727 kobject_put(cache->kobj); 728 return ret; 729 } 730 731 cache->attr.name = "properties"; 732 cache->attr.mode = KFD_SYSFS_FILE_MODE; 733 sysfs_attr_init(&cache->attr); 734 ret = sysfs_create_file(cache->kobj, &cache->attr); 735 if (ret < 0) 736 return ret; 737 i++; 738 } 739 740 i = 0; 741 list_for_each_entry(iolink, &dev->io_link_props, list) { 742 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 743 if (!iolink->kobj) 744 return -ENOMEM; 745 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 746 dev->kobj_iolink, "%d", i); 747 if (ret < 0) { 748 kobject_put(iolink->kobj); 749 return ret; 750 } 751 752 iolink->attr.name = "properties"; 753 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 754 sysfs_attr_init(&iolink->attr); 755 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 756 if (ret < 0) 757 return ret; 758 i++; 759 } 760 761 i = 0; 762 list_for_each_entry(p2plink, &dev->p2p_link_props, list) { 763 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 764 if (!p2plink->kobj) 765 return -ENOMEM; 766 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 767 dev->kobj_p2plink, "%d", i); 768 if (ret < 0) { 769 kobject_put(p2plink->kobj); 770 return ret; 771 } 772 773 p2plink->attr.name = "properties"; 774 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 775 sysfs_attr_init(&p2plink->attr); 776 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 777 if (ret < 0) 778 return ret; 779 i++; 780 } 781 782 /* All hardware blocks have the same number of attributes. */ 783 num_attrs = ARRAY_SIZE(perf_attr_iommu); 784 list_for_each_entry(perf, &dev->perf_props, list) { 785 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 786 * num_attrs + sizeof(struct attribute_group), 787 GFP_KERNEL); 788 if (!perf->attr_group) 789 return -ENOMEM; 790 791 attrs = (struct attribute **)(perf->attr_group + 1); 792 if (!strcmp(perf->block_name, "iommu")) { 793 /* Information of IOMMU's num_counters and counter_ids is shown 794 * under /sys/bus/event_source/devices/amd_iommu. We don't 795 * duplicate here. 796 */ 797 perf_attr_iommu[0].data = perf->max_concurrent; 798 for (i = 0; i < num_attrs; i++) 799 attrs[i] = &perf_attr_iommu[i].attr.attr; 800 } 801 perf->attr_group->name = perf->block_name; 802 perf->attr_group->attrs = attrs; 803 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 804 if (ret < 0) 805 return ret; 806 } 807 808 return 0; 809 } 810 811 /* Called with write topology lock acquired */ 812 static int kfd_build_sysfs_node_tree(void) 813 { 814 struct kfd_topology_device *dev; 815 int ret; 816 uint32_t i = 0; 817 818 list_for_each_entry(dev, &topology_device_list, list) { 819 ret = kfd_build_sysfs_node_entry(dev, i); 820 if (ret < 0) 821 return ret; 822 i++; 823 } 824 825 return 0; 826 } 827 828 /* Called with write topology lock acquired */ 829 static void kfd_remove_sysfs_node_tree(void) 830 { 831 struct kfd_topology_device *dev; 832 833 list_for_each_entry(dev, &topology_device_list, list) 834 kfd_remove_sysfs_node_entry(dev); 835 } 836 837 static int kfd_topology_update_sysfs(void) 838 { 839 int ret; 840 841 if (!sys_props.kobj_topology) { 842 sys_props.kobj_topology = 843 kfd_alloc_struct(sys_props.kobj_topology); 844 if (!sys_props.kobj_topology) 845 return -ENOMEM; 846 847 ret = kobject_init_and_add(sys_props.kobj_topology, 848 &sysprops_type, &kfd_device->kobj, 849 "topology"); 850 if (ret < 0) { 851 kobject_put(sys_props.kobj_topology); 852 return ret; 853 } 854 855 sys_props.kobj_nodes = kobject_create_and_add("nodes", 856 sys_props.kobj_topology); 857 if (!sys_props.kobj_nodes) 858 return -ENOMEM; 859 860 sys_props.attr_genid.name = "generation_id"; 861 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 862 sysfs_attr_init(&sys_props.attr_genid); 863 ret = sysfs_create_file(sys_props.kobj_topology, 864 &sys_props.attr_genid); 865 if (ret < 0) 866 return ret; 867 868 sys_props.attr_props.name = "system_properties"; 869 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 870 sysfs_attr_init(&sys_props.attr_props); 871 ret = sysfs_create_file(sys_props.kobj_topology, 872 &sys_props.attr_props); 873 if (ret < 0) 874 return ret; 875 } 876 877 kfd_remove_sysfs_node_tree(); 878 879 return kfd_build_sysfs_node_tree(); 880 } 881 882 static void kfd_topology_release_sysfs(void) 883 { 884 kfd_remove_sysfs_node_tree(); 885 if (sys_props.kobj_topology) { 886 sysfs_remove_file(sys_props.kobj_topology, 887 &sys_props.attr_genid); 888 sysfs_remove_file(sys_props.kobj_topology, 889 &sys_props.attr_props); 890 if (sys_props.kobj_nodes) { 891 kobject_del(sys_props.kobj_nodes); 892 kobject_put(sys_props.kobj_nodes); 893 sys_props.kobj_nodes = NULL; 894 } 895 kobject_del(sys_props.kobj_topology); 896 kobject_put(sys_props.kobj_topology); 897 sys_props.kobj_topology = NULL; 898 } 899 } 900 901 /* Called with write topology_lock acquired */ 902 static void kfd_topology_update_device_list(struct list_head *temp_list, 903 struct list_head *master_list) 904 { 905 while (!list_empty(temp_list)) { 906 list_move_tail(temp_list->next, master_list); 907 sys_props.num_devices++; 908 } 909 } 910 911 static void kfd_debug_print_topology(void) 912 { 913 struct kfd_topology_device *dev; 914 915 down_read(&topology_lock); 916 917 dev = list_last_entry(&topology_device_list, 918 struct kfd_topology_device, list); 919 if (dev) { 920 if (dev->node_props.cpu_cores_count && 921 dev->node_props.simd_count) { 922 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n", 923 dev->node_props.device_id, 924 dev->node_props.vendor_id); 925 } else if (dev->node_props.cpu_cores_count) 926 pr_info("Topology: Add CPU node\n"); 927 else if (dev->node_props.simd_count) 928 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n", 929 dev->node_props.device_id, 930 dev->node_props.vendor_id); 931 } 932 up_read(&topology_lock); 933 } 934 935 /* Helper function for intializing platform_xx members of 936 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 937 */ 938 static void kfd_update_system_properties(void) 939 { 940 struct kfd_topology_device *dev; 941 942 down_read(&topology_lock); 943 dev = list_last_entry(&topology_device_list, 944 struct kfd_topology_device, list); 945 if (dev) { 946 sys_props.platform_id = dev->oem_id64; 947 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 948 sys_props.platform_rev = dev->oem_revision; 949 } 950 up_read(&topology_lock); 951 } 952 953 static void find_system_memory(const struct dmi_header *dm, void *private) 954 { 955 struct dmi_mem_device *memdev = container_of(dm, struct dmi_mem_device, header); 956 struct kfd_mem_properties *mem; 957 struct kfd_topology_device *kdev = 958 (struct kfd_topology_device *)private; 959 960 if (memdev->header.type != DMI_ENTRY_MEM_DEVICE) 961 return; 962 if (memdev->header.length < sizeof(struct dmi_mem_device)) 963 return; 964 965 list_for_each_entry(mem, &kdev->mem_props, list) { 966 if (memdev->total_width != 0xFFFF && memdev->total_width != 0) 967 mem->width = memdev->total_width; 968 if (memdev->speed != 0) 969 mem->mem_clk_max = memdev->speed; 970 } 971 } 972 973 /* kfd_add_non_crat_information - Add information that is not currently 974 * defined in CRAT but is necessary for KFD topology 975 * @dev - topology device to which addition info is added 976 */ 977 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 978 { 979 /* Check if CPU only node. */ 980 if (!kdev->gpu) { 981 /* Add system memory information */ 982 dmi_walk(find_system_memory, kdev); 983 } 984 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 985 } 986 987 int kfd_topology_init(void) 988 { 989 void *crat_image = NULL; 990 size_t image_size = 0; 991 int ret; 992 struct list_head temp_topology_device_list; 993 int cpu_only_node = 0; 994 struct kfd_topology_device *kdev; 995 int proximity_domain; 996 997 /* topology_device_list - Master list of all topology devices 998 * temp_topology_device_list - temporary list created while parsing CRAT 999 * or VCRAT. Once parsing is complete the contents of list is moved to 1000 * topology_device_list 1001 */ 1002 1003 /* Initialize the head for the both the lists */ 1004 INIT_LIST_HEAD(&topology_device_list); 1005 INIT_LIST_HEAD(&temp_topology_device_list); 1006 init_rwsem(&topology_lock); 1007 1008 memset(&sys_props, 0, sizeof(sys_props)); 1009 1010 /* Proximity domains in ACPI CRAT tables start counting at 1011 * 0. The same should be true for virtual CRAT tables created 1012 * at this stage. GPUs added later in kfd_topology_add_device 1013 * use a counter. 1014 */ 1015 proximity_domain = 0; 1016 1017 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1018 COMPUTE_UNIT_CPU, NULL, 1019 proximity_domain); 1020 cpu_only_node = 1; 1021 if (ret) { 1022 pr_err("Error creating VCRAT table for CPU\n"); 1023 return ret; 1024 } 1025 1026 ret = kfd_parse_crat_table(crat_image, 1027 &temp_topology_device_list, 1028 proximity_domain); 1029 if (ret) { 1030 pr_err("Error parsing VCRAT table for CPU\n"); 1031 goto err; 1032 } 1033 1034 kdev = list_first_entry(&temp_topology_device_list, 1035 struct kfd_topology_device, list); 1036 1037 down_write(&topology_lock); 1038 kfd_topology_update_device_list(&temp_topology_device_list, 1039 &topology_device_list); 1040 topology_crat_proximity_domain = sys_props.num_devices-1; 1041 ret = kfd_topology_update_sysfs(); 1042 up_write(&topology_lock); 1043 1044 if (!ret) { 1045 sys_props.generation_count++; 1046 kfd_update_system_properties(); 1047 kfd_debug_print_topology(); 1048 } else 1049 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1050 1051 /* For nodes with GPU, this information gets added 1052 * when GPU is detected (kfd_topology_add_device). 1053 */ 1054 if (cpu_only_node) { 1055 /* Add additional information to CPU only node created above */ 1056 down_write(&topology_lock); 1057 kdev = list_first_entry(&topology_device_list, 1058 struct kfd_topology_device, list); 1059 up_write(&topology_lock); 1060 kfd_add_non_crat_information(kdev); 1061 } 1062 1063 err: 1064 kfd_destroy_crat_image(crat_image); 1065 return ret; 1066 } 1067 1068 void kfd_topology_shutdown(void) 1069 { 1070 down_write(&topology_lock); 1071 kfd_topology_release_sysfs(); 1072 kfd_release_live_view(); 1073 up_write(&topology_lock); 1074 } 1075 1076 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) 1077 { 1078 uint32_t gpu_id; 1079 uint32_t buf[8]; 1080 uint64_t local_mem_size; 1081 struct kfd_topology_device *dev; 1082 bool is_unique; 1083 uint8_t *crc_buf; 1084 1085 if (!gpu) 1086 return 0; 1087 1088 crc_buf = (uint8_t *)&buf; 1089 local_mem_size = gpu->local_mem_info.local_mem_size_private + 1090 gpu->local_mem_info.local_mem_size_public; 1091 buf[0] = gpu->adev->pdev->devfn; 1092 buf[1] = gpu->adev->pdev->subsystem_vendor | 1093 (gpu->adev->pdev->subsystem_device << 16); 1094 buf[2] = pci_domain_nr(gpu->adev->pdev->bus); 1095 buf[3] = gpu->adev->pdev->device; 1096 buf[4] = gpu->adev->pdev->bus->number; 1097 buf[5] = lower_32_bits(local_mem_size); 1098 buf[6] = upper_32_bits(local_mem_size); 1099 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16); 1100 1101 gpu_id = crc16(0, crc_buf, sizeof(buf)) & 1102 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1103 1104 /* There is a very small possibility when generating a 1105 * 16 (KFD_GPU_ID_HASH_WIDTH) bit value from 8 word buffer 1106 * that the value could be 0 or non-unique. So, check if 1107 * it is unique and non-zero. If not unique increment till 1108 * unique one is found. In case of overflow, restart from 1 1109 */ 1110 1111 down_read(&topology_lock); 1112 do { 1113 is_unique = true; 1114 if (!gpu_id) 1115 gpu_id = 1; 1116 list_for_each_entry(dev, &topology_device_list, list) { 1117 if (dev->gpu && dev->gpu_id == gpu_id) { 1118 is_unique = false; 1119 break; 1120 } 1121 } 1122 if (unlikely(!is_unique)) 1123 gpu_id = (gpu_id + 1) & 1124 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1125 } while (!is_unique); 1126 up_read(&topology_lock); 1127 1128 return gpu_id; 1129 } 1130 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1131 * the GPU device is not already present in the topology device 1132 * list then return NULL. This means a new topology device has to 1133 * be created for this GPU. 1134 */ 1135 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) 1136 { 1137 struct kfd_topology_device *dev; 1138 struct kfd_topology_device *out_dev = NULL; 1139 struct kfd_mem_properties *mem; 1140 struct kfd_cache_properties *cache; 1141 struct kfd_iolink_properties *iolink; 1142 struct kfd_iolink_properties *p2plink; 1143 1144 list_for_each_entry(dev, &topology_device_list, list) { 1145 /* Discrete GPUs need their own topology device list 1146 * entries. Don't assign them to CPU/APU nodes. 1147 */ 1148 if (dev->node_props.cpu_cores_count) 1149 continue; 1150 1151 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1152 dev->gpu = gpu; 1153 out_dev = dev; 1154 1155 list_for_each_entry(mem, &dev->mem_props, list) 1156 mem->gpu = dev->gpu; 1157 list_for_each_entry(cache, &dev->cache_props, list) 1158 cache->gpu = dev->gpu; 1159 list_for_each_entry(iolink, &dev->io_link_props, list) 1160 iolink->gpu = dev->gpu; 1161 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 1162 p2plink->gpu = dev->gpu; 1163 break; 1164 } 1165 } 1166 return out_dev; 1167 } 1168 1169 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1170 { 1171 /* 1172 * TODO: Generate an event for thunk about the arrival/removal 1173 * of the GPU 1174 */ 1175 } 1176 1177 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1178 * patch this after CRAT parsing. 1179 */ 1180 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1181 { 1182 struct kfd_mem_properties *mem; 1183 struct kfd_local_mem_info local_mem_info; 1184 1185 if (!dev) 1186 return; 1187 1188 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1189 * single bank of VRAM local memory. 1190 * for dGPUs - VCRAT reports only one bank of Local Memory 1191 * for APUs - If CRAT from ACPI reports more than one bank, then 1192 * all the banks will report the same mem_clk_max information 1193 */ 1194 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info, 1195 dev->gpu->xcp); 1196 1197 list_for_each_entry(mem, &dev->mem_props, list) 1198 mem->mem_clk_max = local_mem_info.mem_clk_max; 1199 } 1200 1201 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev, 1202 struct kfd_topology_device *target_gpu_dev, 1203 struct kfd_iolink_properties *link) 1204 { 1205 /* xgmi always supports atomics between links. */ 1206 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI) 1207 return; 1208 1209 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */ 1210 if (target_gpu_dev) { 1211 uint32_t cap; 1212 1213 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev, 1214 PCI_EXP_DEVCAP2, &cap); 1215 1216 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1217 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1218 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1219 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1220 /* set gpu (dev) flags. */ 1221 } else { 1222 if (!dev->gpu->kfd->pci_atomic_requested || 1223 dev->gpu->adev->asic_type == CHIP_HAWAII) 1224 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1225 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1226 } 1227 } 1228 1229 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev, 1230 struct kfd_iolink_properties *outbound_link, 1231 struct kfd_iolink_properties *inbound_link) 1232 { 1233 /* CPU -> GPU with PCIe */ 1234 if (!to_dev->gpu && 1235 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 1236 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1237 1238 if (to_dev->gpu) { 1239 /* GPU <-> GPU with PCIe and 1240 * Vega20 with XGMI 1241 */ 1242 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS || 1243 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1244 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) { 1245 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1246 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1247 } 1248 } 1249 } 1250 1251 #define REC_SDMA_NUM_GPU 8 1252 static const int rec_sdma_eng_map[REC_SDMA_NUM_GPU][REC_SDMA_NUM_GPU] = { 1253 { -1, 14, 12, 2, 4, 8, 10, 6 }, 1254 { 14, -1, 2, 10, 8, 4, 6, 12 }, 1255 { 10, 2, -1, 12, 14, 6, 4, 8 }, 1256 { 2, 12, 10, -1, 6, 14, 8, 4 }, 1257 { 4, 8, 14, 6, -1, 10, 12, 2 }, 1258 { 8, 4, 6, 14, 12, -1, 2, 10 }, 1259 { 10, 6, 4, 8, 12, 2, -1, 14 }, 1260 { 6, 12, 8, 4, 2, 10, 14, -1 }}; 1261 1262 static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev, 1263 struct kfd_iolink_properties *outbound_link, 1264 struct kfd_iolink_properties *inbound_link) 1265 { 1266 struct kfd_node *gpu = outbound_link->gpu; 1267 struct amdgpu_device *adev = gpu->adev; 1268 int num_xgmi_nodes = adev->gmc.xgmi.num_physical_nodes; 1269 bool support_rec_eng = !amdgpu_sriov_vf(adev) && to_dev->gpu && 1270 adev->aid_mask && num_xgmi_nodes && gpu->kfd->num_nodes == 1 && 1271 kfd_get_num_xgmi_sdma_engines(gpu) >= 14 && 1272 (!(adev->flags & AMD_IS_APU) && num_xgmi_nodes == 8); 1273 1274 if (support_rec_eng) { 1275 int src_socket_id = adev->gmc.xgmi.physical_node_id; 1276 int dst_socket_id = to_dev->gpu->adev->gmc.xgmi.physical_node_id; 1277 1278 outbound_link->rec_sdma_eng_id_mask = 1279 1 << rec_sdma_eng_map[src_socket_id][dst_socket_id]; 1280 inbound_link->rec_sdma_eng_id_mask = 1281 1 << rec_sdma_eng_map[dst_socket_id][src_socket_id]; 1282 } else { 1283 int num_sdma_eng = kfd_get_num_sdma_engines(gpu); 1284 int i, eng_offset = 0; 1285 1286 if (outbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1287 kfd_get_num_xgmi_sdma_engines(gpu) && to_dev->gpu) { 1288 eng_offset = num_sdma_eng; 1289 num_sdma_eng = kfd_get_num_xgmi_sdma_engines(gpu); 1290 } 1291 1292 for (i = 0; i < num_sdma_eng; i++) { 1293 outbound_link->rec_sdma_eng_id_mask |= (1 << (i + eng_offset)); 1294 inbound_link->rec_sdma_eng_id_mask |= (1 << (i + eng_offset)); 1295 } 1296 } 1297 } 1298 1299 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1300 { 1301 struct kfd_iolink_properties *link, *inbound_link; 1302 struct kfd_topology_device *peer_dev; 1303 1304 if (!dev || !dev->gpu) 1305 return; 1306 1307 /* GPU only creates direct links so apply flags setting to all */ 1308 list_for_each_entry(link, &dev->io_link_props, list) { 1309 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1310 kfd_set_iolink_no_atomics(dev, NULL, link); 1311 peer_dev = kfd_topology_device_by_proximity_domain( 1312 link->node_to); 1313 1314 if (!peer_dev) 1315 continue; 1316 1317 /* Include the CPU peer in GPU hive if connected over xGMI. */ 1318 if (!peer_dev->gpu && 1319 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) { 1320 /* 1321 * If the GPU is not part of a GPU hive, use its pci 1322 * device location as the hive ID to bind with the CPU. 1323 */ 1324 if (!dev->node_props.hive_id) 1325 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); 1326 peer_dev->node_props.hive_id = dev->node_props.hive_id; 1327 } 1328 1329 list_for_each_entry(inbound_link, &peer_dev->io_link_props, 1330 list) { 1331 if (inbound_link->node_to != link->node_from) 1332 continue; 1333 1334 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1335 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1336 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1337 kfd_set_recommended_sdma_engines(peer_dev, link, inbound_link); 1338 } 1339 } 1340 1341 /* Create indirect links so apply flags setting to all */ 1342 list_for_each_entry(link, &dev->p2p_link_props, list) { 1343 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1344 kfd_set_iolink_no_atomics(dev, NULL, link); 1345 peer_dev = kfd_topology_device_by_proximity_domain( 1346 link->node_to); 1347 1348 if (!peer_dev) 1349 continue; 1350 1351 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props, 1352 list) { 1353 if (inbound_link->node_to != link->node_from) 1354 continue; 1355 1356 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1357 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1358 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1359 } 1360 } 1361 } 1362 1363 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev, 1364 struct kfd_iolink_properties *p2plink) 1365 { 1366 int ret; 1367 1368 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 1369 if (!p2plink->kobj) 1370 return -ENOMEM; 1371 1372 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 1373 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); 1374 if (ret < 0) { 1375 kobject_put(p2plink->kobj); 1376 return ret; 1377 } 1378 1379 p2plink->attr.name = "properties"; 1380 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 1381 sysfs_attr_init(&p2plink->attr); 1382 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 1383 if (ret < 0) 1384 return ret; 1385 1386 return 0; 1387 } 1388 1389 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node) 1390 { 1391 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link; 1392 struct kfd_iolink_properties *props = NULL, *props2 = NULL; 1393 struct kfd_topology_device *cpu_dev; 1394 int ret = 0; 1395 int i, num_cpu; 1396 1397 num_cpu = 0; 1398 list_for_each_entry(cpu_dev, &topology_device_list, list) { 1399 if (cpu_dev->gpu) 1400 break; 1401 num_cpu++; 1402 } 1403 1404 if (list_empty(&kdev->io_link_props)) 1405 return -ENODATA; 1406 1407 gpu_link = list_first_entry(&kdev->io_link_props, 1408 struct kfd_iolink_properties, list); 1409 1410 for (i = 0; i < num_cpu; i++) { 1411 /* CPU <--> GPU */ 1412 if (gpu_link->node_to == i) 1413 continue; 1414 1415 /* find CPU <--> CPU links */ 1416 cpu_link = NULL; 1417 cpu_dev = kfd_topology_device_by_proximity_domain(i); 1418 if (cpu_dev) { 1419 list_for_each_entry(tmp_link, 1420 &cpu_dev->io_link_props, list) { 1421 if (tmp_link->node_to == gpu_link->node_to) { 1422 cpu_link = tmp_link; 1423 break; 1424 } 1425 } 1426 } 1427 1428 if (!cpu_link) 1429 return -ENOMEM; 1430 1431 /* CPU <--> CPU <--> GPU, GPU node*/ 1432 props = kfd_alloc_struct(props); 1433 if (!props) 1434 return -ENOMEM; 1435 1436 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties)); 1437 props->weight = gpu_link->weight + cpu_link->weight; 1438 props->min_latency = gpu_link->min_latency + cpu_link->min_latency; 1439 props->max_latency = gpu_link->max_latency + cpu_link->max_latency; 1440 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth); 1441 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth); 1442 1443 props->node_from = gpu_node; 1444 props->node_to = i; 1445 kdev->node_props.p2p_links_count++; 1446 list_add_tail(&props->list, &kdev->p2p_link_props); 1447 ret = kfd_build_p2p_node_entry(kdev, props); 1448 if (ret < 0) 1449 return ret; 1450 1451 /* for small Bar, no CPU --> GPU in-direct links */ 1452 if (kfd_dev_is_large_bar(kdev->gpu)) { 1453 /* CPU <--> CPU <--> GPU, CPU node*/ 1454 props2 = kfd_alloc_struct(props2); 1455 if (!props2) 1456 return -ENOMEM; 1457 1458 memcpy(props2, props, sizeof(struct kfd_iolink_properties)); 1459 props2->node_from = i; 1460 props2->node_to = gpu_node; 1461 props2->kobj = NULL; 1462 cpu_dev->node_props.p2p_links_count++; 1463 list_add_tail(&props2->list, &cpu_dev->p2p_link_props); 1464 ret = kfd_build_p2p_node_entry(cpu_dev, props2); 1465 if (ret < 0) 1466 return ret; 1467 } 1468 } 1469 return ret; 1470 } 1471 1472 #if defined(CONFIG_HSA_AMD_P2P) 1473 static int kfd_add_peer_prop(struct kfd_topology_device *kdev, 1474 struct kfd_topology_device *peer, int from, int to) 1475 { 1476 struct kfd_iolink_properties *props = NULL; 1477 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3; 1478 struct kfd_topology_device *cpu_dev; 1479 int ret = 0; 1480 1481 if (!amdgpu_device_is_peer_accessible( 1482 kdev->gpu->adev, 1483 peer->gpu->adev)) 1484 return ret; 1485 1486 if (list_empty(&kdev->io_link_props)) 1487 return -ENODATA; 1488 1489 iolink1 = list_first_entry(&kdev->io_link_props, 1490 struct kfd_iolink_properties, list); 1491 1492 if (list_empty(&peer->io_link_props)) 1493 return -ENODATA; 1494 1495 iolink2 = list_first_entry(&peer->io_link_props, 1496 struct kfd_iolink_properties, list); 1497 1498 props = kfd_alloc_struct(props); 1499 if (!props) 1500 return -ENOMEM; 1501 1502 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties)); 1503 1504 props->weight = iolink1->weight + iolink2->weight; 1505 props->min_latency = iolink1->min_latency + iolink2->min_latency; 1506 props->max_latency = iolink1->max_latency + iolink2->max_latency; 1507 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth); 1508 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth); 1509 1510 if (iolink1->node_to != iolink2->node_to) { 1511 /* CPU->CPU link*/ 1512 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to); 1513 if (cpu_dev) { 1514 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) { 1515 if (iolink3->node_to != iolink2->node_to) 1516 continue; 1517 1518 props->weight += iolink3->weight; 1519 props->min_latency += iolink3->min_latency; 1520 props->max_latency += iolink3->max_latency; 1521 props->min_bandwidth = min(props->min_bandwidth, 1522 iolink3->min_bandwidth); 1523 props->max_bandwidth = min(props->max_bandwidth, 1524 iolink3->max_bandwidth); 1525 break; 1526 } 1527 } else { 1528 WARN(1, "CPU node not found"); 1529 } 1530 } 1531 1532 props->node_from = from; 1533 props->node_to = to; 1534 peer->node_props.p2p_links_count++; 1535 list_add_tail(&props->list, &peer->p2p_link_props); 1536 ret = kfd_build_p2p_node_entry(peer, props); 1537 1538 return ret; 1539 } 1540 #endif 1541 1542 static int kfd_dev_create_p2p_links(void) 1543 { 1544 struct kfd_topology_device *dev; 1545 struct kfd_topology_device *new_dev; 1546 #if defined(CONFIG_HSA_AMD_P2P) 1547 uint32_t i; 1548 #endif 1549 uint32_t k; 1550 int ret = 0; 1551 1552 k = 0; 1553 list_for_each_entry(dev, &topology_device_list, list) 1554 k++; 1555 if (k < 2) 1556 return 0; 1557 1558 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); 1559 if (WARN_ON(!new_dev->gpu)) 1560 return 0; 1561 1562 k--; 1563 1564 /* create in-direct links */ 1565 ret = kfd_create_indirect_link_prop(new_dev, k); 1566 if (ret < 0) 1567 goto out; 1568 1569 /* create p2p links */ 1570 #if defined(CONFIG_HSA_AMD_P2P) 1571 i = 0; 1572 list_for_each_entry(dev, &topology_device_list, list) { 1573 if (dev == new_dev) 1574 break; 1575 if (!dev->gpu || !dev->gpu->adev || 1576 (dev->gpu->kfd->hive_id && 1577 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id)) 1578 goto next; 1579 1580 /* check if node(s) is/are peer accessible in one direction or bi-direction */ 1581 ret = kfd_add_peer_prop(new_dev, dev, i, k); 1582 if (ret < 0) 1583 goto out; 1584 1585 ret = kfd_add_peer_prop(dev, new_dev, k, i); 1586 if (ret < 0) 1587 goto out; 1588 next: 1589 i++; 1590 } 1591 #endif 1592 1593 out: 1594 return ret; 1595 } 1596 1597 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1598 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, 1599 struct kfd_gpu_cache_info *pcache_info, 1600 int cu_bitmask, 1601 int cache_type, unsigned int cu_processor_id, 1602 int cu_block) 1603 { 1604 unsigned int cu_sibling_map_mask; 1605 int first_active_cu; 1606 struct kfd_cache_properties *pcache = NULL; 1607 1608 cu_sibling_map_mask = cu_bitmask; 1609 cu_sibling_map_mask >>= cu_block; 1610 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1611 first_active_cu = ffs(cu_sibling_map_mask); 1612 1613 /* CU could be inactive. In case of shared cache find the first active 1614 * CU. and incase of non-shared cache check if the CU is inactive. If 1615 * inactive active skip it 1616 */ 1617 if (first_active_cu) { 1618 pcache = kfd_alloc_struct(pcache); 1619 if (!pcache) 1620 return -ENOMEM; 1621 1622 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1623 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1); 1624 pcache->cache_level = pcache_info[cache_type].cache_level; 1625 pcache->cache_size = pcache_info[cache_type].cache_size; 1626 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1627 1628 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1629 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1630 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1631 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1632 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1633 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1634 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1635 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1636 1637 /* Sibling map is w.r.t processor_id_low, so shift out 1638 * inactive CU 1639 */ 1640 cu_sibling_map_mask = 1641 cu_sibling_map_mask >> (first_active_cu - 1); 1642 1643 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1644 pcache->sibling_map[1] = 1645 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1646 pcache->sibling_map[2] = 1647 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1648 pcache->sibling_map[3] = 1649 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1650 1651 pcache->sibling_map_size = 4; 1652 *props_ext = pcache; 1653 1654 return 0; 1655 } 1656 return 1; 1657 } 1658 1659 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1660 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, 1661 struct kfd_gpu_cache_info *pcache_info, 1662 struct amdgpu_cu_info *cu_info, 1663 struct amdgpu_gfx_config *gfx_info, 1664 int cache_type, unsigned int cu_processor_id, 1665 struct kfd_node *knode) 1666 { 1667 unsigned int cu_sibling_map_mask = 0; 1668 int first_active_cu; 1669 int i, j, k, xcc, start, end; 1670 int num_xcc = NUM_XCC(knode->xcc_mask); 1671 struct kfd_cache_properties *pcache = NULL; 1672 enum amdgpu_memory_partition mode; 1673 struct amdgpu_device *adev = knode->adev; 1674 bool found = false; 1675 1676 start = ffs(knode->xcc_mask) - 1; 1677 end = start + num_xcc; 1678 1679 /* To find the bitmap in the first active cu in the first 1680 * xcc, it is based on the assumption that evrey xcc must 1681 * have at least one active cu. 1682 */ 1683 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) { 1684 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) { 1685 if (cu_info->bitmap[start][i % 4][j % 4]) { 1686 cu_sibling_map_mask = 1687 cu_info->bitmap[start][i % 4][j % 4]; 1688 found = true; 1689 } 1690 } 1691 } 1692 1693 cu_sibling_map_mask &= 1694 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1695 first_active_cu = ffs(cu_sibling_map_mask); 1696 1697 /* CU could be inactive. In case of shared cache find the first active 1698 * CU. and incase of non-shared cache check if the CU is inactive. If 1699 * inactive active skip it 1700 */ 1701 if (first_active_cu) { 1702 pcache = kfd_alloc_struct(pcache); 1703 if (!pcache) 1704 return -ENOMEM; 1705 1706 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1707 pcache->processor_id_low = cu_processor_id 1708 + (first_active_cu - 1); 1709 pcache->cache_level = pcache_info[cache_type].cache_level; 1710 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1711 1712 if (KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 3) || 1713 KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4) || 1714 KFD_GC_VERSION(knode) == IP_VERSION(9, 5, 0)) 1715 mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev); 1716 else 1717 mode = UNKNOWN_MEMORY_PARTITION_MODE; 1718 1719 pcache->cache_size = pcache_info[cache_type].cache_size; 1720 /* Partition mode only affects L3 cache size */ 1721 if (mode && pcache->cache_level == 3) 1722 pcache->cache_size /= mode; 1723 1724 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1725 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1726 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1727 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1728 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1729 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1730 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1731 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1732 1733 /* Sibling map is w.r.t processor_id_low, so shift out 1734 * inactive CU 1735 */ 1736 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1); 1737 k = 0; 1738 1739 for (xcc = start; xcc < end; xcc++) { 1740 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1741 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1742 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1743 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1744 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1745 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1746 k += 4; 1747 1748 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4]; 1749 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1750 } 1751 } 1752 } 1753 pcache->sibling_map_size = k; 1754 *props_ext = pcache; 1755 return 0; 1756 } 1757 return 1; 1758 } 1759 1760 #define KFD_MAX_CACHE_TYPES 6 1761 1762 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info 1763 * tables 1764 */ 1765 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev) 1766 { 1767 struct kfd_gpu_cache_info *pcache_info = NULL; 1768 int i, j, k, xcc, start, end; 1769 int ct = 0; 1770 unsigned int cu_processor_id; 1771 int ret; 1772 unsigned int num_cu_shared; 1773 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; 1774 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config; 1775 int gpu_processor_id; 1776 struct kfd_cache_properties *props_ext = NULL; 1777 int num_of_entries = 0; 1778 int num_of_cache_types = 0; 1779 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES]; 1780 1781 1782 gpu_processor_id = dev->node_props.simd_id_base; 1783 1784 memset(cache_info, 0, sizeof(cache_info)); 1785 pcache_info = cache_info; 1786 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info); 1787 if (!num_of_cache_types) { 1788 pr_warn("no cache info found\n"); 1789 return; 1790 } 1791 1792 /* For each type of cache listed in the kfd_gpu_cache_info table, 1793 * go through all available Compute Units. 1794 * The [i,j,k] loop will 1795 * if kfd_gpu_cache_info.num_cu_shared = 1 1796 * will parse through all available CU 1797 * If (kfd_gpu_cache_info.num_cu_shared != 1) 1798 * then it will consider only one CU from 1799 * the shared unit 1800 */ 1801 start = ffs(kdev->xcc_mask) - 1; 1802 end = start + NUM_XCC(kdev->xcc_mask); 1803 1804 for (ct = 0; ct < num_of_cache_types; ct++) { 1805 cu_processor_id = gpu_processor_id; 1806 if (pcache_info[ct].cache_level == 1) { 1807 for (xcc = start; xcc < end; xcc++) { 1808 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1809 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1810 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) { 1811 1812 ret = fill_in_l1_pcache(&props_ext, pcache_info, 1813 cu_info->bitmap[xcc][i % 4][j + i / 4], ct, 1814 cu_processor_id, k); 1815 1816 if (ret < 0) 1817 break; 1818 1819 if (!ret) { 1820 num_of_entries++; 1821 list_add_tail(&props_ext->list, &dev->cache_props); 1822 } 1823 1824 /* Move to next CU block */ 1825 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <= 1826 gfx_info->max_cu_per_sh) ? 1827 pcache_info[ct].num_cu_shared : 1828 (gfx_info->max_cu_per_sh - k); 1829 cu_processor_id += num_cu_shared; 1830 } 1831 } 1832 } 1833 } 1834 } else { 1835 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info, 1836 cu_info, gfx_info, ct, cu_processor_id, kdev); 1837 1838 if (ret < 0) 1839 break; 1840 1841 if (!ret) { 1842 num_of_entries++; 1843 list_add_tail(&props_ext->list, &dev->cache_props); 1844 } 1845 } 1846 } 1847 dev->node_props.caches_count += num_of_entries; 1848 pr_debug("Added [%d] GPU cache entries\n", num_of_entries); 1849 } 1850 1851 static int kfd_topology_add_device_locked(struct kfd_node *gpu, 1852 struct kfd_topology_device **dev) 1853 { 1854 int proximity_domain = ++topology_crat_proximity_domain; 1855 struct list_head temp_topology_device_list; 1856 void *crat_image = NULL; 1857 size_t image_size = 0; 1858 int res; 1859 1860 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1861 COMPUTE_UNIT_GPU, gpu, 1862 proximity_domain); 1863 if (res) { 1864 dev_err(gpu->adev->dev, "Error creating VCRAT\n"); 1865 topology_crat_proximity_domain--; 1866 goto err; 1867 } 1868 1869 INIT_LIST_HEAD(&temp_topology_device_list); 1870 1871 res = kfd_parse_crat_table(crat_image, 1872 &temp_topology_device_list, 1873 proximity_domain); 1874 if (res) { 1875 dev_err(gpu->adev->dev, "Error parsing VCRAT\n"); 1876 topology_crat_proximity_domain--; 1877 goto err; 1878 } 1879 1880 kfd_topology_update_device_list(&temp_topology_device_list, 1881 &topology_device_list); 1882 1883 *dev = kfd_assign_gpu(gpu); 1884 if (WARN_ON(!*dev)) { 1885 res = -ENODEV; 1886 goto err; 1887 } 1888 1889 /* Fill the cache affinity information here for the GPUs 1890 * using VCRAT 1891 */ 1892 kfd_fill_cache_non_crat_info(*dev, gpu); 1893 1894 /* Update the SYSFS tree, since we added another topology 1895 * device 1896 */ 1897 res = kfd_topology_update_sysfs(); 1898 if (!res) 1899 sys_props.generation_count++; 1900 else 1901 dev_err(gpu->adev->dev, "Failed to update GPU to sysfs topology. res=%d\n", 1902 res); 1903 1904 err: 1905 kfd_destroy_crat_image(crat_image); 1906 return res; 1907 } 1908 1909 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev) 1910 { 1911 bool firmware_supported = true; 1912 1913 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) && 1914 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) { 1915 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & 1916 AMDGPU_MES_API_VERSION_MASK) >> 1917 AMDGPU_MES_API_VERSION_SHIFT; 1918 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & 1919 AMDGPU_MES_VERSION_MASK; 1920 1921 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64); 1922 goto out; 1923 } 1924 1925 /* 1926 * Note: Any unlisted devices here are assumed to support exception handling. 1927 * Add additional checks here as needed. 1928 */ 1929 switch (KFD_GC_VERSION(dev->gpu)) { 1930 case IP_VERSION(9, 0, 1): 1931 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768; 1932 break; 1933 case IP_VERSION(9, 1, 0): 1934 case IP_VERSION(9, 2, 1): 1935 case IP_VERSION(9, 2, 2): 1936 case IP_VERSION(9, 3, 0): 1937 case IP_VERSION(9, 4, 0): 1938 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459; 1939 break; 1940 case IP_VERSION(9, 4, 1): 1941 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60; 1942 break; 1943 case IP_VERSION(9, 4, 2): 1944 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51; 1945 break; 1946 case IP_VERSION(10, 1, 10): 1947 case IP_VERSION(10, 1, 2): 1948 case IP_VERSION(10, 1, 1): 1949 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144; 1950 break; 1951 case IP_VERSION(10, 3, 0): 1952 case IP_VERSION(10, 3, 2): 1953 case IP_VERSION(10, 3, 1): 1954 case IP_VERSION(10, 3, 4): 1955 case IP_VERSION(10, 3, 5): 1956 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89; 1957 break; 1958 case IP_VERSION(10, 1, 3): 1959 case IP_VERSION(10, 3, 3): 1960 firmware_supported = false; 1961 break; 1962 default: 1963 break; 1964 } 1965 1966 out: 1967 if (firmware_supported) 1968 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED; 1969 } 1970 1971 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev) 1972 { 1973 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1974 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1975 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1976 1977 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT | 1978 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED | 1979 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED; 1980 1981 if (kfd_dbg_has_ttmps_always_setup(dev->gpu)) 1982 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID; 1983 1984 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) { 1985 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) || 1986 KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4)) 1987 dev->node_props.debug_prop |= 1988 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 | 1989 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3; 1990 else 1991 dev->node_props.debug_prop |= 1992 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 | 1993 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 1994 1995 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2)) 1996 dev->node_props.capability |= 1997 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 1998 1999 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED; 2000 } else { 2001 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 | 2002 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 2003 2004 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0)) 2005 dev->node_props.capability |= 2006 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 2007 2008 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 0, 0)) 2009 dev->node_props.capability |= 2010 HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED; 2011 } 2012 2013 kfd_topology_set_dbg_firmware_support(dev); 2014 } 2015 2016 int kfd_topology_add_device(struct kfd_node *gpu) 2017 { 2018 uint32_t gpu_id; 2019 struct kfd_topology_device *dev; 2020 int res = 0; 2021 int i; 2022 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type]; 2023 struct amdgpu_gfx_config *gfx_info = &gpu->adev->gfx.config; 2024 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info; 2025 2026 if (gpu->xcp && !gpu->xcp->ddev) { 2027 dev_warn(gpu->adev->dev, 2028 "Won't add GPU to topology since it has no drm node assigned."); 2029 return 0; 2030 } else { 2031 dev_dbg(gpu->adev->dev, "Adding new GPU to topology\n"); 2032 } 2033 2034 /* Check to see if this gpu device exists in the topology_device_list. 2035 * If so, assign the gpu to that device, 2036 * else create a Virtual CRAT for this gpu device and then parse that 2037 * CRAT to create a new topology device. Once created assign the gpu to 2038 * that topology device 2039 */ 2040 down_write(&topology_lock); 2041 dev = kfd_assign_gpu(gpu); 2042 if (!dev) 2043 res = kfd_topology_add_device_locked(gpu, &dev); 2044 up_write(&topology_lock); 2045 if (res) 2046 return res; 2047 2048 gpu_id = kfd_generate_gpu_id(gpu); 2049 dev->gpu_id = gpu_id; 2050 gpu->id = gpu_id; 2051 2052 kfd_dev_create_p2p_links(); 2053 2054 /* TODO: Move the following lines to function 2055 * kfd_add_non_crat_information 2056 */ 2057 2058 /* Fill-in additional information that is not available in CRAT but 2059 * needed for the topology 2060 */ 2061 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) { 2062 dev->node_props.name[i] = __tolower(asic_name[i]); 2063 if (asic_name[i] == '\0') 2064 break; 2065 } 2066 dev->node_props.name[i] = '\0'; 2067 2068 dev->node_props.simd_arrays_per_engine = 2069 gfx_info->max_sh_per_se; 2070 2071 dev->node_props.gfx_target_version = 2072 gpu->kfd->device_info.gfx_target_version; 2073 dev->node_props.vendor_id = gpu->adev->pdev->vendor; 2074 dev->node_props.device_id = gpu->adev->pdev->device; 2075 dev->node_props.capability |= 2076 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) & 2077 HSA_CAP_ASIC_REVISION_MASK); 2078 2079 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); 2080 if (gpu->kfd->num_nodes > 1) 2081 dev->node_props.location_id |= dev->gpu->node_id; 2082 2083 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); 2084 dev->node_props.max_engine_clk_fcompute = 2085 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev); 2086 dev->node_props.max_engine_clk_ccompute = 2087 cpufreq_quick_get_max(0) / 1000; 2088 2089 if (gpu->xcp) 2090 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; 2091 else 2092 dev->node_props.drm_render_minor = 2093 gpu->kfd->shared_resources.drm_render_minor; 2094 2095 dev->node_props.hive_id = gpu->kfd->hive_id; 2096 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); 2097 dev->node_props.num_sdma_xgmi_engines = 2098 kfd_get_num_xgmi_sdma_engines(gpu); 2099 dev->node_props.num_sdma_queues_per_engine = 2100 gpu->kfd->device_info.num_sdma_queues_per_engine - 2101 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine; 2102 dev->node_props.num_gws = (dev->gpu->gws && 2103 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 2104 dev->gpu->adev->gds.gws_size : 0; 2105 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 2106 2107 kfd_fill_mem_clk_max_info(dev); 2108 kfd_fill_iolink_non_crat_info(dev); 2109 2110 switch (dev->gpu->adev->asic_type) { 2111 case CHIP_KAVERI: 2112 case CHIP_HAWAII: 2113 case CHIP_TONGA: 2114 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 2115 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2116 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2117 break; 2118 case CHIP_CARRIZO: 2119 case CHIP_FIJI: 2120 case CHIP_POLARIS10: 2121 case CHIP_POLARIS11: 2122 case CHIP_POLARIS12: 2123 case CHIP_VEGAM: 2124 pr_debug("Adding doorbell packet type capability\n"); 2125 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 2126 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2127 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2128 break; 2129 default: 2130 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1)) 2131 WARN(1, "Unexpected ASIC family %u", 2132 dev->gpu->adev->asic_type); 2133 else 2134 kfd_topology_set_capabilities(dev); 2135 } 2136 2137 /* 2138 * Overwrite ATS capability according to needs_iommu_device to fix 2139 * potential missing corresponding bit in CRAT of BIOS. 2140 */ 2141 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 2142 2143 /* Fix errors in CZ CRAT. 2144 * simd_count: Carrizo CRAT reports wrong simd_count, probably 2145 * because it doesn't consider masked out CUs 2146 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 2147 */ 2148 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) { 2149 dev->node_props.simd_count = 2150 cu_info->simd_per_cu * cu_info->number; 2151 dev->node_props.max_waves_per_simd = 10; 2152 } 2153 2154 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */ 2155 dev->node_props.capability |= 2156 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ? 2157 HSA_CAP_SRAM_EDCSUPPORTED : 0; 2158 dev->node_props.capability |= 2159 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 2160 HSA_CAP_MEM_EDCSUPPORTED : 0; 2161 2162 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1)) 2163 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? 2164 HSA_CAP_RASEVENTNOTIFY : 0; 2165 2166 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev)) 2167 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2168 2169 if (dev->gpu->adev->gmc.is_app_apu || 2170 dev->gpu->adev->gmc.xgmi.connected_to_cpu) 2171 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS; 2172 2173 kfd_queue_ctx_save_restore_size(dev); 2174 2175 kfd_debug_print_topology(); 2176 2177 kfd_notify_gpu_change(gpu_id, 1); 2178 2179 return 0; 2180 } 2181 2182 /** 2183 * kfd_topology_update_io_links() - Update IO links after device removal. 2184 * @proximity_domain: Proximity domain value of the dev being removed. 2185 * 2186 * The topology list currently is arranged in increasing order of 2187 * proximity domain. 2188 * 2189 * Two things need to be done when a device is removed: 2190 * 1. All the IO links to this device need to be removed. 2191 * 2. All nodes after the current device node need to move 2192 * up once this device node is removed from the topology 2193 * list. As a result, the proximity domain values for 2194 * all nodes after the node being deleted reduce by 1. 2195 * This would also cause the proximity domain values for 2196 * io links to be updated based on new proximity domain 2197 * values. 2198 * 2199 * Context: The caller must hold write topology_lock. 2200 */ 2201 static void kfd_topology_update_io_links(int proximity_domain) 2202 { 2203 struct kfd_topology_device *dev; 2204 struct kfd_iolink_properties *iolink, *p2plink, *tmp; 2205 2206 list_for_each_entry(dev, &topology_device_list, list) { 2207 if (dev->proximity_domain > proximity_domain) 2208 dev->proximity_domain--; 2209 2210 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) { 2211 /* 2212 * If there is an io link to the dev being deleted 2213 * then remove that IO link also. 2214 */ 2215 if (iolink->node_to == proximity_domain) { 2216 list_del(&iolink->list); 2217 dev->node_props.io_links_count--; 2218 } else { 2219 if (iolink->node_from > proximity_domain) 2220 iolink->node_from--; 2221 if (iolink->node_to > proximity_domain) 2222 iolink->node_to--; 2223 } 2224 } 2225 2226 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) { 2227 /* 2228 * If there is a p2p link to the dev being deleted 2229 * then remove that p2p link also. 2230 */ 2231 if (p2plink->node_to == proximity_domain) { 2232 list_del(&p2plink->list); 2233 dev->node_props.p2p_links_count--; 2234 } else { 2235 if (p2plink->node_from > proximity_domain) 2236 p2plink->node_from--; 2237 if (p2plink->node_to > proximity_domain) 2238 p2plink->node_to--; 2239 } 2240 } 2241 } 2242 } 2243 2244 int kfd_topology_remove_device(struct kfd_node *gpu) 2245 { 2246 struct kfd_topology_device *dev, *tmp; 2247 uint32_t gpu_id; 2248 int res = -ENODEV; 2249 int i = 0; 2250 2251 down_write(&topology_lock); 2252 2253 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) { 2254 if (dev->gpu == gpu) { 2255 gpu_id = dev->gpu_id; 2256 kfd_remove_sysfs_node_entry(dev); 2257 kfd_release_topology_device(dev); 2258 sys_props.num_devices--; 2259 kfd_topology_update_io_links(i); 2260 topology_crat_proximity_domain = sys_props.num_devices-1; 2261 sys_props.generation_count++; 2262 res = 0; 2263 if (kfd_topology_update_sysfs() < 0) 2264 kfd_topology_release_sysfs(); 2265 break; 2266 } 2267 i++; 2268 } 2269 2270 up_write(&topology_lock); 2271 2272 if (!res) 2273 kfd_notify_gpu_change(gpu_id, 0); 2274 2275 return res; 2276 } 2277 2278 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2279 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2280 * returned through @kdev 2281 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 2282 * -1: If end of list 2283 */ 2284 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev) 2285 { 2286 2287 struct kfd_topology_device *top_dev; 2288 uint8_t device_idx = 0; 2289 2290 *kdev = NULL; 2291 down_read(&topology_lock); 2292 2293 list_for_each_entry(top_dev, &topology_device_list, list) { 2294 if (device_idx == idx) { 2295 *kdev = top_dev->gpu; 2296 up_read(&topology_lock); 2297 return 0; 2298 } 2299 2300 device_idx++; 2301 } 2302 2303 up_read(&topology_lock); 2304 2305 return -1; 2306 2307 } 2308 2309 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 2310 { 2311 int first_cpu_of_numa_node; 2312 2313 if (!cpumask || cpumask == cpu_none_mask) 2314 return -1; 2315 first_cpu_of_numa_node = cpumask_first(cpumask); 2316 if (first_cpu_of_numa_node >= nr_cpu_ids) 2317 return -1; 2318 #ifdef CONFIG_X86_64 2319 return cpu_data(first_cpu_of_numa_node).topo.apicid; 2320 #else 2321 return first_cpu_of_numa_node; 2322 #endif 2323 } 2324 2325 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 2326 * of the given NUMA node (numa_node_id) 2327 * Return -1 on failure 2328 */ 2329 int kfd_numa_node_to_apic_id(int numa_node_id) 2330 { 2331 if (numa_node_id == -1) { 2332 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 2333 return kfd_cpumask_to_apic_id(cpu_online_mask); 2334 } 2335 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 2336 } 2337 2338 #if defined(CONFIG_DEBUG_FS) 2339 2340 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 2341 { 2342 struct kfd_topology_device *dev; 2343 unsigned int i = 0; 2344 int r = 0; 2345 2346 down_read(&topology_lock); 2347 2348 list_for_each_entry(dev, &topology_device_list, list) { 2349 if (!dev->gpu) { 2350 i++; 2351 continue; 2352 } 2353 2354 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2355 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 2356 if (r) 2357 break; 2358 } 2359 2360 up_read(&topology_lock); 2361 2362 return r; 2363 } 2364 2365 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 2366 { 2367 struct kfd_topology_device *dev; 2368 unsigned int i = 0; 2369 int r = 0; 2370 2371 down_read(&topology_lock); 2372 2373 list_for_each_entry(dev, &topology_device_list, list) { 2374 if (!dev->gpu) { 2375 i++; 2376 continue; 2377 } 2378 2379 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2380 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr); 2381 if (r) 2382 break; 2383 } 2384 2385 up_read(&topology_lock); 2386 2387 return r; 2388 } 2389 2390 #endif 2391