1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/kernel.h> 26 #include <linux/pci.h> 27 #include <linux/errno.h> 28 #include <linux/acpi.h> 29 #include <linux/hash.h> 30 #include <linux/cpufreq.h> 31 #include <linux/log2.h> 32 #include <linux/dmi.h> 33 #include <linux/atomic.h> 34 #include <linux/crc16.h> 35 36 #include "kfd_priv.h" 37 #include "kfd_crat.h" 38 #include "kfd_topology.h" 39 #include "kfd_device_queue_manager.h" 40 #include "kfd_svm.h" 41 #include "kfd_debug.h" 42 #include "amdgpu_amdkfd.h" 43 #include "amdgpu_ras.h" 44 #include "amdgpu.h" 45 46 /* topology_device_list - Master list of all topology devices */ 47 static struct list_head topology_device_list; 48 static struct kfd_system_properties sys_props; 49 50 static DECLARE_RWSEM(topology_lock); 51 static uint32_t topology_crat_proximity_domain; 52 53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 54 uint32_t proximity_domain) 55 { 56 struct kfd_topology_device *top_dev; 57 struct kfd_topology_device *device = NULL; 58 59 list_for_each_entry(top_dev, &topology_device_list, list) 60 if (top_dev->proximity_domain == proximity_domain) { 61 device = top_dev; 62 break; 63 } 64 65 return device; 66 } 67 68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 69 uint32_t proximity_domain) 70 { 71 struct kfd_topology_device *device = NULL; 72 73 down_read(&topology_lock); 74 75 device = kfd_topology_device_by_proximity_domain_no_lock( 76 proximity_domain); 77 up_read(&topology_lock); 78 79 return device; 80 } 81 82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 83 { 84 struct kfd_topology_device *top_dev = NULL; 85 struct kfd_topology_device *ret = NULL; 86 87 down_read(&topology_lock); 88 89 list_for_each_entry(top_dev, &topology_device_list, list) 90 if (top_dev->gpu_id == gpu_id) { 91 ret = top_dev; 92 break; 93 } 94 95 up_read(&topology_lock); 96 97 return ret; 98 } 99 100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id) 101 { 102 struct kfd_topology_device *top_dev; 103 104 top_dev = kfd_topology_device_by_id(gpu_id); 105 if (!top_dev) 106 return NULL; 107 108 return top_dev->gpu; 109 } 110 111 /* Called with write topology_lock acquired */ 112 static void kfd_release_topology_device(struct kfd_topology_device *dev) 113 { 114 struct kfd_mem_properties *mem; 115 struct kfd_cache_properties *cache; 116 struct kfd_iolink_properties *iolink; 117 struct kfd_iolink_properties *p2plink; 118 struct kfd_perf_properties *perf; 119 120 list_del(&dev->list); 121 122 while (dev->mem_props.next != &dev->mem_props) { 123 mem = container_of(dev->mem_props.next, 124 struct kfd_mem_properties, list); 125 list_del(&mem->list); 126 kfree(mem); 127 } 128 129 while (dev->cache_props.next != &dev->cache_props) { 130 cache = container_of(dev->cache_props.next, 131 struct kfd_cache_properties, list); 132 list_del(&cache->list); 133 kfree(cache); 134 } 135 136 while (dev->io_link_props.next != &dev->io_link_props) { 137 iolink = container_of(dev->io_link_props.next, 138 struct kfd_iolink_properties, list); 139 list_del(&iolink->list); 140 kfree(iolink); 141 } 142 143 while (dev->p2p_link_props.next != &dev->p2p_link_props) { 144 p2plink = container_of(dev->p2p_link_props.next, 145 struct kfd_iolink_properties, list); 146 list_del(&p2plink->list); 147 kfree(p2plink); 148 } 149 150 while (dev->perf_props.next != &dev->perf_props) { 151 perf = container_of(dev->perf_props.next, 152 struct kfd_perf_properties, list); 153 list_del(&perf->list); 154 kfree(perf); 155 } 156 157 kfree(dev); 158 } 159 160 void kfd_release_topology_device_list(struct list_head *device_list) 161 { 162 struct kfd_topology_device *dev; 163 164 while (!list_empty(device_list)) { 165 dev = list_first_entry(device_list, 166 struct kfd_topology_device, list); 167 kfd_release_topology_device(dev); 168 } 169 } 170 171 static void kfd_release_live_view(void) 172 { 173 kfd_release_topology_device_list(&topology_device_list); 174 memset(&sys_props, 0, sizeof(sys_props)); 175 } 176 177 struct kfd_topology_device *kfd_create_topology_device( 178 struct list_head *device_list) 179 { 180 struct kfd_topology_device *dev; 181 182 dev = kfd_alloc_struct(dev); 183 if (!dev) { 184 pr_err("No memory to allocate a topology device"); 185 return NULL; 186 } 187 188 INIT_LIST_HEAD(&dev->mem_props); 189 INIT_LIST_HEAD(&dev->cache_props); 190 INIT_LIST_HEAD(&dev->io_link_props); 191 INIT_LIST_HEAD(&dev->p2p_link_props); 192 INIT_LIST_HEAD(&dev->perf_props); 193 194 list_add_tail(&dev->list, device_list); 195 196 return dev; 197 } 198 199 200 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \ 201 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \ 202 fmt, __VA_ARGS__)) 203 #define sysfs_show_32bit_prop(buffer, offs, name, value) \ 204 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value) 205 #define sysfs_show_64bit_prop(buffer, offs, name, value) \ 206 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value) 207 #define sysfs_show_32bit_val(buffer, offs, value) \ 208 sysfs_show_gen_prop(buffer, offs, "%u\n", value) 209 #define sysfs_show_str_val(buffer, offs, value) \ 210 sysfs_show_gen_prop(buffer, offs, "%s\n", value) 211 212 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 213 char *buffer) 214 { 215 int offs = 0; 216 217 /* Making sure that the buffer is an empty string */ 218 buffer[0] = 0; 219 220 if (attr == &sys_props.attr_genid) { 221 sysfs_show_32bit_val(buffer, offs, 222 sys_props.generation_count); 223 } else if (attr == &sys_props.attr_props) { 224 sysfs_show_64bit_prop(buffer, offs, "platform_oem", 225 sys_props.platform_oem); 226 sysfs_show_64bit_prop(buffer, offs, "platform_id", 227 sys_props.platform_id); 228 sysfs_show_64bit_prop(buffer, offs, "platform_rev", 229 sys_props.platform_rev); 230 } else { 231 offs = -EINVAL; 232 } 233 234 return offs; 235 } 236 237 static void kfd_topology_kobj_release(struct kobject *kobj) 238 { 239 kfree(kobj); 240 } 241 242 static const struct sysfs_ops sysprops_ops = { 243 .show = sysprops_show, 244 }; 245 246 static const struct kobj_type sysprops_type = { 247 .release = kfd_topology_kobj_release, 248 .sysfs_ops = &sysprops_ops, 249 }; 250 251 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 252 char *buffer) 253 { 254 int offs = 0; 255 struct kfd_iolink_properties *iolink; 256 257 /* Making sure that the buffer is an empty string */ 258 buffer[0] = 0; 259 260 iolink = container_of(attr, struct kfd_iolink_properties, attr); 261 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 262 return -EPERM; 263 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type); 264 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj); 265 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min); 266 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from); 267 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to); 268 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight); 269 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency); 270 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency); 271 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth", 272 iolink->min_bandwidth); 273 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth", 274 iolink->max_bandwidth); 275 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size", 276 iolink->rec_transfer_size); 277 sysfs_show_32bit_prop(buffer, offs, "recommended_sdma_engine_id_mask", 278 iolink->rec_sdma_eng_id_mask); 279 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags); 280 281 return offs; 282 } 283 284 static const struct sysfs_ops iolink_ops = { 285 .show = iolink_show, 286 }; 287 288 static const struct kobj_type iolink_type = { 289 .release = kfd_topology_kobj_release, 290 .sysfs_ops = &iolink_ops, 291 }; 292 293 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 294 char *buffer) 295 { 296 int offs = 0; 297 struct kfd_mem_properties *mem; 298 299 /* Making sure that the buffer is an empty string */ 300 buffer[0] = 0; 301 302 mem = container_of(attr, struct kfd_mem_properties, attr); 303 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 304 return -EPERM; 305 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type); 306 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes", 307 mem->size_in_bytes); 308 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags); 309 sysfs_show_32bit_prop(buffer, offs, "width", mem->width); 310 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max", 311 mem->mem_clk_max); 312 313 return offs; 314 } 315 316 static const struct sysfs_ops mem_ops = { 317 .show = mem_show, 318 }; 319 320 static const struct kobj_type mem_type = { 321 .release = kfd_topology_kobj_release, 322 .sysfs_ops = &mem_ops, 323 }; 324 325 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 326 char *buffer) 327 { 328 int offs = 0; 329 uint32_t i, j; 330 struct kfd_cache_properties *cache; 331 332 /* Making sure that the buffer is an empty string */ 333 buffer[0] = 0; 334 cache = container_of(attr, struct kfd_cache_properties, attr); 335 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 336 return -EPERM; 337 sysfs_show_32bit_prop(buffer, offs, "processor_id_low", 338 cache->processor_id_low); 339 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); 340 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); 341 sysfs_show_32bit_prop(buffer, offs, "cache_line_size", 342 cache->cacheline_size); 343 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag", 344 cache->cachelines_per_tag); 345 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc); 346 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency); 347 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type); 348 349 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map "); 350 for (i = 0; i < cache->sibling_map_size; i++) 351 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) 352 /* Check each bit */ 353 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,", 354 (cache->sibling_map[i] >> j) & 1); 355 356 /* Replace the last "," with end of line */ 357 buffer[offs-1] = '\n'; 358 return offs; 359 } 360 361 static const struct sysfs_ops cache_ops = { 362 .show = kfd_cache_show, 363 }; 364 365 static const struct kobj_type cache_type = { 366 .release = kfd_topology_kobj_release, 367 .sysfs_ops = &cache_ops, 368 }; 369 370 /****** Sysfs of Performance Counters ******/ 371 372 struct kfd_perf_attr { 373 struct kobj_attribute attr; 374 uint32_t data; 375 }; 376 377 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 378 char *buf) 379 { 380 int offs = 0; 381 struct kfd_perf_attr *attr; 382 383 buf[0] = 0; 384 attr = container_of(attrs, struct kfd_perf_attr, attr); 385 if (!attr->data) /* invalid data for PMC */ 386 return 0; 387 else 388 return sysfs_show_32bit_val(buf, offs, attr->data); 389 } 390 391 #define KFD_PERF_DESC(_name, _data) \ 392 { \ 393 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 394 .data = _data, \ 395 } 396 397 static struct kfd_perf_attr perf_attr_iommu[] = { 398 KFD_PERF_DESC(max_concurrent, 0), 399 KFD_PERF_DESC(num_counters, 0), 400 KFD_PERF_DESC(counter_ids, 0), 401 }; 402 /****************************************/ 403 404 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 405 char *buffer) 406 { 407 int offs = 0; 408 struct kfd_topology_device *dev; 409 uint32_t log_max_watch_addr; 410 411 /* Making sure that the buffer is an empty string */ 412 buffer[0] = 0; 413 414 if (strcmp(attr->name, "gpu_id") == 0) { 415 dev = container_of(attr, struct kfd_topology_device, 416 attr_gpuid); 417 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 418 return -EPERM; 419 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id); 420 } 421 422 if (strcmp(attr->name, "name") == 0) { 423 dev = container_of(attr, struct kfd_topology_device, 424 attr_name); 425 426 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 427 return -EPERM; 428 return sysfs_show_str_val(buffer, offs, dev->node_props.name); 429 } 430 431 dev = container_of(attr, struct kfd_topology_device, 432 attr_props); 433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 434 return -EPERM; 435 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count", 436 dev->node_props.cpu_cores_count); 437 sysfs_show_32bit_prop(buffer, offs, "simd_count", 438 dev->gpu ? dev->node_props.simd_count : 0); 439 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count", 440 dev->node_props.mem_banks_count); 441 sysfs_show_32bit_prop(buffer, offs, "caches_count", 442 dev->node_props.caches_count); 443 sysfs_show_32bit_prop(buffer, offs, "io_links_count", 444 dev->node_props.io_links_count); 445 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count", 446 dev->node_props.p2p_links_count); 447 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base", 448 dev->node_props.cpu_core_id_base); 449 sysfs_show_32bit_prop(buffer, offs, "simd_id_base", 450 dev->node_props.simd_id_base); 451 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd", 452 dev->node_props.max_waves_per_simd); 453 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb", 454 dev->node_props.lds_size_in_kb); 455 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb", 456 dev->node_props.gds_size_in_kb); 457 sysfs_show_32bit_prop(buffer, offs, "num_gws", 458 dev->node_props.num_gws); 459 sysfs_show_32bit_prop(buffer, offs, "wave_front_size", 460 dev->node_props.wave_front_size); 461 sysfs_show_32bit_prop(buffer, offs, "array_count", 462 dev->gpu ? (dev->node_props.array_count * 463 NUM_XCC(dev->gpu->xcc_mask)) : 0); 464 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine", 465 dev->node_props.simd_arrays_per_engine); 466 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array", 467 dev->node_props.cu_per_simd_array); 468 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", 469 dev->node_props.simd_per_cu); 470 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", 471 dev->node_props.max_slots_scratch_cu); 472 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", 473 dev->node_props.gfx_target_version); 474 sysfs_show_32bit_prop(buffer, offs, "vendor_id", 475 dev->node_props.vendor_id); 476 sysfs_show_32bit_prop(buffer, offs, "device_id", 477 dev->node_props.device_id); 478 sysfs_show_32bit_prop(buffer, offs, "location_id", 479 dev->node_props.location_id); 480 sysfs_show_32bit_prop(buffer, offs, "domain", 481 dev->node_props.domain); 482 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor", 483 dev->node_props.drm_render_minor); 484 sysfs_show_64bit_prop(buffer, offs, "hive_id", 485 dev->node_props.hive_id); 486 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines", 487 dev->node_props.num_sdma_engines); 488 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines", 489 dev->node_props.num_sdma_xgmi_engines); 490 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine", 491 dev->node_props.num_sdma_queues_per_engine); 492 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues", 493 dev->node_props.num_cp_queues); 494 495 if (dev->gpu) { 496 log_max_watch_addr = 497 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points); 498 499 if (log_max_watch_addr) { 500 dev->node_props.capability |= 501 HSA_CAP_WATCH_POINTS_SUPPORTED; 502 503 dev->node_props.capability |= 504 ((log_max_watch_addr << 505 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 506 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 507 } 508 509 if (dev->gpu->adev->asic_type == CHIP_TONGA) 510 dev->node_props.capability |= 511 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 512 513 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0) && 514 (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)) 515 dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED; 516 517 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute", 518 dev->node_props.max_engine_clk_fcompute); 519 520 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL); 521 522 sysfs_show_32bit_prop(buffer, offs, "fw_version", 523 dev->gpu->kfd->mec_fw_version); 524 sysfs_show_32bit_prop(buffer, offs, "capability", 525 dev->node_props.capability); 526 sysfs_show_32bit_prop(buffer, offs, "capability2", 527 dev->node_props.capability2); 528 sysfs_show_64bit_prop(buffer, offs, "debug_prop", 529 dev->node_props.debug_prop); 530 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version", 531 dev->gpu->kfd->sdma_fw_version); 532 sysfs_show_64bit_prop(buffer, offs, "unique_id", 533 dev->gpu->xcp ? 534 dev->gpu->xcp->unique_id : 535 dev->gpu->adev->unique_id); 536 sysfs_show_32bit_prop(buffer, offs, "num_xcc", 537 NUM_XCC(dev->gpu->xcc_mask)); 538 } 539 540 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute", 541 cpufreq_quick_get_max(0)/1000); 542 } 543 544 static const struct sysfs_ops node_ops = { 545 .show = node_show, 546 }; 547 548 static const struct kobj_type node_type = { 549 .release = kfd_topology_kobj_release, 550 .sysfs_ops = &node_ops, 551 }; 552 553 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 554 { 555 sysfs_remove_file(kobj, attr); 556 kobject_del(kobj); 557 kobject_put(kobj); 558 } 559 560 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 561 { 562 struct kfd_iolink_properties *p2plink; 563 struct kfd_iolink_properties *iolink; 564 struct kfd_cache_properties *cache; 565 struct kfd_mem_properties *mem; 566 struct kfd_perf_properties *perf; 567 568 if (dev->kobj_iolink) { 569 list_for_each_entry(iolink, &dev->io_link_props, list) 570 if (iolink->kobj) { 571 kfd_remove_sysfs_file(iolink->kobj, 572 &iolink->attr); 573 iolink->kobj = NULL; 574 } 575 kobject_del(dev->kobj_iolink); 576 kobject_put(dev->kobj_iolink); 577 dev->kobj_iolink = NULL; 578 } 579 580 if (dev->kobj_p2plink) { 581 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 582 if (p2plink->kobj) { 583 kfd_remove_sysfs_file(p2plink->kobj, 584 &p2plink->attr); 585 p2plink->kobj = NULL; 586 } 587 kobject_del(dev->kobj_p2plink); 588 kobject_put(dev->kobj_p2plink); 589 dev->kobj_p2plink = NULL; 590 } 591 592 if (dev->kobj_cache) { 593 list_for_each_entry(cache, &dev->cache_props, list) 594 if (cache->kobj) { 595 kfd_remove_sysfs_file(cache->kobj, 596 &cache->attr); 597 cache->kobj = NULL; 598 } 599 kobject_del(dev->kobj_cache); 600 kobject_put(dev->kobj_cache); 601 dev->kobj_cache = NULL; 602 } 603 604 if (dev->kobj_mem) { 605 list_for_each_entry(mem, &dev->mem_props, list) 606 if (mem->kobj) { 607 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 608 mem->kobj = NULL; 609 } 610 kobject_del(dev->kobj_mem); 611 kobject_put(dev->kobj_mem); 612 dev->kobj_mem = NULL; 613 } 614 615 if (dev->kobj_perf) { 616 list_for_each_entry(perf, &dev->perf_props, list) { 617 kfree(perf->attr_group); 618 perf->attr_group = NULL; 619 } 620 kobject_del(dev->kobj_perf); 621 kobject_put(dev->kobj_perf); 622 dev->kobj_perf = NULL; 623 } 624 625 if (dev->kobj_node) { 626 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 627 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 628 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 629 kobject_del(dev->kobj_node); 630 kobject_put(dev->kobj_node); 631 dev->kobj_node = NULL; 632 } 633 } 634 635 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 636 uint32_t id) 637 { 638 struct kfd_iolink_properties *p2plink; 639 struct kfd_iolink_properties *iolink; 640 struct kfd_cache_properties *cache; 641 struct kfd_mem_properties *mem; 642 struct kfd_perf_properties *perf; 643 int ret; 644 uint32_t i, num_attrs; 645 struct attribute **attrs; 646 647 if (WARN_ON(dev->kobj_node)) 648 return -EEXIST; 649 650 /* 651 * Creating the sysfs folders 652 */ 653 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 654 if (!dev->kobj_node) 655 return -ENOMEM; 656 657 ret = kobject_init_and_add(dev->kobj_node, &node_type, 658 sys_props.kobj_nodes, "%d", id); 659 if (ret < 0) { 660 kobject_put(dev->kobj_node); 661 return ret; 662 } 663 664 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 665 if (!dev->kobj_mem) 666 return -ENOMEM; 667 668 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 669 if (!dev->kobj_cache) 670 return -ENOMEM; 671 672 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 673 if (!dev->kobj_iolink) 674 return -ENOMEM; 675 676 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node); 677 if (!dev->kobj_p2plink) 678 return -ENOMEM; 679 680 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 681 if (!dev->kobj_perf) 682 return -ENOMEM; 683 684 /* 685 * Creating sysfs files for node properties 686 */ 687 dev->attr_gpuid.name = "gpu_id"; 688 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 689 sysfs_attr_init(&dev->attr_gpuid); 690 dev->attr_name.name = "name"; 691 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 692 sysfs_attr_init(&dev->attr_name); 693 dev->attr_props.name = "properties"; 694 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 695 sysfs_attr_init(&dev->attr_props); 696 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 697 if (ret < 0) 698 return ret; 699 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 700 if (ret < 0) 701 return ret; 702 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 703 if (ret < 0) 704 return ret; 705 706 i = 0; 707 list_for_each_entry(mem, &dev->mem_props, list) { 708 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 709 if (!mem->kobj) 710 return -ENOMEM; 711 ret = kobject_init_and_add(mem->kobj, &mem_type, 712 dev->kobj_mem, "%d", i); 713 if (ret < 0) { 714 kobject_put(mem->kobj); 715 return ret; 716 } 717 718 mem->attr.name = "properties"; 719 mem->attr.mode = KFD_SYSFS_FILE_MODE; 720 sysfs_attr_init(&mem->attr); 721 ret = sysfs_create_file(mem->kobj, &mem->attr); 722 if (ret < 0) 723 return ret; 724 i++; 725 } 726 727 i = 0; 728 list_for_each_entry(cache, &dev->cache_props, list) { 729 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 730 if (!cache->kobj) 731 return -ENOMEM; 732 ret = kobject_init_and_add(cache->kobj, &cache_type, 733 dev->kobj_cache, "%d", i); 734 if (ret < 0) { 735 kobject_put(cache->kobj); 736 return ret; 737 } 738 739 cache->attr.name = "properties"; 740 cache->attr.mode = KFD_SYSFS_FILE_MODE; 741 sysfs_attr_init(&cache->attr); 742 ret = sysfs_create_file(cache->kobj, &cache->attr); 743 if (ret < 0) 744 return ret; 745 i++; 746 } 747 748 i = 0; 749 list_for_each_entry(iolink, &dev->io_link_props, list) { 750 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 751 if (!iolink->kobj) 752 return -ENOMEM; 753 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 754 dev->kobj_iolink, "%d", i); 755 if (ret < 0) { 756 kobject_put(iolink->kobj); 757 return ret; 758 } 759 760 iolink->attr.name = "properties"; 761 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 762 sysfs_attr_init(&iolink->attr); 763 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 764 if (ret < 0) 765 return ret; 766 i++; 767 } 768 769 i = 0; 770 list_for_each_entry(p2plink, &dev->p2p_link_props, list) { 771 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 772 if (!p2plink->kobj) 773 return -ENOMEM; 774 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 775 dev->kobj_p2plink, "%d", i); 776 if (ret < 0) { 777 kobject_put(p2plink->kobj); 778 return ret; 779 } 780 781 p2plink->attr.name = "properties"; 782 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 783 sysfs_attr_init(&p2plink->attr); 784 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 785 if (ret < 0) 786 return ret; 787 i++; 788 } 789 790 /* All hardware blocks have the same number of attributes. */ 791 num_attrs = ARRAY_SIZE(perf_attr_iommu); 792 list_for_each_entry(perf, &dev->perf_props, list) { 793 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 794 * num_attrs + sizeof(struct attribute_group), 795 GFP_KERNEL); 796 if (!perf->attr_group) 797 return -ENOMEM; 798 799 attrs = (struct attribute **)(perf->attr_group + 1); 800 if (!strcmp(perf->block_name, "iommu")) { 801 /* Information of IOMMU's num_counters and counter_ids is shown 802 * under /sys/bus/event_source/devices/amd_iommu. We don't 803 * duplicate here. 804 */ 805 perf_attr_iommu[0].data = perf->max_concurrent; 806 for (i = 0; i < num_attrs; i++) 807 attrs[i] = &perf_attr_iommu[i].attr.attr; 808 } 809 perf->attr_group->name = perf->block_name; 810 perf->attr_group->attrs = attrs; 811 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 812 if (ret < 0) 813 return ret; 814 } 815 816 return 0; 817 } 818 819 /* Called with write topology lock acquired */ 820 static int kfd_build_sysfs_node_tree(void) 821 { 822 struct kfd_topology_device *dev; 823 int ret; 824 uint32_t i = 0; 825 826 list_for_each_entry(dev, &topology_device_list, list) { 827 ret = kfd_build_sysfs_node_entry(dev, i); 828 if (ret < 0) 829 return ret; 830 i++; 831 } 832 833 return 0; 834 } 835 836 /* Called with write topology lock acquired */ 837 static void kfd_remove_sysfs_node_tree(void) 838 { 839 struct kfd_topology_device *dev; 840 841 list_for_each_entry(dev, &topology_device_list, list) 842 kfd_remove_sysfs_node_entry(dev); 843 } 844 845 static int kfd_topology_update_sysfs(void) 846 { 847 int ret; 848 849 if (!sys_props.kobj_topology) { 850 sys_props.kobj_topology = 851 kfd_alloc_struct(sys_props.kobj_topology); 852 if (!sys_props.kobj_topology) 853 return -ENOMEM; 854 855 ret = kobject_init_and_add(sys_props.kobj_topology, 856 &sysprops_type, &kfd_device->kobj, 857 "topology"); 858 if (ret < 0) { 859 kobject_put(sys_props.kobj_topology); 860 return ret; 861 } 862 863 sys_props.kobj_nodes = kobject_create_and_add("nodes", 864 sys_props.kobj_topology); 865 if (!sys_props.kobj_nodes) 866 return -ENOMEM; 867 868 sys_props.attr_genid.name = "generation_id"; 869 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 870 sysfs_attr_init(&sys_props.attr_genid); 871 ret = sysfs_create_file(sys_props.kobj_topology, 872 &sys_props.attr_genid); 873 if (ret < 0) 874 return ret; 875 876 sys_props.attr_props.name = "system_properties"; 877 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 878 sysfs_attr_init(&sys_props.attr_props); 879 ret = sysfs_create_file(sys_props.kobj_topology, 880 &sys_props.attr_props); 881 if (ret < 0) 882 return ret; 883 } 884 885 kfd_remove_sysfs_node_tree(); 886 887 return kfd_build_sysfs_node_tree(); 888 } 889 890 static void kfd_topology_release_sysfs(void) 891 { 892 kfd_remove_sysfs_node_tree(); 893 if (sys_props.kobj_topology) { 894 sysfs_remove_file(sys_props.kobj_topology, 895 &sys_props.attr_genid); 896 sysfs_remove_file(sys_props.kobj_topology, 897 &sys_props.attr_props); 898 if (sys_props.kobj_nodes) { 899 kobject_del(sys_props.kobj_nodes); 900 kobject_put(sys_props.kobj_nodes); 901 sys_props.kobj_nodes = NULL; 902 } 903 kobject_del(sys_props.kobj_topology); 904 kobject_put(sys_props.kobj_topology); 905 sys_props.kobj_topology = NULL; 906 } 907 } 908 909 /* Called with write topology_lock acquired */ 910 static void kfd_topology_update_device_list(struct list_head *temp_list, 911 struct list_head *master_list) 912 { 913 while (!list_empty(temp_list)) { 914 list_move_tail(temp_list->next, master_list); 915 sys_props.num_devices++; 916 } 917 } 918 919 static void kfd_debug_print_topology(void) 920 { 921 struct kfd_topology_device *dev; 922 923 down_read(&topology_lock); 924 925 dev = list_last_entry(&topology_device_list, 926 struct kfd_topology_device, list); 927 if (dev) { 928 if (dev->node_props.cpu_cores_count && 929 dev->node_props.simd_count) { 930 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n", 931 dev->node_props.device_id, 932 dev->node_props.vendor_id); 933 } else if (dev->node_props.cpu_cores_count) 934 pr_info("Topology: Add CPU node\n"); 935 else if (dev->node_props.simd_count) 936 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n", 937 dev->node_props.device_id, 938 dev->node_props.vendor_id); 939 } 940 up_read(&topology_lock); 941 } 942 943 /* Helper function for intializing platform_xx members of 944 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 945 */ 946 static void kfd_update_system_properties(void) 947 { 948 struct kfd_topology_device *dev; 949 950 down_read(&topology_lock); 951 dev = list_last_entry(&topology_device_list, 952 struct kfd_topology_device, list); 953 if (dev) { 954 sys_props.platform_id = dev->oem_id64; 955 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 956 sys_props.platform_rev = dev->oem_revision; 957 } 958 up_read(&topology_lock); 959 } 960 961 static void find_system_memory(const struct dmi_header *dm, void *private) 962 { 963 struct dmi_mem_device *memdev = container_of(dm, struct dmi_mem_device, header); 964 struct kfd_mem_properties *mem; 965 struct kfd_topology_device *kdev = 966 (struct kfd_topology_device *)private; 967 968 if (memdev->header.type != DMI_ENTRY_MEM_DEVICE) 969 return; 970 if (memdev->header.length < sizeof(struct dmi_mem_device)) 971 return; 972 973 list_for_each_entry(mem, &kdev->mem_props, list) { 974 if (memdev->total_width != 0xFFFF && memdev->total_width != 0) 975 mem->width = memdev->total_width; 976 if (memdev->speed != 0) 977 mem->mem_clk_max = memdev->speed; 978 } 979 } 980 981 /* kfd_add_non_crat_information - Add information that is not currently 982 * defined in CRAT but is necessary for KFD topology 983 * @dev - topology device to which addition info is added 984 */ 985 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 986 { 987 /* Check if CPU only node. */ 988 if (!kdev->gpu) { 989 /* Add system memory information */ 990 dmi_walk(find_system_memory, kdev); 991 } 992 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 993 } 994 995 int kfd_topology_init(void) 996 { 997 void *crat_image = NULL; 998 size_t image_size = 0; 999 int ret; 1000 struct list_head temp_topology_device_list; 1001 int cpu_only_node = 0; 1002 struct kfd_topology_device *kdev; 1003 int proximity_domain; 1004 1005 /* topology_device_list - Master list of all topology devices 1006 * temp_topology_device_list - temporary list created while parsing CRAT 1007 * or VCRAT. Once parsing is complete the contents of list is moved to 1008 * topology_device_list 1009 */ 1010 1011 /* Initialize the head for the both the lists */ 1012 INIT_LIST_HEAD(&topology_device_list); 1013 INIT_LIST_HEAD(&temp_topology_device_list); 1014 init_rwsem(&topology_lock); 1015 1016 memset(&sys_props, 0, sizeof(sys_props)); 1017 1018 /* Proximity domains in ACPI CRAT tables start counting at 1019 * 0. The same should be true for virtual CRAT tables created 1020 * at this stage. GPUs added later in kfd_topology_add_device 1021 * use a counter. 1022 */ 1023 proximity_domain = 0; 1024 1025 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1026 COMPUTE_UNIT_CPU, NULL, 1027 proximity_domain); 1028 cpu_only_node = 1; 1029 if (ret) { 1030 pr_err("Error creating VCRAT table for CPU\n"); 1031 return ret; 1032 } 1033 1034 ret = kfd_parse_crat_table(crat_image, 1035 &temp_topology_device_list, 1036 proximity_domain); 1037 if (ret) { 1038 pr_err("Error parsing VCRAT table for CPU\n"); 1039 goto err; 1040 } 1041 1042 kdev = list_first_entry(&temp_topology_device_list, 1043 struct kfd_topology_device, list); 1044 1045 down_write(&topology_lock); 1046 kfd_topology_update_device_list(&temp_topology_device_list, 1047 &topology_device_list); 1048 topology_crat_proximity_domain = sys_props.num_devices-1; 1049 ret = kfd_topology_update_sysfs(); 1050 up_write(&topology_lock); 1051 1052 if (!ret) { 1053 sys_props.generation_count++; 1054 kfd_update_system_properties(); 1055 kfd_debug_print_topology(); 1056 } else 1057 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1058 1059 /* For nodes with GPU, this information gets added 1060 * when GPU is detected (kfd_topology_add_device). 1061 */ 1062 if (cpu_only_node) { 1063 /* Add additional information to CPU only node created above */ 1064 down_write(&topology_lock); 1065 kdev = list_first_entry(&topology_device_list, 1066 struct kfd_topology_device, list); 1067 up_write(&topology_lock); 1068 kfd_add_non_crat_information(kdev); 1069 } 1070 1071 err: 1072 kfd_destroy_crat_image(crat_image); 1073 return ret; 1074 } 1075 1076 void kfd_topology_shutdown(void) 1077 { 1078 down_write(&topology_lock); 1079 kfd_topology_release_sysfs(); 1080 kfd_release_live_view(); 1081 up_write(&topology_lock); 1082 } 1083 1084 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) 1085 { 1086 uint32_t gpu_id; 1087 uint32_t buf[8]; 1088 uint64_t local_mem_size; 1089 struct kfd_topology_device *dev; 1090 bool is_unique; 1091 uint8_t *crc_buf; 1092 1093 if (!gpu) 1094 return 0; 1095 1096 crc_buf = (uint8_t *)&buf; 1097 local_mem_size = gpu->local_mem_info.local_mem_size_private + 1098 gpu->local_mem_info.local_mem_size_public; 1099 buf[0] = gpu->adev->pdev->devfn; 1100 buf[1] = gpu->adev->pdev->subsystem_vendor | 1101 (gpu->adev->pdev->subsystem_device << 16); 1102 buf[2] = pci_domain_nr(gpu->adev->pdev->bus); 1103 buf[3] = gpu->adev->pdev->device; 1104 buf[4] = gpu->adev->pdev->bus->number; 1105 buf[5] = lower_32_bits(local_mem_size); 1106 buf[6] = upper_32_bits(local_mem_size); 1107 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16); 1108 1109 gpu_id = crc16(0, crc_buf, sizeof(buf)) & 1110 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1111 1112 /* There is a very small possibility when generating a 1113 * 16 (KFD_GPU_ID_HASH_WIDTH) bit value from 8 word buffer 1114 * that the value could be 0 or non-unique. So, check if 1115 * it is unique and non-zero. If not unique increment till 1116 * unique one is found. In case of overflow, restart from 1 1117 */ 1118 1119 down_read(&topology_lock); 1120 do { 1121 is_unique = true; 1122 if (!gpu_id) 1123 gpu_id = 1; 1124 list_for_each_entry(dev, &topology_device_list, list) { 1125 if (dev->gpu && dev->gpu_id == gpu_id) { 1126 is_unique = false; 1127 break; 1128 } 1129 } 1130 if (unlikely(!is_unique)) 1131 gpu_id = (gpu_id + 1) & 1132 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1133 } while (!is_unique); 1134 up_read(&topology_lock); 1135 1136 return gpu_id; 1137 } 1138 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1139 * the GPU device is not already present in the topology device 1140 * list then return NULL. This means a new topology device has to 1141 * be created for this GPU. 1142 */ 1143 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) 1144 { 1145 struct kfd_topology_device *dev; 1146 struct kfd_topology_device *out_dev = NULL; 1147 struct kfd_mem_properties *mem; 1148 struct kfd_cache_properties *cache; 1149 struct kfd_iolink_properties *iolink; 1150 struct kfd_iolink_properties *p2plink; 1151 1152 list_for_each_entry(dev, &topology_device_list, list) { 1153 /* Discrete GPUs need their own topology device list 1154 * entries. Don't assign them to CPU/APU nodes. 1155 */ 1156 if (dev->node_props.cpu_cores_count) 1157 continue; 1158 1159 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1160 dev->gpu = gpu; 1161 out_dev = dev; 1162 1163 list_for_each_entry(mem, &dev->mem_props, list) 1164 mem->gpu = dev->gpu; 1165 list_for_each_entry(cache, &dev->cache_props, list) 1166 cache->gpu = dev->gpu; 1167 list_for_each_entry(iolink, &dev->io_link_props, list) 1168 iolink->gpu = dev->gpu; 1169 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 1170 p2plink->gpu = dev->gpu; 1171 break; 1172 } 1173 } 1174 return out_dev; 1175 } 1176 1177 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1178 { 1179 /* 1180 * TODO: Generate an event for thunk about the arrival/removal 1181 * of the GPU 1182 */ 1183 } 1184 1185 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1186 * patch this after CRAT parsing. 1187 */ 1188 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1189 { 1190 struct kfd_mem_properties *mem; 1191 struct kfd_local_mem_info local_mem_info; 1192 1193 if (!dev) 1194 return; 1195 1196 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1197 * single bank of VRAM local memory. 1198 * for dGPUs - VCRAT reports only one bank of Local Memory 1199 * for APUs - If CRAT from ACPI reports more than one bank, then 1200 * all the banks will report the same mem_clk_max information 1201 */ 1202 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info, 1203 dev->gpu->xcp); 1204 1205 list_for_each_entry(mem, &dev->mem_props, list) 1206 mem->mem_clk_max = local_mem_info.mem_clk_max; 1207 } 1208 1209 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev, 1210 struct kfd_topology_device *target_gpu_dev, 1211 struct kfd_iolink_properties *link) 1212 { 1213 /* xgmi always supports atomics between links. */ 1214 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI) 1215 return; 1216 1217 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */ 1218 if (target_gpu_dev) { 1219 uint32_t cap; 1220 1221 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev, 1222 PCI_EXP_DEVCAP2, &cap); 1223 1224 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1225 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1226 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1227 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1228 /* set gpu (dev) flags. */ 1229 } else { 1230 if (!dev->gpu->kfd->pci_atomic_requested || 1231 dev->gpu->adev->asic_type == CHIP_HAWAII) 1232 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1233 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1234 } 1235 } 1236 1237 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev, 1238 struct kfd_iolink_properties *outbound_link, 1239 struct kfd_iolink_properties *inbound_link) 1240 { 1241 /* CPU -> GPU with PCIe */ 1242 if (!to_dev->gpu && 1243 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 1244 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1245 1246 if (to_dev->gpu) { 1247 /* GPU <-> GPU with PCIe and 1248 * Vega20 with XGMI 1249 */ 1250 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS || 1251 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1252 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) { 1253 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1254 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1255 } 1256 } 1257 } 1258 1259 #define REC_SDMA_NUM_GPU 8 1260 static const int rec_sdma_eng_map[REC_SDMA_NUM_GPU][REC_SDMA_NUM_GPU] = { 1261 { -1, 14, 12, 2, 4, 8, 10, 6 }, 1262 { 14, -1, 2, 10, 8, 4, 6, 12 }, 1263 { 10, 2, -1, 12, 14, 6, 4, 8 }, 1264 { 2, 12, 10, -1, 6, 14, 8, 4 }, 1265 { 4, 8, 14, 6, -1, 10, 12, 2 }, 1266 { 8, 4, 6, 14, 12, -1, 2, 10 }, 1267 { 10, 6, 4, 8, 12, 2, -1, 14 }, 1268 { 6, 12, 8, 4, 2, 10, 14, -1 }}; 1269 1270 static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev, 1271 struct kfd_iolink_properties *outbound_link, 1272 struct kfd_iolink_properties *inbound_link) 1273 { 1274 struct kfd_node *gpu = outbound_link->gpu; 1275 struct amdgpu_device *adev = gpu->adev; 1276 unsigned int num_xgmi_nodes = adev->gmc.xgmi.num_physical_nodes; 1277 unsigned int num_xgmi_sdma_engines = kfd_get_num_xgmi_sdma_engines(gpu); 1278 unsigned int num_sdma_engines = kfd_get_num_sdma_engines(gpu); 1279 uint32_t sdma_eng_id_mask = (1 << num_sdma_engines) - 1; 1280 uint32_t xgmi_sdma_eng_id_mask = 1281 ((1 << num_xgmi_sdma_engines) - 1) << num_sdma_engines; 1282 1283 bool support_rec_eng = !amdgpu_sriov_vf(adev) && to_dev->gpu && 1284 adev->aid_mask && num_xgmi_nodes && gpu->kfd->num_nodes == 1 && 1285 num_xgmi_sdma_engines >= 6 && (!(adev->flags & AMD_IS_APU) && 1286 num_xgmi_nodes == 8); 1287 1288 if (support_rec_eng) { 1289 int src_socket_id = adev->gmc.xgmi.physical_node_id; 1290 int dst_socket_id = to_dev->gpu->adev->gmc.xgmi.physical_node_id; 1291 unsigned int reshift = num_xgmi_sdma_engines == 6 ? 1 : 0; 1292 1293 outbound_link->rec_sdma_eng_id_mask = 1294 1 << (rec_sdma_eng_map[src_socket_id][dst_socket_id] >> reshift); 1295 inbound_link->rec_sdma_eng_id_mask = 1296 1 << (rec_sdma_eng_map[dst_socket_id][src_socket_id] >> reshift); 1297 1298 /* If recommended engine is out of range, need to reset the mask */ 1299 if (outbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask) 1300 outbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask; 1301 if (inbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask) 1302 inbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask; 1303 1304 } else { 1305 uint32_t engine_mask = (outbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1306 num_xgmi_sdma_engines && to_dev->gpu) ? xgmi_sdma_eng_id_mask : 1307 sdma_eng_id_mask; 1308 1309 outbound_link->rec_sdma_eng_id_mask = engine_mask; 1310 inbound_link->rec_sdma_eng_id_mask = engine_mask; 1311 } 1312 } 1313 1314 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1315 { 1316 struct kfd_iolink_properties *link, *inbound_link; 1317 struct kfd_topology_device *peer_dev; 1318 1319 if (!dev || !dev->gpu) 1320 return; 1321 1322 /* GPU only creates direct links so apply flags setting to all */ 1323 list_for_each_entry(link, &dev->io_link_props, list) { 1324 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1325 kfd_set_iolink_no_atomics(dev, NULL, link); 1326 peer_dev = kfd_topology_device_by_proximity_domain( 1327 link->node_to); 1328 1329 if (!peer_dev) 1330 continue; 1331 1332 /* Include the CPU peer in GPU hive if connected over xGMI. */ 1333 if (!peer_dev->gpu && 1334 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) { 1335 /* 1336 * If the GPU is not part of a GPU hive, use its pci 1337 * device location as the hive ID to bind with the CPU. 1338 */ 1339 if (!dev->node_props.hive_id) 1340 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); 1341 peer_dev->node_props.hive_id = dev->node_props.hive_id; 1342 } 1343 1344 list_for_each_entry(inbound_link, &peer_dev->io_link_props, 1345 list) { 1346 if (inbound_link->node_to != link->node_from) 1347 continue; 1348 1349 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1350 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1351 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1352 kfd_set_recommended_sdma_engines(peer_dev, link, inbound_link); 1353 } 1354 } 1355 1356 /* Create indirect links so apply flags setting to all */ 1357 list_for_each_entry(link, &dev->p2p_link_props, list) { 1358 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1359 kfd_set_iolink_no_atomics(dev, NULL, link); 1360 peer_dev = kfd_topology_device_by_proximity_domain( 1361 link->node_to); 1362 1363 if (!peer_dev) 1364 continue; 1365 1366 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props, 1367 list) { 1368 if (inbound_link->node_to != link->node_from) 1369 continue; 1370 1371 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1372 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1373 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1374 } 1375 } 1376 } 1377 1378 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev, 1379 struct kfd_iolink_properties *p2plink) 1380 { 1381 int ret; 1382 1383 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 1384 if (!p2plink->kobj) 1385 return -ENOMEM; 1386 1387 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 1388 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); 1389 if (ret < 0) { 1390 kobject_put(p2plink->kobj); 1391 return ret; 1392 } 1393 1394 p2plink->attr.name = "properties"; 1395 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 1396 sysfs_attr_init(&p2plink->attr); 1397 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 1398 if (ret < 0) 1399 return ret; 1400 1401 return 0; 1402 } 1403 1404 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node) 1405 { 1406 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link; 1407 struct kfd_iolink_properties *props = NULL, *props2 = NULL; 1408 struct kfd_topology_device *cpu_dev; 1409 int ret = 0; 1410 int i, num_cpu; 1411 1412 num_cpu = 0; 1413 list_for_each_entry(cpu_dev, &topology_device_list, list) { 1414 if (cpu_dev->gpu) 1415 break; 1416 num_cpu++; 1417 } 1418 1419 if (list_empty(&kdev->io_link_props)) 1420 return -ENODATA; 1421 1422 gpu_link = list_first_entry(&kdev->io_link_props, 1423 struct kfd_iolink_properties, list); 1424 1425 for (i = 0; i < num_cpu; i++) { 1426 /* CPU <--> GPU */ 1427 if (gpu_link->node_to == i) 1428 continue; 1429 1430 /* find CPU <--> CPU links */ 1431 cpu_link = NULL; 1432 cpu_dev = kfd_topology_device_by_proximity_domain(i); 1433 if (cpu_dev) { 1434 list_for_each_entry(tmp_link, 1435 &cpu_dev->io_link_props, list) { 1436 if (tmp_link->node_to == gpu_link->node_to) { 1437 cpu_link = tmp_link; 1438 break; 1439 } 1440 } 1441 } 1442 1443 if (!cpu_link) 1444 return -ENOMEM; 1445 1446 /* CPU <--> CPU <--> GPU, GPU node*/ 1447 props = kfd_alloc_struct(props); 1448 if (!props) 1449 return -ENOMEM; 1450 1451 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties)); 1452 props->weight = gpu_link->weight + cpu_link->weight; 1453 props->min_latency = gpu_link->min_latency + cpu_link->min_latency; 1454 props->max_latency = gpu_link->max_latency + cpu_link->max_latency; 1455 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth); 1456 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth); 1457 1458 props->node_from = gpu_node; 1459 props->node_to = i; 1460 kdev->node_props.p2p_links_count++; 1461 list_add_tail(&props->list, &kdev->p2p_link_props); 1462 ret = kfd_build_p2p_node_entry(kdev, props); 1463 if (ret < 0) 1464 return ret; 1465 1466 /* for small Bar, no CPU --> GPU in-direct links */ 1467 if (kfd_dev_is_large_bar(kdev->gpu)) { 1468 /* CPU <--> CPU <--> GPU, CPU node*/ 1469 props2 = kfd_alloc_struct(props2); 1470 if (!props2) 1471 return -ENOMEM; 1472 1473 memcpy(props2, props, sizeof(struct kfd_iolink_properties)); 1474 props2->node_from = i; 1475 props2->node_to = gpu_node; 1476 props2->kobj = NULL; 1477 cpu_dev->node_props.p2p_links_count++; 1478 list_add_tail(&props2->list, &cpu_dev->p2p_link_props); 1479 ret = kfd_build_p2p_node_entry(cpu_dev, props2); 1480 if (ret < 0) 1481 return ret; 1482 } 1483 } 1484 return ret; 1485 } 1486 1487 #if defined(CONFIG_HSA_AMD_P2P) 1488 static int kfd_add_peer_prop(struct kfd_topology_device *kdev, 1489 struct kfd_topology_device *peer, int from, int to) 1490 { 1491 struct kfd_iolink_properties *props = NULL; 1492 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3; 1493 struct kfd_topology_device *cpu_dev; 1494 int ret = 0; 1495 1496 if (!amdgpu_device_is_peer_accessible( 1497 kdev->gpu->adev, 1498 peer->gpu->adev)) 1499 return ret; 1500 1501 if (list_empty(&kdev->io_link_props)) 1502 return -ENODATA; 1503 1504 iolink1 = list_first_entry(&kdev->io_link_props, 1505 struct kfd_iolink_properties, list); 1506 1507 if (list_empty(&peer->io_link_props)) 1508 return -ENODATA; 1509 1510 iolink2 = list_first_entry(&peer->io_link_props, 1511 struct kfd_iolink_properties, list); 1512 1513 props = kfd_alloc_struct(props); 1514 if (!props) 1515 return -ENOMEM; 1516 1517 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties)); 1518 1519 props->weight = iolink1->weight + iolink2->weight; 1520 props->min_latency = iolink1->min_latency + iolink2->min_latency; 1521 props->max_latency = iolink1->max_latency + iolink2->max_latency; 1522 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth); 1523 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth); 1524 1525 if (iolink1->node_to != iolink2->node_to) { 1526 /* CPU->CPU link*/ 1527 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to); 1528 if (cpu_dev) { 1529 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) { 1530 if (iolink3->node_to != iolink2->node_to) 1531 continue; 1532 1533 props->weight += iolink3->weight; 1534 props->min_latency += iolink3->min_latency; 1535 props->max_latency += iolink3->max_latency; 1536 props->min_bandwidth = min(props->min_bandwidth, 1537 iolink3->min_bandwidth); 1538 props->max_bandwidth = min(props->max_bandwidth, 1539 iolink3->max_bandwidth); 1540 break; 1541 } 1542 } else { 1543 WARN(1, "CPU node not found"); 1544 } 1545 } 1546 1547 props->node_from = from; 1548 props->node_to = to; 1549 peer->node_props.p2p_links_count++; 1550 list_add_tail(&props->list, &peer->p2p_link_props); 1551 ret = kfd_build_p2p_node_entry(peer, props); 1552 1553 return ret; 1554 } 1555 #endif 1556 1557 static int kfd_dev_create_p2p_links(void) 1558 { 1559 struct kfd_topology_device *dev; 1560 struct kfd_topology_device *new_dev; 1561 #if defined(CONFIG_HSA_AMD_P2P) 1562 uint32_t i; 1563 #endif 1564 uint32_t k; 1565 int ret = 0; 1566 1567 k = 0; 1568 list_for_each_entry(dev, &topology_device_list, list) 1569 k++; 1570 if (k < 2) 1571 return 0; 1572 1573 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); 1574 if (WARN_ON(!new_dev->gpu)) 1575 return 0; 1576 1577 k--; 1578 1579 /* create in-direct links */ 1580 ret = kfd_create_indirect_link_prop(new_dev, k); 1581 if (ret < 0) 1582 goto out; 1583 1584 /* create p2p links */ 1585 #if defined(CONFIG_HSA_AMD_P2P) 1586 i = 0; 1587 list_for_each_entry(dev, &topology_device_list, list) { 1588 if (dev == new_dev) 1589 break; 1590 if (!dev->gpu || !dev->gpu->adev || 1591 (dev->gpu->kfd->hive_id && 1592 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id && 1593 amdgpu_xgmi_get_is_sharing_enabled(dev->gpu->adev, new_dev->gpu->adev))) 1594 goto next; 1595 1596 /* check if node(s) is/are peer accessible in one direction or bi-direction */ 1597 ret = kfd_add_peer_prop(new_dev, dev, i, k); 1598 if (ret < 0) 1599 goto out; 1600 1601 ret = kfd_add_peer_prop(dev, new_dev, k, i); 1602 if (ret < 0) 1603 goto out; 1604 next: 1605 i++; 1606 } 1607 #endif 1608 1609 out: 1610 return ret; 1611 } 1612 1613 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1614 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, 1615 struct kfd_gpu_cache_info *pcache_info, 1616 int cu_bitmask, 1617 int cache_type, unsigned int cu_processor_id, 1618 int cu_block) 1619 { 1620 unsigned int cu_sibling_map_mask; 1621 int first_active_cu; 1622 struct kfd_cache_properties *pcache = NULL; 1623 1624 cu_sibling_map_mask = cu_bitmask; 1625 cu_sibling_map_mask >>= cu_block; 1626 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1627 first_active_cu = ffs(cu_sibling_map_mask); 1628 1629 /* CU could be inactive. In case of shared cache find the first active 1630 * CU. and incase of non-shared cache check if the CU is inactive. If 1631 * inactive active skip it 1632 */ 1633 if (first_active_cu) { 1634 pcache = kfd_alloc_struct(pcache); 1635 if (!pcache) 1636 return -ENOMEM; 1637 1638 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1639 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1); 1640 pcache->cache_level = pcache_info[cache_type].cache_level; 1641 pcache->cache_size = pcache_info[cache_type].cache_size; 1642 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1643 1644 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1645 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1646 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1647 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1648 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1649 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1650 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1651 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1652 1653 /* Sibling map is w.r.t processor_id_low, so shift out 1654 * inactive CU 1655 */ 1656 cu_sibling_map_mask = 1657 cu_sibling_map_mask >> (first_active_cu - 1); 1658 1659 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1660 pcache->sibling_map[1] = 1661 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1662 pcache->sibling_map[2] = 1663 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1664 pcache->sibling_map[3] = 1665 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1666 1667 pcache->sibling_map_size = 4; 1668 *props_ext = pcache; 1669 1670 return 0; 1671 } 1672 return 1; 1673 } 1674 1675 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1676 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, 1677 struct kfd_gpu_cache_info *pcache_info, 1678 struct amdgpu_cu_info *cu_info, 1679 struct amdgpu_gfx_config *gfx_info, 1680 int cache_type, unsigned int cu_processor_id, 1681 struct kfd_node *knode) 1682 { 1683 unsigned int cu_sibling_map_mask = 0; 1684 int first_active_cu; 1685 int i, j, k, xcc, start, end; 1686 int num_xcc = NUM_XCC(knode->xcc_mask); 1687 struct kfd_cache_properties *pcache = NULL; 1688 enum amdgpu_memory_partition mode; 1689 struct amdgpu_device *adev = knode->adev; 1690 bool found = false; 1691 1692 start = ffs(knode->xcc_mask) - 1; 1693 end = start + num_xcc; 1694 1695 /* To find the bitmap in the first active cu in the first 1696 * xcc, it is based on the assumption that evrey xcc must 1697 * have at least one active cu. 1698 */ 1699 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) { 1700 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) { 1701 if (cu_info->bitmap[start][i % 4][j % 4]) { 1702 cu_sibling_map_mask = 1703 cu_info->bitmap[start][i % 4][j % 4]; 1704 found = true; 1705 } 1706 } 1707 } 1708 1709 cu_sibling_map_mask &= 1710 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1711 first_active_cu = ffs(cu_sibling_map_mask); 1712 1713 /* CU could be inactive. In case of shared cache find the first active 1714 * CU. and incase of non-shared cache check if the CU is inactive. If 1715 * inactive active skip it 1716 */ 1717 if (first_active_cu) { 1718 pcache = kfd_alloc_struct(pcache); 1719 if (!pcache) 1720 return -ENOMEM; 1721 1722 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1723 pcache->processor_id_low = cu_processor_id 1724 + (first_active_cu - 1); 1725 pcache->cache_level = pcache_info[cache_type].cache_level; 1726 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1727 1728 if (KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 3) || 1729 KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4) || 1730 KFD_GC_VERSION(knode) == IP_VERSION(9, 5, 0)) 1731 mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev); 1732 else 1733 mode = UNKNOWN_MEMORY_PARTITION_MODE; 1734 1735 pcache->cache_size = pcache_info[cache_type].cache_size; 1736 /* Partition mode only affects L3 cache size */ 1737 if (mode && pcache->cache_level == 3) 1738 pcache->cache_size /= mode; 1739 1740 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1741 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1742 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1743 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1744 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1745 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1746 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1747 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1748 1749 /* Sibling map is w.r.t processor_id_low, so shift out 1750 * inactive CU 1751 */ 1752 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1); 1753 k = 0; 1754 1755 for (xcc = start; xcc < end; xcc++) { 1756 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1757 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1758 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1759 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1760 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1761 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1762 k += 4; 1763 1764 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4]; 1765 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1766 } 1767 } 1768 } 1769 pcache->sibling_map_size = k; 1770 *props_ext = pcache; 1771 return 0; 1772 } 1773 return 1; 1774 } 1775 1776 #define KFD_MAX_CACHE_TYPES 6 1777 1778 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info 1779 * tables 1780 */ 1781 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev) 1782 { 1783 struct kfd_gpu_cache_info *pcache_info = NULL; 1784 int i, j, k, xcc, start, end; 1785 int ct = 0; 1786 unsigned int cu_processor_id; 1787 int ret; 1788 unsigned int num_cu_shared; 1789 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; 1790 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config; 1791 int gpu_processor_id; 1792 struct kfd_cache_properties *props_ext = NULL; 1793 int num_of_entries = 0; 1794 int num_of_cache_types = 0; 1795 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES]; 1796 1797 1798 gpu_processor_id = dev->node_props.simd_id_base; 1799 1800 memset(cache_info, 0, sizeof(cache_info)); 1801 pcache_info = cache_info; 1802 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info); 1803 if (!num_of_cache_types) { 1804 pr_warn("no cache info found\n"); 1805 return; 1806 } 1807 1808 /* For each type of cache listed in the kfd_gpu_cache_info table, 1809 * go through all available Compute Units. 1810 * The [i,j,k] loop will 1811 * if kfd_gpu_cache_info.num_cu_shared = 1 1812 * will parse through all available CU 1813 * If (kfd_gpu_cache_info.num_cu_shared != 1) 1814 * then it will consider only one CU from 1815 * the shared unit 1816 */ 1817 start = ffs(kdev->xcc_mask) - 1; 1818 end = start + NUM_XCC(kdev->xcc_mask); 1819 1820 for (ct = 0; ct < num_of_cache_types; ct++) { 1821 cu_processor_id = gpu_processor_id; 1822 if (pcache_info[ct].cache_level == 1) { 1823 for (xcc = start; xcc < end; xcc++) { 1824 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1825 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1826 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) { 1827 1828 ret = fill_in_l1_pcache(&props_ext, pcache_info, 1829 cu_info->bitmap[xcc][i % 4][j + i / 4], ct, 1830 cu_processor_id, k); 1831 1832 if (ret < 0) 1833 break; 1834 1835 if (!ret) { 1836 num_of_entries++; 1837 list_add_tail(&props_ext->list, &dev->cache_props); 1838 } 1839 1840 /* Move to next CU block */ 1841 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <= 1842 gfx_info->max_cu_per_sh) ? 1843 pcache_info[ct].num_cu_shared : 1844 (gfx_info->max_cu_per_sh - k); 1845 cu_processor_id += num_cu_shared; 1846 } 1847 } 1848 } 1849 } 1850 } else { 1851 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info, 1852 cu_info, gfx_info, ct, cu_processor_id, kdev); 1853 1854 if (ret < 0) 1855 break; 1856 1857 if (!ret) { 1858 num_of_entries++; 1859 list_add_tail(&props_ext->list, &dev->cache_props); 1860 } 1861 } 1862 } 1863 dev->node_props.caches_count += num_of_entries; 1864 pr_debug("Added [%d] GPU cache entries\n", num_of_entries); 1865 } 1866 1867 static int kfd_topology_add_device_locked(struct kfd_node *gpu, 1868 struct kfd_topology_device **dev) 1869 { 1870 int proximity_domain = ++topology_crat_proximity_domain; 1871 struct list_head temp_topology_device_list; 1872 void *crat_image = NULL; 1873 size_t image_size = 0; 1874 int res; 1875 1876 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1877 COMPUTE_UNIT_GPU, gpu, 1878 proximity_domain); 1879 if (res) { 1880 dev_err(gpu->adev->dev, "Error creating VCRAT\n"); 1881 topology_crat_proximity_domain--; 1882 goto err; 1883 } 1884 1885 INIT_LIST_HEAD(&temp_topology_device_list); 1886 1887 res = kfd_parse_crat_table(crat_image, 1888 &temp_topology_device_list, 1889 proximity_domain); 1890 if (res) { 1891 dev_err(gpu->adev->dev, "Error parsing VCRAT\n"); 1892 topology_crat_proximity_domain--; 1893 goto err; 1894 } 1895 1896 kfd_topology_update_device_list(&temp_topology_device_list, 1897 &topology_device_list); 1898 1899 *dev = kfd_assign_gpu(gpu); 1900 if (WARN_ON(!*dev)) { 1901 res = -ENODEV; 1902 goto err; 1903 } 1904 1905 /* Fill the cache affinity information here for the GPUs 1906 * using VCRAT 1907 */ 1908 kfd_fill_cache_non_crat_info(*dev, gpu); 1909 1910 /* Update the SYSFS tree, since we added another topology 1911 * device 1912 */ 1913 res = kfd_topology_update_sysfs(); 1914 if (!res) 1915 sys_props.generation_count++; 1916 else 1917 dev_err(gpu->adev->dev, "Failed to update GPU to sysfs topology. res=%d\n", 1918 res); 1919 1920 err: 1921 kfd_destroy_crat_image(crat_image); 1922 return res; 1923 } 1924 1925 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev) 1926 { 1927 bool firmware_supported = true; 1928 1929 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) && 1930 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) { 1931 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & 1932 AMDGPU_MES_API_VERSION_MASK) >> 1933 AMDGPU_MES_API_VERSION_SHIFT; 1934 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & 1935 AMDGPU_MES_VERSION_MASK; 1936 1937 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64); 1938 goto out; 1939 } 1940 1941 /* 1942 * Note: Any unlisted devices here are assumed to support exception handling. 1943 * Add additional checks here as needed. 1944 */ 1945 switch (KFD_GC_VERSION(dev->gpu)) { 1946 case IP_VERSION(9, 0, 1): 1947 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768; 1948 break; 1949 case IP_VERSION(9, 1, 0): 1950 case IP_VERSION(9, 2, 1): 1951 case IP_VERSION(9, 2, 2): 1952 case IP_VERSION(9, 3, 0): 1953 case IP_VERSION(9, 4, 0): 1954 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459; 1955 break; 1956 case IP_VERSION(9, 4, 1): 1957 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60; 1958 break; 1959 case IP_VERSION(9, 4, 2): 1960 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51; 1961 break; 1962 case IP_VERSION(10, 1, 10): 1963 case IP_VERSION(10, 1, 2): 1964 case IP_VERSION(10, 1, 1): 1965 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144; 1966 break; 1967 case IP_VERSION(10, 3, 0): 1968 case IP_VERSION(10, 3, 2): 1969 case IP_VERSION(10, 3, 1): 1970 case IP_VERSION(10, 3, 4): 1971 case IP_VERSION(10, 3, 5): 1972 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89; 1973 break; 1974 case IP_VERSION(10, 1, 3): 1975 case IP_VERSION(10, 3, 3): 1976 firmware_supported = false; 1977 break; 1978 default: 1979 break; 1980 } 1981 1982 out: 1983 if (firmware_supported) 1984 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED; 1985 } 1986 1987 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev) 1988 { 1989 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1990 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1991 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1992 1993 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT | 1994 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED | 1995 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED; 1996 1997 if (kfd_dbg_has_ttmps_always_setup(dev->gpu)) 1998 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID; 1999 2000 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) { 2001 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) || 2002 KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4)) 2003 dev->node_props.debug_prop |= 2004 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 | 2005 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3; 2006 else 2007 dev->node_props.debug_prop |= 2008 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 | 2009 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 2010 2011 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2)) 2012 dev->node_props.capability |= 2013 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 2014 2015 if (!amdgpu_sriov_vf(dev->gpu->adev)) 2016 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED; 2017 2018 } else { 2019 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 | 2020 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 2021 2022 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 0, 0)) 2023 dev->node_props.capability |= 2024 HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED; 2025 } 2026 2027 kfd_topology_set_dbg_firmware_support(dev); 2028 } 2029 2030 int kfd_topology_add_device(struct kfd_node *gpu) 2031 { 2032 uint32_t gpu_id; 2033 struct kfd_topology_device *dev; 2034 int res = 0; 2035 int i; 2036 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type]; 2037 struct amdgpu_gfx_config *gfx_info = &gpu->adev->gfx.config; 2038 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info; 2039 2040 if (gpu->xcp && !gpu->xcp->ddev) { 2041 dev_warn(gpu->adev->dev, 2042 "Won't add GPU to topology since it has no drm node assigned."); 2043 return 0; 2044 } else { 2045 dev_dbg(gpu->adev->dev, "Adding new GPU to topology\n"); 2046 } 2047 2048 /* Check to see if this gpu device exists in the topology_device_list. 2049 * If so, assign the gpu to that device, 2050 * else create a Virtual CRAT for this gpu device and then parse that 2051 * CRAT to create a new topology device. Once created assign the gpu to 2052 * that topology device 2053 */ 2054 down_write(&topology_lock); 2055 dev = kfd_assign_gpu(gpu); 2056 if (!dev) 2057 res = kfd_topology_add_device_locked(gpu, &dev); 2058 up_write(&topology_lock); 2059 if (res) 2060 return res; 2061 2062 gpu_id = kfd_generate_gpu_id(gpu); 2063 dev->gpu_id = gpu_id; 2064 gpu->id = gpu_id; 2065 2066 kfd_dev_create_p2p_links(); 2067 2068 /* TODO: Move the following lines to function 2069 * kfd_add_non_crat_information 2070 */ 2071 2072 /* Fill-in additional information that is not available in CRAT but 2073 * needed for the topology 2074 */ 2075 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) { 2076 dev->node_props.name[i] = __tolower(asic_name[i]); 2077 if (asic_name[i] == '\0') 2078 break; 2079 } 2080 dev->node_props.name[i] = '\0'; 2081 2082 dev->node_props.simd_arrays_per_engine = 2083 gfx_info->max_sh_per_se; 2084 2085 dev->node_props.gfx_target_version = 2086 gpu->kfd->device_info.gfx_target_version; 2087 dev->node_props.vendor_id = gpu->adev->pdev->vendor; 2088 dev->node_props.device_id = gpu->adev->pdev->device; 2089 dev->node_props.capability |= 2090 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) & 2091 HSA_CAP_ASIC_REVISION_MASK); 2092 2093 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); 2094 if (gpu->kfd->num_nodes > 1) 2095 dev->node_props.location_id |= dev->gpu->node_id; 2096 2097 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); 2098 dev->node_props.max_engine_clk_fcompute = 2099 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev); 2100 dev->node_props.max_engine_clk_ccompute = 2101 cpufreq_quick_get_max(0) / 1000; 2102 2103 if (gpu->xcp) 2104 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; 2105 else 2106 dev->node_props.drm_render_minor = 2107 gpu->kfd->shared_resources.drm_render_minor; 2108 2109 dev->node_props.hive_id = gpu->kfd->hive_id; 2110 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); 2111 dev->node_props.num_sdma_xgmi_engines = 2112 kfd_get_num_xgmi_sdma_engines(gpu); 2113 dev->node_props.num_sdma_queues_per_engine = 2114 gpu->kfd->device_info.num_sdma_queues_per_engine - 2115 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine; 2116 dev->node_props.num_gws = (dev->gpu->gws && 2117 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 2118 dev->gpu->adev->gds.gws_size : 0; 2119 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 2120 2121 kfd_fill_mem_clk_max_info(dev); 2122 kfd_fill_iolink_non_crat_info(dev); 2123 2124 switch (dev->gpu->adev->asic_type) { 2125 case CHIP_KAVERI: 2126 case CHIP_HAWAII: 2127 case CHIP_TONGA: 2128 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 2129 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2130 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2131 break; 2132 case CHIP_CARRIZO: 2133 case CHIP_FIJI: 2134 case CHIP_POLARIS10: 2135 case CHIP_POLARIS11: 2136 case CHIP_POLARIS12: 2137 case CHIP_VEGAM: 2138 pr_debug("Adding doorbell packet type capability\n"); 2139 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 2140 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2141 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2142 break; 2143 default: 2144 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1)) 2145 WARN(1, "Unexpected ASIC family %u", 2146 dev->gpu->adev->asic_type); 2147 else 2148 kfd_topology_set_capabilities(dev); 2149 } 2150 2151 /* 2152 * Overwrite ATS capability according to needs_iommu_device to fix 2153 * potential missing corresponding bit in CRAT of BIOS. 2154 */ 2155 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 2156 2157 /* Fix errors in CZ CRAT. 2158 * simd_count: Carrizo CRAT reports wrong simd_count, probably 2159 * because it doesn't consider masked out CUs 2160 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 2161 */ 2162 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) { 2163 dev->node_props.simd_count = 2164 cu_info->simd_per_cu * cu_info->number; 2165 dev->node_props.max_waves_per_simd = 10; 2166 } 2167 2168 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */ 2169 dev->node_props.capability |= 2170 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ? 2171 HSA_CAP_SRAM_EDCSUPPORTED : 0; 2172 dev->node_props.capability |= 2173 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 2174 HSA_CAP_MEM_EDCSUPPORTED : 0; 2175 2176 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1)) 2177 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? 2178 HSA_CAP_RASEVENTNOTIFY : 0; 2179 2180 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev)) 2181 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2182 2183 if (dev->gpu->adev->gmc.is_app_apu || 2184 dev->gpu->adev->gmc.xgmi.connected_to_cpu) 2185 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS; 2186 2187 kfd_queue_ctx_save_restore_size(dev); 2188 2189 kfd_debug_print_topology(); 2190 2191 kfd_notify_gpu_change(gpu_id, 1); 2192 2193 return 0; 2194 } 2195 2196 /** 2197 * kfd_topology_update_io_links() - Update IO links after device removal. 2198 * @proximity_domain: Proximity domain value of the dev being removed. 2199 * 2200 * The topology list currently is arranged in increasing order of 2201 * proximity domain. 2202 * 2203 * Two things need to be done when a device is removed: 2204 * 1. All the IO links to this device need to be removed. 2205 * 2. All nodes after the current device node need to move 2206 * up once this device node is removed from the topology 2207 * list. As a result, the proximity domain values for 2208 * all nodes after the node being deleted reduce by 1. 2209 * This would also cause the proximity domain values for 2210 * io links to be updated based on new proximity domain 2211 * values. 2212 * 2213 * Context: The caller must hold write topology_lock. 2214 */ 2215 static void kfd_topology_update_io_links(int proximity_domain) 2216 { 2217 struct kfd_topology_device *dev; 2218 struct kfd_iolink_properties *iolink, *p2plink, *tmp; 2219 2220 list_for_each_entry(dev, &topology_device_list, list) { 2221 if (dev->proximity_domain > proximity_domain) 2222 dev->proximity_domain--; 2223 2224 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) { 2225 /* 2226 * If there is an io link to the dev being deleted 2227 * then remove that IO link also. 2228 */ 2229 if (iolink->node_to == proximity_domain) { 2230 list_del(&iolink->list); 2231 dev->node_props.io_links_count--; 2232 } else { 2233 if (iolink->node_from > proximity_domain) 2234 iolink->node_from--; 2235 if (iolink->node_to > proximity_domain) 2236 iolink->node_to--; 2237 } 2238 } 2239 2240 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) { 2241 /* 2242 * If there is a p2p link to the dev being deleted 2243 * then remove that p2p link also. 2244 */ 2245 if (p2plink->node_to == proximity_domain) { 2246 list_del(&p2plink->list); 2247 dev->node_props.p2p_links_count--; 2248 } else { 2249 if (p2plink->node_from > proximity_domain) 2250 p2plink->node_from--; 2251 if (p2plink->node_to > proximity_domain) 2252 p2plink->node_to--; 2253 } 2254 } 2255 } 2256 } 2257 2258 int kfd_topology_remove_device(struct kfd_node *gpu) 2259 { 2260 struct kfd_topology_device *dev, *tmp; 2261 uint32_t gpu_id; 2262 int res = -ENODEV; 2263 int i = 0; 2264 2265 down_write(&topology_lock); 2266 2267 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) { 2268 if (dev->gpu == gpu) { 2269 gpu_id = dev->gpu_id; 2270 kfd_remove_sysfs_node_entry(dev); 2271 kfd_release_topology_device(dev); 2272 sys_props.num_devices--; 2273 kfd_topology_update_io_links(i); 2274 topology_crat_proximity_domain = sys_props.num_devices-1; 2275 sys_props.generation_count++; 2276 res = 0; 2277 if (kfd_topology_update_sysfs() < 0) 2278 kfd_topology_release_sysfs(); 2279 break; 2280 } 2281 i++; 2282 } 2283 2284 up_write(&topology_lock); 2285 2286 if (!res) 2287 kfd_notify_gpu_change(gpu_id, 0); 2288 2289 return res; 2290 } 2291 2292 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2293 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2294 * returned through @kdev 2295 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 2296 * -1: If end of list 2297 */ 2298 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev) 2299 { 2300 2301 struct kfd_topology_device *top_dev; 2302 uint8_t device_idx = 0; 2303 2304 *kdev = NULL; 2305 down_read(&topology_lock); 2306 2307 list_for_each_entry(top_dev, &topology_device_list, list) { 2308 if (device_idx == idx) { 2309 *kdev = top_dev->gpu; 2310 up_read(&topology_lock); 2311 return 0; 2312 } 2313 2314 device_idx++; 2315 } 2316 2317 up_read(&topology_lock); 2318 2319 return -1; 2320 2321 } 2322 2323 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 2324 { 2325 int first_cpu_of_numa_node; 2326 2327 if (!cpumask || cpumask == cpu_none_mask) 2328 return -1; 2329 first_cpu_of_numa_node = cpumask_first(cpumask); 2330 if (first_cpu_of_numa_node >= nr_cpu_ids) 2331 return -1; 2332 #ifdef CONFIG_X86_64 2333 return cpu_data(first_cpu_of_numa_node).topo.apicid; 2334 #else 2335 return first_cpu_of_numa_node; 2336 #endif 2337 } 2338 2339 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 2340 * of the given NUMA node (numa_node_id) 2341 * Return -1 on failure 2342 */ 2343 int kfd_numa_node_to_apic_id(int numa_node_id) 2344 { 2345 if (numa_node_id == -1) { 2346 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 2347 return kfd_cpumask_to_apic_id(cpu_online_mask); 2348 } 2349 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 2350 } 2351 2352 #if defined(CONFIG_DEBUG_FS) 2353 2354 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 2355 { 2356 struct kfd_topology_device *dev; 2357 unsigned int i = 0; 2358 int r = 0; 2359 2360 down_read(&topology_lock); 2361 2362 list_for_each_entry(dev, &topology_device_list, list) { 2363 if (!dev->gpu) { 2364 i++; 2365 continue; 2366 } 2367 2368 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2369 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 2370 if (r) 2371 break; 2372 } 2373 2374 up_read(&topology_lock); 2375 2376 return r; 2377 } 2378 2379 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 2380 { 2381 struct kfd_topology_device *dev; 2382 unsigned int i = 0; 2383 int r = 0; 2384 2385 down_read(&topology_lock); 2386 2387 list_for_each_entry(dev, &topology_device_list, list) { 2388 if (!dev->gpu) { 2389 i++; 2390 continue; 2391 } 2392 2393 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2394 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr); 2395 if (r) 2396 break; 2397 } 2398 2399 up_read(&topology_lock); 2400 2401 return r; 2402 } 2403 2404 #endif 2405