1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include "amdgpu_sync.h" 27 #include "amdgpu_object.h" 28 #include "amdgpu_vm.h" 29 #include "amdgpu_mn.h" 30 #include "amdgpu.h" 31 #include "amdgpu_xgmi.h" 32 #include "kfd_priv.h" 33 #include "kfd_svm.h" 34 #include "kfd_migrate.h" 35 36 #ifdef dev_fmt 37 #undef dev_fmt 38 #endif 39 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 40 41 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 42 43 /* Long enough to ensure no retry fault comes after svm range is restored and 44 * page table is updated. 45 */ 46 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING 2000 47 48 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 49 static bool 50 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 51 const struct mmu_notifier_range *range, 52 unsigned long cur_seq); 53 static int 54 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 55 uint64_t *bo_s, uint64_t *bo_l); 56 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 57 .invalidate = svm_range_cpu_invalidate_pagetables, 58 }; 59 60 /** 61 * svm_range_unlink - unlink svm_range from lists and interval tree 62 * @prange: svm range structure to be removed 63 * 64 * Remove the svm_range from the svms and svm_bo lists and the svms 65 * interval tree. 66 * 67 * Context: The caller must hold svms->lock 68 */ 69 static void svm_range_unlink(struct svm_range *prange) 70 { 71 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 72 prange, prange->start, prange->last); 73 74 if (prange->svm_bo) { 75 spin_lock(&prange->svm_bo->list_lock); 76 list_del(&prange->svm_bo_list); 77 spin_unlock(&prange->svm_bo->list_lock); 78 } 79 80 list_del(&prange->list); 81 if (prange->it_node.start != 0 && prange->it_node.last != 0) 82 interval_tree_remove(&prange->it_node, &prange->svms->objects); 83 } 84 85 static void 86 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 87 { 88 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 89 prange, prange->start, prange->last); 90 91 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 92 prange->start << PAGE_SHIFT, 93 prange->npages << PAGE_SHIFT, 94 &svm_range_mn_ops); 95 } 96 97 /** 98 * svm_range_add_to_svms - add svm range to svms 99 * @prange: svm range structure to be added 100 * 101 * Add the svm range to svms interval tree and link list 102 * 103 * Context: The caller must hold svms->lock 104 */ 105 static void svm_range_add_to_svms(struct svm_range *prange) 106 { 107 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 108 prange, prange->start, prange->last); 109 110 list_add_tail(&prange->list, &prange->svms->list); 111 prange->it_node.start = prange->start; 112 prange->it_node.last = prange->last; 113 interval_tree_insert(&prange->it_node, &prange->svms->objects); 114 } 115 116 static void svm_range_remove_notifier(struct svm_range *prange) 117 { 118 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 119 prange->svms, prange, 120 prange->notifier.interval_tree.start >> PAGE_SHIFT, 121 prange->notifier.interval_tree.last >> PAGE_SHIFT); 122 123 if (prange->notifier.interval_tree.start != 0 && 124 prange->notifier.interval_tree.last != 0) 125 mmu_interval_notifier_remove(&prange->notifier); 126 } 127 128 static bool 129 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 130 { 131 return dma_addr && !dma_mapping_error(dev, dma_addr) && 132 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 133 } 134 135 static int 136 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 137 unsigned long offset, unsigned long npages, 138 unsigned long *hmm_pfns, uint32_t gpuidx) 139 { 140 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 141 dma_addr_t *addr = prange->dma_addr[gpuidx]; 142 struct device *dev = adev->dev; 143 struct page *page; 144 int i, r; 145 146 if (!addr) { 147 addr = kvmalloc_array(prange->npages, sizeof(*addr), 148 GFP_KERNEL | __GFP_ZERO); 149 if (!addr) 150 return -ENOMEM; 151 prange->dma_addr[gpuidx] = addr; 152 } 153 154 addr += offset; 155 for (i = 0; i < npages; i++) { 156 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 157 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 158 159 page = hmm_pfn_to_page(hmm_pfns[i]); 160 if (is_zone_device_page(page)) { 161 struct amdgpu_device *bo_adev = 162 amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 163 164 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 165 bo_adev->vm_manager.vram_base_offset - 166 bo_adev->kfd.dev->pgmap.range.start; 167 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 168 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 169 continue; 170 } 171 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 172 r = dma_mapping_error(dev, addr[i]); 173 if (r) { 174 dev_err(dev, "failed %d dma_map_page\n", r); 175 return r; 176 } 177 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 178 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 179 } 180 return 0; 181 } 182 183 static int 184 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 185 unsigned long offset, unsigned long npages, 186 unsigned long *hmm_pfns) 187 { 188 struct kfd_process *p; 189 uint32_t gpuidx; 190 int r; 191 192 p = container_of(prange->svms, struct kfd_process, svms); 193 194 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 195 struct kfd_process_device *pdd; 196 struct amdgpu_device *adev; 197 198 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 199 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 200 if (!pdd) { 201 pr_debug("failed to find device idx %d\n", gpuidx); 202 return -EINVAL; 203 } 204 adev = (struct amdgpu_device *)pdd->dev->kgd; 205 206 r = svm_range_dma_map_dev(adev, prange, offset, npages, 207 hmm_pfns, gpuidx); 208 if (r) 209 break; 210 } 211 212 return r; 213 } 214 215 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 216 unsigned long offset, unsigned long npages) 217 { 218 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 219 int i; 220 221 if (!dma_addr) 222 return; 223 224 for (i = offset; i < offset + npages; i++) { 225 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 226 continue; 227 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 228 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 229 dma_addr[i] = 0; 230 } 231 } 232 233 void svm_range_free_dma_mappings(struct svm_range *prange) 234 { 235 struct kfd_process_device *pdd; 236 dma_addr_t *dma_addr; 237 struct device *dev; 238 struct kfd_process *p; 239 uint32_t gpuidx; 240 241 p = container_of(prange->svms, struct kfd_process, svms); 242 243 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 244 dma_addr = prange->dma_addr[gpuidx]; 245 if (!dma_addr) 246 continue; 247 248 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 249 if (!pdd) { 250 pr_debug("failed to find device idx %d\n", gpuidx); 251 continue; 252 } 253 dev = &pdd->dev->pdev->dev; 254 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 255 kvfree(dma_addr); 256 prange->dma_addr[gpuidx] = NULL; 257 } 258 } 259 260 static void svm_range_free(struct svm_range *prange) 261 { 262 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 263 prange->start, prange->last); 264 265 svm_range_vram_node_free(prange); 266 svm_range_free_dma_mappings(prange); 267 mutex_destroy(&prange->lock); 268 mutex_destroy(&prange->migrate_mutex); 269 kfree(prange); 270 } 271 272 static void 273 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 274 uint8_t *granularity, uint32_t *flags) 275 { 276 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 277 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 278 *granularity = 9; 279 *flags = 280 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 281 } 282 283 static struct 284 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 285 uint64_t last) 286 { 287 uint64_t size = last - start + 1; 288 struct svm_range *prange; 289 struct kfd_process *p; 290 291 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 292 if (!prange) 293 return NULL; 294 prange->npages = size; 295 prange->svms = svms; 296 prange->start = start; 297 prange->last = last; 298 INIT_LIST_HEAD(&prange->list); 299 INIT_LIST_HEAD(&prange->update_list); 300 INIT_LIST_HEAD(&prange->remove_list); 301 INIT_LIST_HEAD(&prange->insert_list); 302 INIT_LIST_HEAD(&prange->svm_bo_list); 303 INIT_LIST_HEAD(&prange->deferred_list); 304 INIT_LIST_HEAD(&prange->child_list); 305 atomic_set(&prange->invalid, 0); 306 prange->validate_timestamp = 0; 307 mutex_init(&prange->migrate_mutex); 308 mutex_init(&prange->lock); 309 310 p = container_of(svms, struct kfd_process, svms); 311 if (p->xnack_enabled) 312 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 313 MAX_GPU_INSTANCE); 314 315 svm_range_set_default_attributes(&prange->preferred_loc, 316 &prange->prefetch_loc, 317 &prange->granularity, &prange->flags); 318 319 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 320 321 return prange; 322 } 323 324 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 325 { 326 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 327 return false; 328 329 return true; 330 } 331 332 static void svm_range_bo_release(struct kref *kref) 333 { 334 struct svm_range_bo *svm_bo; 335 336 svm_bo = container_of(kref, struct svm_range_bo, kref); 337 spin_lock(&svm_bo->list_lock); 338 while (!list_empty(&svm_bo->range_list)) { 339 struct svm_range *prange = 340 list_first_entry(&svm_bo->range_list, 341 struct svm_range, svm_bo_list); 342 /* list_del_init tells a concurrent svm_range_vram_node_new when 343 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 344 */ 345 list_del_init(&prange->svm_bo_list); 346 spin_unlock(&svm_bo->list_lock); 347 348 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 349 prange->start, prange->last); 350 mutex_lock(&prange->lock); 351 prange->svm_bo = NULL; 352 mutex_unlock(&prange->lock); 353 354 spin_lock(&svm_bo->list_lock); 355 } 356 spin_unlock(&svm_bo->list_lock); 357 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 358 /* We're not in the eviction worker. 359 * Signal the fence and synchronize with any 360 * pending eviction work. 361 */ 362 dma_fence_signal(&svm_bo->eviction_fence->base); 363 cancel_work_sync(&svm_bo->eviction_work); 364 } 365 dma_fence_put(&svm_bo->eviction_fence->base); 366 amdgpu_bo_unref(&svm_bo->bo); 367 kfree(svm_bo); 368 } 369 370 void svm_range_bo_unref(struct svm_range_bo *svm_bo) 371 { 372 if (!svm_bo) 373 return; 374 375 kref_put(&svm_bo->kref, svm_range_bo_release); 376 } 377 378 static bool 379 svm_range_validate_svm_bo(struct amdgpu_device *adev, struct svm_range *prange) 380 { 381 struct amdgpu_device *bo_adev; 382 383 mutex_lock(&prange->lock); 384 if (!prange->svm_bo) { 385 mutex_unlock(&prange->lock); 386 return false; 387 } 388 if (prange->ttm_res) { 389 /* We still have a reference, all is well */ 390 mutex_unlock(&prange->lock); 391 return true; 392 } 393 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 394 /* 395 * Migrate from GPU to GPU, remove range from source bo_adev 396 * svm_bo range list, and return false to allocate svm_bo from 397 * destination adev. 398 */ 399 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 400 if (bo_adev != adev) { 401 mutex_unlock(&prange->lock); 402 403 spin_lock(&prange->svm_bo->list_lock); 404 list_del_init(&prange->svm_bo_list); 405 spin_unlock(&prange->svm_bo->list_lock); 406 407 svm_range_bo_unref(prange->svm_bo); 408 return false; 409 } 410 if (READ_ONCE(prange->svm_bo->evicting)) { 411 struct dma_fence *f; 412 struct svm_range_bo *svm_bo; 413 /* The BO is getting evicted, 414 * we need to get a new one 415 */ 416 mutex_unlock(&prange->lock); 417 svm_bo = prange->svm_bo; 418 f = dma_fence_get(&svm_bo->eviction_fence->base); 419 svm_range_bo_unref(prange->svm_bo); 420 /* wait for the fence to avoid long spin-loop 421 * at list_empty_careful 422 */ 423 dma_fence_wait(f, false); 424 dma_fence_put(f); 425 } else { 426 /* The BO was still around and we got 427 * a new reference to it 428 */ 429 mutex_unlock(&prange->lock); 430 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 431 prange->svms, prange->start, prange->last); 432 433 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 434 return true; 435 } 436 437 } else { 438 mutex_unlock(&prange->lock); 439 } 440 441 /* We need a new svm_bo. Spin-loop to wait for concurrent 442 * svm_range_bo_release to finish removing this range from 443 * its range list. After this, it is safe to reuse the 444 * svm_bo pointer and svm_bo_list head. 445 */ 446 while (!list_empty_careful(&prange->svm_bo_list)) 447 ; 448 449 return false; 450 } 451 452 static struct svm_range_bo *svm_range_bo_new(void) 453 { 454 struct svm_range_bo *svm_bo; 455 456 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 457 if (!svm_bo) 458 return NULL; 459 460 kref_init(&svm_bo->kref); 461 INIT_LIST_HEAD(&svm_bo->range_list); 462 spin_lock_init(&svm_bo->list_lock); 463 464 return svm_bo; 465 } 466 467 int 468 svm_range_vram_node_new(struct amdgpu_device *adev, struct svm_range *prange, 469 bool clear) 470 { 471 struct amdgpu_bo_param bp; 472 struct svm_range_bo *svm_bo; 473 struct amdgpu_bo_user *ubo; 474 struct amdgpu_bo *bo; 475 struct kfd_process *p; 476 struct mm_struct *mm; 477 int r; 478 479 p = container_of(prange->svms, struct kfd_process, svms); 480 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 481 prange->start, prange->last); 482 483 if (svm_range_validate_svm_bo(adev, prange)) 484 return 0; 485 486 svm_bo = svm_range_bo_new(); 487 if (!svm_bo) { 488 pr_debug("failed to alloc svm bo\n"); 489 return -ENOMEM; 490 } 491 mm = get_task_mm(p->lead_thread); 492 if (!mm) { 493 pr_debug("failed to get mm\n"); 494 kfree(svm_bo); 495 return -ESRCH; 496 } 497 svm_bo->svms = prange->svms; 498 svm_bo->eviction_fence = 499 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 500 mm, 501 svm_bo); 502 mmput(mm); 503 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 504 svm_bo->evicting = 0; 505 memset(&bp, 0, sizeof(bp)); 506 bp.size = prange->npages * PAGE_SIZE; 507 bp.byte_align = PAGE_SIZE; 508 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 509 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 510 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 511 bp.flags |= AMDGPU_AMDKFD_CREATE_SVM_BO; 512 bp.type = ttm_bo_type_device; 513 bp.resv = NULL; 514 515 r = amdgpu_bo_create_user(adev, &bp, &ubo); 516 if (r) { 517 pr_debug("failed %d to create bo\n", r); 518 goto create_bo_failed; 519 } 520 bo = &ubo->bo; 521 r = amdgpu_bo_reserve(bo, true); 522 if (r) { 523 pr_debug("failed %d to reserve bo\n", r); 524 goto reserve_bo_failed; 525 } 526 527 r = dma_resv_reserve_shared(bo->tbo.base.resv, 1); 528 if (r) { 529 pr_debug("failed %d to reserve bo\n", r); 530 amdgpu_bo_unreserve(bo); 531 goto reserve_bo_failed; 532 } 533 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 534 535 amdgpu_bo_unreserve(bo); 536 537 svm_bo->bo = bo; 538 prange->svm_bo = svm_bo; 539 prange->ttm_res = bo->tbo.resource; 540 prange->offset = 0; 541 542 spin_lock(&svm_bo->list_lock); 543 list_add(&prange->svm_bo_list, &svm_bo->range_list); 544 spin_unlock(&svm_bo->list_lock); 545 546 return 0; 547 548 reserve_bo_failed: 549 amdgpu_bo_unref(&bo); 550 create_bo_failed: 551 dma_fence_put(&svm_bo->eviction_fence->base); 552 kfree(svm_bo); 553 prange->ttm_res = NULL; 554 555 return r; 556 } 557 558 void svm_range_vram_node_free(struct svm_range *prange) 559 { 560 svm_range_bo_unref(prange->svm_bo); 561 prange->ttm_res = NULL; 562 } 563 564 struct amdgpu_device * 565 svm_range_get_adev_by_id(struct svm_range *prange, uint32_t gpu_id) 566 { 567 struct kfd_process_device *pdd; 568 struct kfd_process *p; 569 int32_t gpu_idx; 570 571 p = container_of(prange->svms, struct kfd_process, svms); 572 573 gpu_idx = kfd_process_gpuidx_from_gpuid(p, gpu_id); 574 if (gpu_idx < 0) { 575 pr_debug("failed to get device by id 0x%x\n", gpu_id); 576 return NULL; 577 } 578 pdd = kfd_process_device_from_gpuidx(p, gpu_idx); 579 if (!pdd) { 580 pr_debug("failed to get device by idx 0x%x\n", gpu_idx); 581 return NULL; 582 } 583 584 return (struct amdgpu_device *)pdd->dev->kgd; 585 } 586 587 struct kfd_process_device * 588 svm_range_get_pdd_by_adev(struct svm_range *prange, struct amdgpu_device *adev) 589 { 590 struct kfd_process *p; 591 int32_t gpu_idx, gpuid; 592 int r; 593 594 p = container_of(prange->svms, struct kfd_process, svms); 595 596 r = kfd_process_gpuid_from_kgd(p, adev, &gpuid, &gpu_idx); 597 if (r) { 598 pr_debug("failed to get device id by adev %p\n", adev); 599 return NULL; 600 } 601 602 return kfd_process_device_from_gpuidx(p, gpu_idx); 603 } 604 605 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 606 { 607 struct ttm_operation_ctx ctx = { false, false }; 608 609 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 610 611 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 612 } 613 614 static int 615 svm_range_check_attr(struct kfd_process *p, 616 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 617 { 618 uint32_t i; 619 620 for (i = 0; i < nattr; i++) { 621 uint32_t val = attrs[i].value; 622 int gpuidx = MAX_GPU_INSTANCE; 623 624 switch (attrs[i].type) { 625 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 626 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 627 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 628 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 629 break; 630 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 631 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 632 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 633 break; 634 case KFD_IOCTL_SVM_ATTR_ACCESS: 635 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 636 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 637 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 638 break; 639 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 640 break; 641 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 642 break; 643 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 644 break; 645 default: 646 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 647 return -EINVAL; 648 } 649 650 if (gpuidx < 0) { 651 pr_debug("no GPU 0x%x found\n", val); 652 return -EINVAL; 653 } else if (gpuidx < MAX_GPU_INSTANCE && 654 !test_bit(gpuidx, p->svms.bitmap_supported)) { 655 pr_debug("GPU 0x%x not supported\n", val); 656 return -EINVAL; 657 } 658 } 659 660 return 0; 661 } 662 663 static void 664 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 665 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 666 { 667 uint32_t i; 668 int gpuidx; 669 670 for (i = 0; i < nattr; i++) { 671 switch (attrs[i].type) { 672 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 673 prange->preferred_loc = attrs[i].value; 674 break; 675 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 676 prange->prefetch_loc = attrs[i].value; 677 break; 678 case KFD_IOCTL_SVM_ATTR_ACCESS: 679 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 680 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 681 gpuidx = kfd_process_gpuidx_from_gpuid(p, 682 attrs[i].value); 683 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 684 bitmap_clear(prange->bitmap_access, gpuidx, 1); 685 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 686 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 687 bitmap_set(prange->bitmap_access, gpuidx, 1); 688 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 689 } else { 690 bitmap_clear(prange->bitmap_access, gpuidx, 1); 691 bitmap_set(prange->bitmap_aip, gpuidx, 1); 692 } 693 break; 694 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 695 prange->flags |= attrs[i].value; 696 break; 697 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 698 prange->flags &= ~attrs[i].value; 699 break; 700 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 701 prange->granularity = attrs[i].value; 702 break; 703 default: 704 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 705 } 706 } 707 } 708 709 /** 710 * svm_range_debug_dump - print all range information from svms 711 * @svms: svm range list header 712 * 713 * debug output svm range start, end, prefetch location from svms 714 * interval tree and link list 715 * 716 * Context: The caller must hold svms->lock 717 */ 718 static void svm_range_debug_dump(struct svm_range_list *svms) 719 { 720 struct interval_tree_node *node; 721 struct svm_range *prange; 722 723 pr_debug("dump svms 0x%p list\n", svms); 724 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 725 726 list_for_each_entry(prange, &svms->list, list) { 727 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 728 prange, prange->start, prange->npages, 729 prange->start + prange->npages - 1, 730 prange->actual_loc); 731 } 732 733 pr_debug("dump svms 0x%p interval tree\n", svms); 734 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 735 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 736 while (node) { 737 prange = container_of(node, struct svm_range, it_node); 738 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 739 prange, prange->start, prange->npages, 740 prange->start + prange->npages - 1, 741 prange->actual_loc); 742 node = interval_tree_iter_next(node, 0, ~0ULL); 743 } 744 } 745 746 static bool 747 svm_range_is_same_attrs(struct svm_range *old, struct svm_range *new) 748 { 749 return (old->prefetch_loc == new->prefetch_loc && 750 old->flags == new->flags && 751 old->granularity == new->granularity); 752 } 753 754 static int 755 svm_range_split_array(void *ppnew, void *ppold, size_t size, 756 uint64_t old_start, uint64_t old_n, 757 uint64_t new_start, uint64_t new_n) 758 { 759 unsigned char *new, *old, *pold; 760 uint64_t d; 761 762 if (!ppold) 763 return 0; 764 pold = *(unsigned char **)ppold; 765 if (!pold) 766 return 0; 767 768 new = kvmalloc_array(new_n, size, GFP_KERNEL); 769 if (!new) 770 return -ENOMEM; 771 772 d = (new_start - old_start) * size; 773 memcpy(new, pold + d, new_n * size); 774 775 old = kvmalloc_array(old_n, size, GFP_KERNEL); 776 if (!old) { 777 kvfree(new); 778 return -ENOMEM; 779 } 780 781 d = (new_start == old_start) ? new_n * size : 0; 782 memcpy(old, pold + d, old_n * size); 783 784 kvfree(pold); 785 *(void **)ppold = old; 786 *(void **)ppnew = new; 787 788 return 0; 789 } 790 791 static int 792 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 793 uint64_t start, uint64_t last) 794 { 795 uint64_t npages = last - start + 1; 796 int i, r; 797 798 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 799 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 800 sizeof(*old->dma_addr[i]), old->start, 801 npages, new->start, new->npages); 802 if (r) 803 return r; 804 } 805 806 return 0; 807 } 808 809 static int 810 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 811 uint64_t start, uint64_t last) 812 { 813 uint64_t npages = last - start + 1; 814 815 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 816 new->svms, new, new->start, start, last); 817 818 if (new->start == old->start) { 819 new->offset = old->offset; 820 old->offset += new->npages; 821 } else { 822 new->offset = old->offset + npages; 823 } 824 825 new->svm_bo = svm_range_bo_ref(old->svm_bo); 826 new->ttm_res = old->ttm_res; 827 828 spin_lock(&new->svm_bo->list_lock); 829 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 830 spin_unlock(&new->svm_bo->list_lock); 831 832 return 0; 833 } 834 835 /** 836 * svm_range_split_adjust - split range and adjust 837 * 838 * @new: new range 839 * @old: the old range 840 * @start: the old range adjust to start address in pages 841 * @last: the old range adjust to last address in pages 842 * 843 * Copy system memory dma_addr or vram ttm_res in old range to new 844 * range from new_start up to size new->npages, the remaining old range is from 845 * start to last 846 * 847 * Return: 848 * 0 - OK, -ENOMEM - out of memory 849 */ 850 static int 851 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 852 uint64_t start, uint64_t last) 853 { 854 int r; 855 856 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 857 new->svms, new->start, old->start, old->last, start, last); 858 859 if (new->start < old->start || 860 new->last > old->last) { 861 WARN_ONCE(1, "invalid new range start or last\n"); 862 return -EINVAL; 863 } 864 865 r = svm_range_split_pages(new, old, start, last); 866 if (r) 867 return r; 868 869 if (old->actual_loc && old->ttm_res) { 870 r = svm_range_split_nodes(new, old, start, last); 871 if (r) 872 return r; 873 } 874 875 old->npages = last - start + 1; 876 old->start = start; 877 old->last = last; 878 new->flags = old->flags; 879 new->preferred_loc = old->preferred_loc; 880 new->prefetch_loc = old->prefetch_loc; 881 new->actual_loc = old->actual_loc; 882 new->granularity = old->granularity; 883 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 884 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 885 886 return 0; 887 } 888 889 /** 890 * svm_range_split - split a range in 2 ranges 891 * 892 * @prange: the svm range to split 893 * @start: the remaining range start address in pages 894 * @last: the remaining range last address in pages 895 * @new: the result new range generated 896 * 897 * Two cases only: 898 * case 1: if start == prange->start 899 * prange ==> prange[start, last] 900 * new range [last + 1, prange->last] 901 * 902 * case 2: if last == prange->last 903 * prange ==> prange[start, last] 904 * new range [prange->start, start - 1] 905 * 906 * Return: 907 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 908 */ 909 static int 910 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 911 struct svm_range **new) 912 { 913 uint64_t old_start = prange->start; 914 uint64_t old_last = prange->last; 915 struct svm_range_list *svms; 916 int r = 0; 917 918 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 919 old_start, old_last, start, last); 920 921 if (old_start != start && old_last != last) 922 return -EINVAL; 923 if (start < old_start || last > old_last) 924 return -EINVAL; 925 926 svms = prange->svms; 927 if (old_start == start) 928 *new = svm_range_new(svms, last + 1, old_last); 929 else 930 *new = svm_range_new(svms, old_start, start - 1); 931 if (!*new) 932 return -ENOMEM; 933 934 r = svm_range_split_adjust(*new, prange, start, last); 935 if (r) { 936 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 937 r, old_start, old_last, start, last); 938 svm_range_free(*new); 939 *new = NULL; 940 } 941 942 return r; 943 } 944 945 static int 946 svm_range_split_tail(struct svm_range *prange, struct svm_range *new, 947 uint64_t new_last, struct list_head *insert_list) 948 { 949 struct svm_range *tail; 950 int r = svm_range_split(prange, prange->start, new_last, &tail); 951 952 if (!r) 953 list_add(&tail->insert_list, insert_list); 954 return r; 955 } 956 957 static int 958 svm_range_split_head(struct svm_range *prange, struct svm_range *new, 959 uint64_t new_start, struct list_head *insert_list) 960 { 961 struct svm_range *head; 962 int r = svm_range_split(prange, new_start, prange->last, &head); 963 964 if (!r) 965 list_add(&head->insert_list, insert_list); 966 return r; 967 } 968 969 static void 970 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 971 struct svm_range *pchild, enum svm_work_list_ops op) 972 { 973 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 974 pchild, pchild->start, pchild->last, prange, op); 975 976 pchild->work_item.mm = mm; 977 pchild->work_item.op = op; 978 list_add_tail(&pchild->child_list, &prange->child_list); 979 } 980 981 /** 982 * svm_range_split_by_granularity - collect ranges within granularity boundary 983 * 984 * @p: the process with svms list 985 * @mm: mm structure 986 * @addr: the vm fault address in pages, to split the prange 987 * @parent: parent range if prange is from child list 988 * @prange: prange to split 989 * 990 * Trims @prange to be a single aligned block of prange->granularity if 991 * possible. The head and tail are added to the child_list in @parent. 992 * 993 * Context: caller must hold mmap_read_lock and prange->lock 994 * 995 * Return: 996 * 0 - OK, otherwise error code 997 */ 998 int 999 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1000 unsigned long addr, struct svm_range *parent, 1001 struct svm_range *prange) 1002 { 1003 struct svm_range *head, *tail; 1004 unsigned long start, last, size; 1005 int r; 1006 1007 /* Align splited range start and size to granularity size, then a single 1008 * PTE will be used for whole range, this reduces the number of PTE 1009 * updated and the L1 TLB space used for translation. 1010 */ 1011 size = 1UL << prange->granularity; 1012 start = ALIGN_DOWN(addr, size); 1013 last = ALIGN(addr + 1, size) - 1; 1014 1015 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1016 prange->svms, prange->start, prange->last, start, last, size); 1017 1018 if (start > prange->start) { 1019 r = svm_range_split(prange, start, prange->last, &head); 1020 if (r) 1021 return r; 1022 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1023 } 1024 1025 if (last < prange->last) { 1026 r = svm_range_split(prange, prange->start, last, &tail); 1027 if (r) 1028 return r; 1029 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1030 } 1031 1032 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1033 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1034 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1035 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1036 prange, prange->start, prange->last, 1037 SVM_OP_ADD_RANGE_AND_MAP); 1038 } 1039 return 0; 1040 } 1041 1042 static uint64_t 1043 svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange, 1044 int domain) 1045 { 1046 struct amdgpu_device *bo_adev; 1047 uint32_t flags = prange->flags; 1048 uint32_t mapping_flags = 0; 1049 uint64_t pte_flags; 1050 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1051 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT; 1052 1053 if (domain == SVM_RANGE_VRAM_DOMAIN) 1054 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1055 1056 switch (adev->asic_type) { 1057 case CHIP_ARCTURUS: 1058 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1059 if (bo_adev == adev) { 1060 mapping_flags |= coherent ? 1061 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1062 } else { 1063 mapping_flags |= coherent ? 1064 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1065 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1066 snoop = true; 1067 } 1068 } else { 1069 mapping_flags |= coherent ? 1070 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1071 } 1072 break; 1073 case CHIP_ALDEBARAN: 1074 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1075 if (bo_adev == adev) { 1076 mapping_flags |= coherent ? 1077 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1078 if (adev->gmc.xgmi.connected_to_cpu) 1079 snoop = true; 1080 } else { 1081 mapping_flags |= coherent ? 1082 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1083 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 1084 snoop = true; 1085 } 1086 } else { 1087 mapping_flags |= coherent ? 1088 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1089 } 1090 break; 1091 default: 1092 mapping_flags |= coherent ? 1093 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1094 } 1095 1096 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1097 1098 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1099 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1100 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1101 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1102 1103 pte_flags = AMDGPU_PTE_VALID; 1104 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1105 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1106 1107 pte_flags |= amdgpu_gem_va_map_flags(adev, mapping_flags); 1108 return pte_flags; 1109 } 1110 1111 static int 1112 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1113 uint64_t start, uint64_t last, 1114 struct dma_fence **fence) 1115 { 1116 uint64_t init_pte_value = 0; 1117 1118 pr_debug("[0x%llx 0x%llx]\n", start, last); 1119 1120 return amdgpu_vm_bo_update_mapping(adev, adev, vm, false, true, NULL, 1121 start, last, init_pte_value, 0, 1122 NULL, NULL, fence, NULL); 1123 } 1124 1125 static int 1126 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1127 unsigned long last) 1128 { 1129 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1130 struct kfd_process_device *pdd; 1131 struct dma_fence *fence = NULL; 1132 struct amdgpu_device *adev; 1133 struct kfd_process *p; 1134 uint32_t gpuidx; 1135 int r = 0; 1136 1137 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1138 MAX_GPU_INSTANCE); 1139 p = container_of(prange->svms, struct kfd_process, svms); 1140 1141 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1142 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1143 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1144 if (!pdd) { 1145 pr_debug("failed to find device idx %d\n", gpuidx); 1146 return -EINVAL; 1147 } 1148 adev = (struct amdgpu_device *)pdd->dev->kgd; 1149 1150 r = svm_range_unmap_from_gpu(adev, drm_priv_to_vm(pdd->drm_priv), 1151 start, last, &fence); 1152 if (r) 1153 break; 1154 1155 if (fence) { 1156 r = dma_fence_wait(fence, false); 1157 dma_fence_put(fence); 1158 fence = NULL; 1159 if (r) 1160 break; 1161 } 1162 amdgpu_amdkfd_flush_gpu_tlb_pasid((struct kgd_dev *)adev, 1163 p->pasid, TLB_FLUSH_HEAVYWEIGHT); 1164 } 1165 1166 return r; 1167 } 1168 1169 static int 1170 svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1171 struct svm_range *prange, unsigned long offset, 1172 unsigned long npages, bool readonly, dma_addr_t *dma_addr, 1173 struct amdgpu_device *bo_adev, struct dma_fence **fence) 1174 { 1175 struct amdgpu_bo_va bo_va; 1176 bool table_freed = false; 1177 uint64_t pte_flags; 1178 unsigned long last_start; 1179 int last_domain; 1180 int r = 0; 1181 int64_t i, j; 1182 1183 last_start = prange->start + offset; 1184 1185 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1186 last_start, last_start + npages - 1, readonly); 1187 1188 if (prange->svm_bo && prange->ttm_res) 1189 bo_va.is_xgmi = amdgpu_xgmi_same_hive(adev, bo_adev); 1190 1191 for (i = offset; i < offset + npages; i++) { 1192 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1193 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1194 1195 /* Collect all pages in the same address range and memory domain 1196 * that can be mapped with a single call to update mapping. 1197 */ 1198 if (i < offset + npages - 1 && 1199 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1200 continue; 1201 1202 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1203 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1204 1205 pte_flags = svm_range_get_pte_flags(adev, prange, last_domain); 1206 if (readonly) 1207 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1208 1209 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1210 prange->svms, last_start, prange->start + i, 1211 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1212 pte_flags); 1213 1214 r = amdgpu_vm_bo_update_mapping(adev, bo_adev, vm, false, false, 1215 NULL, last_start, 1216 prange->start + i, pte_flags, 1217 last_start - prange->start, 1218 NULL, dma_addr, 1219 &vm->last_update, 1220 &table_freed); 1221 1222 for (j = last_start - prange->start; j <= i; j++) 1223 dma_addr[j] |= last_domain; 1224 1225 if (r) { 1226 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1227 goto out; 1228 } 1229 last_start = prange->start + i + 1; 1230 } 1231 1232 r = amdgpu_vm_update_pdes(adev, vm, false); 1233 if (r) { 1234 pr_debug("failed %d to update directories 0x%lx\n", r, 1235 prange->start); 1236 goto out; 1237 } 1238 1239 if (fence) 1240 *fence = dma_fence_get(vm->last_update); 1241 1242 if (table_freed) { 1243 struct kfd_process *p; 1244 1245 p = container_of(prange->svms, struct kfd_process, svms); 1246 amdgpu_amdkfd_flush_gpu_tlb_pasid((struct kgd_dev *)adev, 1247 p->pasid, TLB_FLUSH_LEGACY); 1248 } 1249 out: 1250 return r; 1251 } 1252 1253 static int 1254 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1255 unsigned long npages, bool readonly, 1256 unsigned long *bitmap, bool wait) 1257 { 1258 struct kfd_process_device *pdd; 1259 struct amdgpu_device *bo_adev; 1260 struct amdgpu_device *adev; 1261 struct kfd_process *p; 1262 struct dma_fence *fence = NULL; 1263 uint32_t gpuidx; 1264 int r = 0; 1265 1266 if (prange->svm_bo && prange->ttm_res) 1267 bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev); 1268 else 1269 bo_adev = NULL; 1270 1271 p = container_of(prange->svms, struct kfd_process, svms); 1272 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1273 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1274 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1275 if (!pdd) { 1276 pr_debug("failed to find device idx %d\n", gpuidx); 1277 return -EINVAL; 1278 } 1279 adev = (struct amdgpu_device *)pdd->dev->kgd; 1280 1281 pdd = kfd_bind_process_to_device(pdd->dev, p); 1282 if (IS_ERR(pdd)) 1283 return -EINVAL; 1284 1285 if (bo_adev && adev != bo_adev && 1286 !amdgpu_xgmi_same_hive(adev, bo_adev)) { 1287 pr_debug("cannot map to device idx %d\n", gpuidx); 1288 continue; 1289 } 1290 1291 r = svm_range_map_to_gpu(adev, drm_priv_to_vm(pdd->drm_priv), 1292 prange, offset, npages, readonly, 1293 prange->dma_addr[gpuidx], 1294 bo_adev, wait ? &fence : NULL); 1295 if (r) 1296 break; 1297 1298 if (fence) { 1299 r = dma_fence_wait(fence, false); 1300 dma_fence_put(fence); 1301 fence = NULL; 1302 if (r) { 1303 pr_debug("failed %d to dma fence wait\n", r); 1304 break; 1305 } 1306 } 1307 } 1308 1309 return r; 1310 } 1311 1312 struct svm_validate_context { 1313 struct kfd_process *process; 1314 struct svm_range *prange; 1315 bool intr; 1316 unsigned long bitmap[MAX_GPU_INSTANCE]; 1317 struct ttm_validate_buffer tv[MAX_GPU_INSTANCE]; 1318 struct list_head validate_list; 1319 struct ww_acquire_ctx ticket; 1320 }; 1321 1322 static int svm_range_reserve_bos(struct svm_validate_context *ctx) 1323 { 1324 struct kfd_process_device *pdd; 1325 struct amdgpu_device *adev; 1326 struct amdgpu_vm *vm; 1327 uint32_t gpuidx; 1328 int r; 1329 1330 INIT_LIST_HEAD(&ctx->validate_list); 1331 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1332 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1333 if (!pdd) { 1334 pr_debug("failed to find device idx %d\n", gpuidx); 1335 return -EINVAL; 1336 } 1337 adev = (struct amdgpu_device *)pdd->dev->kgd; 1338 vm = drm_priv_to_vm(pdd->drm_priv); 1339 1340 ctx->tv[gpuidx].bo = &vm->root.bo->tbo; 1341 ctx->tv[gpuidx].num_shared = 4; 1342 list_add(&ctx->tv[gpuidx].head, &ctx->validate_list); 1343 } 1344 1345 r = ttm_eu_reserve_buffers(&ctx->ticket, &ctx->validate_list, 1346 ctx->intr, NULL); 1347 if (r) { 1348 pr_debug("failed %d to reserve bo\n", r); 1349 return r; 1350 } 1351 1352 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1353 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1354 if (!pdd) { 1355 pr_debug("failed to find device idx %d\n", gpuidx); 1356 r = -EINVAL; 1357 goto unreserve_out; 1358 } 1359 adev = (struct amdgpu_device *)pdd->dev->kgd; 1360 1361 r = amdgpu_vm_validate_pt_bos(adev, drm_priv_to_vm(pdd->drm_priv), 1362 svm_range_bo_validate, NULL); 1363 if (r) { 1364 pr_debug("failed %d validate pt bos\n", r); 1365 goto unreserve_out; 1366 } 1367 } 1368 1369 return 0; 1370 1371 unreserve_out: 1372 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1373 return r; 1374 } 1375 1376 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1377 { 1378 ttm_eu_backoff_reservation(&ctx->ticket, &ctx->validate_list); 1379 } 1380 1381 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1382 { 1383 struct kfd_process_device *pdd; 1384 struct amdgpu_device *adev; 1385 1386 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1387 adev = (struct amdgpu_device *)pdd->dev->kgd; 1388 1389 return SVM_ADEV_PGMAP_OWNER(adev); 1390 } 1391 1392 /* 1393 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1394 * 1395 * To prevent concurrent destruction or change of range attributes, the 1396 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1397 * because that would block concurrent evictions and lead to deadlocks. To 1398 * serialize concurrent migrations or validations of the same range, the 1399 * prange->migrate_mutex must be held. 1400 * 1401 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1402 * eviction fence. 1403 * 1404 * The following sequence ensures race-free validation and GPU mapping: 1405 * 1406 * 1. Reserve page table (and SVM BO if range is in VRAM) 1407 * 2. hmm_range_fault to get page addresses (if system memory) 1408 * 3. DMA-map pages (if system memory) 1409 * 4-a. Take notifier lock 1410 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1411 * 4-c. Check that the range was not split or otherwise invalidated 1412 * 4-d. Update GPU page table 1413 * 4.e. Release notifier lock 1414 * 5. Release page table (and SVM BO) reservation 1415 */ 1416 static int svm_range_validate_and_map(struct mm_struct *mm, 1417 struct svm_range *prange, 1418 int32_t gpuidx, bool intr, bool wait) 1419 { 1420 struct svm_validate_context ctx; 1421 unsigned long start, end, addr; 1422 struct kfd_process *p; 1423 void *owner; 1424 int32_t idx; 1425 int r = 0; 1426 1427 ctx.process = container_of(prange->svms, struct kfd_process, svms); 1428 ctx.prange = prange; 1429 ctx.intr = intr; 1430 1431 if (gpuidx < MAX_GPU_INSTANCE) { 1432 bitmap_zero(ctx.bitmap, MAX_GPU_INSTANCE); 1433 bitmap_set(ctx.bitmap, gpuidx, 1); 1434 } else if (ctx.process->xnack_enabled) { 1435 bitmap_copy(ctx.bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1436 1437 /* If prefetch range to GPU, or GPU retry fault migrate range to 1438 * GPU, which has ACCESS attribute to the range, create mapping 1439 * on that GPU. 1440 */ 1441 if (prange->actual_loc) { 1442 gpuidx = kfd_process_gpuidx_from_gpuid(ctx.process, 1443 prange->actual_loc); 1444 if (gpuidx < 0) { 1445 WARN_ONCE(1, "failed get device by id 0x%x\n", 1446 prange->actual_loc); 1447 return -EINVAL; 1448 } 1449 if (test_bit(gpuidx, prange->bitmap_access)) 1450 bitmap_set(ctx.bitmap, gpuidx, 1); 1451 } 1452 } else { 1453 bitmap_or(ctx.bitmap, prange->bitmap_access, 1454 prange->bitmap_aip, MAX_GPU_INSTANCE); 1455 } 1456 1457 if (bitmap_empty(ctx.bitmap, MAX_GPU_INSTANCE)) 1458 return 0; 1459 1460 if (prange->actual_loc && !prange->ttm_res) { 1461 /* This should never happen. actual_loc gets set by 1462 * svm_migrate_ram_to_vram after allocating a BO. 1463 */ 1464 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1465 return -EINVAL; 1466 } 1467 1468 svm_range_reserve_bos(&ctx); 1469 1470 p = container_of(prange->svms, struct kfd_process, svms); 1471 owner = kfd_svm_page_owner(p, find_first_bit(ctx.bitmap, 1472 MAX_GPU_INSTANCE)); 1473 for_each_set_bit(idx, ctx.bitmap, MAX_GPU_INSTANCE) { 1474 if (kfd_svm_page_owner(p, idx) != owner) { 1475 owner = NULL; 1476 break; 1477 } 1478 } 1479 1480 start = prange->start << PAGE_SHIFT; 1481 end = (prange->last + 1) << PAGE_SHIFT; 1482 for (addr = start; addr < end && !r; ) { 1483 struct hmm_range *hmm_range; 1484 struct vm_area_struct *vma; 1485 unsigned long next; 1486 unsigned long offset; 1487 unsigned long npages; 1488 bool readonly; 1489 1490 vma = find_vma(mm, addr); 1491 if (!vma || addr < vma->vm_start) { 1492 r = -EFAULT; 1493 goto unreserve_out; 1494 } 1495 readonly = !(vma->vm_flags & VM_WRITE); 1496 1497 next = min(vma->vm_end, end); 1498 npages = (next - addr) >> PAGE_SHIFT; 1499 r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL, 1500 addr, npages, &hmm_range, 1501 readonly, true, owner); 1502 if (r) { 1503 pr_debug("failed %d to get svm range pages\n", r); 1504 goto unreserve_out; 1505 } 1506 1507 offset = (addr - start) >> PAGE_SHIFT; 1508 r = svm_range_dma_map(prange, ctx.bitmap, offset, npages, 1509 hmm_range->hmm_pfns); 1510 if (r) { 1511 pr_debug("failed %d to dma map range\n", r); 1512 goto unreserve_out; 1513 } 1514 1515 svm_range_lock(prange); 1516 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1517 pr_debug("hmm update the range, need validate again\n"); 1518 r = -EAGAIN; 1519 goto unlock_out; 1520 } 1521 if (!list_empty(&prange->child_list)) { 1522 pr_debug("range split by unmap in parallel, validate again\n"); 1523 r = -EAGAIN; 1524 goto unlock_out; 1525 } 1526 1527 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1528 ctx.bitmap, wait); 1529 1530 unlock_out: 1531 svm_range_unlock(prange); 1532 1533 addr = next; 1534 } 1535 1536 if (addr == end) 1537 prange->validated_once = true; 1538 1539 unreserve_out: 1540 svm_range_unreserve_bos(&ctx); 1541 1542 if (!r) 1543 prange->validate_timestamp = ktime_to_us(ktime_get()); 1544 1545 return r; 1546 } 1547 1548 /** 1549 * svm_range_list_lock_and_flush_work - flush pending deferred work 1550 * 1551 * @svms: the svm range list 1552 * @mm: the mm structure 1553 * 1554 * Context: Returns with mmap write lock held, pending deferred work flushed 1555 * 1556 */ 1557 void 1558 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1559 struct mm_struct *mm) 1560 { 1561 retry_flush_work: 1562 flush_work(&svms->deferred_list_work); 1563 mmap_write_lock(mm); 1564 1565 if (list_empty(&svms->deferred_range_list)) 1566 return; 1567 mmap_write_unlock(mm); 1568 pr_debug("retry flush\n"); 1569 goto retry_flush_work; 1570 } 1571 1572 static void svm_range_restore_work(struct work_struct *work) 1573 { 1574 struct delayed_work *dwork = to_delayed_work(work); 1575 struct amdkfd_process_info *process_info; 1576 struct svm_range_list *svms; 1577 struct svm_range *prange; 1578 struct kfd_process *p; 1579 struct mm_struct *mm; 1580 int evicted_ranges; 1581 int invalid; 1582 int r; 1583 1584 svms = container_of(dwork, struct svm_range_list, restore_work); 1585 evicted_ranges = atomic_read(&svms->evicted_ranges); 1586 if (!evicted_ranges) 1587 return; 1588 1589 pr_debug("restore svm ranges\n"); 1590 1591 /* kfd_process_notifier_release destroys this worker thread. So during 1592 * the lifetime of this thread, kfd_process and mm will be valid. 1593 */ 1594 p = container_of(svms, struct kfd_process, svms); 1595 process_info = p->kgd_process_info; 1596 mm = p->mm; 1597 if (!mm) 1598 return; 1599 1600 mutex_lock(&process_info->lock); 1601 svm_range_list_lock_and_flush_work(svms, mm); 1602 mutex_lock(&svms->lock); 1603 1604 evicted_ranges = atomic_read(&svms->evicted_ranges); 1605 1606 list_for_each_entry(prange, &svms->list, list) { 1607 invalid = atomic_read(&prange->invalid); 1608 if (!invalid) 1609 continue; 1610 1611 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1612 prange->svms, prange, prange->start, prange->last, 1613 invalid); 1614 1615 /* 1616 * If range is migrating, wait for migration is done. 1617 */ 1618 mutex_lock(&prange->migrate_mutex); 1619 1620 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1621 false, true); 1622 if (r) 1623 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1624 prange->start); 1625 1626 mutex_unlock(&prange->migrate_mutex); 1627 if (r) 1628 goto out_reschedule; 1629 1630 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1631 goto out_reschedule; 1632 } 1633 1634 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1635 evicted_ranges) 1636 goto out_reschedule; 1637 1638 evicted_ranges = 0; 1639 1640 r = kgd2kfd_resume_mm(mm); 1641 if (r) { 1642 /* No recovery from this failure. Probably the CP is 1643 * hanging. No point trying again. 1644 */ 1645 pr_debug("failed %d to resume KFD\n", r); 1646 } 1647 1648 pr_debug("restore svm ranges successfully\n"); 1649 1650 out_reschedule: 1651 mutex_unlock(&svms->lock); 1652 mmap_write_unlock(mm); 1653 mutex_unlock(&process_info->lock); 1654 1655 /* If validation failed, reschedule another attempt */ 1656 if (evicted_ranges) { 1657 pr_debug("reschedule to restore svm range\n"); 1658 schedule_delayed_work(&svms->restore_work, 1659 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1660 } 1661 } 1662 1663 /** 1664 * svm_range_evict - evict svm range 1665 * 1666 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1667 * return to let CPU evict the buffer and proceed CPU pagetable update. 1668 * 1669 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1670 * If invalidation happens while restore work is running, restore work will 1671 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1672 * the queues. 1673 */ 1674 static int 1675 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1676 unsigned long start, unsigned long last) 1677 { 1678 struct svm_range_list *svms = prange->svms; 1679 struct svm_range *pchild; 1680 struct kfd_process *p; 1681 int r = 0; 1682 1683 p = container_of(svms, struct kfd_process, svms); 1684 1685 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1686 svms, prange->start, prange->last, start, last); 1687 1688 if (!p->xnack_enabled) { 1689 int evicted_ranges; 1690 1691 list_for_each_entry(pchild, &prange->child_list, child_list) { 1692 mutex_lock_nested(&pchild->lock, 1); 1693 if (pchild->start <= last && pchild->last >= start) { 1694 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1695 pchild->start, pchild->last); 1696 atomic_inc(&pchild->invalid); 1697 } 1698 mutex_unlock(&pchild->lock); 1699 } 1700 1701 if (prange->start <= last && prange->last >= start) 1702 atomic_inc(&prange->invalid); 1703 1704 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1705 if (evicted_ranges != 1) 1706 return r; 1707 1708 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1709 prange->svms, prange->start, prange->last); 1710 1711 /* First eviction, stop the queues */ 1712 r = kgd2kfd_quiesce_mm(mm); 1713 if (r) 1714 pr_debug("failed to quiesce KFD\n"); 1715 1716 pr_debug("schedule to restore svm %p ranges\n", svms); 1717 schedule_delayed_work(&svms->restore_work, 1718 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1719 } else { 1720 unsigned long s, l; 1721 1722 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1723 prange->svms, start, last); 1724 list_for_each_entry(pchild, &prange->child_list, child_list) { 1725 mutex_lock_nested(&pchild->lock, 1); 1726 s = max(start, pchild->start); 1727 l = min(last, pchild->last); 1728 if (l >= s) 1729 svm_range_unmap_from_gpus(pchild, s, l); 1730 mutex_unlock(&pchild->lock); 1731 } 1732 s = max(start, prange->start); 1733 l = min(last, prange->last); 1734 if (l >= s) 1735 svm_range_unmap_from_gpus(prange, s, l); 1736 } 1737 1738 return r; 1739 } 1740 1741 static struct svm_range *svm_range_clone(struct svm_range *old) 1742 { 1743 struct svm_range *new; 1744 1745 new = svm_range_new(old->svms, old->start, old->last); 1746 if (!new) 1747 return NULL; 1748 1749 if (old->svm_bo) { 1750 new->ttm_res = old->ttm_res; 1751 new->offset = old->offset; 1752 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1753 spin_lock(&new->svm_bo->list_lock); 1754 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1755 spin_unlock(&new->svm_bo->list_lock); 1756 } 1757 new->flags = old->flags; 1758 new->preferred_loc = old->preferred_loc; 1759 new->prefetch_loc = old->prefetch_loc; 1760 new->actual_loc = old->actual_loc; 1761 new->granularity = old->granularity; 1762 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1763 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1764 1765 return new; 1766 } 1767 1768 /** 1769 * svm_range_handle_overlap - split overlap ranges 1770 * @svms: svm range list header 1771 * @new: range added with this attributes 1772 * @start: range added start address, in pages 1773 * @last: range last address, in pages 1774 * @update_list: output, the ranges attributes are updated. For set_attr, this 1775 * will do validation and map to GPUs. For unmap, this will be 1776 * removed and unmap from GPUs 1777 * @insert_list: output, the ranges will be inserted into svms, attributes are 1778 * not changes. For set_attr, this will add into svms. 1779 * @remove_list:output, the ranges will be removed from svms 1780 * @left: the remaining range after overlap, For set_attr, this will be added 1781 * as new range. 1782 * 1783 * Total have 5 overlap cases. 1784 * 1785 * This function handles overlap of an address interval with existing 1786 * struct svm_ranges for applying new attributes. This may require 1787 * splitting existing struct svm_ranges. All changes should be applied to 1788 * the range_list and interval tree transactionally. If any split operation 1789 * fails, the entire update fails. Therefore the existing overlapping 1790 * svm_ranges are cloned and the original svm_ranges left unchanged. If the 1791 * transaction succeeds, the modified clones are added and the originals 1792 * freed. Otherwise the clones are removed and the old svm_ranges remain. 1793 * 1794 * Context: The caller must hold svms->lock 1795 */ 1796 static int 1797 svm_range_handle_overlap(struct svm_range_list *svms, struct svm_range *new, 1798 unsigned long start, unsigned long last, 1799 struct list_head *update_list, 1800 struct list_head *insert_list, 1801 struct list_head *remove_list, 1802 unsigned long *left) 1803 { 1804 struct interval_tree_node *node; 1805 struct svm_range *prange; 1806 struct svm_range *tmp; 1807 int r = 0; 1808 1809 INIT_LIST_HEAD(update_list); 1810 INIT_LIST_HEAD(insert_list); 1811 INIT_LIST_HEAD(remove_list); 1812 1813 node = interval_tree_iter_first(&svms->objects, start, last); 1814 while (node) { 1815 struct interval_tree_node *next; 1816 struct svm_range *old; 1817 unsigned long next_start; 1818 1819 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 1820 node->last); 1821 1822 old = container_of(node, struct svm_range, it_node); 1823 next = interval_tree_iter_next(node, start, last); 1824 next_start = min(node->last, last) + 1; 1825 1826 if (node->start < start || node->last > last) { 1827 /* node intersects the updated range, clone+split it */ 1828 prange = svm_range_clone(old); 1829 if (!prange) { 1830 r = -ENOMEM; 1831 goto out; 1832 } 1833 1834 list_add(&old->remove_list, remove_list); 1835 list_add(&prange->insert_list, insert_list); 1836 1837 if (node->start < start) { 1838 pr_debug("change old range start\n"); 1839 r = svm_range_split_head(prange, new, start, 1840 insert_list); 1841 if (r) 1842 goto out; 1843 } 1844 if (node->last > last) { 1845 pr_debug("change old range last\n"); 1846 r = svm_range_split_tail(prange, new, last, 1847 insert_list); 1848 if (r) 1849 goto out; 1850 } 1851 } else { 1852 /* The node is contained within start..last, 1853 * just update it 1854 */ 1855 prange = old; 1856 } 1857 1858 if (!svm_range_is_same_attrs(prange, new)) 1859 list_add(&prange->update_list, update_list); 1860 1861 /* insert a new node if needed */ 1862 if (node->start > start) { 1863 prange = svm_range_new(prange->svms, start, 1864 node->start - 1); 1865 if (!prange) { 1866 r = -ENOMEM; 1867 goto out; 1868 } 1869 1870 list_add(&prange->insert_list, insert_list); 1871 list_add(&prange->update_list, update_list); 1872 } 1873 1874 node = next; 1875 start = next_start; 1876 } 1877 1878 if (left && start <= last) 1879 *left = last - start + 1; 1880 1881 out: 1882 if (r) 1883 list_for_each_entry_safe(prange, tmp, insert_list, insert_list) 1884 svm_range_free(prange); 1885 1886 return r; 1887 } 1888 1889 static void 1890 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 1891 struct svm_range *prange) 1892 { 1893 unsigned long start; 1894 unsigned long last; 1895 1896 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 1897 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 1898 1899 if (prange->start == start && prange->last == last) 1900 return; 1901 1902 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1903 prange->svms, prange, start, last, prange->start, 1904 prange->last); 1905 1906 if (start != 0 && last != 0) { 1907 interval_tree_remove(&prange->it_node, &prange->svms->objects); 1908 svm_range_remove_notifier(prange); 1909 } 1910 prange->it_node.start = prange->start; 1911 prange->it_node.last = prange->last; 1912 1913 interval_tree_insert(&prange->it_node, &prange->svms->objects); 1914 svm_range_add_notifier_locked(mm, prange); 1915 } 1916 1917 static void 1918 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange) 1919 { 1920 struct mm_struct *mm = prange->work_item.mm; 1921 1922 switch (prange->work_item.op) { 1923 case SVM_OP_NULL: 1924 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 1925 svms, prange, prange->start, prange->last); 1926 break; 1927 case SVM_OP_UNMAP_RANGE: 1928 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 1929 svms, prange, prange->start, prange->last); 1930 svm_range_unlink(prange); 1931 svm_range_remove_notifier(prange); 1932 svm_range_free(prange); 1933 break; 1934 case SVM_OP_UPDATE_RANGE_NOTIFIER: 1935 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 1936 svms, prange, prange->start, prange->last); 1937 svm_range_update_notifier_and_interval_tree(mm, prange); 1938 break; 1939 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 1940 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 1941 svms, prange, prange->start, prange->last); 1942 svm_range_update_notifier_and_interval_tree(mm, prange); 1943 /* TODO: implement deferred validation and mapping */ 1944 break; 1945 case SVM_OP_ADD_RANGE: 1946 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 1947 prange->start, prange->last); 1948 svm_range_add_to_svms(prange); 1949 svm_range_add_notifier_locked(mm, prange); 1950 break; 1951 case SVM_OP_ADD_RANGE_AND_MAP: 1952 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 1953 prange, prange->start, prange->last); 1954 svm_range_add_to_svms(prange); 1955 svm_range_add_notifier_locked(mm, prange); 1956 /* TODO: implement deferred validation and mapping */ 1957 break; 1958 default: 1959 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 1960 prange->work_item.op); 1961 } 1962 } 1963 1964 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 1965 { 1966 struct kfd_process_device *pdd; 1967 struct amdgpu_device *adev; 1968 struct kfd_process *p; 1969 uint32_t i; 1970 1971 p = container_of(svms, struct kfd_process, svms); 1972 1973 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 1974 pdd = p->pdds[i]; 1975 if (!pdd) 1976 continue; 1977 1978 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 1979 adev = (struct amdgpu_device *)pdd->dev->kgd; 1980 1981 amdgpu_ih_wait_on_checkpoint_process(adev, &adev->irq.ih1); 1982 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 1983 } 1984 } 1985 1986 static void svm_range_deferred_list_work(struct work_struct *work) 1987 { 1988 struct svm_range_list *svms; 1989 struct svm_range *prange; 1990 struct mm_struct *mm; 1991 1992 svms = container_of(work, struct svm_range_list, deferred_list_work); 1993 pr_debug("enter svms 0x%p\n", svms); 1994 1995 spin_lock(&svms->deferred_list_lock); 1996 while (!list_empty(&svms->deferred_range_list)) { 1997 prange = list_first_entry(&svms->deferred_range_list, 1998 struct svm_range, deferred_list); 1999 spin_unlock(&svms->deferred_list_lock); 2000 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2001 prange->start, prange->last, prange->work_item.op); 2002 2003 /* Make sure no stale retry fault coming after range is freed */ 2004 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) 2005 svm_range_drain_retry_fault(prange->svms); 2006 2007 mm = prange->work_item.mm; 2008 mmap_write_lock(mm); 2009 mutex_lock(&svms->lock); 2010 2011 /* Remove from deferred_list must be inside mmap write lock, 2012 * otherwise, svm_range_list_lock_and_flush_work may hold mmap 2013 * write lock, and continue because deferred_list is empty, then 2014 * deferred_list handle is blocked by mmap write lock. 2015 */ 2016 spin_lock(&svms->deferred_list_lock); 2017 list_del_init(&prange->deferred_list); 2018 spin_unlock(&svms->deferred_list_lock); 2019 2020 mutex_lock(&prange->migrate_mutex); 2021 while (!list_empty(&prange->child_list)) { 2022 struct svm_range *pchild; 2023 2024 pchild = list_first_entry(&prange->child_list, 2025 struct svm_range, child_list); 2026 pr_debug("child prange 0x%p op %d\n", pchild, 2027 pchild->work_item.op); 2028 list_del_init(&pchild->child_list); 2029 svm_range_handle_list_op(svms, pchild); 2030 } 2031 mutex_unlock(&prange->migrate_mutex); 2032 2033 svm_range_handle_list_op(svms, prange); 2034 mutex_unlock(&svms->lock); 2035 mmap_write_unlock(mm); 2036 2037 spin_lock(&svms->deferred_list_lock); 2038 } 2039 spin_unlock(&svms->deferred_list_lock); 2040 2041 pr_debug("exit svms 0x%p\n", svms); 2042 } 2043 2044 void 2045 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2046 struct mm_struct *mm, enum svm_work_list_ops op) 2047 { 2048 spin_lock(&svms->deferred_list_lock); 2049 /* if prange is on the deferred list */ 2050 if (!list_empty(&prange->deferred_list)) { 2051 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2052 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2053 if (op != SVM_OP_NULL && 2054 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2055 prange->work_item.op = op; 2056 } else { 2057 prange->work_item.op = op; 2058 prange->work_item.mm = mm; 2059 list_add_tail(&prange->deferred_list, 2060 &prange->svms->deferred_range_list); 2061 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2062 prange, prange->start, prange->last, op); 2063 } 2064 spin_unlock(&svms->deferred_list_lock); 2065 } 2066 2067 void schedule_deferred_list_work(struct svm_range_list *svms) 2068 { 2069 spin_lock(&svms->deferred_list_lock); 2070 if (!list_empty(&svms->deferred_range_list)) 2071 schedule_work(&svms->deferred_list_work); 2072 spin_unlock(&svms->deferred_list_lock); 2073 } 2074 2075 static void 2076 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2077 struct svm_range *prange, unsigned long start, 2078 unsigned long last) 2079 { 2080 struct svm_range *head; 2081 struct svm_range *tail; 2082 2083 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2084 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2085 prange->start, prange->last); 2086 return; 2087 } 2088 if (start > prange->last || last < prange->start) 2089 return; 2090 2091 head = tail = prange; 2092 if (start > prange->start) 2093 svm_range_split(prange, prange->start, start - 1, &tail); 2094 if (last < tail->last) 2095 svm_range_split(tail, last + 1, tail->last, &head); 2096 2097 if (head != prange && tail != prange) { 2098 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2099 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2100 } else if (tail != prange) { 2101 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2102 } else if (head != prange) { 2103 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2104 } else if (parent != prange) { 2105 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2106 } 2107 } 2108 2109 static void 2110 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2111 unsigned long start, unsigned long last) 2112 { 2113 struct svm_range_list *svms; 2114 struct svm_range *pchild; 2115 struct kfd_process *p; 2116 unsigned long s, l; 2117 bool unmap_parent; 2118 2119 p = kfd_lookup_process_by_mm(mm); 2120 if (!p) 2121 return; 2122 svms = &p->svms; 2123 2124 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2125 prange, prange->start, prange->last, start, last); 2126 2127 unmap_parent = start <= prange->start && last >= prange->last; 2128 2129 list_for_each_entry(pchild, &prange->child_list, child_list) { 2130 mutex_lock_nested(&pchild->lock, 1); 2131 s = max(start, pchild->start); 2132 l = min(last, pchild->last); 2133 if (l >= s) 2134 svm_range_unmap_from_gpus(pchild, s, l); 2135 svm_range_unmap_split(mm, prange, pchild, start, last); 2136 mutex_unlock(&pchild->lock); 2137 } 2138 s = max(start, prange->start); 2139 l = min(last, prange->last); 2140 if (l >= s) 2141 svm_range_unmap_from_gpus(prange, s, l); 2142 svm_range_unmap_split(mm, prange, prange, start, last); 2143 2144 if (unmap_parent) 2145 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2146 else 2147 svm_range_add_list_work(svms, prange, mm, 2148 SVM_OP_UPDATE_RANGE_NOTIFIER); 2149 schedule_deferred_list_work(svms); 2150 2151 kfd_unref_process(p); 2152 } 2153 2154 /** 2155 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2156 * 2157 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2158 * is from migration, or CPU page invalidation callback. 2159 * 2160 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2161 * work thread, and split prange if only part of prange is unmapped. 2162 * 2163 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2164 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2165 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2166 * update GPU mapping to recover. 2167 * 2168 * Context: mmap lock, notifier_invalidate_start lock are held 2169 * for invalidate event, prange lock is held if this is from migration 2170 */ 2171 static bool 2172 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2173 const struct mmu_notifier_range *range, 2174 unsigned long cur_seq) 2175 { 2176 struct svm_range *prange; 2177 unsigned long start; 2178 unsigned long last; 2179 2180 if (range->event == MMU_NOTIFY_RELEASE) 2181 return true; 2182 2183 start = mni->interval_tree.start; 2184 last = mni->interval_tree.last; 2185 start = (start > range->start ? start : range->start) >> PAGE_SHIFT; 2186 last = (last < (range->end - 1) ? last : range->end - 1) >> PAGE_SHIFT; 2187 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2188 start, last, range->start >> PAGE_SHIFT, 2189 (range->end - 1) >> PAGE_SHIFT, 2190 mni->interval_tree.start >> PAGE_SHIFT, 2191 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2192 2193 prange = container_of(mni, struct svm_range, notifier); 2194 2195 svm_range_lock(prange); 2196 mmu_interval_set_seq(mni, cur_seq); 2197 2198 switch (range->event) { 2199 case MMU_NOTIFY_UNMAP: 2200 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2201 break; 2202 default: 2203 svm_range_evict(prange, mni->mm, start, last); 2204 break; 2205 } 2206 2207 svm_range_unlock(prange); 2208 2209 return true; 2210 } 2211 2212 /** 2213 * svm_range_from_addr - find svm range from fault address 2214 * @svms: svm range list header 2215 * @addr: address to search range interval tree, in pages 2216 * @parent: parent range if range is on child list 2217 * 2218 * Context: The caller must hold svms->lock 2219 * 2220 * Return: the svm_range found or NULL 2221 */ 2222 struct svm_range * 2223 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2224 struct svm_range **parent) 2225 { 2226 struct interval_tree_node *node; 2227 struct svm_range *prange; 2228 struct svm_range *pchild; 2229 2230 node = interval_tree_iter_first(&svms->objects, addr, addr); 2231 if (!node) 2232 return NULL; 2233 2234 prange = container_of(node, struct svm_range, it_node); 2235 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2236 addr, prange->start, prange->last, node->start, node->last); 2237 2238 if (addr >= prange->start && addr <= prange->last) { 2239 if (parent) 2240 *parent = prange; 2241 return prange; 2242 } 2243 list_for_each_entry(pchild, &prange->child_list, child_list) 2244 if (addr >= pchild->start && addr <= pchild->last) { 2245 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2246 addr, pchild->start, pchild->last); 2247 if (parent) 2248 *parent = prange; 2249 return pchild; 2250 } 2251 2252 return NULL; 2253 } 2254 2255 /* svm_range_best_restore_location - decide the best fault restore location 2256 * @prange: svm range structure 2257 * @adev: the GPU on which vm fault happened 2258 * 2259 * This is only called when xnack is on, to decide the best location to restore 2260 * the range mapping after GPU vm fault. Caller uses the best location to do 2261 * migration if actual loc is not best location, then update GPU page table 2262 * mapping to the best location. 2263 * 2264 * If vm fault gpu is range preferred loc, the best_loc is preferred loc. 2265 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2266 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2267 * if range actual loc is cpu, best_loc is cpu 2268 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2269 * range actual loc. 2270 * Otherwise, GPU no access, best_loc is -1. 2271 * 2272 * Return: 2273 * -1 means vm fault GPU no access 2274 * 0 for CPU or GPU id 2275 */ 2276 static int32_t 2277 svm_range_best_restore_location(struct svm_range *prange, 2278 struct amdgpu_device *adev, 2279 int32_t *gpuidx) 2280 { 2281 struct amdgpu_device *bo_adev; 2282 struct kfd_process *p; 2283 uint32_t gpuid; 2284 int r; 2285 2286 p = container_of(prange->svms, struct kfd_process, svms); 2287 2288 r = kfd_process_gpuid_from_kgd(p, adev, &gpuid, gpuidx); 2289 if (r < 0) { 2290 pr_debug("failed to get gpuid from kgd\n"); 2291 return -1; 2292 } 2293 2294 if (prange->preferred_loc == gpuid) 2295 return prange->preferred_loc; 2296 2297 if (test_bit(*gpuidx, prange->bitmap_access)) 2298 return gpuid; 2299 2300 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2301 if (!prange->actual_loc) 2302 return 0; 2303 2304 bo_adev = svm_range_get_adev_by_id(prange, prange->actual_loc); 2305 if (amdgpu_xgmi_same_hive(adev, bo_adev)) 2306 return prange->actual_loc; 2307 else 2308 return 0; 2309 } 2310 2311 return -1; 2312 } 2313 2314 static int 2315 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2316 unsigned long *start, unsigned long *last) 2317 { 2318 struct vm_area_struct *vma; 2319 struct interval_tree_node *node; 2320 unsigned long start_limit, end_limit; 2321 2322 vma = find_vma(p->mm, addr << PAGE_SHIFT); 2323 if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) { 2324 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2325 return -EFAULT; 2326 } 2327 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2328 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2329 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2330 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2331 /* First range that starts after the fault address */ 2332 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2333 if (node) { 2334 end_limit = min(end_limit, node->start); 2335 /* Last range that ends before the fault address */ 2336 node = container_of(rb_prev(&node->rb), 2337 struct interval_tree_node, rb); 2338 } else { 2339 /* Last range must end before addr because 2340 * there was no range after addr 2341 */ 2342 node = container_of(rb_last(&p->svms.objects.rb_root), 2343 struct interval_tree_node, rb); 2344 } 2345 if (node) { 2346 if (node->last >= addr) { 2347 WARN(1, "Overlap with prev node and page fault addr\n"); 2348 return -EFAULT; 2349 } 2350 start_limit = max(start_limit, node->last + 1); 2351 } 2352 2353 *start = start_limit; 2354 *last = end_limit - 1; 2355 2356 pr_debug("vma start: 0x%lx start: 0x%lx vma end: 0x%lx last: 0x%lx\n", 2357 vma->vm_start >> PAGE_SHIFT, *start, 2358 vma->vm_end >> PAGE_SHIFT, *last); 2359 2360 return 0; 2361 } 2362 2363 static int 2364 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2365 uint64_t *bo_s, uint64_t *bo_l) 2366 { 2367 struct amdgpu_bo_va_mapping *mapping; 2368 struct interval_tree_node *node; 2369 struct amdgpu_bo *bo = NULL; 2370 unsigned long userptr; 2371 uint32_t i; 2372 int r; 2373 2374 for (i = 0; i < p->n_pdds; i++) { 2375 struct amdgpu_vm *vm; 2376 2377 if (!p->pdds[i]->drm_priv) 2378 continue; 2379 2380 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2381 r = amdgpu_bo_reserve(vm->root.bo, false); 2382 if (r) 2383 return r; 2384 2385 /* Check userptr by searching entire vm->va interval tree */ 2386 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2387 while (node) { 2388 mapping = container_of((struct rb_node *)node, 2389 struct amdgpu_bo_va_mapping, rb); 2390 bo = mapping->bo_va->base.bo; 2391 2392 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2393 start << PAGE_SHIFT, 2394 last << PAGE_SHIFT, 2395 &userptr)) { 2396 node = interval_tree_iter_next(node, 0, ~0ULL); 2397 continue; 2398 } 2399 2400 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2401 start, last); 2402 if (bo_s && bo_l) { 2403 *bo_s = userptr >> PAGE_SHIFT; 2404 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2405 } 2406 amdgpu_bo_unreserve(vm->root.bo); 2407 return -EADDRINUSE; 2408 } 2409 amdgpu_bo_unreserve(vm->root.bo); 2410 } 2411 return 0; 2412 } 2413 2414 static struct 2415 svm_range *svm_range_create_unregistered_range(struct amdgpu_device *adev, 2416 struct kfd_process *p, 2417 struct mm_struct *mm, 2418 int64_t addr) 2419 { 2420 struct svm_range *prange = NULL; 2421 unsigned long start, last; 2422 uint32_t gpuid, gpuidx; 2423 uint64_t bo_s = 0; 2424 uint64_t bo_l = 0; 2425 int r; 2426 2427 if (svm_range_get_range_boundaries(p, addr, &start, &last)) 2428 return NULL; 2429 2430 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2431 if (r != -EADDRINUSE) 2432 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2433 2434 if (r == -EADDRINUSE) { 2435 if (addr >= bo_s && addr <= bo_l) 2436 return NULL; 2437 2438 /* Create one page svm range if 2MB range overlapping */ 2439 start = addr; 2440 last = addr; 2441 } 2442 2443 prange = svm_range_new(&p->svms, start, last); 2444 if (!prange) { 2445 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2446 return NULL; 2447 } 2448 if (kfd_process_gpuid_from_kgd(p, adev, &gpuid, &gpuidx)) { 2449 pr_debug("failed to get gpuid from kgd\n"); 2450 svm_range_free(prange); 2451 return NULL; 2452 } 2453 2454 svm_range_add_to_svms(prange); 2455 svm_range_add_notifier_locked(mm, prange); 2456 2457 return prange; 2458 } 2459 2460 /* svm_range_skip_recover - decide if prange can be recovered 2461 * @prange: svm range structure 2462 * 2463 * GPU vm retry fault handle skip recover the range for cases: 2464 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2465 * deferred list work will drain the stale fault before free the prange. 2466 * 2. prange is on deferred list to add interval notifier after split, or 2467 * 3. prange is child range, it is split from parent prange, recover later 2468 * after interval notifier is added. 2469 * 2470 * Return: true to skip recover, false to recover 2471 */ 2472 static bool svm_range_skip_recover(struct svm_range *prange) 2473 { 2474 struct svm_range_list *svms = prange->svms; 2475 2476 spin_lock(&svms->deferred_list_lock); 2477 if (list_empty(&prange->deferred_list) && 2478 list_empty(&prange->child_list)) { 2479 spin_unlock(&svms->deferred_list_lock); 2480 return false; 2481 } 2482 spin_unlock(&svms->deferred_list_lock); 2483 2484 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2485 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2486 svms, prange, prange->start, prange->last); 2487 return true; 2488 } 2489 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2490 prange->work_item.op == SVM_OP_ADD_RANGE) { 2491 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2492 svms, prange, prange->start, prange->last); 2493 return true; 2494 } 2495 return false; 2496 } 2497 2498 static void 2499 svm_range_count_fault(struct amdgpu_device *adev, struct kfd_process *p, 2500 int32_t gpuidx) 2501 { 2502 struct kfd_process_device *pdd; 2503 2504 /* fault is on different page of same range 2505 * or fault is skipped to recover later 2506 * or fault is on invalid virtual address 2507 */ 2508 if (gpuidx == MAX_GPU_INSTANCE) { 2509 uint32_t gpuid; 2510 int r; 2511 2512 r = kfd_process_gpuid_from_kgd(p, adev, &gpuid, &gpuidx); 2513 if (r < 0) 2514 return; 2515 } 2516 2517 /* fault is recovered 2518 * or fault cannot recover because GPU no access on the range 2519 */ 2520 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2521 if (pdd) 2522 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2523 } 2524 2525 static bool 2526 svm_fault_allowed(struct mm_struct *mm, uint64_t addr, bool write_fault) 2527 { 2528 unsigned long requested = VM_READ; 2529 struct vm_area_struct *vma; 2530 2531 if (write_fault) 2532 requested |= VM_WRITE; 2533 2534 vma = find_vma(mm, addr << PAGE_SHIFT); 2535 if (!vma || (addr << PAGE_SHIFT) < vma->vm_start) { 2536 pr_debug("address 0x%llx VMA is removed\n", addr); 2537 return true; 2538 } 2539 2540 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2541 vma->vm_flags); 2542 return (vma->vm_flags & requested) == requested; 2543 } 2544 2545 int 2546 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2547 uint64_t addr, bool write_fault) 2548 { 2549 struct mm_struct *mm = NULL; 2550 struct svm_range_list *svms; 2551 struct svm_range *prange; 2552 struct kfd_process *p; 2553 uint64_t timestamp; 2554 int32_t best_loc; 2555 int32_t gpuidx = MAX_GPU_INSTANCE; 2556 bool write_locked = false; 2557 int r = 0; 2558 2559 if (!KFD_IS_SVM_API_SUPPORTED(adev->kfd.dev)) { 2560 pr_debug("device does not support SVM\n"); 2561 return -EFAULT; 2562 } 2563 2564 p = kfd_lookup_process_by_pasid(pasid); 2565 if (!p) { 2566 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2567 return -ESRCH; 2568 } 2569 if (!p->xnack_enabled) { 2570 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2571 r = -EFAULT; 2572 goto out; 2573 } 2574 svms = &p->svms; 2575 2576 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2577 2578 mm = get_task_mm(p->lead_thread); 2579 if (!mm) { 2580 pr_debug("svms 0x%p failed to get mm\n", svms); 2581 r = -ESRCH; 2582 goto out; 2583 } 2584 2585 mmap_read_lock(mm); 2586 retry_write_locked: 2587 mutex_lock(&svms->lock); 2588 prange = svm_range_from_addr(svms, addr, NULL); 2589 if (!prange) { 2590 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2591 svms, addr); 2592 if (!write_locked) { 2593 /* Need the write lock to create new range with MMU notifier. 2594 * Also flush pending deferred work to make sure the interval 2595 * tree is up to date before we add a new range 2596 */ 2597 mutex_unlock(&svms->lock); 2598 mmap_read_unlock(mm); 2599 mmap_write_lock(mm); 2600 write_locked = true; 2601 goto retry_write_locked; 2602 } 2603 prange = svm_range_create_unregistered_range(adev, p, mm, addr); 2604 if (!prange) { 2605 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2606 svms, addr); 2607 mmap_write_downgrade(mm); 2608 r = -EFAULT; 2609 goto out_unlock_svms; 2610 } 2611 } 2612 if (write_locked) 2613 mmap_write_downgrade(mm); 2614 2615 mutex_lock(&prange->migrate_mutex); 2616 2617 if (svm_range_skip_recover(prange)) { 2618 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2619 goto out_unlock_range; 2620 } 2621 2622 timestamp = ktime_to_us(ktime_get()) - prange->validate_timestamp; 2623 /* skip duplicate vm fault on different pages of same range */ 2624 if (timestamp < AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING) { 2625 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2626 svms, prange->start, prange->last); 2627 goto out_unlock_range; 2628 } 2629 2630 if (!svm_fault_allowed(mm, addr, write_fault)) { 2631 pr_debug("fault addr 0x%llx no %s permission\n", addr, 2632 write_fault ? "write" : "read"); 2633 r = -EPERM; 2634 goto out_unlock_range; 2635 } 2636 2637 best_loc = svm_range_best_restore_location(prange, adev, &gpuidx); 2638 if (best_loc == -1) { 2639 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 2640 svms, prange->start, prange->last); 2641 r = -EACCES; 2642 goto out_unlock_range; 2643 } 2644 2645 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 2646 svms, prange->start, prange->last, best_loc, 2647 prange->actual_loc); 2648 2649 if (prange->actual_loc != best_loc) { 2650 if (best_loc) { 2651 r = svm_migrate_to_vram(prange, best_loc, mm); 2652 if (r) { 2653 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 2654 r, addr); 2655 /* Fallback to system memory if migration to 2656 * VRAM failed 2657 */ 2658 if (prange->actual_loc) 2659 r = svm_migrate_vram_to_ram(prange, mm); 2660 else 2661 r = 0; 2662 } 2663 } else { 2664 r = svm_migrate_vram_to_ram(prange, mm); 2665 } 2666 if (r) { 2667 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 2668 r, svms, prange->start, prange->last); 2669 goto out_unlock_range; 2670 } 2671 } 2672 2673 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false); 2674 if (r) 2675 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 2676 r, svms, prange->start, prange->last); 2677 2678 out_unlock_range: 2679 mutex_unlock(&prange->migrate_mutex); 2680 out_unlock_svms: 2681 mutex_unlock(&svms->lock); 2682 mmap_read_unlock(mm); 2683 2684 svm_range_count_fault(adev, p, gpuidx); 2685 2686 mmput(mm); 2687 out: 2688 kfd_unref_process(p); 2689 2690 if (r == -EAGAIN) { 2691 pr_debug("recover vm fault later\n"); 2692 amdgpu_gmc_filter_faults_remove(adev, addr, pasid); 2693 r = 0; 2694 } 2695 return r; 2696 } 2697 2698 void svm_range_list_fini(struct kfd_process *p) 2699 { 2700 struct svm_range *prange; 2701 struct svm_range *next; 2702 2703 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 2704 2705 /* Ensure list work is finished before process is destroyed */ 2706 flush_work(&p->svms.deferred_list_work); 2707 2708 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 2709 svm_range_unlink(prange); 2710 svm_range_remove_notifier(prange); 2711 svm_range_free(prange); 2712 } 2713 2714 mutex_destroy(&p->svms.lock); 2715 2716 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 2717 } 2718 2719 int svm_range_list_init(struct kfd_process *p) 2720 { 2721 struct svm_range_list *svms = &p->svms; 2722 int i; 2723 2724 svms->objects = RB_ROOT_CACHED; 2725 mutex_init(&svms->lock); 2726 INIT_LIST_HEAD(&svms->list); 2727 atomic_set(&svms->evicted_ranges, 0); 2728 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 2729 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 2730 INIT_LIST_HEAD(&svms->deferred_range_list); 2731 spin_lock_init(&svms->deferred_list_lock); 2732 2733 for (i = 0; i < p->n_pdds; i++) 2734 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev)) 2735 bitmap_set(svms->bitmap_supported, i, 1); 2736 2737 return 0; 2738 } 2739 2740 /** 2741 * svm_range_check_vm - check if virtual address range mapped already 2742 * @p: current kfd_process 2743 * @start: range start address, in pages 2744 * @last: range last address, in pages 2745 * @bo_s: mapping start address in pages if address range already mapped 2746 * @bo_l: mapping last address in pages if address range already mapped 2747 * 2748 * The purpose is to avoid virtual address ranges already allocated by 2749 * kfd_ioctl_alloc_memory_of_gpu ioctl. 2750 * It looks for each pdd in the kfd_process. 2751 * 2752 * Context: Process context 2753 * 2754 * Return 0 - OK, if the range is not mapped. 2755 * Otherwise error code: 2756 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 2757 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 2758 * a signal. Release all buffer reservations and return to user-space. 2759 */ 2760 static int 2761 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 2762 uint64_t *bo_s, uint64_t *bo_l) 2763 { 2764 struct amdgpu_bo_va_mapping *mapping; 2765 struct interval_tree_node *node; 2766 uint32_t i; 2767 int r; 2768 2769 for (i = 0; i < p->n_pdds; i++) { 2770 struct amdgpu_vm *vm; 2771 2772 if (!p->pdds[i]->drm_priv) 2773 continue; 2774 2775 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2776 r = amdgpu_bo_reserve(vm->root.bo, false); 2777 if (r) 2778 return r; 2779 2780 node = interval_tree_iter_first(&vm->va, start, last); 2781 if (node) { 2782 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 2783 start, last); 2784 mapping = container_of((struct rb_node *)node, 2785 struct amdgpu_bo_va_mapping, rb); 2786 if (bo_s && bo_l) { 2787 *bo_s = mapping->start; 2788 *bo_l = mapping->last; 2789 } 2790 amdgpu_bo_unreserve(vm->root.bo); 2791 return -EADDRINUSE; 2792 } 2793 amdgpu_bo_unreserve(vm->root.bo); 2794 } 2795 2796 return 0; 2797 } 2798 2799 /** 2800 * svm_range_is_valid - check if virtual address range is valid 2801 * @p: current kfd_process 2802 * @start: range start address, in pages 2803 * @size: range size, in pages 2804 * 2805 * Valid virtual address range means it belongs to one or more VMAs 2806 * 2807 * Context: Process context 2808 * 2809 * Return: 2810 * 0 - OK, otherwise error code 2811 */ 2812 static int 2813 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 2814 { 2815 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 2816 struct vm_area_struct *vma; 2817 unsigned long end; 2818 unsigned long start_unchg = start; 2819 2820 start <<= PAGE_SHIFT; 2821 end = start + (size << PAGE_SHIFT); 2822 do { 2823 vma = find_vma(p->mm, start); 2824 if (!vma || start < vma->vm_start || 2825 (vma->vm_flags & device_vma)) 2826 return -EFAULT; 2827 start = min(end, vma->vm_end); 2828 } while (start < end); 2829 2830 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 2831 NULL); 2832 } 2833 2834 /** 2835 * svm_range_add - add svm range and handle overlap 2836 * @p: the range add to this process svms 2837 * @start: page size aligned 2838 * @size: page size aligned 2839 * @nattr: number of attributes 2840 * @attrs: array of attributes 2841 * @update_list: output, the ranges need validate and update GPU mapping 2842 * @insert_list: output, the ranges need insert to svms 2843 * @remove_list: output, the ranges are replaced and need remove from svms 2844 * 2845 * Check if the virtual address range has overlap with the registered ranges, 2846 * split the overlapped range, copy and adjust pages address and vram nodes in 2847 * old and new ranges. 2848 * 2849 * Context: Process context, caller must hold svms->lock 2850 * 2851 * Return: 2852 * 0 - OK, otherwise error code 2853 */ 2854 static int 2855 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2856 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2857 struct list_head *update_list, struct list_head *insert_list, 2858 struct list_head *remove_list) 2859 { 2860 uint64_t last = start + size - 1UL; 2861 struct svm_range_list *svms; 2862 struct svm_range new = {0}; 2863 struct svm_range *prange; 2864 unsigned long left = 0; 2865 int r = 0; 2866 2867 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", &p->svms, start, last); 2868 2869 svm_range_apply_attrs(p, &new, nattr, attrs); 2870 2871 svms = &p->svms; 2872 2873 r = svm_range_handle_overlap(svms, &new, start, last, update_list, 2874 insert_list, remove_list, &left); 2875 if (r) 2876 return r; 2877 2878 if (left) { 2879 prange = svm_range_new(svms, last - left + 1, last); 2880 list_add(&prange->insert_list, insert_list); 2881 list_add(&prange->update_list, update_list); 2882 } 2883 2884 return 0; 2885 } 2886 2887 /** 2888 * svm_range_best_prefetch_location - decide the best prefetch location 2889 * @prange: svm range structure 2890 * 2891 * For xnack off: 2892 * If range map to single GPU, the best prefetch location is prefetch_loc, which 2893 * can be CPU or GPU. 2894 * 2895 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 2896 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 2897 * the best prefetch location is always CPU, because GPU can not have coherent 2898 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 2899 * 2900 * For xnack on: 2901 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 2902 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 2903 * 2904 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 2905 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 2906 * prefetch location is always CPU. 2907 * 2908 * Context: Process context 2909 * 2910 * Return: 2911 * 0 for CPU or GPU id 2912 */ 2913 static uint32_t 2914 svm_range_best_prefetch_location(struct svm_range *prange) 2915 { 2916 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 2917 uint32_t best_loc = prange->prefetch_loc; 2918 struct kfd_process_device *pdd; 2919 struct amdgpu_device *bo_adev; 2920 struct amdgpu_device *adev; 2921 struct kfd_process *p; 2922 uint32_t gpuidx; 2923 2924 p = container_of(prange->svms, struct kfd_process, svms); 2925 2926 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 2927 goto out; 2928 2929 bo_adev = svm_range_get_adev_by_id(prange, best_loc); 2930 if (!bo_adev) { 2931 WARN_ONCE(1, "failed to get device by id 0x%x\n", best_loc); 2932 best_loc = 0; 2933 goto out; 2934 } 2935 2936 if (p->xnack_enabled) 2937 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 2938 else 2939 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 2940 MAX_GPU_INSTANCE); 2941 2942 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 2943 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2944 if (!pdd) { 2945 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 2946 continue; 2947 } 2948 adev = (struct amdgpu_device *)pdd->dev->kgd; 2949 2950 if (adev == bo_adev) 2951 continue; 2952 2953 if (!amdgpu_xgmi_same_hive(adev, bo_adev)) { 2954 best_loc = 0; 2955 break; 2956 } 2957 } 2958 2959 out: 2960 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 2961 p->xnack_enabled, &p->svms, prange->start, prange->last, 2962 best_loc); 2963 2964 return best_loc; 2965 } 2966 2967 /* FIXME: This is a workaround for page locking bug when some pages are 2968 * invalid during migration to VRAM 2969 */ 2970 void svm_range_prefault(struct svm_range *prange, struct mm_struct *mm, 2971 void *owner) 2972 { 2973 struct hmm_range *hmm_range; 2974 int r; 2975 2976 if (prange->validated_once) 2977 return; 2978 2979 r = amdgpu_hmm_range_get_pages(&prange->notifier, mm, NULL, 2980 prange->start << PAGE_SHIFT, 2981 prange->npages, &hmm_range, 2982 false, true, owner); 2983 if (!r) { 2984 amdgpu_hmm_range_get_pages_done(hmm_range); 2985 prange->validated_once = true; 2986 } 2987 } 2988 2989 /* svm_range_trigger_migration - start page migration if prefetch loc changed 2990 * @mm: current process mm_struct 2991 * @prange: svm range structure 2992 * @migrated: output, true if migration is triggered 2993 * 2994 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 2995 * from ram to vram. 2996 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 2997 * from vram to ram. 2998 * 2999 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3000 * and restore work: 3001 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3002 * stops all queues, schedule restore work 3003 * 2. svm_range_restore_work wait for migration is done by 3004 * a. svm_range_validate_vram takes prange->migrate_mutex 3005 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3006 * 3. restore work update mappings of GPU, resume all queues. 3007 * 3008 * Context: Process context 3009 * 3010 * Return: 3011 * 0 - OK, otherwise - error code of migration 3012 */ 3013 static int 3014 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3015 bool *migrated) 3016 { 3017 uint32_t best_loc; 3018 int r = 0; 3019 3020 *migrated = false; 3021 best_loc = svm_range_best_prefetch_location(prange); 3022 3023 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3024 best_loc == prange->actual_loc) 3025 return 0; 3026 3027 if (!best_loc) { 3028 r = svm_migrate_vram_to_ram(prange, mm); 3029 *migrated = !r; 3030 return r; 3031 } 3032 3033 r = svm_migrate_to_vram(prange, best_loc, mm); 3034 *migrated = !r; 3035 3036 return r; 3037 } 3038 3039 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3040 { 3041 if (!fence) 3042 return -EINVAL; 3043 3044 if (dma_fence_is_signaled(&fence->base)) 3045 return 0; 3046 3047 if (fence->svm_bo) { 3048 WRITE_ONCE(fence->svm_bo->evicting, 1); 3049 schedule_work(&fence->svm_bo->eviction_work); 3050 } 3051 3052 return 0; 3053 } 3054 3055 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3056 { 3057 struct svm_range_bo *svm_bo; 3058 struct kfd_process *p; 3059 struct mm_struct *mm; 3060 3061 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3062 if (!svm_bo_ref_unless_zero(svm_bo)) 3063 return; /* svm_bo was freed while eviction was pending */ 3064 3065 /* svm_range_bo_release destroys this worker thread. So during 3066 * the lifetime of this thread, kfd_process and mm will be valid. 3067 */ 3068 p = container_of(svm_bo->svms, struct kfd_process, svms); 3069 mm = p->mm; 3070 if (!mm) 3071 return; 3072 3073 mmap_read_lock(mm); 3074 spin_lock(&svm_bo->list_lock); 3075 while (!list_empty(&svm_bo->range_list)) { 3076 struct svm_range *prange = 3077 list_first_entry(&svm_bo->range_list, 3078 struct svm_range, svm_bo_list); 3079 list_del_init(&prange->svm_bo_list); 3080 spin_unlock(&svm_bo->list_lock); 3081 3082 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3083 prange->start, prange->last); 3084 3085 mutex_lock(&prange->migrate_mutex); 3086 svm_migrate_vram_to_ram(prange, svm_bo->eviction_fence->mm); 3087 3088 mutex_lock(&prange->lock); 3089 prange->svm_bo = NULL; 3090 mutex_unlock(&prange->lock); 3091 3092 mutex_unlock(&prange->migrate_mutex); 3093 3094 spin_lock(&svm_bo->list_lock); 3095 } 3096 spin_unlock(&svm_bo->list_lock); 3097 mmap_read_unlock(mm); 3098 3099 dma_fence_signal(&svm_bo->eviction_fence->base); 3100 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3101 * has been called in svm_migrate_vram_to_ram 3102 */ 3103 WARN_ONCE(kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3104 svm_range_bo_unref(svm_bo); 3105 } 3106 3107 static int 3108 svm_range_set_attr(struct kfd_process *p, uint64_t start, uint64_t size, 3109 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 3110 { 3111 struct amdkfd_process_info *process_info = p->kgd_process_info; 3112 struct mm_struct *mm = current->mm; 3113 struct list_head update_list; 3114 struct list_head insert_list; 3115 struct list_head remove_list; 3116 struct svm_range_list *svms; 3117 struct svm_range *prange; 3118 struct svm_range *next; 3119 int r = 0; 3120 3121 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3122 p->pasid, &p->svms, start, start + size - 1, size); 3123 3124 r = svm_range_check_attr(p, nattr, attrs); 3125 if (r) 3126 return r; 3127 3128 svms = &p->svms; 3129 3130 mutex_lock(&process_info->lock); 3131 3132 svm_range_list_lock_and_flush_work(svms, mm); 3133 3134 r = svm_range_is_valid(p, start, size); 3135 if (r) { 3136 pr_debug("invalid range r=%d\n", r); 3137 mmap_write_unlock(mm); 3138 goto out; 3139 } 3140 3141 mutex_lock(&svms->lock); 3142 3143 /* Add new range and split existing ranges as needed */ 3144 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3145 &insert_list, &remove_list); 3146 if (r) { 3147 mutex_unlock(&svms->lock); 3148 mmap_write_unlock(mm); 3149 goto out; 3150 } 3151 /* Apply changes as a transaction */ 3152 list_for_each_entry_safe(prange, next, &insert_list, insert_list) { 3153 svm_range_add_to_svms(prange); 3154 svm_range_add_notifier_locked(mm, prange); 3155 } 3156 list_for_each_entry(prange, &update_list, update_list) { 3157 svm_range_apply_attrs(p, prange, nattr, attrs); 3158 /* TODO: unmap ranges from GPU that lost access */ 3159 } 3160 list_for_each_entry_safe(prange, next, &remove_list, 3161 remove_list) { 3162 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3163 prange->svms, prange, prange->start, 3164 prange->last); 3165 svm_range_unlink(prange); 3166 svm_range_remove_notifier(prange); 3167 svm_range_free(prange); 3168 } 3169 3170 mmap_write_downgrade(mm); 3171 /* Trigger migrations and revalidate and map to GPUs as needed. If 3172 * this fails we may be left with partially completed actions. There 3173 * is no clean way of rolling back to the previous state in such a 3174 * case because the rollback wouldn't be guaranteed to work either. 3175 */ 3176 list_for_each_entry(prange, &update_list, update_list) { 3177 bool migrated; 3178 3179 mutex_lock(&prange->migrate_mutex); 3180 3181 r = svm_range_trigger_migration(mm, prange, &migrated); 3182 if (r) 3183 goto out_unlock_range; 3184 3185 if (migrated && !p->xnack_enabled) { 3186 pr_debug("restore_work will update mappings of GPUs\n"); 3187 mutex_unlock(&prange->migrate_mutex); 3188 continue; 3189 } 3190 3191 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3192 true, true); 3193 if (r) 3194 pr_debug("failed %d to map svm range\n", r); 3195 3196 out_unlock_range: 3197 mutex_unlock(&prange->migrate_mutex); 3198 if (r) 3199 break; 3200 } 3201 3202 svm_range_debug_dump(svms); 3203 3204 mutex_unlock(&svms->lock); 3205 mmap_read_unlock(mm); 3206 out: 3207 mutex_unlock(&process_info->lock); 3208 3209 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3210 &p->svms, start, start + size - 1, r); 3211 3212 return r; 3213 } 3214 3215 static int 3216 svm_range_get_attr(struct kfd_process *p, uint64_t start, uint64_t size, 3217 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 3218 { 3219 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3220 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3221 bool get_preferred_loc = false; 3222 bool get_prefetch_loc = false; 3223 bool get_granularity = false; 3224 bool get_accessible = false; 3225 bool get_flags = false; 3226 uint64_t last = start + size - 1UL; 3227 struct mm_struct *mm = current->mm; 3228 uint8_t granularity = 0xff; 3229 struct interval_tree_node *node; 3230 struct svm_range_list *svms; 3231 struct svm_range *prange; 3232 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3233 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3234 uint32_t flags_and = 0xffffffff; 3235 uint32_t flags_or = 0; 3236 int gpuidx; 3237 uint32_t i; 3238 int r = 0; 3239 3240 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3241 start + size - 1, nattr); 3242 3243 /* Flush pending deferred work to avoid racing with deferred actions from 3244 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3245 * can still race with get_attr because we don't hold the mmap lock. But that 3246 * would be a race condition in the application anyway, and undefined 3247 * behaviour is acceptable in that case. 3248 */ 3249 flush_work(&p->svms.deferred_list_work); 3250 3251 mmap_read_lock(mm); 3252 r = svm_range_is_valid(p, start, size); 3253 mmap_read_unlock(mm); 3254 if (r) { 3255 pr_debug("invalid range r=%d\n", r); 3256 return r; 3257 } 3258 3259 for (i = 0; i < nattr; i++) { 3260 switch (attrs[i].type) { 3261 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3262 get_preferred_loc = true; 3263 break; 3264 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3265 get_prefetch_loc = true; 3266 break; 3267 case KFD_IOCTL_SVM_ATTR_ACCESS: 3268 get_accessible = true; 3269 break; 3270 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3271 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3272 get_flags = true; 3273 break; 3274 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3275 get_granularity = true; 3276 break; 3277 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3278 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3279 fallthrough; 3280 default: 3281 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3282 return -EINVAL; 3283 } 3284 } 3285 3286 svms = &p->svms; 3287 3288 mutex_lock(&svms->lock); 3289 3290 node = interval_tree_iter_first(&svms->objects, start, last); 3291 if (!node) { 3292 pr_debug("range attrs not found return default values\n"); 3293 svm_range_set_default_attributes(&location, &prefetch_loc, 3294 &granularity, &flags_and); 3295 flags_or = flags_and; 3296 if (p->xnack_enabled) 3297 bitmap_copy(bitmap_access, svms->bitmap_supported, 3298 MAX_GPU_INSTANCE); 3299 else 3300 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3301 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3302 goto fill_values; 3303 } 3304 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3305 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3306 3307 while (node) { 3308 struct interval_tree_node *next; 3309 3310 prange = container_of(node, struct svm_range, it_node); 3311 next = interval_tree_iter_next(node, start, last); 3312 3313 if (get_preferred_loc) { 3314 if (prange->preferred_loc == 3315 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3316 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3317 location != prange->preferred_loc)) { 3318 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3319 get_preferred_loc = false; 3320 } else { 3321 location = prange->preferred_loc; 3322 } 3323 } 3324 if (get_prefetch_loc) { 3325 if (prange->prefetch_loc == 3326 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3327 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3328 prefetch_loc != prange->prefetch_loc)) { 3329 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3330 get_prefetch_loc = false; 3331 } else { 3332 prefetch_loc = prange->prefetch_loc; 3333 } 3334 } 3335 if (get_accessible) { 3336 bitmap_and(bitmap_access, bitmap_access, 3337 prange->bitmap_access, MAX_GPU_INSTANCE); 3338 bitmap_and(bitmap_aip, bitmap_aip, 3339 prange->bitmap_aip, MAX_GPU_INSTANCE); 3340 } 3341 if (get_flags) { 3342 flags_and &= prange->flags; 3343 flags_or |= prange->flags; 3344 } 3345 3346 if (get_granularity && prange->granularity < granularity) 3347 granularity = prange->granularity; 3348 3349 node = next; 3350 } 3351 fill_values: 3352 mutex_unlock(&svms->lock); 3353 3354 for (i = 0; i < nattr; i++) { 3355 switch (attrs[i].type) { 3356 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3357 attrs[i].value = location; 3358 break; 3359 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3360 attrs[i].value = prefetch_loc; 3361 break; 3362 case KFD_IOCTL_SVM_ATTR_ACCESS: 3363 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3364 attrs[i].value); 3365 if (gpuidx < 0) { 3366 pr_debug("invalid gpuid %x\n", attrs[i].value); 3367 return -EINVAL; 3368 } 3369 if (test_bit(gpuidx, bitmap_access)) 3370 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3371 else if (test_bit(gpuidx, bitmap_aip)) 3372 attrs[i].type = 3373 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3374 else 3375 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3376 break; 3377 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3378 attrs[i].value = flags_and; 3379 break; 3380 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3381 attrs[i].value = ~flags_or; 3382 break; 3383 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3384 attrs[i].value = (uint32_t)granularity; 3385 break; 3386 } 3387 } 3388 3389 return 0; 3390 } 3391 3392 int 3393 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 3394 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 3395 { 3396 int r; 3397 3398 start >>= PAGE_SHIFT; 3399 size >>= PAGE_SHIFT; 3400 3401 switch (op) { 3402 case KFD_IOCTL_SVM_OP_SET_ATTR: 3403 r = svm_range_set_attr(p, start, size, nattrs, attrs); 3404 break; 3405 case KFD_IOCTL_SVM_OP_GET_ATTR: 3406 r = svm_range_get_attr(p, start, size, nattrs, attrs); 3407 break; 3408 default: 3409 r = EINVAL; 3410 break; 3411 } 3412 3413 return r; 3414 } 3415