1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 410 struct kfd_process_device *pdd; 411 struct kfd_process *p; 412 struct mm_struct *mm; 413 414 mm = svm_bo->eviction_fence->mm; 415 /* 416 * The forked child process takes svm_bo device pages ref, svm_bo could be 417 * released after parent process is gone. 418 */ 419 p = kfd_lookup_process_by_mm(mm); 420 if (p) { 421 pdd = kfd_get_process_device_data(svm_bo->node, p); 422 if (pdd) 423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 424 kfd_unref_process(p); 425 } 426 mmput(mm); 427 } 428 429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 430 /* We're not in the eviction worker. Signal the fence. */ 431 dma_fence_signal(&svm_bo->eviction_fence->base); 432 dma_fence_put(&svm_bo->eviction_fence->base); 433 amdgpu_bo_unref(&svm_bo->bo); 434 kfree(svm_bo); 435 } 436 437 static void svm_range_bo_wq_release(struct work_struct *work) 438 { 439 struct svm_range_bo *svm_bo; 440 441 svm_bo = container_of(work, struct svm_range_bo, release_work); 442 svm_range_bo_release(&svm_bo->kref); 443 } 444 445 static void svm_range_bo_release_async(struct kref *kref) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(kref, struct svm_range_bo, kref); 450 pr_debug("svm_bo 0x%p\n", svm_bo); 451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 452 schedule_work(&svm_bo->release_work); 453 } 454 455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 456 { 457 kref_put(&svm_bo->kref, svm_range_bo_release_async); 458 } 459 460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 461 { 462 if (svm_bo) 463 kref_put(&svm_bo->kref, svm_range_bo_release); 464 } 465 466 static bool 467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 468 { 469 mutex_lock(&prange->lock); 470 if (!prange->svm_bo) { 471 mutex_unlock(&prange->lock); 472 return false; 473 } 474 if (prange->ttm_res) { 475 /* We still have a reference, all is well */ 476 mutex_unlock(&prange->lock); 477 return true; 478 } 479 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 480 /* 481 * Migrate from GPU to GPU, remove range from source svm_bo->node 482 * range list, and return false to allocate svm_bo from destination 483 * node. 484 */ 485 if (prange->svm_bo->node != node) { 486 mutex_unlock(&prange->lock); 487 488 spin_lock(&prange->svm_bo->list_lock); 489 list_del_init(&prange->svm_bo_list); 490 spin_unlock(&prange->svm_bo->list_lock); 491 492 svm_range_bo_unref(prange->svm_bo); 493 return false; 494 } 495 if (READ_ONCE(prange->svm_bo->evicting)) { 496 struct dma_fence *f; 497 struct svm_range_bo *svm_bo; 498 /* The BO is getting evicted, 499 * we need to get a new one 500 */ 501 mutex_unlock(&prange->lock); 502 svm_bo = prange->svm_bo; 503 f = dma_fence_get(&svm_bo->eviction_fence->base); 504 svm_range_bo_unref(prange->svm_bo); 505 /* wait for the fence to avoid long spin-loop 506 * at list_empty_careful 507 */ 508 dma_fence_wait(f, false); 509 dma_fence_put(f); 510 } else { 511 /* The BO was still around and we got 512 * a new reference to it 513 */ 514 mutex_unlock(&prange->lock); 515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 516 prange->svms, prange->start, prange->last); 517 518 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 519 return true; 520 } 521 522 } else { 523 mutex_unlock(&prange->lock); 524 } 525 526 /* We need a new svm_bo. Spin-loop to wait for concurrent 527 * svm_range_bo_release to finish removing this range from 528 * its range list and set prange->svm_bo to null. After this, 529 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 530 */ 531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 532 cond_resched(); 533 534 return false; 535 } 536 537 static struct svm_range_bo *svm_range_bo_new(void) 538 { 539 struct svm_range_bo *svm_bo; 540 541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 542 if (!svm_bo) 543 return NULL; 544 545 kref_init(&svm_bo->kref); 546 INIT_LIST_HEAD(&svm_bo->range_list); 547 spin_lock_init(&svm_bo->list_lock); 548 549 return svm_bo; 550 } 551 552 int 553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 554 bool clear) 555 { 556 struct kfd_process_device *pdd; 557 struct amdgpu_bo_param bp; 558 struct svm_range_bo *svm_bo; 559 struct amdgpu_bo_user *ubo; 560 struct amdgpu_bo *bo; 561 struct kfd_process *p; 562 struct mm_struct *mm; 563 int r; 564 565 p = container_of(prange->svms, struct kfd_process, svms); 566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 567 p->lead_thread->pid, prange->svms, 568 prange->start, prange->last); 569 570 if (svm_range_validate_svm_bo(node, prange)) 571 return 0; 572 573 svm_bo = svm_range_bo_new(); 574 if (!svm_bo) { 575 pr_debug("failed to alloc svm bo\n"); 576 return -ENOMEM; 577 } 578 mm = get_task_mm(p->lead_thread); 579 if (!mm) { 580 pr_debug("failed to get mm\n"); 581 kfree(svm_bo); 582 return -ESRCH; 583 } 584 svm_bo->node = node; 585 svm_bo->eviction_fence = 586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 587 mm, 588 svm_bo); 589 mmput(mm); 590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 591 svm_bo->evicting = 0; 592 memset(&bp, 0, sizeof(bp)); 593 bp.size = prange->npages * PAGE_SIZE; 594 bp.byte_align = PAGE_SIZE; 595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 599 bp.type = ttm_bo_type_device; 600 bp.resv = NULL; 601 if (node->xcp) 602 bp.xcp_id_plus1 = node->xcp->id + 1; 603 604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 605 if (r) { 606 pr_debug("failed %d to create bo\n", r); 607 goto create_bo_failed; 608 } 609 bo = &ubo->bo; 610 611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 612 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 613 bp.xcp_id_plus1 - 1); 614 615 r = amdgpu_bo_reserve(bo, true); 616 if (r) { 617 pr_debug("failed %d to reserve bo\n", r); 618 goto reserve_bo_failed; 619 } 620 621 if (clear) { 622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 623 if (r) { 624 pr_debug("failed %d to sync bo\n", r); 625 amdgpu_bo_unreserve(bo); 626 goto reserve_bo_failed; 627 } 628 } 629 630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 631 if (r) { 632 pr_debug("failed %d to reserve bo\n", r); 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 struct svm_range *tail = NULL; 1148 int r = svm_range_split(prange, prange->start, new_last, &tail); 1149 1150 if (!r) { 1151 list_add(&tail->list, insert_list); 1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1153 list_add(&tail->update_list, remap_list); 1154 } 1155 return r; 1156 } 1157 1158 static int 1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1160 struct list_head *insert_list, struct list_head *remap_list) 1161 { 1162 struct svm_range *head = NULL; 1163 int r = svm_range_split(prange, new_start, prange->last, &head); 1164 1165 if (!r) { 1166 list_add(&head->list, insert_list); 1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1168 list_add(&head->update_list, remap_list); 1169 } 1170 return r; 1171 } 1172 1173 static void 1174 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1175 struct svm_range *pchild, enum svm_work_list_ops op) 1176 { 1177 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1178 pchild, pchild->start, pchild->last, prange, op); 1179 1180 pchild->work_item.mm = mm; 1181 pchild->work_item.op = op; 1182 list_add_tail(&pchild->child_list, &prange->child_list); 1183 } 1184 1185 static bool 1186 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1187 { 1188 return (node_a->adev == node_b->adev || 1189 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1190 } 1191 1192 static uint64_t 1193 svm_range_get_pte_flags(struct kfd_node *node, 1194 struct svm_range *prange, int domain) 1195 { 1196 struct kfd_node *bo_node; 1197 uint32_t flags = prange->flags; 1198 uint32_t mapping_flags = 0; 1199 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1200 uint64_t pte_flags; 1201 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1202 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1203 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1204 unsigned int mtype_local; 1205 1206 if (domain == SVM_RANGE_VRAM_DOMAIN) 1207 bo_node = prange->svm_bo->node; 1208 1209 switch (gc_ip_version) { 1210 case IP_VERSION(9, 4, 1): 1211 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1212 if (bo_node == node) { 1213 mapping_flags |= coherent ? 1214 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1215 } else { 1216 mapping_flags |= coherent ? 1217 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1218 if (svm_nodes_in_same_hive(node, bo_node)) 1219 snoop = true; 1220 } 1221 } else { 1222 mapping_flags |= coherent ? 1223 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1224 } 1225 break; 1226 case IP_VERSION(9, 4, 2): 1227 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1228 if (bo_node == node) { 1229 mapping_flags |= coherent ? 1230 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1231 if (node->adev->gmc.xgmi.connected_to_cpu) 1232 snoop = true; 1233 } else { 1234 mapping_flags |= coherent ? 1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1236 if (svm_nodes_in_same_hive(node, bo_node)) 1237 snoop = true; 1238 } 1239 } else { 1240 mapping_flags |= coherent ? 1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1242 } 1243 break; 1244 case IP_VERSION(9, 4, 3): 1245 case IP_VERSION(9, 4, 4): 1246 case IP_VERSION(9, 5, 0): 1247 if (ext_coherent) 1248 mtype_local = (gc_ip_version < IP_VERSION(9, 5, 0) && !node->adev->rev_id) ? 1249 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_CC; 1250 else 1251 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1252 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1253 snoop = true; 1254 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1255 /* local HBM region close to partition */ 1256 if (bo_node->adev == node->adev && 1257 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1258 mapping_flags |= mtype_local; 1259 /* local HBM region far from partition or remote XGMI GPU 1260 * with regular system scope coherence 1261 */ 1262 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1263 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1264 /* PCIe P2P on GPUs pre-9.5.0 */ 1265 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1266 !svm_nodes_in_same_hive(bo_node, node)) 1267 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1268 /* Other remote memory */ 1269 else 1270 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1271 /* system memory accessed by the APU */ 1272 } else if (node->adev->flags & AMD_IS_APU) { 1273 /* On NUMA systems, locality is determined per-page 1274 * in amdgpu_gmc_override_vm_pte_flags 1275 */ 1276 if (num_possible_nodes() <= 1) 1277 mapping_flags |= mtype_local; 1278 else 1279 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1280 /* system memory accessed by the dGPU */ 1281 } else { 1282 if (gc_ip_version < IP_VERSION(9, 5, 0)) 1283 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1284 else 1285 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1286 } 1287 break; 1288 case IP_VERSION(12, 0, 0): 1289 case IP_VERSION(12, 0, 1): 1290 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1291 if (bo_node != node) 1292 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1293 } else { 1294 mapping_flags |= coherent ? 1295 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1296 } 1297 break; 1298 default: 1299 mapping_flags |= coherent ? 1300 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1301 } 1302 1303 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1304 1305 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1306 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1307 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1308 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1309 1310 pte_flags = AMDGPU_PTE_VALID; 1311 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1312 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1313 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1314 pte_flags |= AMDGPU_PTE_IS_PTE; 1315 1316 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1317 return pte_flags; 1318 } 1319 1320 static int 1321 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1322 uint64_t start, uint64_t last, 1323 struct dma_fence **fence) 1324 { 1325 uint64_t init_pte_value = 0; 1326 1327 pr_debug("[0x%llx 0x%llx]\n", start, last); 1328 1329 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1330 last, init_pte_value, 0, 0, NULL, NULL, 1331 fence); 1332 } 1333 1334 static int 1335 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1336 unsigned long last, uint32_t trigger) 1337 { 1338 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1339 struct kfd_process_device *pdd; 1340 struct dma_fence *fence = NULL; 1341 struct kfd_process *p; 1342 uint32_t gpuidx; 1343 int r = 0; 1344 1345 if (!prange->mapped_to_gpu) { 1346 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1347 prange, prange->start, prange->last); 1348 return 0; 1349 } 1350 1351 if (prange->start == start && prange->last == last) { 1352 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1353 prange->mapped_to_gpu = false; 1354 } 1355 1356 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1357 MAX_GPU_INSTANCE); 1358 p = container_of(prange->svms, struct kfd_process, svms); 1359 1360 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1361 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1362 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1363 if (!pdd) { 1364 pr_debug("failed to find device idx %d\n", gpuidx); 1365 return -EINVAL; 1366 } 1367 1368 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1369 start, last, trigger); 1370 1371 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1372 drm_priv_to_vm(pdd->drm_priv), 1373 start, last, &fence); 1374 if (r) 1375 break; 1376 1377 if (fence) { 1378 r = dma_fence_wait(fence, false); 1379 dma_fence_put(fence); 1380 fence = NULL; 1381 if (r) 1382 break; 1383 } 1384 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1385 } 1386 1387 return r; 1388 } 1389 1390 static int 1391 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1392 unsigned long offset, unsigned long npages, bool readonly, 1393 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1394 struct dma_fence **fence, bool flush_tlb) 1395 { 1396 struct amdgpu_device *adev = pdd->dev->adev; 1397 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1398 uint64_t pte_flags; 1399 unsigned long last_start; 1400 int last_domain; 1401 int r = 0; 1402 int64_t i, j; 1403 1404 last_start = prange->start + offset; 1405 1406 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1407 last_start, last_start + npages - 1, readonly); 1408 1409 for (i = offset; i < offset + npages; i++) { 1410 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1411 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1412 1413 /* Collect all pages in the same address range and memory domain 1414 * that can be mapped with a single call to update mapping. 1415 */ 1416 if (i < offset + npages - 1 && 1417 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1418 continue; 1419 1420 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1421 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1422 1423 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1424 if (readonly) 1425 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1426 1427 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1428 prange->svms, last_start, prange->start + i, 1429 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1430 pte_flags); 1431 1432 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1433 * different memory partition based on fpfn/lpfn, we should use 1434 * same vm_manager.vram_base_offset regardless memory partition. 1435 */ 1436 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1437 NULL, last_start, prange->start + i, 1438 pte_flags, 1439 (last_start - prange->start) << PAGE_SHIFT, 1440 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1441 NULL, dma_addr, &vm->last_update); 1442 1443 for (j = last_start - prange->start; j <= i; j++) 1444 dma_addr[j] |= last_domain; 1445 1446 if (r) { 1447 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1448 goto out; 1449 } 1450 last_start = prange->start + i + 1; 1451 } 1452 1453 r = amdgpu_vm_update_pdes(adev, vm, false); 1454 if (r) { 1455 pr_debug("failed %d to update directories 0x%lx\n", r, 1456 prange->start); 1457 goto out; 1458 } 1459 1460 if (fence) 1461 *fence = dma_fence_get(vm->last_update); 1462 1463 out: 1464 return r; 1465 } 1466 1467 static int 1468 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1469 unsigned long npages, bool readonly, 1470 unsigned long *bitmap, bool wait, bool flush_tlb) 1471 { 1472 struct kfd_process_device *pdd; 1473 struct amdgpu_device *bo_adev = NULL; 1474 struct kfd_process *p; 1475 struct dma_fence *fence = NULL; 1476 uint32_t gpuidx; 1477 int r = 0; 1478 1479 if (prange->svm_bo && prange->ttm_res) 1480 bo_adev = prange->svm_bo->node->adev; 1481 1482 p = container_of(prange->svms, struct kfd_process, svms); 1483 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1484 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1485 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1486 if (!pdd) { 1487 pr_debug("failed to find device idx %d\n", gpuidx); 1488 return -EINVAL; 1489 } 1490 1491 pdd = kfd_bind_process_to_device(pdd->dev, p); 1492 if (IS_ERR(pdd)) 1493 return -EINVAL; 1494 1495 if (bo_adev && pdd->dev->adev != bo_adev && 1496 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1497 pr_debug("cannot map to device idx %d\n", gpuidx); 1498 continue; 1499 } 1500 1501 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1502 prange->dma_addr[gpuidx], 1503 bo_adev, wait ? &fence : NULL, 1504 flush_tlb); 1505 if (r) 1506 break; 1507 1508 if (fence) { 1509 r = dma_fence_wait(fence, false); 1510 dma_fence_put(fence); 1511 fence = NULL; 1512 if (r) { 1513 pr_debug("failed %d to dma fence wait\n", r); 1514 break; 1515 } 1516 } 1517 1518 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1519 } 1520 1521 return r; 1522 } 1523 1524 struct svm_validate_context { 1525 struct kfd_process *process; 1526 struct svm_range *prange; 1527 bool intr; 1528 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1529 struct drm_exec exec; 1530 }; 1531 1532 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1533 { 1534 struct kfd_process_device *pdd; 1535 struct amdgpu_vm *vm; 1536 uint32_t gpuidx; 1537 int r; 1538 1539 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1540 drm_exec_until_all_locked(&ctx->exec) { 1541 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1542 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1543 if (!pdd) { 1544 pr_debug("failed to find device idx %d\n", gpuidx); 1545 r = -EINVAL; 1546 goto unreserve_out; 1547 } 1548 vm = drm_priv_to_vm(pdd->drm_priv); 1549 1550 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1551 drm_exec_retry_on_contention(&ctx->exec); 1552 if (unlikely(r)) { 1553 pr_debug("failed %d to reserve bo\n", r); 1554 goto unreserve_out; 1555 } 1556 } 1557 } 1558 1559 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1560 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1561 if (!pdd) { 1562 pr_debug("failed to find device idx %d\n", gpuidx); 1563 r = -EINVAL; 1564 goto unreserve_out; 1565 } 1566 1567 r = amdgpu_vm_validate(pdd->dev->adev, 1568 drm_priv_to_vm(pdd->drm_priv), NULL, 1569 svm_range_bo_validate, NULL); 1570 if (r) { 1571 pr_debug("failed %d validate pt bos\n", r); 1572 goto unreserve_out; 1573 } 1574 } 1575 1576 return 0; 1577 1578 unreserve_out: 1579 drm_exec_fini(&ctx->exec); 1580 return r; 1581 } 1582 1583 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1584 { 1585 drm_exec_fini(&ctx->exec); 1586 } 1587 1588 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1589 { 1590 struct kfd_process_device *pdd; 1591 1592 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1593 if (!pdd) 1594 return NULL; 1595 1596 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1597 } 1598 1599 /* 1600 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1601 * 1602 * To prevent concurrent destruction or change of range attributes, the 1603 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1604 * because that would block concurrent evictions and lead to deadlocks. To 1605 * serialize concurrent migrations or validations of the same range, the 1606 * prange->migrate_mutex must be held. 1607 * 1608 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1609 * eviction fence. 1610 * 1611 * The following sequence ensures race-free validation and GPU mapping: 1612 * 1613 * 1. Reserve page table (and SVM BO if range is in VRAM) 1614 * 2. hmm_range_fault to get page addresses (if system memory) 1615 * 3. DMA-map pages (if system memory) 1616 * 4-a. Take notifier lock 1617 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1618 * 4-c. Check that the range was not split or otherwise invalidated 1619 * 4-d. Update GPU page table 1620 * 4.e. Release notifier lock 1621 * 5. Release page table (and SVM BO) reservation 1622 */ 1623 static int svm_range_validate_and_map(struct mm_struct *mm, 1624 unsigned long map_start, unsigned long map_last, 1625 struct svm_range *prange, int32_t gpuidx, 1626 bool intr, bool wait, bool flush_tlb) 1627 { 1628 struct svm_validate_context *ctx; 1629 unsigned long start, end, addr; 1630 struct kfd_process *p; 1631 void *owner; 1632 int32_t idx; 1633 int r = 0; 1634 1635 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1636 if (!ctx) 1637 return -ENOMEM; 1638 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1639 ctx->prange = prange; 1640 ctx->intr = intr; 1641 1642 if (gpuidx < MAX_GPU_INSTANCE) { 1643 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1644 bitmap_set(ctx->bitmap, gpuidx, 1); 1645 } else if (ctx->process->xnack_enabled) { 1646 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1647 1648 /* If prefetch range to GPU, or GPU retry fault migrate range to 1649 * GPU, which has ACCESS attribute to the range, create mapping 1650 * on that GPU. 1651 */ 1652 if (prange->actual_loc) { 1653 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1654 prange->actual_loc); 1655 if (gpuidx < 0) { 1656 WARN_ONCE(1, "failed get device by id 0x%x\n", 1657 prange->actual_loc); 1658 r = -EINVAL; 1659 goto free_ctx; 1660 } 1661 if (test_bit(gpuidx, prange->bitmap_access)) 1662 bitmap_set(ctx->bitmap, gpuidx, 1); 1663 } 1664 1665 /* 1666 * If prange is already mapped or with always mapped flag, 1667 * update mapping on GPUs with ACCESS attribute 1668 */ 1669 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1670 if (prange->mapped_to_gpu || 1671 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1672 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1673 } 1674 } else { 1675 bitmap_or(ctx->bitmap, prange->bitmap_access, 1676 prange->bitmap_aip, MAX_GPU_INSTANCE); 1677 } 1678 1679 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1680 r = 0; 1681 goto free_ctx; 1682 } 1683 1684 if (prange->actual_loc && !prange->ttm_res) { 1685 /* This should never happen. actual_loc gets set by 1686 * svm_migrate_ram_to_vram after allocating a BO. 1687 */ 1688 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1689 r = -EINVAL; 1690 goto free_ctx; 1691 } 1692 1693 r = svm_range_reserve_bos(ctx, intr); 1694 if (r) 1695 goto free_ctx; 1696 1697 p = container_of(prange->svms, struct kfd_process, svms); 1698 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1699 MAX_GPU_INSTANCE)); 1700 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1701 if (kfd_svm_page_owner(p, idx) != owner) { 1702 owner = NULL; 1703 break; 1704 } 1705 } 1706 1707 start = map_start << PAGE_SHIFT; 1708 end = (map_last + 1) << PAGE_SHIFT; 1709 for (addr = start; !r && addr < end; ) { 1710 struct hmm_range *hmm_range = NULL; 1711 unsigned long map_start_vma; 1712 unsigned long map_last_vma; 1713 struct vm_area_struct *vma; 1714 unsigned long next = 0; 1715 unsigned long offset; 1716 unsigned long npages; 1717 bool readonly; 1718 1719 vma = vma_lookup(mm, addr); 1720 if (vma) { 1721 readonly = !(vma->vm_flags & VM_WRITE); 1722 1723 next = min(vma->vm_end, end); 1724 npages = (next - addr) >> PAGE_SHIFT; 1725 WRITE_ONCE(p->svms.faulting_task, current); 1726 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1727 readonly, owner, NULL, 1728 &hmm_range); 1729 WRITE_ONCE(p->svms.faulting_task, NULL); 1730 if (r) 1731 pr_debug("failed %d to get svm range pages\n", r); 1732 } else { 1733 r = -EFAULT; 1734 } 1735 1736 if (!r) { 1737 offset = (addr >> PAGE_SHIFT) - prange->start; 1738 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1739 hmm_range->hmm_pfns); 1740 if (r) 1741 pr_debug("failed %d to dma map range\n", r); 1742 } 1743 1744 svm_range_lock(prange); 1745 1746 /* Free backing memory of hmm_range if it was initialized 1747 * Overrride return value to TRY AGAIN only if prior returns 1748 * were successful 1749 */ 1750 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1751 pr_debug("hmm update the range, need validate again\n"); 1752 r = -EAGAIN; 1753 } 1754 1755 if (!r && !list_empty(&prange->child_list)) { 1756 pr_debug("range split by unmap in parallel, validate again\n"); 1757 r = -EAGAIN; 1758 } 1759 1760 if (!r) { 1761 map_start_vma = max(map_start, prange->start + offset); 1762 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1763 if (map_start_vma <= map_last_vma) { 1764 offset = map_start_vma - prange->start; 1765 npages = map_last_vma - map_start_vma + 1; 1766 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1767 ctx->bitmap, wait, flush_tlb); 1768 } 1769 } 1770 1771 if (!r && next == end) 1772 prange->mapped_to_gpu = true; 1773 1774 svm_range_unlock(prange); 1775 1776 addr = next; 1777 } 1778 1779 svm_range_unreserve_bos(ctx); 1780 if (!r) 1781 prange->validate_timestamp = ktime_get_boottime(); 1782 1783 free_ctx: 1784 kfree(ctx); 1785 1786 return r; 1787 } 1788 1789 /** 1790 * svm_range_list_lock_and_flush_work - flush pending deferred work 1791 * 1792 * @svms: the svm range list 1793 * @mm: the mm structure 1794 * 1795 * Context: Returns with mmap write lock held, pending deferred work flushed 1796 * 1797 */ 1798 void 1799 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1800 struct mm_struct *mm) 1801 { 1802 retry_flush_work: 1803 flush_work(&svms->deferred_list_work); 1804 mmap_write_lock(mm); 1805 1806 if (list_empty(&svms->deferred_range_list)) 1807 return; 1808 mmap_write_unlock(mm); 1809 pr_debug("retry flush\n"); 1810 goto retry_flush_work; 1811 } 1812 1813 static void svm_range_restore_work(struct work_struct *work) 1814 { 1815 struct delayed_work *dwork = to_delayed_work(work); 1816 struct amdkfd_process_info *process_info; 1817 struct svm_range_list *svms; 1818 struct svm_range *prange; 1819 struct kfd_process *p; 1820 struct mm_struct *mm; 1821 int evicted_ranges; 1822 int invalid; 1823 int r; 1824 1825 svms = container_of(dwork, struct svm_range_list, restore_work); 1826 evicted_ranges = atomic_read(&svms->evicted_ranges); 1827 if (!evicted_ranges) 1828 return; 1829 1830 pr_debug("restore svm ranges\n"); 1831 1832 p = container_of(svms, struct kfd_process, svms); 1833 process_info = p->kgd_process_info; 1834 1835 /* Keep mm reference when svm_range_validate_and_map ranges */ 1836 mm = get_task_mm(p->lead_thread); 1837 if (!mm) { 1838 pr_debug("svms 0x%p process mm gone\n", svms); 1839 return; 1840 } 1841 1842 mutex_lock(&process_info->lock); 1843 svm_range_list_lock_and_flush_work(svms, mm); 1844 mutex_lock(&svms->lock); 1845 1846 evicted_ranges = atomic_read(&svms->evicted_ranges); 1847 1848 list_for_each_entry(prange, &svms->list, list) { 1849 invalid = atomic_read(&prange->invalid); 1850 if (!invalid) 1851 continue; 1852 1853 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1854 prange->svms, prange, prange->start, prange->last, 1855 invalid); 1856 1857 /* 1858 * If range is migrating, wait for migration is done. 1859 */ 1860 mutex_lock(&prange->migrate_mutex); 1861 1862 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1863 MAX_GPU_INSTANCE, false, true, false); 1864 if (r) 1865 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1866 prange->start); 1867 1868 mutex_unlock(&prange->migrate_mutex); 1869 if (r) 1870 goto out_reschedule; 1871 1872 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1873 goto out_reschedule; 1874 } 1875 1876 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1877 evicted_ranges) 1878 goto out_reschedule; 1879 1880 evicted_ranges = 0; 1881 1882 r = kgd2kfd_resume_mm(mm); 1883 if (r) { 1884 /* No recovery from this failure. Probably the CP is 1885 * hanging. No point trying again. 1886 */ 1887 pr_debug("failed %d to resume KFD\n", r); 1888 } 1889 1890 pr_debug("restore svm ranges successfully\n"); 1891 1892 out_reschedule: 1893 mutex_unlock(&svms->lock); 1894 mmap_write_unlock(mm); 1895 mutex_unlock(&process_info->lock); 1896 1897 /* If validation failed, reschedule another attempt */ 1898 if (evicted_ranges) { 1899 pr_debug("reschedule to restore svm range\n"); 1900 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1901 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1902 1903 kfd_smi_event_queue_restore_rescheduled(mm); 1904 } 1905 mmput(mm); 1906 } 1907 1908 /** 1909 * svm_range_evict - evict svm range 1910 * @prange: svm range structure 1911 * @mm: current process mm_struct 1912 * @start: starting process queue number 1913 * @last: last process queue number 1914 * @event: mmu notifier event when range is evicted or migrated 1915 * 1916 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1917 * return to let CPU evict the buffer and proceed CPU pagetable update. 1918 * 1919 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1920 * If invalidation happens while restore work is running, restore work will 1921 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1922 * the queues. 1923 */ 1924 static int 1925 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1926 unsigned long start, unsigned long last, 1927 enum mmu_notifier_event event) 1928 { 1929 struct svm_range_list *svms = prange->svms; 1930 struct svm_range *pchild; 1931 struct kfd_process *p; 1932 int r = 0; 1933 1934 p = container_of(svms, struct kfd_process, svms); 1935 1936 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1937 svms, prange->start, prange->last, start, last); 1938 1939 if (!p->xnack_enabled || 1940 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1941 int evicted_ranges; 1942 bool mapped = prange->mapped_to_gpu; 1943 1944 list_for_each_entry(pchild, &prange->child_list, child_list) { 1945 if (!pchild->mapped_to_gpu) 1946 continue; 1947 mapped = true; 1948 mutex_lock_nested(&pchild->lock, 1); 1949 if (pchild->start <= last && pchild->last >= start) { 1950 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1951 pchild->start, pchild->last); 1952 atomic_inc(&pchild->invalid); 1953 } 1954 mutex_unlock(&pchild->lock); 1955 } 1956 1957 if (!mapped) 1958 return r; 1959 1960 if (prange->start <= last && prange->last >= start) 1961 atomic_inc(&prange->invalid); 1962 1963 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1964 if (evicted_ranges != 1) 1965 return r; 1966 1967 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1968 prange->svms, prange->start, prange->last); 1969 1970 /* First eviction, stop the queues */ 1971 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1972 if (r) 1973 pr_debug("failed to quiesce KFD\n"); 1974 1975 pr_debug("schedule to restore svm %p ranges\n", svms); 1976 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1977 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1978 } else { 1979 unsigned long s, l; 1980 uint32_t trigger; 1981 1982 if (event == MMU_NOTIFY_MIGRATE) 1983 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1984 else 1985 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1986 1987 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1988 prange->svms, start, last); 1989 list_for_each_entry(pchild, &prange->child_list, child_list) { 1990 mutex_lock_nested(&pchild->lock, 1); 1991 s = max(start, pchild->start); 1992 l = min(last, pchild->last); 1993 if (l >= s) 1994 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1995 mutex_unlock(&pchild->lock); 1996 } 1997 s = max(start, prange->start); 1998 l = min(last, prange->last); 1999 if (l >= s) 2000 svm_range_unmap_from_gpus(prange, s, l, trigger); 2001 } 2002 2003 return r; 2004 } 2005 2006 static struct svm_range *svm_range_clone(struct svm_range *old) 2007 { 2008 struct svm_range *new; 2009 2010 new = svm_range_new(old->svms, old->start, old->last, false); 2011 if (!new) 2012 return NULL; 2013 if (svm_range_copy_dma_addrs(new, old)) { 2014 svm_range_free(new, false); 2015 return NULL; 2016 } 2017 if (old->svm_bo) { 2018 new->ttm_res = old->ttm_res; 2019 new->offset = old->offset; 2020 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2021 spin_lock(&new->svm_bo->list_lock); 2022 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2023 spin_unlock(&new->svm_bo->list_lock); 2024 } 2025 new->flags = old->flags; 2026 new->preferred_loc = old->preferred_loc; 2027 new->prefetch_loc = old->prefetch_loc; 2028 new->actual_loc = old->actual_loc; 2029 new->granularity = old->granularity; 2030 new->mapped_to_gpu = old->mapped_to_gpu; 2031 new->vram_pages = old->vram_pages; 2032 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2033 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2034 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2035 2036 return new; 2037 } 2038 2039 void svm_range_set_max_pages(struct amdgpu_device *adev) 2040 { 2041 uint64_t max_pages; 2042 uint64_t pages, _pages; 2043 uint64_t min_pages = 0; 2044 int i, id; 2045 2046 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2047 if (adev->kfd.dev->nodes[i]->xcp) 2048 id = adev->kfd.dev->nodes[i]->xcp->id; 2049 else 2050 id = -1; 2051 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2052 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2053 pages = rounddown_pow_of_two(pages); 2054 min_pages = min_not_zero(min_pages, pages); 2055 } 2056 2057 do { 2058 max_pages = READ_ONCE(max_svm_range_pages); 2059 _pages = min_not_zero(max_pages, min_pages); 2060 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2061 } 2062 2063 static int 2064 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2065 uint64_t max_pages, struct list_head *insert_list, 2066 struct list_head *update_list) 2067 { 2068 struct svm_range *prange; 2069 uint64_t l; 2070 2071 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2072 max_pages, start, last); 2073 2074 while (last >= start) { 2075 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2076 2077 prange = svm_range_new(svms, start, l, true); 2078 if (!prange) 2079 return -ENOMEM; 2080 list_add(&prange->list, insert_list); 2081 list_add(&prange->update_list, update_list); 2082 2083 start = l + 1; 2084 } 2085 return 0; 2086 } 2087 2088 /** 2089 * svm_range_add - add svm range and handle overlap 2090 * @p: the range add to this process svms 2091 * @start: page size aligned 2092 * @size: page size aligned 2093 * @nattr: number of attributes 2094 * @attrs: array of attributes 2095 * @update_list: output, the ranges need validate and update GPU mapping 2096 * @insert_list: output, the ranges need insert to svms 2097 * @remove_list: output, the ranges are replaced and need remove from svms 2098 * @remap_list: output, remap unaligned svm ranges 2099 * 2100 * Check if the virtual address range has overlap with any existing ranges, 2101 * split partly overlapping ranges and add new ranges in the gaps. All changes 2102 * should be applied to the range_list and interval tree transactionally. If 2103 * any range split or allocation fails, the entire update fails. Therefore any 2104 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2105 * unchanged. 2106 * 2107 * If the transaction succeeds, the caller can update and insert clones and 2108 * new ranges, then free the originals. 2109 * 2110 * Otherwise the caller can free the clones and new ranges, while the old 2111 * svm_ranges remain unchanged. 2112 * 2113 * Context: Process context, caller must hold svms->lock 2114 * 2115 * Return: 2116 * 0 - OK, otherwise error code 2117 */ 2118 static int 2119 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2120 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2121 struct list_head *update_list, struct list_head *insert_list, 2122 struct list_head *remove_list, struct list_head *remap_list) 2123 { 2124 unsigned long last = start + size - 1UL; 2125 struct svm_range_list *svms = &p->svms; 2126 struct interval_tree_node *node; 2127 struct svm_range *prange; 2128 struct svm_range *tmp; 2129 struct list_head new_list; 2130 int r = 0; 2131 2132 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2133 2134 INIT_LIST_HEAD(update_list); 2135 INIT_LIST_HEAD(insert_list); 2136 INIT_LIST_HEAD(remove_list); 2137 INIT_LIST_HEAD(&new_list); 2138 INIT_LIST_HEAD(remap_list); 2139 2140 node = interval_tree_iter_first(&svms->objects, start, last); 2141 while (node) { 2142 struct interval_tree_node *next; 2143 unsigned long next_start; 2144 2145 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2146 node->last); 2147 2148 prange = container_of(node, struct svm_range, it_node); 2149 next = interval_tree_iter_next(node, start, last); 2150 next_start = min(node->last, last) + 1; 2151 2152 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2153 prange->mapped_to_gpu) { 2154 /* nothing to do */ 2155 } else if (node->start < start || node->last > last) { 2156 /* node intersects the update range and its attributes 2157 * will change. Clone and split it, apply updates only 2158 * to the overlapping part 2159 */ 2160 struct svm_range *old = prange; 2161 2162 prange = svm_range_clone(old); 2163 if (!prange) { 2164 r = -ENOMEM; 2165 goto out; 2166 } 2167 2168 list_add(&old->update_list, remove_list); 2169 list_add(&prange->list, insert_list); 2170 list_add(&prange->update_list, update_list); 2171 2172 if (node->start < start) { 2173 pr_debug("change old range start\n"); 2174 r = svm_range_split_head(prange, start, 2175 insert_list, remap_list); 2176 if (r) 2177 goto out; 2178 } 2179 if (node->last > last) { 2180 pr_debug("change old range last\n"); 2181 r = svm_range_split_tail(prange, last, 2182 insert_list, remap_list); 2183 if (r) 2184 goto out; 2185 } 2186 } else { 2187 /* The node is contained within start..last, 2188 * just update it 2189 */ 2190 list_add(&prange->update_list, update_list); 2191 } 2192 2193 /* insert a new node if needed */ 2194 if (node->start > start) { 2195 r = svm_range_split_new(svms, start, node->start - 1, 2196 READ_ONCE(max_svm_range_pages), 2197 &new_list, update_list); 2198 if (r) 2199 goto out; 2200 } 2201 2202 node = next; 2203 start = next_start; 2204 } 2205 2206 /* add a final range at the end if needed */ 2207 if (start <= last) 2208 r = svm_range_split_new(svms, start, last, 2209 READ_ONCE(max_svm_range_pages), 2210 &new_list, update_list); 2211 2212 out: 2213 if (r) { 2214 list_for_each_entry_safe(prange, tmp, insert_list, list) 2215 svm_range_free(prange, false); 2216 list_for_each_entry_safe(prange, tmp, &new_list, list) 2217 svm_range_free(prange, true); 2218 } else { 2219 list_splice(&new_list, insert_list); 2220 } 2221 2222 return r; 2223 } 2224 2225 static void 2226 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2227 struct svm_range *prange) 2228 { 2229 unsigned long start; 2230 unsigned long last; 2231 2232 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2233 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2234 2235 if (prange->start == start && prange->last == last) 2236 return; 2237 2238 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2239 prange->svms, prange, start, last, prange->start, 2240 prange->last); 2241 2242 if (start != 0 && last != 0) { 2243 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2244 svm_range_remove_notifier(prange); 2245 } 2246 prange->it_node.start = prange->start; 2247 prange->it_node.last = prange->last; 2248 2249 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2250 svm_range_add_notifier_locked(mm, prange); 2251 } 2252 2253 static void 2254 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2255 struct mm_struct *mm) 2256 { 2257 switch (prange->work_item.op) { 2258 case SVM_OP_NULL: 2259 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2260 svms, prange, prange->start, prange->last); 2261 break; 2262 case SVM_OP_UNMAP_RANGE: 2263 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2264 svms, prange, prange->start, prange->last); 2265 svm_range_unlink(prange); 2266 svm_range_remove_notifier(prange); 2267 svm_range_free(prange, true); 2268 break; 2269 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2270 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2271 svms, prange, prange->start, prange->last); 2272 svm_range_update_notifier_and_interval_tree(mm, prange); 2273 break; 2274 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2275 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2276 svms, prange, prange->start, prange->last); 2277 svm_range_update_notifier_and_interval_tree(mm, prange); 2278 /* TODO: implement deferred validation and mapping */ 2279 break; 2280 case SVM_OP_ADD_RANGE: 2281 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2282 prange->start, prange->last); 2283 svm_range_add_to_svms(prange); 2284 svm_range_add_notifier_locked(mm, prange); 2285 break; 2286 case SVM_OP_ADD_RANGE_AND_MAP: 2287 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2288 prange, prange->start, prange->last); 2289 svm_range_add_to_svms(prange); 2290 svm_range_add_notifier_locked(mm, prange); 2291 /* TODO: implement deferred validation and mapping */ 2292 break; 2293 default: 2294 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2295 prange->work_item.op); 2296 } 2297 } 2298 2299 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2300 { 2301 struct kfd_process_device *pdd; 2302 struct kfd_process *p; 2303 uint32_t i; 2304 2305 p = container_of(svms, struct kfd_process, svms); 2306 2307 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2308 pdd = p->pdds[i]; 2309 if (!pdd) 2310 continue; 2311 2312 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2313 2314 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2315 pdd->dev->adev->irq.retry_cam_enabled ? 2316 &pdd->dev->adev->irq.ih : 2317 &pdd->dev->adev->irq.ih1); 2318 2319 if (pdd->dev->adev->irq.retry_cam_enabled) 2320 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2321 &pdd->dev->adev->irq.ih_soft); 2322 2323 2324 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2325 } 2326 } 2327 2328 static void svm_range_deferred_list_work(struct work_struct *work) 2329 { 2330 struct svm_range_list *svms; 2331 struct svm_range *prange; 2332 struct mm_struct *mm; 2333 2334 svms = container_of(work, struct svm_range_list, deferred_list_work); 2335 pr_debug("enter svms 0x%p\n", svms); 2336 2337 spin_lock(&svms->deferred_list_lock); 2338 while (!list_empty(&svms->deferred_range_list)) { 2339 prange = list_first_entry(&svms->deferred_range_list, 2340 struct svm_range, deferred_list); 2341 spin_unlock(&svms->deferred_list_lock); 2342 2343 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2344 prange->start, prange->last, prange->work_item.op); 2345 2346 mm = prange->work_item.mm; 2347 2348 mmap_write_lock(mm); 2349 2350 /* Remove from deferred_list must be inside mmap write lock, for 2351 * two race cases: 2352 * 1. unmap_from_cpu may change work_item.op and add the range 2353 * to deferred_list again, cause use after free bug. 2354 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2355 * lock and continue because deferred_list is empty, but 2356 * deferred_list work is actually waiting for mmap lock. 2357 */ 2358 spin_lock(&svms->deferred_list_lock); 2359 list_del_init(&prange->deferred_list); 2360 spin_unlock(&svms->deferred_list_lock); 2361 2362 mutex_lock(&svms->lock); 2363 mutex_lock(&prange->migrate_mutex); 2364 while (!list_empty(&prange->child_list)) { 2365 struct svm_range *pchild; 2366 2367 pchild = list_first_entry(&prange->child_list, 2368 struct svm_range, child_list); 2369 pr_debug("child prange 0x%p op %d\n", pchild, 2370 pchild->work_item.op); 2371 list_del_init(&pchild->child_list); 2372 svm_range_handle_list_op(svms, pchild, mm); 2373 } 2374 mutex_unlock(&prange->migrate_mutex); 2375 2376 svm_range_handle_list_op(svms, prange, mm); 2377 mutex_unlock(&svms->lock); 2378 mmap_write_unlock(mm); 2379 2380 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2381 * last mm refcount, schedule release work to avoid circular locking 2382 */ 2383 mmput_async(mm); 2384 2385 spin_lock(&svms->deferred_list_lock); 2386 } 2387 spin_unlock(&svms->deferred_list_lock); 2388 pr_debug("exit svms 0x%p\n", svms); 2389 } 2390 2391 void 2392 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2393 struct mm_struct *mm, enum svm_work_list_ops op) 2394 { 2395 spin_lock(&svms->deferred_list_lock); 2396 /* if prange is on the deferred list */ 2397 if (!list_empty(&prange->deferred_list)) { 2398 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2399 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2400 if (op != SVM_OP_NULL && 2401 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2402 prange->work_item.op = op; 2403 } else { 2404 prange->work_item.op = op; 2405 2406 /* Pairs with mmput in deferred_list_work */ 2407 mmget(mm); 2408 prange->work_item.mm = mm; 2409 list_add_tail(&prange->deferred_list, 2410 &prange->svms->deferred_range_list); 2411 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2412 prange, prange->start, prange->last, op); 2413 } 2414 spin_unlock(&svms->deferred_list_lock); 2415 } 2416 2417 void schedule_deferred_list_work(struct svm_range_list *svms) 2418 { 2419 spin_lock(&svms->deferred_list_lock); 2420 if (!list_empty(&svms->deferred_range_list)) 2421 schedule_work(&svms->deferred_list_work); 2422 spin_unlock(&svms->deferred_list_lock); 2423 } 2424 2425 static void 2426 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2427 struct svm_range *prange, unsigned long start, 2428 unsigned long last) 2429 { 2430 struct svm_range *head; 2431 struct svm_range *tail; 2432 2433 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2434 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2435 prange->start, prange->last); 2436 return; 2437 } 2438 if (start > prange->last || last < prange->start) 2439 return; 2440 2441 head = tail = prange; 2442 if (start > prange->start) 2443 svm_range_split(prange, prange->start, start - 1, &tail); 2444 if (last < tail->last) 2445 svm_range_split(tail, last + 1, tail->last, &head); 2446 2447 if (head != prange && tail != prange) { 2448 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2449 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2450 } else if (tail != prange) { 2451 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2452 } else if (head != prange) { 2453 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2454 } else if (parent != prange) { 2455 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2456 } 2457 } 2458 2459 static void 2460 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2461 unsigned long start, unsigned long last) 2462 { 2463 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2464 struct svm_range_list *svms; 2465 struct svm_range *pchild; 2466 struct kfd_process *p; 2467 unsigned long s, l; 2468 bool unmap_parent; 2469 uint32_t i; 2470 2471 if (atomic_read(&prange->queue_refcount)) { 2472 int r; 2473 2474 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2475 prange->start << PAGE_SHIFT); 2476 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2477 if (r) 2478 pr_debug("failed %d to quiesce KFD queues\n", r); 2479 } 2480 2481 p = kfd_lookup_process_by_mm(mm); 2482 if (!p) 2483 return; 2484 svms = &p->svms; 2485 2486 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2487 prange, prange->start, prange->last, start, last); 2488 2489 /* calculate time stamps that are used to decide which page faults need be 2490 * dropped or handled before unmap pages from gpu vm 2491 */ 2492 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2493 struct kfd_process_device *pdd; 2494 struct amdgpu_device *adev; 2495 struct amdgpu_ih_ring *ih; 2496 uint32_t checkpoint_wptr; 2497 2498 pdd = p->pdds[i]; 2499 if (!pdd) 2500 continue; 2501 2502 adev = pdd->dev->adev; 2503 2504 /* Check and drain ih1 ring if cam not available */ 2505 if (adev->irq.ih1.ring_size) { 2506 ih = &adev->irq.ih1; 2507 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2508 if (ih->rptr != checkpoint_wptr) { 2509 svms->checkpoint_ts[i] = 2510 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2511 continue; 2512 } 2513 } 2514 2515 /* check if dev->irq.ih_soft is not empty */ 2516 ih = &adev->irq.ih_soft; 2517 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2518 if (ih->rptr != checkpoint_wptr) 2519 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2520 } 2521 2522 unmap_parent = start <= prange->start && last >= prange->last; 2523 2524 list_for_each_entry(pchild, &prange->child_list, child_list) { 2525 mutex_lock_nested(&pchild->lock, 1); 2526 s = max(start, pchild->start); 2527 l = min(last, pchild->last); 2528 if (l >= s) 2529 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2530 svm_range_unmap_split(mm, prange, pchild, start, last); 2531 mutex_unlock(&pchild->lock); 2532 } 2533 s = max(start, prange->start); 2534 l = min(last, prange->last); 2535 if (l >= s) 2536 svm_range_unmap_from_gpus(prange, s, l, trigger); 2537 svm_range_unmap_split(mm, prange, prange, start, last); 2538 2539 if (unmap_parent) 2540 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2541 else 2542 svm_range_add_list_work(svms, prange, mm, 2543 SVM_OP_UPDATE_RANGE_NOTIFIER); 2544 schedule_deferred_list_work(svms); 2545 2546 kfd_unref_process(p); 2547 } 2548 2549 /** 2550 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2551 * @mni: mmu_interval_notifier struct 2552 * @range: mmu_notifier_range struct 2553 * @cur_seq: value to pass to mmu_interval_set_seq() 2554 * 2555 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2556 * is from migration, or CPU page invalidation callback. 2557 * 2558 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2559 * work thread, and split prange if only part of prange is unmapped. 2560 * 2561 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2562 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2563 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2564 * update GPU mapping to recover. 2565 * 2566 * Context: mmap lock, notifier_invalidate_start lock are held 2567 * for invalidate event, prange lock is held if this is from migration 2568 */ 2569 static bool 2570 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2571 const struct mmu_notifier_range *range, 2572 unsigned long cur_seq) 2573 { 2574 struct svm_range *prange; 2575 unsigned long start; 2576 unsigned long last; 2577 2578 if (range->event == MMU_NOTIFY_RELEASE) 2579 return true; 2580 if (!mmget_not_zero(mni->mm)) 2581 return true; 2582 2583 start = mni->interval_tree.start; 2584 last = mni->interval_tree.last; 2585 start = max(start, range->start) >> PAGE_SHIFT; 2586 last = min(last, range->end - 1) >> PAGE_SHIFT; 2587 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2588 start, last, range->start >> PAGE_SHIFT, 2589 (range->end - 1) >> PAGE_SHIFT, 2590 mni->interval_tree.start >> PAGE_SHIFT, 2591 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2592 2593 prange = container_of(mni, struct svm_range, notifier); 2594 2595 svm_range_lock(prange); 2596 mmu_interval_set_seq(mni, cur_seq); 2597 2598 switch (range->event) { 2599 case MMU_NOTIFY_UNMAP: 2600 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2601 break; 2602 default: 2603 svm_range_evict(prange, mni->mm, start, last, range->event); 2604 break; 2605 } 2606 2607 svm_range_unlock(prange); 2608 mmput(mni->mm); 2609 2610 return true; 2611 } 2612 2613 /** 2614 * svm_range_from_addr - find svm range from fault address 2615 * @svms: svm range list header 2616 * @addr: address to search range interval tree, in pages 2617 * @parent: parent range if range is on child list 2618 * 2619 * Context: The caller must hold svms->lock 2620 * 2621 * Return: the svm_range found or NULL 2622 */ 2623 struct svm_range * 2624 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2625 struct svm_range **parent) 2626 { 2627 struct interval_tree_node *node; 2628 struct svm_range *prange; 2629 struct svm_range *pchild; 2630 2631 node = interval_tree_iter_first(&svms->objects, addr, addr); 2632 if (!node) 2633 return NULL; 2634 2635 prange = container_of(node, struct svm_range, it_node); 2636 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2637 addr, prange->start, prange->last, node->start, node->last); 2638 2639 if (addr >= prange->start && addr <= prange->last) { 2640 if (parent) 2641 *parent = prange; 2642 return prange; 2643 } 2644 list_for_each_entry(pchild, &prange->child_list, child_list) 2645 if (addr >= pchild->start && addr <= pchild->last) { 2646 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2647 addr, pchild->start, pchild->last); 2648 if (parent) 2649 *parent = prange; 2650 return pchild; 2651 } 2652 2653 return NULL; 2654 } 2655 2656 /* svm_range_best_restore_location - decide the best fault restore location 2657 * @prange: svm range structure 2658 * @adev: the GPU on which vm fault happened 2659 * 2660 * This is only called when xnack is on, to decide the best location to restore 2661 * the range mapping after GPU vm fault. Caller uses the best location to do 2662 * migration if actual loc is not best location, then update GPU page table 2663 * mapping to the best location. 2664 * 2665 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2666 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2667 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2668 * if range actual loc is cpu, best_loc is cpu 2669 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2670 * range actual loc. 2671 * Otherwise, GPU no access, best_loc is -1. 2672 * 2673 * Return: 2674 * -1 means vm fault GPU no access 2675 * 0 for CPU or GPU id 2676 */ 2677 static int32_t 2678 svm_range_best_restore_location(struct svm_range *prange, 2679 struct kfd_node *node, 2680 int32_t *gpuidx) 2681 { 2682 struct kfd_node *bo_node, *preferred_node; 2683 struct kfd_process *p; 2684 uint32_t gpuid; 2685 int r; 2686 2687 p = container_of(prange->svms, struct kfd_process, svms); 2688 2689 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2690 if (r < 0) { 2691 pr_debug("failed to get gpuid from kgd\n"); 2692 return -1; 2693 } 2694 2695 if (node->adev->flags & AMD_IS_APU) 2696 return 0; 2697 2698 if (prange->preferred_loc == gpuid || 2699 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2700 return prange->preferred_loc; 2701 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2702 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2703 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2704 return prange->preferred_loc; 2705 /* fall through */ 2706 } 2707 2708 if (test_bit(*gpuidx, prange->bitmap_access)) 2709 return gpuid; 2710 2711 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2712 if (!prange->actual_loc) 2713 return 0; 2714 2715 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2716 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2717 return prange->actual_loc; 2718 else 2719 return 0; 2720 } 2721 2722 return -1; 2723 } 2724 2725 static int 2726 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2727 unsigned long *start, unsigned long *last, 2728 bool *is_heap_stack) 2729 { 2730 struct vm_area_struct *vma; 2731 struct interval_tree_node *node; 2732 struct rb_node *rb_node; 2733 unsigned long start_limit, end_limit; 2734 2735 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2736 if (!vma) { 2737 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2738 return -EFAULT; 2739 } 2740 2741 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2742 2743 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2744 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2745 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2746 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2747 2748 /* First range that starts after the fault address */ 2749 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2750 if (node) { 2751 end_limit = min(end_limit, node->start); 2752 /* Last range that ends before the fault address */ 2753 rb_node = rb_prev(&node->rb); 2754 } else { 2755 /* Last range must end before addr because 2756 * there was no range after addr 2757 */ 2758 rb_node = rb_last(&p->svms.objects.rb_root); 2759 } 2760 if (rb_node) { 2761 node = container_of(rb_node, struct interval_tree_node, rb); 2762 if (node->last >= addr) { 2763 WARN(1, "Overlap with prev node and page fault addr\n"); 2764 return -EFAULT; 2765 } 2766 start_limit = max(start_limit, node->last + 1); 2767 } 2768 2769 *start = start_limit; 2770 *last = end_limit - 1; 2771 2772 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2773 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2774 *start, *last, *is_heap_stack); 2775 2776 return 0; 2777 } 2778 2779 static int 2780 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2781 uint64_t *bo_s, uint64_t *bo_l) 2782 { 2783 struct amdgpu_bo_va_mapping *mapping; 2784 struct interval_tree_node *node; 2785 struct amdgpu_bo *bo = NULL; 2786 unsigned long userptr; 2787 uint32_t i; 2788 int r; 2789 2790 for (i = 0; i < p->n_pdds; i++) { 2791 struct amdgpu_vm *vm; 2792 2793 if (!p->pdds[i]->drm_priv) 2794 continue; 2795 2796 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2797 r = amdgpu_bo_reserve(vm->root.bo, false); 2798 if (r) 2799 return r; 2800 2801 /* Check userptr by searching entire vm->va interval tree */ 2802 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2803 while (node) { 2804 mapping = container_of((struct rb_node *)node, 2805 struct amdgpu_bo_va_mapping, rb); 2806 bo = mapping->bo_va->base.bo; 2807 2808 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2809 start << PAGE_SHIFT, 2810 last << PAGE_SHIFT, 2811 &userptr)) { 2812 node = interval_tree_iter_next(node, 0, ~0ULL); 2813 continue; 2814 } 2815 2816 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2817 start, last); 2818 if (bo_s && bo_l) { 2819 *bo_s = userptr >> PAGE_SHIFT; 2820 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2821 } 2822 amdgpu_bo_unreserve(vm->root.bo); 2823 return -EADDRINUSE; 2824 } 2825 amdgpu_bo_unreserve(vm->root.bo); 2826 } 2827 return 0; 2828 } 2829 2830 static struct 2831 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2832 struct kfd_process *p, 2833 struct mm_struct *mm, 2834 int64_t addr) 2835 { 2836 struct svm_range *prange = NULL; 2837 unsigned long start, last; 2838 uint32_t gpuid, gpuidx; 2839 bool is_heap_stack; 2840 uint64_t bo_s = 0; 2841 uint64_t bo_l = 0; 2842 int r; 2843 2844 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2845 &is_heap_stack)) 2846 return NULL; 2847 2848 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2849 if (r != -EADDRINUSE) 2850 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2851 2852 if (r == -EADDRINUSE) { 2853 if (addr >= bo_s && addr <= bo_l) 2854 return NULL; 2855 2856 /* Create one page svm range if 2MB range overlapping */ 2857 start = addr; 2858 last = addr; 2859 } 2860 2861 prange = svm_range_new(&p->svms, start, last, true); 2862 if (!prange) { 2863 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2864 return NULL; 2865 } 2866 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2867 pr_debug("failed to get gpuid from kgd\n"); 2868 svm_range_free(prange, true); 2869 return NULL; 2870 } 2871 2872 if (is_heap_stack) 2873 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2874 2875 svm_range_add_to_svms(prange); 2876 svm_range_add_notifier_locked(mm, prange); 2877 2878 return prange; 2879 } 2880 2881 /* svm_range_skip_recover - decide if prange can be recovered 2882 * @prange: svm range structure 2883 * 2884 * GPU vm retry fault handle skip recover the range for cases: 2885 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2886 * deferred list work will drain the stale fault before free the prange. 2887 * 2. prange is on deferred list to add interval notifier after split, or 2888 * 3. prange is child range, it is split from parent prange, recover later 2889 * after interval notifier is added. 2890 * 2891 * Return: true to skip recover, false to recover 2892 */ 2893 static bool svm_range_skip_recover(struct svm_range *prange) 2894 { 2895 struct svm_range_list *svms = prange->svms; 2896 2897 spin_lock(&svms->deferred_list_lock); 2898 if (list_empty(&prange->deferred_list) && 2899 list_empty(&prange->child_list)) { 2900 spin_unlock(&svms->deferred_list_lock); 2901 return false; 2902 } 2903 spin_unlock(&svms->deferred_list_lock); 2904 2905 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2906 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2907 svms, prange, prange->start, prange->last); 2908 return true; 2909 } 2910 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2911 prange->work_item.op == SVM_OP_ADD_RANGE) { 2912 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2913 svms, prange, prange->start, prange->last); 2914 return true; 2915 } 2916 return false; 2917 } 2918 2919 static void 2920 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2921 int32_t gpuidx) 2922 { 2923 struct kfd_process_device *pdd; 2924 2925 /* fault is on different page of same range 2926 * or fault is skipped to recover later 2927 * or fault is on invalid virtual address 2928 */ 2929 if (gpuidx == MAX_GPU_INSTANCE) { 2930 uint32_t gpuid; 2931 int r; 2932 2933 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2934 if (r < 0) 2935 return; 2936 } 2937 2938 /* fault is recovered 2939 * or fault cannot recover because GPU no access on the range 2940 */ 2941 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2942 if (pdd) 2943 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2944 } 2945 2946 static bool 2947 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2948 { 2949 unsigned long requested = VM_READ; 2950 2951 if (write_fault) 2952 requested |= VM_WRITE; 2953 2954 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2955 vma->vm_flags); 2956 return (vma->vm_flags & requested) == requested; 2957 } 2958 2959 int 2960 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2961 uint32_t vmid, uint32_t node_id, 2962 uint64_t addr, uint64_t ts, bool write_fault) 2963 { 2964 unsigned long start, last, size; 2965 struct mm_struct *mm = NULL; 2966 struct svm_range_list *svms; 2967 struct svm_range *prange; 2968 struct kfd_process *p; 2969 ktime_t timestamp = ktime_get_boottime(); 2970 struct kfd_node *node; 2971 int32_t best_loc; 2972 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2973 bool write_locked = false; 2974 struct vm_area_struct *vma; 2975 bool migration = false; 2976 int r = 0; 2977 2978 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2979 pr_debug("device does not support SVM\n"); 2980 return -EFAULT; 2981 } 2982 2983 p = kfd_lookup_process_by_pasid(pasid, NULL); 2984 if (!p) { 2985 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2986 return 0; 2987 } 2988 svms = &p->svms; 2989 2990 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2991 2992 if (atomic_read(&svms->drain_pagefaults)) { 2993 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 2994 r = 0; 2995 goto out; 2996 } 2997 2998 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2999 if (!node) { 3000 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3001 vmid); 3002 r = -EFAULT; 3003 goto out; 3004 } 3005 3006 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3007 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3008 r = -EFAULT; 3009 goto out; 3010 } 3011 3012 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3013 if (svms->checkpoint_ts[gpuidx] != 0) { 3014 if (amdgpu_ih_ts_after(ts, svms->checkpoint_ts[gpuidx])) { 3015 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3016 r = 0; 3017 goto out; 3018 } else 3019 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3020 * to zero to avoid following ts wrap around give wrong comparing 3021 */ 3022 svms->checkpoint_ts[gpuidx] = 0; 3023 } 3024 3025 if (!p->xnack_enabled) { 3026 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3027 r = -EFAULT; 3028 goto out; 3029 } 3030 3031 /* p->lead_thread is available as kfd_process_wq_release flush the work 3032 * before releasing task ref. 3033 */ 3034 mm = get_task_mm(p->lead_thread); 3035 if (!mm) { 3036 pr_debug("svms 0x%p failed to get mm\n", svms); 3037 r = 0; 3038 goto out; 3039 } 3040 3041 mmap_read_lock(mm); 3042 retry_write_locked: 3043 mutex_lock(&svms->lock); 3044 prange = svm_range_from_addr(svms, addr, NULL); 3045 if (!prange) { 3046 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3047 svms, addr); 3048 if (!write_locked) { 3049 /* Need the write lock to create new range with MMU notifier. 3050 * Also flush pending deferred work to make sure the interval 3051 * tree is up to date before we add a new range 3052 */ 3053 mutex_unlock(&svms->lock); 3054 mmap_read_unlock(mm); 3055 mmap_write_lock(mm); 3056 write_locked = true; 3057 goto retry_write_locked; 3058 } 3059 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3060 if (!prange) { 3061 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3062 svms, addr); 3063 mmap_write_downgrade(mm); 3064 r = -EFAULT; 3065 goto out_unlock_svms; 3066 } 3067 } 3068 if (write_locked) 3069 mmap_write_downgrade(mm); 3070 3071 mutex_lock(&prange->migrate_mutex); 3072 3073 if (svm_range_skip_recover(prange)) { 3074 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3075 r = 0; 3076 goto out_unlock_range; 3077 } 3078 3079 /* skip duplicate vm fault on different pages of same range */ 3080 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3081 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3082 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3083 svms, prange->start, prange->last); 3084 r = 0; 3085 goto out_unlock_range; 3086 } 3087 3088 /* __do_munmap removed VMA, return success as we are handling stale 3089 * retry fault. 3090 */ 3091 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3092 if (!vma) { 3093 pr_debug("address 0x%llx VMA is removed\n", addr); 3094 r = 0; 3095 goto out_unlock_range; 3096 } 3097 3098 if (!svm_fault_allowed(vma, write_fault)) { 3099 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3100 write_fault ? "write" : "read"); 3101 r = -EPERM; 3102 goto out_unlock_range; 3103 } 3104 3105 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3106 if (best_loc == -1) { 3107 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3108 svms, prange->start, prange->last); 3109 r = -EACCES; 3110 goto out_unlock_range; 3111 } 3112 3113 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3114 svms, prange->start, prange->last, best_loc, 3115 prange->actual_loc); 3116 3117 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3118 write_fault, timestamp); 3119 3120 /* Align migration range start and size to granularity size */ 3121 size = 1UL << prange->granularity; 3122 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3123 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3124 if (prange->actual_loc != 0 || best_loc != 0) { 3125 if (best_loc) { 3126 r = svm_migrate_to_vram(prange, best_loc, start, last, 3127 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3128 if (r) { 3129 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3130 r, addr); 3131 /* Fallback to system memory if migration to 3132 * VRAM failed 3133 */ 3134 if (prange->actual_loc && prange->actual_loc != best_loc) 3135 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3136 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3137 else 3138 r = 0; 3139 } 3140 } else { 3141 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3142 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3143 } 3144 if (r) { 3145 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3146 r, svms, start, last); 3147 goto out_migrate_fail; 3148 } else { 3149 migration = true; 3150 } 3151 } 3152 3153 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3154 false, false); 3155 if (r) 3156 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3157 r, svms, start, last); 3158 3159 out_migrate_fail: 3160 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3161 migration); 3162 3163 out_unlock_range: 3164 mutex_unlock(&prange->migrate_mutex); 3165 out_unlock_svms: 3166 mutex_unlock(&svms->lock); 3167 mmap_read_unlock(mm); 3168 3169 svm_range_count_fault(node, p, gpuidx); 3170 3171 mmput(mm); 3172 out: 3173 kfd_unref_process(p); 3174 3175 if (r == -EAGAIN) { 3176 pr_debug("recover vm fault later\n"); 3177 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3178 r = 0; 3179 } 3180 return r; 3181 } 3182 3183 int 3184 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3185 { 3186 struct svm_range *prange, *pchild; 3187 uint64_t reserved_size = 0; 3188 uint64_t size; 3189 int r = 0; 3190 3191 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3192 3193 mutex_lock(&p->svms.lock); 3194 3195 list_for_each_entry(prange, &p->svms.list, list) { 3196 svm_range_lock(prange); 3197 list_for_each_entry(pchild, &prange->child_list, child_list) { 3198 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3199 if (xnack_enabled) { 3200 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3201 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3202 } else { 3203 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3204 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3205 if (r) 3206 goto out_unlock; 3207 reserved_size += size; 3208 } 3209 } 3210 3211 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3212 if (xnack_enabled) { 3213 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3214 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3215 } else { 3216 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3217 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3218 if (r) 3219 goto out_unlock; 3220 reserved_size += size; 3221 } 3222 out_unlock: 3223 svm_range_unlock(prange); 3224 if (r) 3225 break; 3226 } 3227 3228 if (r) 3229 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3230 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3231 else 3232 /* Change xnack mode must be inside svms lock, to avoid race with 3233 * svm_range_deferred_list_work unreserve memory in parallel. 3234 */ 3235 p->xnack_enabled = xnack_enabled; 3236 3237 mutex_unlock(&p->svms.lock); 3238 return r; 3239 } 3240 3241 void svm_range_list_fini(struct kfd_process *p) 3242 { 3243 struct svm_range *prange; 3244 struct svm_range *next; 3245 3246 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3247 &p->svms); 3248 3249 cancel_delayed_work_sync(&p->svms.restore_work); 3250 3251 /* Ensure list work is finished before process is destroyed */ 3252 flush_work(&p->svms.deferred_list_work); 3253 3254 /* 3255 * Ensure no retry fault comes in afterwards, as page fault handler will 3256 * not find kfd process and take mm lock to recover fault. 3257 * stop kfd page fault handing, then wait pending page faults got drained 3258 */ 3259 atomic_set(&p->svms.drain_pagefaults, 1); 3260 svm_range_drain_retry_fault(&p->svms); 3261 3262 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3263 svm_range_unlink(prange); 3264 svm_range_remove_notifier(prange); 3265 svm_range_free(prange, true); 3266 } 3267 3268 mutex_destroy(&p->svms.lock); 3269 3270 pr_debug("process pid %d svms 0x%p done\n", 3271 p->lead_thread->pid, &p->svms); 3272 } 3273 3274 int svm_range_list_init(struct kfd_process *p) 3275 { 3276 struct svm_range_list *svms = &p->svms; 3277 int i; 3278 3279 svms->objects = RB_ROOT_CACHED; 3280 mutex_init(&svms->lock); 3281 INIT_LIST_HEAD(&svms->list); 3282 atomic_set(&svms->evicted_ranges, 0); 3283 atomic_set(&svms->drain_pagefaults, 0); 3284 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3285 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3286 INIT_LIST_HEAD(&svms->deferred_range_list); 3287 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3288 spin_lock_init(&svms->deferred_list_lock); 3289 3290 for (i = 0; i < p->n_pdds; i++) 3291 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3292 bitmap_set(svms->bitmap_supported, i, 1); 3293 3294 /* Value of default granularity cannot exceed 0x1B, the 3295 * number of pages supported by a 4-level paging table 3296 */ 3297 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3298 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3299 3300 return 0; 3301 } 3302 3303 /** 3304 * svm_range_check_vm - check if virtual address range mapped already 3305 * @p: current kfd_process 3306 * @start: range start address, in pages 3307 * @last: range last address, in pages 3308 * @bo_s: mapping start address in pages if address range already mapped 3309 * @bo_l: mapping last address in pages if address range already mapped 3310 * 3311 * The purpose is to avoid virtual address ranges already allocated by 3312 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3313 * It looks for each pdd in the kfd_process. 3314 * 3315 * Context: Process context 3316 * 3317 * Return 0 - OK, if the range is not mapped. 3318 * Otherwise error code: 3319 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3320 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3321 * a signal. Release all buffer reservations and return to user-space. 3322 */ 3323 static int 3324 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3325 uint64_t *bo_s, uint64_t *bo_l) 3326 { 3327 struct amdgpu_bo_va_mapping *mapping; 3328 struct interval_tree_node *node; 3329 uint32_t i; 3330 int r; 3331 3332 for (i = 0; i < p->n_pdds; i++) { 3333 struct amdgpu_vm *vm; 3334 3335 if (!p->pdds[i]->drm_priv) 3336 continue; 3337 3338 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3339 r = amdgpu_bo_reserve(vm->root.bo, false); 3340 if (r) 3341 return r; 3342 3343 node = interval_tree_iter_first(&vm->va, start, last); 3344 if (node) { 3345 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3346 start, last); 3347 mapping = container_of((struct rb_node *)node, 3348 struct amdgpu_bo_va_mapping, rb); 3349 if (bo_s && bo_l) { 3350 *bo_s = mapping->start; 3351 *bo_l = mapping->last; 3352 } 3353 amdgpu_bo_unreserve(vm->root.bo); 3354 return -EADDRINUSE; 3355 } 3356 amdgpu_bo_unreserve(vm->root.bo); 3357 } 3358 3359 return 0; 3360 } 3361 3362 /** 3363 * svm_range_is_valid - check if virtual address range is valid 3364 * @p: current kfd_process 3365 * @start: range start address, in pages 3366 * @size: range size, in pages 3367 * 3368 * Valid virtual address range means it belongs to one or more VMAs 3369 * 3370 * Context: Process context 3371 * 3372 * Return: 3373 * 0 - OK, otherwise error code 3374 */ 3375 static int 3376 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3377 { 3378 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3379 struct vm_area_struct *vma; 3380 unsigned long end; 3381 unsigned long start_unchg = start; 3382 3383 start <<= PAGE_SHIFT; 3384 end = start + (size << PAGE_SHIFT); 3385 do { 3386 vma = vma_lookup(p->mm, start); 3387 if (!vma || (vma->vm_flags & device_vma)) 3388 return -EFAULT; 3389 start = min(end, vma->vm_end); 3390 } while (start < end); 3391 3392 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3393 NULL); 3394 } 3395 3396 /** 3397 * svm_range_best_prefetch_location - decide the best prefetch location 3398 * @prange: svm range structure 3399 * 3400 * For xnack off: 3401 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3402 * can be CPU or GPU. 3403 * 3404 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3405 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3406 * the best prefetch location is always CPU, because GPU can not have coherent 3407 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3408 * 3409 * For xnack on: 3410 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3411 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3412 * 3413 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3414 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3415 * prefetch location is always CPU. 3416 * 3417 * Context: Process context 3418 * 3419 * Return: 3420 * 0 for CPU or GPU id 3421 */ 3422 static uint32_t 3423 svm_range_best_prefetch_location(struct svm_range *prange) 3424 { 3425 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3426 uint32_t best_loc = prange->prefetch_loc; 3427 struct kfd_process_device *pdd; 3428 struct kfd_node *bo_node; 3429 struct kfd_process *p; 3430 uint32_t gpuidx; 3431 3432 p = container_of(prange->svms, struct kfd_process, svms); 3433 3434 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3435 goto out; 3436 3437 bo_node = svm_range_get_node_by_id(prange, best_loc); 3438 if (!bo_node) { 3439 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3440 best_loc = 0; 3441 goto out; 3442 } 3443 3444 if (bo_node->adev->flags & AMD_IS_APU) { 3445 best_loc = 0; 3446 goto out; 3447 } 3448 3449 if (p->xnack_enabled) 3450 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3451 else 3452 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3453 MAX_GPU_INSTANCE); 3454 3455 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3456 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3457 if (!pdd) { 3458 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3459 continue; 3460 } 3461 3462 if (pdd->dev->adev == bo_node->adev) 3463 continue; 3464 3465 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3466 best_loc = 0; 3467 break; 3468 } 3469 } 3470 3471 out: 3472 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3473 p->xnack_enabled, &p->svms, prange->start, prange->last, 3474 best_loc); 3475 3476 return best_loc; 3477 } 3478 3479 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3480 * @mm: current process mm_struct 3481 * @prange: svm range structure 3482 * @migrated: output, true if migration is triggered 3483 * 3484 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3485 * from ram to vram. 3486 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3487 * from vram to ram. 3488 * 3489 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3490 * and restore work: 3491 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3492 * stops all queues, schedule restore work 3493 * 2. svm_range_restore_work wait for migration is done by 3494 * a. svm_range_validate_vram takes prange->migrate_mutex 3495 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3496 * 3. restore work update mappings of GPU, resume all queues. 3497 * 3498 * Context: Process context 3499 * 3500 * Return: 3501 * 0 - OK, otherwise - error code of migration 3502 */ 3503 static int 3504 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3505 bool *migrated) 3506 { 3507 uint32_t best_loc; 3508 int r = 0; 3509 3510 *migrated = false; 3511 best_loc = svm_range_best_prefetch_location(prange); 3512 3513 /* when best_loc is a gpu node and same as prange->actual_loc 3514 * we still need do migration as prange->actual_loc !=0 does 3515 * not mean all pages in prange are vram. hmm migrate will pick 3516 * up right pages during migration. 3517 */ 3518 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3519 (best_loc == 0 && prange->actual_loc == 0)) 3520 return 0; 3521 3522 if (!best_loc) { 3523 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3524 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3525 *migrated = !r; 3526 return r; 3527 } 3528 3529 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3530 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3531 *migrated = !r; 3532 3533 return 0; 3534 } 3535 3536 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3537 { 3538 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3539 * signaled yet and we're under the protection of the fence->lock. 3540 * After the fence is signaled in svm_range_bo_release, we cannot get 3541 * here any more. 3542 * 3543 * Reference is dropped in svm_range_evict_svm_bo_worker. 3544 */ 3545 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3546 WRITE_ONCE(fence->svm_bo->evicting, 1); 3547 schedule_work(&fence->svm_bo->eviction_work); 3548 } 3549 3550 return 0; 3551 } 3552 3553 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3554 { 3555 struct svm_range_bo *svm_bo; 3556 struct mm_struct *mm; 3557 int r = 0; 3558 3559 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3560 3561 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3562 mm = svm_bo->eviction_fence->mm; 3563 } else { 3564 svm_range_bo_unref(svm_bo); 3565 return; 3566 } 3567 3568 mmap_read_lock(mm); 3569 spin_lock(&svm_bo->list_lock); 3570 while (!list_empty(&svm_bo->range_list) && !r) { 3571 struct svm_range *prange = 3572 list_first_entry(&svm_bo->range_list, 3573 struct svm_range, svm_bo_list); 3574 int retries = 3; 3575 3576 list_del_init(&prange->svm_bo_list); 3577 spin_unlock(&svm_bo->list_lock); 3578 3579 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3580 prange->start, prange->last); 3581 3582 mutex_lock(&prange->migrate_mutex); 3583 do { 3584 /* migrate all vram pages in this prange to sys ram 3585 * after that prange->actual_loc should be zero 3586 */ 3587 r = svm_migrate_vram_to_ram(prange, mm, 3588 prange->start, prange->last, 3589 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3590 } while (!r && prange->actual_loc && --retries); 3591 3592 if (!r && prange->actual_loc) 3593 pr_info_once("Migration failed during eviction"); 3594 3595 if (!prange->actual_loc) { 3596 mutex_lock(&prange->lock); 3597 prange->svm_bo = NULL; 3598 mutex_unlock(&prange->lock); 3599 } 3600 mutex_unlock(&prange->migrate_mutex); 3601 3602 spin_lock(&svm_bo->list_lock); 3603 } 3604 spin_unlock(&svm_bo->list_lock); 3605 mmap_read_unlock(mm); 3606 mmput(mm); 3607 3608 dma_fence_signal(&svm_bo->eviction_fence->base); 3609 3610 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3611 * has been called in svm_migrate_vram_to_ram 3612 */ 3613 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3614 svm_range_bo_unref(svm_bo); 3615 } 3616 3617 static int 3618 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3619 uint64_t start, uint64_t size, uint32_t nattr, 3620 struct kfd_ioctl_svm_attribute *attrs) 3621 { 3622 struct amdkfd_process_info *process_info = p->kgd_process_info; 3623 struct list_head update_list; 3624 struct list_head insert_list; 3625 struct list_head remove_list; 3626 struct list_head remap_list; 3627 struct svm_range_list *svms; 3628 struct svm_range *prange; 3629 struct svm_range *next; 3630 bool update_mapping = false; 3631 bool flush_tlb; 3632 int r, ret = 0; 3633 3634 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3635 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3636 3637 r = svm_range_check_attr(p, nattr, attrs); 3638 if (r) 3639 return r; 3640 3641 svms = &p->svms; 3642 3643 mutex_lock(&process_info->lock); 3644 3645 svm_range_list_lock_and_flush_work(svms, mm); 3646 3647 r = svm_range_is_valid(p, start, size); 3648 if (r) { 3649 pr_debug("invalid range r=%d\n", r); 3650 mmap_write_unlock(mm); 3651 goto out; 3652 } 3653 3654 mutex_lock(&svms->lock); 3655 3656 /* Add new range and split existing ranges as needed */ 3657 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3658 &insert_list, &remove_list, &remap_list); 3659 if (r) { 3660 mutex_unlock(&svms->lock); 3661 mmap_write_unlock(mm); 3662 goto out; 3663 } 3664 /* Apply changes as a transaction */ 3665 list_for_each_entry_safe(prange, next, &insert_list, list) { 3666 svm_range_add_to_svms(prange); 3667 svm_range_add_notifier_locked(mm, prange); 3668 } 3669 list_for_each_entry(prange, &update_list, update_list) { 3670 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3671 /* TODO: unmap ranges from GPU that lost access */ 3672 } 3673 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3674 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3675 prange->svms, prange, prange->start, 3676 prange->last); 3677 svm_range_unlink(prange); 3678 svm_range_remove_notifier(prange); 3679 svm_range_free(prange, false); 3680 } 3681 3682 mmap_write_downgrade(mm); 3683 /* Trigger migrations and revalidate and map to GPUs as needed. If 3684 * this fails we may be left with partially completed actions. There 3685 * is no clean way of rolling back to the previous state in such a 3686 * case because the rollback wouldn't be guaranteed to work either. 3687 */ 3688 list_for_each_entry(prange, &update_list, update_list) { 3689 bool migrated; 3690 3691 mutex_lock(&prange->migrate_mutex); 3692 3693 r = svm_range_trigger_migration(mm, prange, &migrated); 3694 if (r) 3695 goto out_unlock_range; 3696 3697 if (migrated && (!p->xnack_enabled || 3698 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3699 prange->mapped_to_gpu) { 3700 pr_debug("restore_work will update mappings of GPUs\n"); 3701 mutex_unlock(&prange->migrate_mutex); 3702 continue; 3703 } 3704 3705 if (!migrated && !update_mapping) { 3706 mutex_unlock(&prange->migrate_mutex); 3707 continue; 3708 } 3709 3710 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3711 3712 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3713 MAX_GPU_INSTANCE, true, true, flush_tlb); 3714 if (r) 3715 pr_debug("failed %d to map svm range\n", r); 3716 3717 out_unlock_range: 3718 mutex_unlock(&prange->migrate_mutex); 3719 if (r) 3720 ret = r; 3721 } 3722 3723 list_for_each_entry(prange, &remap_list, update_list) { 3724 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3725 prange, prange->start, prange->last); 3726 mutex_lock(&prange->migrate_mutex); 3727 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3728 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3729 if (r) 3730 pr_debug("failed %d on remap svm range\n", r); 3731 mutex_unlock(&prange->migrate_mutex); 3732 if (r) 3733 ret = r; 3734 } 3735 3736 dynamic_svm_range_dump(svms); 3737 3738 mutex_unlock(&svms->lock); 3739 mmap_read_unlock(mm); 3740 out: 3741 mutex_unlock(&process_info->lock); 3742 3743 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3744 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3745 3746 return ret ? ret : r; 3747 } 3748 3749 static int 3750 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3751 uint64_t start, uint64_t size, uint32_t nattr, 3752 struct kfd_ioctl_svm_attribute *attrs) 3753 { 3754 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3755 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3756 bool get_preferred_loc = false; 3757 bool get_prefetch_loc = false; 3758 bool get_granularity = false; 3759 bool get_accessible = false; 3760 bool get_flags = false; 3761 uint64_t last = start + size - 1UL; 3762 uint8_t granularity = 0xff; 3763 struct interval_tree_node *node; 3764 struct svm_range_list *svms; 3765 struct svm_range *prange; 3766 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3767 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3768 uint32_t flags_and = 0xffffffff; 3769 uint32_t flags_or = 0; 3770 int gpuidx; 3771 uint32_t i; 3772 int r = 0; 3773 3774 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3775 start + size - 1, nattr); 3776 3777 /* Flush pending deferred work to avoid racing with deferred actions from 3778 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3779 * can still race with get_attr because we don't hold the mmap lock. But that 3780 * would be a race condition in the application anyway, and undefined 3781 * behaviour is acceptable in that case. 3782 */ 3783 flush_work(&p->svms.deferred_list_work); 3784 3785 mmap_read_lock(mm); 3786 r = svm_range_is_valid(p, start, size); 3787 mmap_read_unlock(mm); 3788 if (r) { 3789 pr_debug("invalid range r=%d\n", r); 3790 return r; 3791 } 3792 3793 for (i = 0; i < nattr; i++) { 3794 switch (attrs[i].type) { 3795 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3796 get_preferred_loc = true; 3797 break; 3798 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3799 get_prefetch_loc = true; 3800 break; 3801 case KFD_IOCTL_SVM_ATTR_ACCESS: 3802 get_accessible = true; 3803 break; 3804 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3805 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3806 get_flags = true; 3807 break; 3808 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3809 get_granularity = true; 3810 break; 3811 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3812 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3813 fallthrough; 3814 default: 3815 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3816 return -EINVAL; 3817 } 3818 } 3819 3820 svms = &p->svms; 3821 3822 mutex_lock(&svms->lock); 3823 3824 node = interval_tree_iter_first(&svms->objects, start, last); 3825 if (!node) { 3826 pr_debug("range attrs not found return default values\n"); 3827 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3828 &granularity, &flags_and); 3829 flags_or = flags_and; 3830 if (p->xnack_enabled) 3831 bitmap_copy(bitmap_access, svms->bitmap_supported, 3832 MAX_GPU_INSTANCE); 3833 else 3834 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3835 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3836 goto fill_values; 3837 } 3838 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3839 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3840 3841 while (node) { 3842 struct interval_tree_node *next; 3843 3844 prange = container_of(node, struct svm_range, it_node); 3845 next = interval_tree_iter_next(node, start, last); 3846 3847 if (get_preferred_loc) { 3848 if (prange->preferred_loc == 3849 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3850 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3851 location != prange->preferred_loc)) { 3852 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3853 get_preferred_loc = false; 3854 } else { 3855 location = prange->preferred_loc; 3856 } 3857 } 3858 if (get_prefetch_loc) { 3859 if (prange->prefetch_loc == 3860 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3861 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3862 prefetch_loc != prange->prefetch_loc)) { 3863 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3864 get_prefetch_loc = false; 3865 } else { 3866 prefetch_loc = prange->prefetch_loc; 3867 } 3868 } 3869 if (get_accessible) { 3870 bitmap_and(bitmap_access, bitmap_access, 3871 prange->bitmap_access, MAX_GPU_INSTANCE); 3872 bitmap_and(bitmap_aip, bitmap_aip, 3873 prange->bitmap_aip, MAX_GPU_INSTANCE); 3874 } 3875 if (get_flags) { 3876 flags_and &= prange->flags; 3877 flags_or |= prange->flags; 3878 } 3879 3880 if (get_granularity && prange->granularity < granularity) 3881 granularity = prange->granularity; 3882 3883 node = next; 3884 } 3885 fill_values: 3886 mutex_unlock(&svms->lock); 3887 3888 for (i = 0; i < nattr; i++) { 3889 switch (attrs[i].type) { 3890 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3891 attrs[i].value = location; 3892 break; 3893 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3894 attrs[i].value = prefetch_loc; 3895 break; 3896 case KFD_IOCTL_SVM_ATTR_ACCESS: 3897 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3898 attrs[i].value); 3899 if (gpuidx < 0) { 3900 pr_debug("invalid gpuid %x\n", attrs[i].value); 3901 return -EINVAL; 3902 } 3903 if (test_bit(gpuidx, bitmap_access)) 3904 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3905 else if (test_bit(gpuidx, bitmap_aip)) 3906 attrs[i].type = 3907 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3908 else 3909 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3910 break; 3911 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3912 attrs[i].value = flags_and; 3913 break; 3914 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3915 attrs[i].value = ~flags_or; 3916 break; 3917 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3918 attrs[i].value = (uint32_t)granularity; 3919 break; 3920 } 3921 } 3922 3923 return 0; 3924 } 3925 3926 int kfd_criu_resume_svm(struct kfd_process *p) 3927 { 3928 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3929 int nattr_common = 4, nattr_accessibility = 1; 3930 struct criu_svm_metadata *criu_svm_md = NULL; 3931 struct svm_range_list *svms = &p->svms; 3932 struct criu_svm_metadata *next = NULL; 3933 uint32_t set_flags = 0xffffffff; 3934 int i, j, num_attrs, ret = 0; 3935 uint64_t set_attr_size; 3936 struct mm_struct *mm; 3937 3938 if (list_empty(&svms->criu_svm_metadata_list)) { 3939 pr_debug("No SVM data from CRIU restore stage 2\n"); 3940 return ret; 3941 } 3942 3943 mm = get_task_mm(p->lead_thread); 3944 if (!mm) { 3945 pr_err("failed to get mm for the target process\n"); 3946 return -ESRCH; 3947 } 3948 3949 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3950 3951 i = j = 0; 3952 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3953 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3954 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3955 3956 for (j = 0; j < num_attrs; j++) { 3957 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3958 i, j, criu_svm_md->data.attrs[j].type, 3959 i, j, criu_svm_md->data.attrs[j].value); 3960 switch (criu_svm_md->data.attrs[j].type) { 3961 /* During Checkpoint operation, the query for 3962 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3963 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3964 * not used by the range which was checkpointed. Care 3965 * must be taken to not restore with an invalid value 3966 * otherwise the gpuidx value will be invalid and 3967 * set_attr would eventually fail so just replace those 3968 * with another dummy attribute such as 3969 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3970 */ 3971 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3972 if (criu_svm_md->data.attrs[j].value == 3973 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3974 criu_svm_md->data.attrs[j].type = 3975 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3976 criu_svm_md->data.attrs[j].value = 0; 3977 } 3978 break; 3979 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3980 set_flags = criu_svm_md->data.attrs[j].value; 3981 break; 3982 default: 3983 break; 3984 } 3985 } 3986 3987 /* CLR_FLAGS is not available via get_attr during checkpoint but 3988 * it needs to be inserted before restoring the ranges so 3989 * allocate extra space for it before calling set_attr 3990 */ 3991 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3992 (num_attrs + 1); 3993 set_attr_new = krealloc(set_attr, set_attr_size, 3994 GFP_KERNEL); 3995 if (!set_attr_new) { 3996 ret = -ENOMEM; 3997 goto exit; 3998 } 3999 set_attr = set_attr_new; 4000 4001 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4002 sizeof(struct kfd_ioctl_svm_attribute)); 4003 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4004 set_attr[num_attrs].value = ~set_flags; 4005 4006 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4007 criu_svm_md->data.size, num_attrs + 1, 4008 set_attr); 4009 if (ret) { 4010 pr_err("CRIU: failed to set range attributes\n"); 4011 goto exit; 4012 } 4013 4014 i++; 4015 } 4016 exit: 4017 kfree(set_attr); 4018 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4019 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4020 criu_svm_md->data.start_addr); 4021 kfree(criu_svm_md); 4022 } 4023 4024 mmput(mm); 4025 return ret; 4026 4027 } 4028 4029 int kfd_criu_restore_svm(struct kfd_process *p, 4030 uint8_t __user *user_priv_ptr, 4031 uint64_t *priv_data_offset, 4032 uint64_t max_priv_data_size) 4033 { 4034 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4035 int nattr_common = 4, nattr_accessibility = 1; 4036 struct criu_svm_metadata *criu_svm_md = NULL; 4037 struct svm_range_list *svms = &p->svms; 4038 uint32_t num_devices; 4039 int ret = 0; 4040 4041 num_devices = p->n_pdds; 4042 /* Handle one SVM range object at a time, also the number of gpus are 4043 * assumed to be same on the restore node, checking must be done while 4044 * evaluating the topology earlier 4045 */ 4046 4047 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4048 (nattr_common + nattr_accessibility * num_devices); 4049 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4050 4051 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4052 svm_attrs_size; 4053 4054 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4055 if (!criu_svm_md) { 4056 pr_err("failed to allocate memory to store svm metadata\n"); 4057 return -ENOMEM; 4058 } 4059 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4060 ret = -EINVAL; 4061 goto exit; 4062 } 4063 4064 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4065 svm_priv_data_size); 4066 if (ret) { 4067 ret = -EFAULT; 4068 goto exit; 4069 } 4070 *priv_data_offset += svm_priv_data_size; 4071 4072 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4073 4074 return 0; 4075 4076 4077 exit: 4078 kfree(criu_svm_md); 4079 return ret; 4080 } 4081 4082 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4083 uint64_t *svm_priv_data_size) 4084 { 4085 uint64_t total_size, accessibility_size, common_attr_size; 4086 int nattr_common = 4, nattr_accessibility = 1; 4087 int num_devices = p->n_pdds; 4088 struct svm_range_list *svms; 4089 struct svm_range *prange; 4090 uint32_t count = 0; 4091 4092 *svm_priv_data_size = 0; 4093 4094 svms = &p->svms; 4095 if (!svms) 4096 return -EINVAL; 4097 4098 mutex_lock(&svms->lock); 4099 list_for_each_entry(prange, &svms->list, list) { 4100 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4101 prange, prange->start, prange->npages, 4102 prange->start + prange->npages - 1); 4103 count++; 4104 } 4105 mutex_unlock(&svms->lock); 4106 4107 *num_svm_ranges = count; 4108 /* Only the accessbility attributes need to be queried for all the gpus 4109 * individually, remaining ones are spanned across the entire process 4110 * regardless of the various gpu nodes. Of the remaining attributes, 4111 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4112 * 4113 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4114 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4115 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4116 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4117 * 4118 * ** ACCESSBILITY ATTRIBUTES ** 4119 * (Considered as one, type is altered during query, value is gpuid) 4120 * KFD_IOCTL_SVM_ATTR_ACCESS 4121 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4122 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4123 */ 4124 if (*num_svm_ranges > 0) { 4125 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4126 nattr_common; 4127 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4128 nattr_accessibility * num_devices; 4129 4130 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4131 common_attr_size + accessibility_size; 4132 4133 *svm_priv_data_size = *num_svm_ranges * total_size; 4134 } 4135 4136 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4137 *svm_priv_data_size); 4138 return 0; 4139 } 4140 4141 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4142 uint8_t __user *user_priv_data, 4143 uint64_t *priv_data_offset) 4144 { 4145 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4146 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4147 uint64_t svm_priv_data_size, query_attr_size = 0; 4148 int index, nattr_common = 4, ret = 0; 4149 struct svm_range_list *svms; 4150 int num_devices = p->n_pdds; 4151 struct svm_range *prange; 4152 struct mm_struct *mm; 4153 4154 svms = &p->svms; 4155 if (!svms) 4156 return -EINVAL; 4157 4158 mm = get_task_mm(p->lead_thread); 4159 if (!mm) { 4160 pr_err("failed to get mm for the target process\n"); 4161 return -ESRCH; 4162 } 4163 4164 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4165 (nattr_common + num_devices); 4166 4167 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4168 if (!query_attr) { 4169 ret = -ENOMEM; 4170 goto exit; 4171 } 4172 4173 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4174 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4175 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4176 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4177 4178 for (index = 0; index < num_devices; index++) { 4179 struct kfd_process_device *pdd = p->pdds[index]; 4180 4181 query_attr[index + nattr_common].type = 4182 KFD_IOCTL_SVM_ATTR_ACCESS; 4183 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4184 } 4185 4186 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4187 4188 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4189 if (!svm_priv) { 4190 ret = -ENOMEM; 4191 goto exit_query; 4192 } 4193 4194 index = 0; 4195 list_for_each_entry(prange, &svms->list, list) { 4196 4197 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4198 svm_priv->start_addr = prange->start; 4199 svm_priv->size = prange->npages; 4200 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4201 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4202 prange, prange->start, prange->npages, 4203 prange->start + prange->npages - 1, 4204 prange->npages * PAGE_SIZE); 4205 4206 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4207 svm_priv->size, 4208 (nattr_common + num_devices), 4209 svm_priv->attrs); 4210 if (ret) { 4211 pr_err("CRIU: failed to obtain range attributes\n"); 4212 goto exit_priv; 4213 } 4214 4215 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4216 svm_priv_data_size)) { 4217 pr_err("Failed to copy svm priv to user\n"); 4218 ret = -EFAULT; 4219 goto exit_priv; 4220 } 4221 4222 *priv_data_offset += svm_priv_data_size; 4223 4224 } 4225 4226 4227 exit_priv: 4228 kfree(svm_priv); 4229 exit_query: 4230 kfree(query_attr); 4231 exit: 4232 mmput(mm); 4233 return ret; 4234 } 4235 4236 int 4237 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4238 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4239 { 4240 struct mm_struct *mm = current->mm; 4241 int r; 4242 4243 start >>= PAGE_SHIFT; 4244 size >>= PAGE_SHIFT; 4245 4246 switch (op) { 4247 case KFD_IOCTL_SVM_OP_SET_ATTR: 4248 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4249 break; 4250 case KFD_IOCTL_SVM_OP_GET_ATTR: 4251 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4252 break; 4253 default: 4254 r = EINVAL; 4255 break; 4256 } 4257 4258 return r; 4259 } 4260