1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx, uint64_t *vram_pages) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 uint64_t vram_pages_dev; 168 int i, r; 169 170 if (!addr) { 171 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 172 if (!addr) 173 return -ENOMEM; 174 prange->dma_addr[gpuidx] = addr; 175 } 176 177 vram_pages_dev = 0; 178 addr += offset; 179 for (i = 0; i < npages; i++) { 180 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 181 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 182 183 page = hmm_pfn_to_page(hmm_pfns[i]); 184 if (is_zone_device_page(page)) { 185 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 186 187 vram_pages_dev++; 188 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 189 bo_adev->vm_manager.vram_base_offset - 190 bo_adev->kfd.pgmap.range.start; 191 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 192 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 193 continue; 194 } 195 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 196 r = dma_mapping_error(dev, addr[i]); 197 if (r) { 198 dev_err(dev, "failed %d dma_map_page\n", r); 199 return r; 200 } 201 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 202 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 203 } 204 *vram_pages = vram_pages_dev; 205 return 0; 206 } 207 208 static int 209 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 210 unsigned long offset, unsigned long npages, 211 unsigned long *hmm_pfns, uint64_t *vram_pages) 212 { 213 struct kfd_process *p; 214 uint32_t gpuidx; 215 int r; 216 217 p = container_of(prange->svms, struct kfd_process, svms); 218 219 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 220 struct kfd_process_device *pdd; 221 222 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 223 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 224 if (!pdd) { 225 pr_debug("failed to find device idx %d\n", gpuidx); 226 return -EINVAL; 227 } 228 229 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 230 hmm_pfns, gpuidx, vram_pages); 231 if (r) 232 break; 233 } 234 235 return r; 236 } 237 238 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 239 unsigned long offset, unsigned long npages) 240 { 241 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 242 int i; 243 244 if (!dma_addr) 245 return; 246 247 for (i = offset; i < offset + npages; i++) { 248 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 249 continue; 250 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 251 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 252 dma_addr[i] = 0; 253 } 254 } 255 256 void svm_range_dma_unmap(struct svm_range *prange) 257 { 258 struct kfd_process_device *pdd; 259 dma_addr_t *dma_addr; 260 struct device *dev; 261 struct kfd_process *p; 262 uint32_t gpuidx; 263 264 p = container_of(prange->svms, struct kfd_process, svms); 265 266 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 267 dma_addr = prange->dma_addr[gpuidx]; 268 if (!dma_addr) 269 continue; 270 271 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 272 if (!pdd) { 273 pr_debug("failed to find device idx %d\n", gpuidx); 274 continue; 275 } 276 dev = &pdd->dev->adev->pdev->dev; 277 278 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 279 } 280 } 281 282 static void svm_range_free(struct svm_range *prange, bool do_unmap) 283 { 284 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 285 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 286 uint32_t gpuidx; 287 288 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 289 prange->start, prange->last); 290 291 svm_range_vram_node_free(prange); 292 if (do_unmap) 293 svm_range_dma_unmap(prange); 294 295 if (do_unmap && !p->xnack_enabled) { 296 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 297 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 298 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 299 } 300 301 /* free dma_addr array for each gpu */ 302 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 303 if (prange->dma_addr[gpuidx]) { 304 kvfree(prange->dma_addr[gpuidx]); 305 prange->dma_addr[gpuidx] = NULL; 306 } 307 } 308 309 mutex_destroy(&prange->lock); 310 mutex_destroy(&prange->migrate_mutex); 311 kfree(prange); 312 } 313 314 static void 315 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 316 uint8_t *granularity, uint32_t *flags) 317 { 318 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 319 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 320 *granularity = 9; 321 *flags = 322 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 323 } 324 325 static struct 326 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 327 uint64_t last, bool update_mem_usage) 328 { 329 uint64_t size = last - start + 1; 330 struct svm_range *prange; 331 struct kfd_process *p; 332 333 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 334 if (!prange) 335 return NULL; 336 337 p = container_of(svms, struct kfd_process, svms); 338 if (!p->xnack_enabled && update_mem_usage && 339 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 340 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 341 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 342 kfree(prange); 343 return NULL; 344 } 345 prange->npages = size; 346 prange->svms = svms; 347 prange->start = start; 348 prange->last = last; 349 INIT_LIST_HEAD(&prange->list); 350 INIT_LIST_HEAD(&prange->update_list); 351 INIT_LIST_HEAD(&prange->svm_bo_list); 352 INIT_LIST_HEAD(&prange->deferred_list); 353 INIT_LIST_HEAD(&prange->child_list); 354 atomic_set(&prange->invalid, 0); 355 prange->validate_timestamp = 0; 356 prange->vram_pages = 0; 357 mutex_init(&prange->migrate_mutex); 358 mutex_init(&prange->lock); 359 360 if (p->xnack_enabled) 361 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 362 MAX_GPU_INSTANCE); 363 364 svm_range_set_default_attributes(&prange->preferred_loc, 365 &prange->prefetch_loc, 366 &prange->granularity, &prange->flags); 367 368 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 369 370 return prange; 371 } 372 373 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 374 { 375 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 376 return false; 377 378 return true; 379 } 380 381 static void svm_range_bo_release(struct kref *kref) 382 { 383 struct svm_range_bo *svm_bo; 384 385 svm_bo = container_of(kref, struct svm_range_bo, kref); 386 pr_debug("svm_bo 0x%p\n", svm_bo); 387 388 spin_lock(&svm_bo->list_lock); 389 while (!list_empty(&svm_bo->range_list)) { 390 struct svm_range *prange = 391 list_first_entry(&svm_bo->range_list, 392 struct svm_range, svm_bo_list); 393 /* list_del_init tells a concurrent svm_range_vram_node_new when 394 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 395 */ 396 list_del_init(&prange->svm_bo_list); 397 spin_unlock(&svm_bo->list_lock); 398 399 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 400 prange->start, prange->last); 401 mutex_lock(&prange->lock); 402 prange->svm_bo = NULL; 403 /* prange should not hold vram page now */ 404 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 405 mutex_unlock(&prange->lock); 406 407 spin_lock(&svm_bo->list_lock); 408 } 409 spin_unlock(&svm_bo->list_lock); 410 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 411 /* We're not in the eviction worker. 412 * Signal the fence and synchronize with any 413 * pending eviction work. 414 */ 415 dma_fence_signal(&svm_bo->eviction_fence->base); 416 cancel_work_sync(&svm_bo->eviction_work); 417 } 418 dma_fence_put(&svm_bo->eviction_fence->base); 419 amdgpu_bo_unref(&svm_bo->bo); 420 kfree(svm_bo); 421 } 422 423 static void svm_range_bo_wq_release(struct work_struct *work) 424 { 425 struct svm_range_bo *svm_bo; 426 427 svm_bo = container_of(work, struct svm_range_bo, release_work); 428 svm_range_bo_release(&svm_bo->kref); 429 } 430 431 static void svm_range_bo_release_async(struct kref *kref) 432 { 433 struct svm_range_bo *svm_bo; 434 435 svm_bo = container_of(kref, struct svm_range_bo, kref); 436 pr_debug("svm_bo 0x%p\n", svm_bo); 437 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 438 schedule_work(&svm_bo->release_work); 439 } 440 441 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 442 { 443 kref_put(&svm_bo->kref, svm_range_bo_release_async); 444 } 445 446 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 447 { 448 if (svm_bo) 449 kref_put(&svm_bo->kref, svm_range_bo_release); 450 } 451 452 static bool 453 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 454 { 455 mutex_lock(&prange->lock); 456 if (!prange->svm_bo) { 457 mutex_unlock(&prange->lock); 458 return false; 459 } 460 if (prange->ttm_res) { 461 /* We still have a reference, all is well */ 462 mutex_unlock(&prange->lock); 463 return true; 464 } 465 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 466 /* 467 * Migrate from GPU to GPU, remove range from source svm_bo->node 468 * range list, and return false to allocate svm_bo from destination 469 * node. 470 */ 471 if (prange->svm_bo->node != node) { 472 mutex_unlock(&prange->lock); 473 474 spin_lock(&prange->svm_bo->list_lock); 475 list_del_init(&prange->svm_bo_list); 476 spin_unlock(&prange->svm_bo->list_lock); 477 478 svm_range_bo_unref(prange->svm_bo); 479 return false; 480 } 481 if (READ_ONCE(prange->svm_bo->evicting)) { 482 struct dma_fence *f; 483 struct svm_range_bo *svm_bo; 484 /* The BO is getting evicted, 485 * we need to get a new one 486 */ 487 mutex_unlock(&prange->lock); 488 svm_bo = prange->svm_bo; 489 f = dma_fence_get(&svm_bo->eviction_fence->base); 490 svm_range_bo_unref(prange->svm_bo); 491 /* wait for the fence to avoid long spin-loop 492 * at list_empty_careful 493 */ 494 dma_fence_wait(f, false); 495 dma_fence_put(f); 496 } else { 497 /* The BO was still around and we got 498 * a new reference to it 499 */ 500 mutex_unlock(&prange->lock); 501 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 502 prange->svms, prange->start, prange->last); 503 504 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 505 return true; 506 } 507 508 } else { 509 mutex_unlock(&prange->lock); 510 } 511 512 /* We need a new svm_bo. Spin-loop to wait for concurrent 513 * svm_range_bo_release to finish removing this range from 514 * its range list and set prange->svm_bo to null. After this, 515 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 516 */ 517 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 518 cond_resched(); 519 520 return false; 521 } 522 523 static struct svm_range_bo *svm_range_bo_new(void) 524 { 525 struct svm_range_bo *svm_bo; 526 527 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 528 if (!svm_bo) 529 return NULL; 530 531 kref_init(&svm_bo->kref); 532 INIT_LIST_HEAD(&svm_bo->range_list); 533 spin_lock_init(&svm_bo->list_lock); 534 535 return svm_bo; 536 } 537 538 int 539 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 540 bool clear) 541 { 542 struct amdgpu_bo_param bp; 543 struct svm_range_bo *svm_bo; 544 struct amdgpu_bo_user *ubo; 545 struct amdgpu_bo *bo; 546 struct kfd_process *p; 547 struct mm_struct *mm; 548 int r; 549 550 p = container_of(prange->svms, struct kfd_process, svms); 551 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 552 prange->start, prange->last); 553 554 if (svm_range_validate_svm_bo(node, prange)) 555 return 0; 556 557 svm_bo = svm_range_bo_new(); 558 if (!svm_bo) { 559 pr_debug("failed to alloc svm bo\n"); 560 return -ENOMEM; 561 } 562 mm = get_task_mm(p->lead_thread); 563 if (!mm) { 564 pr_debug("failed to get mm\n"); 565 kfree(svm_bo); 566 return -ESRCH; 567 } 568 svm_bo->node = node; 569 svm_bo->eviction_fence = 570 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 571 mm, 572 svm_bo); 573 mmput(mm); 574 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 575 svm_bo->evicting = 0; 576 memset(&bp, 0, sizeof(bp)); 577 bp.size = prange->npages * PAGE_SIZE; 578 bp.byte_align = PAGE_SIZE; 579 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 580 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 581 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 582 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 583 bp.type = ttm_bo_type_device; 584 bp.resv = NULL; 585 if (node->xcp) 586 bp.xcp_id_plus1 = node->xcp->id + 1; 587 588 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 589 if (r) { 590 pr_debug("failed %d to create bo\n", r); 591 goto create_bo_failed; 592 } 593 bo = &ubo->bo; 594 595 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 596 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 597 bp.xcp_id_plus1 - 1); 598 599 r = amdgpu_bo_reserve(bo, true); 600 if (r) { 601 pr_debug("failed %d to reserve bo\n", r); 602 goto reserve_bo_failed; 603 } 604 605 if (clear) { 606 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 607 if (r) { 608 pr_debug("failed %d to sync bo\n", r); 609 amdgpu_bo_unreserve(bo); 610 goto reserve_bo_failed; 611 } 612 } 613 614 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 615 if (r) { 616 pr_debug("failed %d to reserve bo\n", r); 617 amdgpu_bo_unreserve(bo); 618 goto reserve_bo_failed; 619 } 620 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 621 622 amdgpu_bo_unreserve(bo); 623 624 svm_bo->bo = bo; 625 prange->svm_bo = svm_bo; 626 prange->ttm_res = bo->tbo.resource; 627 prange->offset = 0; 628 629 spin_lock(&svm_bo->list_lock); 630 list_add(&prange->svm_bo_list, &svm_bo->range_list); 631 spin_unlock(&svm_bo->list_lock); 632 633 return 0; 634 635 reserve_bo_failed: 636 amdgpu_bo_unref(&bo); 637 create_bo_failed: 638 dma_fence_put(&svm_bo->eviction_fence->base); 639 kfree(svm_bo); 640 prange->ttm_res = NULL; 641 642 return r; 643 } 644 645 void svm_range_vram_node_free(struct svm_range *prange) 646 { 647 /* serialize prange->svm_bo unref */ 648 mutex_lock(&prange->lock); 649 /* prange->svm_bo has not been unref */ 650 if (prange->ttm_res) { 651 prange->ttm_res = NULL; 652 mutex_unlock(&prange->lock); 653 svm_range_bo_unref(prange->svm_bo); 654 } else 655 mutex_unlock(&prange->lock); 656 } 657 658 struct kfd_node * 659 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 660 { 661 struct kfd_process *p; 662 struct kfd_process_device *pdd; 663 664 p = container_of(prange->svms, struct kfd_process, svms); 665 pdd = kfd_process_device_data_by_id(p, gpu_id); 666 if (!pdd) { 667 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 668 return NULL; 669 } 670 671 return pdd->dev; 672 } 673 674 struct kfd_process_device * 675 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 676 { 677 struct kfd_process *p; 678 679 p = container_of(prange->svms, struct kfd_process, svms); 680 681 return kfd_get_process_device_data(node, p); 682 } 683 684 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 685 { 686 struct ttm_operation_ctx ctx = { false, false }; 687 688 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 689 690 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 691 } 692 693 static int 694 svm_range_check_attr(struct kfd_process *p, 695 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 696 { 697 uint32_t i; 698 699 for (i = 0; i < nattr; i++) { 700 uint32_t val = attrs[i].value; 701 int gpuidx = MAX_GPU_INSTANCE; 702 703 switch (attrs[i].type) { 704 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 705 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 706 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 707 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 708 break; 709 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 710 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 711 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 712 break; 713 case KFD_IOCTL_SVM_ATTR_ACCESS: 714 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 715 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 716 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 717 break; 718 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 719 break; 720 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 721 break; 722 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 723 break; 724 default: 725 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 726 return -EINVAL; 727 } 728 729 if (gpuidx < 0) { 730 pr_debug("no GPU 0x%x found\n", val); 731 return -EINVAL; 732 } else if (gpuidx < MAX_GPU_INSTANCE && 733 !test_bit(gpuidx, p->svms.bitmap_supported)) { 734 pr_debug("GPU 0x%x not supported\n", val); 735 return -EINVAL; 736 } 737 } 738 739 return 0; 740 } 741 742 static void 743 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 744 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 745 bool *update_mapping) 746 { 747 uint32_t i; 748 int gpuidx; 749 750 for (i = 0; i < nattr; i++) { 751 switch (attrs[i].type) { 752 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 753 prange->preferred_loc = attrs[i].value; 754 break; 755 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 756 prange->prefetch_loc = attrs[i].value; 757 break; 758 case KFD_IOCTL_SVM_ATTR_ACCESS: 759 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 760 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 761 if (!p->xnack_enabled) 762 *update_mapping = true; 763 764 gpuidx = kfd_process_gpuidx_from_gpuid(p, 765 attrs[i].value); 766 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 767 bitmap_clear(prange->bitmap_access, gpuidx, 1); 768 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 769 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 770 bitmap_set(prange->bitmap_access, gpuidx, 1); 771 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 772 } else { 773 bitmap_clear(prange->bitmap_access, gpuidx, 1); 774 bitmap_set(prange->bitmap_aip, gpuidx, 1); 775 } 776 break; 777 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 778 *update_mapping = true; 779 prange->flags |= attrs[i].value; 780 break; 781 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 782 *update_mapping = true; 783 prange->flags &= ~attrs[i].value; 784 break; 785 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 786 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 787 break; 788 default: 789 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 790 } 791 } 792 } 793 794 static bool 795 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 796 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 797 { 798 uint32_t i; 799 int gpuidx; 800 801 for (i = 0; i < nattr; i++) { 802 switch (attrs[i].type) { 803 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 804 if (prange->preferred_loc != attrs[i].value) 805 return false; 806 break; 807 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 808 /* Prefetch should always trigger a migration even 809 * if the value of the attribute didn't change. 810 */ 811 return false; 812 case KFD_IOCTL_SVM_ATTR_ACCESS: 813 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 814 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 815 gpuidx = kfd_process_gpuidx_from_gpuid(p, 816 attrs[i].value); 817 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 818 if (test_bit(gpuidx, prange->bitmap_access) || 819 test_bit(gpuidx, prange->bitmap_aip)) 820 return false; 821 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 822 if (!test_bit(gpuidx, prange->bitmap_access)) 823 return false; 824 } else { 825 if (!test_bit(gpuidx, prange->bitmap_aip)) 826 return false; 827 } 828 break; 829 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 830 if ((prange->flags & attrs[i].value) != attrs[i].value) 831 return false; 832 break; 833 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 834 if ((prange->flags & attrs[i].value) != 0) 835 return false; 836 break; 837 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 838 if (prange->granularity != attrs[i].value) 839 return false; 840 break; 841 default: 842 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 843 } 844 } 845 846 return true; 847 } 848 849 /** 850 * svm_range_debug_dump - print all range information from svms 851 * @svms: svm range list header 852 * 853 * debug output svm range start, end, prefetch location from svms 854 * interval tree and link list 855 * 856 * Context: The caller must hold svms->lock 857 */ 858 static void svm_range_debug_dump(struct svm_range_list *svms) 859 { 860 struct interval_tree_node *node; 861 struct svm_range *prange; 862 863 pr_debug("dump svms 0x%p list\n", svms); 864 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 865 866 list_for_each_entry(prange, &svms->list, list) { 867 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 868 prange, prange->start, prange->npages, 869 prange->start + prange->npages - 1, 870 prange->actual_loc); 871 } 872 873 pr_debug("dump svms 0x%p interval tree\n", svms); 874 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 875 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 876 while (node) { 877 prange = container_of(node, struct svm_range, it_node); 878 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 879 prange, prange->start, prange->npages, 880 prange->start + prange->npages - 1, 881 prange->actual_loc); 882 node = interval_tree_iter_next(node, 0, ~0ULL); 883 } 884 } 885 886 static void * 887 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 888 uint64_t offset) 889 { 890 unsigned char *dst; 891 892 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 893 if (!dst) 894 return NULL; 895 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 896 897 return (void *)dst; 898 } 899 900 static int 901 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 902 { 903 int i; 904 905 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 906 if (!src->dma_addr[i]) 907 continue; 908 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 909 sizeof(*src->dma_addr[i]), src->npages, 0); 910 if (!dst->dma_addr[i]) 911 return -ENOMEM; 912 } 913 914 return 0; 915 } 916 917 static int 918 svm_range_split_array(void *ppnew, void *ppold, size_t size, 919 uint64_t old_start, uint64_t old_n, 920 uint64_t new_start, uint64_t new_n) 921 { 922 unsigned char *new, *old, *pold; 923 uint64_t d; 924 925 if (!ppold) 926 return 0; 927 pold = *(unsigned char **)ppold; 928 if (!pold) 929 return 0; 930 931 d = (new_start - old_start) * size; 932 new = svm_range_copy_array(pold, size, new_n, d); 933 if (!new) 934 return -ENOMEM; 935 d = (new_start == old_start) ? new_n * size : 0; 936 old = svm_range_copy_array(pold, size, old_n, d); 937 if (!old) { 938 kvfree(new); 939 return -ENOMEM; 940 } 941 kvfree(pold); 942 *(void **)ppold = old; 943 *(void **)ppnew = new; 944 945 return 0; 946 } 947 948 static int 949 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 950 uint64_t start, uint64_t last) 951 { 952 uint64_t npages = last - start + 1; 953 int i, r; 954 955 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 956 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 957 sizeof(*old->dma_addr[i]), old->start, 958 npages, new->start, new->npages); 959 if (r) 960 return r; 961 } 962 963 return 0; 964 } 965 966 static int 967 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 968 uint64_t start, uint64_t last) 969 { 970 uint64_t npages = last - start + 1; 971 972 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 973 new->svms, new, new->start, start, last); 974 975 if (new->start == old->start) { 976 new->offset = old->offset; 977 old->offset += new->npages; 978 } else { 979 new->offset = old->offset + npages; 980 } 981 982 new->svm_bo = svm_range_bo_ref(old->svm_bo); 983 new->ttm_res = old->ttm_res; 984 985 /* set new's vram_pages as old range's now, the acurate vram_pages 986 * will be updated during mapping 987 */ 988 new->vram_pages = min(old->vram_pages, new->npages); 989 990 spin_lock(&new->svm_bo->list_lock); 991 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 992 spin_unlock(&new->svm_bo->list_lock); 993 994 return 0; 995 } 996 997 /** 998 * svm_range_split_adjust - split range and adjust 999 * 1000 * @new: new range 1001 * @old: the old range 1002 * @start: the old range adjust to start address in pages 1003 * @last: the old range adjust to last address in pages 1004 * 1005 * Copy system memory dma_addr or vram ttm_res in old range to new 1006 * range from new_start up to size new->npages, the remaining old range is from 1007 * start to last 1008 * 1009 * Return: 1010 * 0 - OK, -ENOMEM - out of memory 1011 */ 1012 static int 1013 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1014 uint64_t start, uint64_t last) 1015 { 1016 int r; 1017 1018 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1019 new->svms, new->start, old->start, old->last, start, last); 1020 1021 if (new->start < old->start || 1022 new->last > old->last) { 1023 WARN_ONCE(1, "invalid new range start or last\n"); 1024 return -EINVAL; 1025 } 1026 1027 r = svm_range_split_pages(new, old, start, last); 1028 if (r) 1029 return r; 1030 1031 if (old->actual_loc && old->ttm_res) { 1032 r = svm_range_split_nodes(new, old, start, last); 1033 if (r) 1034 return r; 1035 } 1036 1037 old->npages = last - start + 1; 1038 old->start = start; 1039 old->last = last; 1040 new->flags = old->flags; 1041 new->preferred_loc = old->preferred_loc; 1042 new->prefetch_loc = old->prefetch_loc; 1043 new->actual_loc = old->actual_loc; 1044 new->granularity = old->granularity; 1045 new->mapped_to_gpu = old->mapped_to_gpu; 1046 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1047 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1048 1049 return 0; 1050 } 1051 1052 /** 1053 * svm_range_split - split a range in 2 ranges 1054 * 1055 * @prange: the svm range to split 1056 * @start: the remaining range start address in pages 1057 * @last: the remaining range last address in pages 1058 * @new: the result new range generated 1059 * 1060 * Two cases only: 1061 * case 1: if start == prange->start 1062 * prange ==> prange[start, last] 1063 * new range [last + 1, prange->last] 1064 * 1065 * case 2: if last == prange->last 1066 * prange ==> prange[start, last] 1067 * new range [prange->start, start - 1] 1068 * 1069 * Return: 1070 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1071 */ 1072 static int 1073 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1074 struct svm_range **new) 1075 { 1076 uint64_t old_start = prange->start; 1077 uint64_t old_last = prange->last; 1078 struct svm_range_list *svms; 1079 int r = 0; 1080 1081 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1082 old_start, old_last, start, last); 1083 1084 if (old_start != start && old_last != last) 1085 return -EINVAL; 1086 if (start < old_start || last > old_last) 1087 return -EINVAL; 1088 1089 svms = prange->svms; 1090 if (old_start == start) 1091 *new = svm_range_new(svms, last + 1, old_last, false); 1092 else 1093 *new = svm_range_new(svms, old_start, start - 1, false); 1094 if (!*new) 1095 return -ENOMEM; 1096 1097 r = svm_range_split_adjust(*new, prange, start, last); 1098 if (r) { 1099 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1100 r, old_start, old_last, start, last); 1101 svm_range_free(*new, false); 1102 *new = NULL; 1103 } 1104 1105 return r; 1106 } 1107 1108 static int 1109 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1110 struct list_head *insert_list, struct list_head *remap_list) 1111 { 1112 struct svm_range *tail; 1113 int r = svm_range_split(prange, prange->start, new_last, &tail); 1114 1115 if (!r) { 1116 list_add(&tail->list, insert_list); 1117 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1118 list_add(&tail->update_list, remap_list); 1119 } 1120 return r; 1121 } 1122 1123 static int 1124 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1125 struct list_head *insert_list, struct list_head *remap_list) 1126 { 1127 struct svm_range *head; 1128 int r = svm_range_split(prange, new_start, prange->last, &head); 1129 1130 if (!r) { 1131 list_add(&head->list, insert_list); 1132 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1133 list_add(&head->update_list, remap_list); 1134 } 1135 return r; 1136 } 1137 1138 static void 1139 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1140 struct svm_range *pchild, enum svm_work_list_ops op) 1141 { 1142 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1143 pchild, pchild->start, pchild->last, prange, op); 1144 1145 pchild->work_item.mm = mm; 1146 pchild->work_item.op = op; 1147 list_add_tail(&pchild->child_list, &prange->child_list); 1148 } 1149 1150 static bool 1151 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1152 { 1153 return (node_a->adev == node_b->adev || 1154 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1155 } 1156 1157 static uint64_t 1158 svm_range_get_pte_flags(struct kfd_node *node, 1159 struct svm_range *prange, int domain) 1160 { 1161 struct kfd_node *bo_node; 1162 uint32_t flags = prange->flags; 1163 uint32_t mapping_flags = 0; 1164 uint64_t pte_flags; 1165 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1166 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1167 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1168 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1169 unsigned int mtype_local; 1170 1171 if (domain == SVM_RANGE_VRAM_DOMAIN) 1172 bo_node = prange->svm_bo->node; 1173 1174 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1175 case IP_VERSION(9, 4, 1): 1176 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1177 if (bo_node == node) { 1178 mapping_flags |= coherent ? 1179 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1180 } else { 1181 mapping_flags |= coherent ? 1182 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1183 if (svm_nodes_in_same_hive(node, bo_node)) 1184 snoop = true; 1185 } 1186 } else { 1187 mapping_flags |= coherent ? 1188 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1189 } 1190 break; 1191 case IP_VERSION(9, 4, 2): 1192 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1193 if (bo_node == node) { 1194 mapping_flags |= coherent ? 1195 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1196 if (node->adev->gmc.xgmi.connected_to_cpu) 1197 snoop = true; 1198 } else { 1199 mapping_flags |= coherent ? 1200 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1201 if (svm_nodes_in_same_hive(node, bo_node)) 1202 snoop = true; 1203 } 1204 } else { 1205 mapping_flags |= coherent ? 1206 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1207 } 1208 break; 1209 case IP_VERSION(9, 4, 3): 1210 if (ext_coherent) 1211 mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC; 1212 else 1213 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1214 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1215 snoop = true; 1216 if (uncached) { 1217 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1218 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1219 /* local HBM region close to partition */ 1220 if (bo_node->adev == node->adev && 1221 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1222 mapping_flags |= mtype_local; 1223 /* local HBM region far from partition or remote XGMI GPU 1224 * with regular system scope coherence 1225 */ 1226 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1227 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1228 /* PCIe P2P or extended system scope coherence */ 1229 else 1230 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1231 /* system memory accessed by the APU */ 1232 } else if (node->adev->flags & AMD_IS_APU) { 1233 /* On NUMA systems, locality is determined per-page 1234 * in amdgpu_gmc_override_vm_pte_flags 1235 */ 1236 if (num_possible_nodes() <= 1) 1237 mapping_flags |= mtype_local; 1238 else 1239 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1240 /* system memory accessed by the dGPU */ 1241 } else { 1242 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1243 } 1244 break; 1245 default: 1246 mapping_flags |= coherent ? 1247 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1248 } 1249 1250 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1251 1252 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1253 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1254 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1255 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1256 1257 pte_flags = AMDGPU_PTE_VALID; 1258 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1259 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1260 1261 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1262 return pte_flags; 1263 } 1264 1265 static int 1266 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1267 uint64_t start, uint64_t last, 1268 struct dma_fence **fence) 1269 { 1270 uint64_t init_pte_value = 0; 1271 1272 pr_debug("[0x%llx 0x%llx]\n", start, last); 1273 1274 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1275 last, init_pte_value, 0, 0, NULL, NULL, 1276 fence); 1277 } 1278 1279 static int 1280 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1281 unsigned long last, uint32_t trigger) 1282 { 1283 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1284 struct kfd_process_device *pdd; 1285 struct dma_fence *fence = NULL; 1286 struct kfd_process *p; 1287 uint32_t gpuidx; 1288 int r = 0; 1289 1290 if (!prange->mapped_to_gpu) { 1291 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1292 prange, prange->start, prange->last); 1293 return 0; 1294 } 1295 1296 if (prange->start == start && prange->last == last) { 1297 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1298 prange->mapped_to_gpu = false; 1299 } 1300 1301 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1302 MAX_GPU_INSTANCE); 1303 p = container_of(prange->svms, struct kfd_process, svms); 1304 1305 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1306 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1307 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1308 if (!pdd) { 1309 pr_debug("failed to find device idx %d\n", gpuidx); 1310 return -EINVAL; 1311 } 1312 1313 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1314 start, last, trigger); 1315 1316 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1317 drm_priv_to_vm(pdd->drm_priv), 1318 start, last, &fence); 1319 if (r) 1320 break; 1321 1322 if (fence) { 1323 r = dma_fence_wait(fence, false); 1324 dma_fence_put(fence); 1325 fence = NULL; 1326 if (r) 1327 break; 1328 } 1329 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1330 } 1331 1332 return r; 1333 } 1334 1335 static int 1336 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1337 unsigned long offset, unsigned long npages, bool readonly, 1338 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1339 struct dma_fence **fence, bool flush_tlb) 1340 { 1341 struct amdgpu_device *adev = pdd->dev->adev; 1342 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1343 uint64_t pte_flags; 1344 unsigned long last_start; 1345 int last_domain; 1346 int r = 0; 1347 int64_t i, j; 1348 1349 last_start = prange->start + offset; 1350 1351 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1352 last_start, last_start + npages - 1, readonly); 1353 1354 for (i = offset; i < offset + npages; i++) { 1355 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1356 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1357 1358 /* Collect all pages in the same address range and memory domain 1359 * that can be mapped with a single call to update mapping. 1360 */ 1361 if (i < offset + npages - 1 && 1362 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1363 continue; 1364 1365 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1366 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1367 1368 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1369 if (readonly) 1370 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1371 1372 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1373 prange->svms, last_start, prange->start + i, 1374 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1375 pte_flags); 1376 1377 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1378 * different memory partition based on fpfn/lpfn, we should use 1379 * same vm_manager.vram_base_offset regardless memory partition. 1380 */ 1381 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1382 NULL, last_start, prange->start + i, 1383 pte_flags, 1384 (last_start - prange->start) << PAGE_SHIFT, 1385 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1386 NULL, dma_addr, &vm->last_update); 1387 1388 for (j = last_start - prange->start; j <= i; j++) 1389 dma_addr[j] |= last_domain; 1390 1391 if (r) { 1392 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1393 goto out; 1394 } 1395 last_start = prange->start + i + 1; 1396 } 1397 1398 r = amdgpu_vm_update_pdes(adev, vm, false); 1399 if (r) { 1400 pr_debug("failed %d to update directories 0x%lx\n", r, 1401 prange->start); 1402 goto out; 1403 } 1404 1405 if (fence) 1406 *fence = dma_fence_get(vm->last_update); 1407 1408 out: 1409 return r; 1410 } 1411 1412 static int 1413 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1414 unsigned long npages, bool readonly, 1415 unsigned long *bitmap, bool wait, bool flush_tlb) 1416 { 1417 struct kfd_process_device *pdd; 1418 struct amdgpu_device *bo_adev = NULL; 1419 struct kfd_process *p; 1420 struct dma_fence *fence = NULL; 1421 uint32_t gpuidx; 1422 int r = 0; 1423 1424 if (prange->svm_bo && prange->ttm_res) 1425 bo_adev = prange->svm_bo->node->adev; 1426 1427 p = container_of(prange->svms, struct kfd_process, svms); 1428 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1429 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1430 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1431 if (!pdd) { 1432 pr_debug("failed to find device idx %d\n", gpuidx); 1433 return -EINVAL; 1434 } 1435 1436 pdd = kfd_bind_process_to_device(pdd->dev, p); 1437 if (IS_ERR(pdd)) 1438 return -EINVAL; 1439 1440 if (bo_adev && pdd->dev->adev != bo_adev && 1441 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1442 pr_debug("cannot map to device idx %d\n", gpuidx); 1443 continue; 1444 } 1445 1446 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1447 prange->dma_addr[gpuidx], 1448 bo_adev, wait ? &fence : NULL, 1449 flush_tlb); 1450 if (r) 1451 break; 1452 1453 if (fence) { 1454 r = dma_fence_wait(fence, false); 1455 dma_fence_put(fence); 1456 fence = NULL; 1457 if (r) { 1458 pr_debug("failed %d to dma fence wait\n", r); 1459 break; 1460 } 1461 } 1462 1463 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1464 } 1465 1466 return r; 1467 } 1468 1469 struct svm_validate_context { 1470 struct kfd_process *process; 1471 struct svm_range *prange; 1472 bool intr; 1473 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1474 struct drm_exec exec; 1475 }; 1476 1477 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1478 { 1479 struct kfd_process_device *pdd; 1480 struct amdgpu_vm *vm; 1481 uint32_t gpuidx; 1482 int r; 1483 1484 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1485 drm_exec_until_all_locked(&ctx->exec) { 1486 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1487 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1488 if (!pdd) { 1489 pr_debug("failed to find device idx %d\n", gpuidx); 1490 r = -EINVAL; 1491 goto unreserve_out; 1492 } 1493 vm = drm_priv_to_vm(pdd->drm_priv); 1494 1495 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1496 drm_exec_retry_on_contention(&ctx->exec); 1497 if (unlikely(r)) { 1498 pr_debug("failed %d to reserve bo\n", r); 1499 goto unreserve_out; 1500 } 1501 } 1502 } 1503 1504 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1505 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1506 if (!pdd) { 1507 pr_debug("failed to find device idx %d\n", gpuidx); 1508 r = -EINVAL; 1509 goto unreserve_out; 1510 } 1511 1512 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1513 drm_priv_to_vm(pdd->drm_priv), 1514 svm_range_bo_validate, NULL); 1515 if (r) { 1516 pr_debug("failed %d validate pt bos\n", r); 1517 goto unreserve_out; 1518 } 1519 } 1520 1521 return 0; 1522 1523 unreserve_out: 1524 drm_exec_fini(&ctx->exec); 1525 return r; 1526 } 1527 1528 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1529 { 1530 drm_exec_fini(&ctx->exec); 1531 } 1532 1533 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1534 { 1535 struct kfd_process_device *pdd; 1536 1537 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1538 if (!pdd) 1539 return NULL; 1540 1541 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1542 } 1543 1544 /* 1545 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1546 * 1547 * To prevent concurrent destruction or change of range attributes, the 1548 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1549 * because that would block concurrent evictions and lead to deadlocks. To 1550 * serialize concurrent migrations or validations of the same range, the 1551 * prange->migrate_mutex must be held. 1552 * 1553 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1554 * eviction fence. 1555 * 1556 * The following sequence ensures race-free validation and GPU mapping: 1557 * 1558 * 1. Reserve page table (and SVM BO if range is in VRAM) 1559 * 2. hmm_range_fault to get page addresses (if system memory) 1560 * 3. DMA-map pages (if system memory) 1561 * 4-a. Take notifier lock 1562 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1563 * 4-c. Check that the range was not split or otherwise invalidated 1564 * 4-d. Update GPU page table 1565 * 4.e. Release notifier lock 1566 * 5. Release page table (and SVM BO) reservation 1567 */ 1568 static int svm_range_validate_and_map(struct mm_struct *mm, 1569 unsigned long map_start, unsigned long map_last, 1570 struct svm_range *prange, int32_t gpuidx, 1571 bool intr, bool wait, bool flush_tlb) 1572 { 1573 struct svm_validate_context *ctx; 1574 unsigned long start, end, addr; 1575 struct kfd_process *p; 1576 uint64_t vram_pages; 1577 void *owner; 1578 int32_t idx; 1579 int r = 0; 1580 1581 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1582 if (!ctx) 1583 return -ENOMEM; 1584 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1585 ctx->prange = prange; 1586 ctx->intr = intr; 1587 1588 if (gpuidx < MAX_GPU_INSTANCE) { 1589 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1590 bitmap_set(ctx->bitmap, gpuidx, 1); 1591 } else if (ctx->process->xnack_enabled) { 1592 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1593 1594 /* If prefetch range to GPU, or GPU retry fault migrate range to 1595 * GPU, which has ACCESS attribute to the range, create mapping 1596 * on that GPU. 1597 */ 1598 if (prange->actual_loc) { 1599 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1600 prange->actual_loc); 1601 if (gpuidx < 0) { 1602 WARN_ONCE(1, "failed get device by id 0x%x\n", 1603 prange->actual_loc); 1604 r = -EINVAL; 1605 goto free_ctx; 1606 } 1607 if (test_bit(gpuidx, prange->bitmap_access)) 1608 bitmap_set(ctx->bitmap, gpuidx, 1); 1609 } 1610 } else { 1611 bitmap_or(ctx->bitmap, prange->bitmap_access, 1612 prange->bitmap_aip, MAX_GPU_INSTANCE); 1613 } 1614 1615 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1616 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1617 if (!prange->mapped_to_gpu || 1618 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1619 r = 0; 1620 goto free_ctx; 1621 } 1622 } 1623 1624 if (prange->actual_loc && !prange->ttm_res) { 1625 /* This should never happen. actual_loc gets set by 1626 * svm_migrate_ram_to_vram after allocating a BO. 1627 */ 1628 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1629 r = -EINVAL; 1630 goto free_ctx; 1631 } 1632 1633 svm_range_reserve_bos(ctx, intr); 1634 1635 p = container_of(prange->svms, struct kfd_process, svms); 1636 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1637 MAX_GPU_INSTANCE)); 1638 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1639 if (kfd_svm_page_owner(p, idx) != owner) { 1640 owner = NULL; 1641 break; 1642 } 1643 } 1644 1645 vram_pages = 0; 1646 start = prange->start << PAGE_SHIFT; 1647 end = (prange->last + 1) << PAGE_SHIFT; 1648 for (addr = start; !r && addr < end; ) { 1649 struct hmm_range *hmm_range; 1650 unsigned long map_start_vma; 1651 unsigned long map_last_vma; 1652 struct vm_area_struct *vma; 1653 uint64_t vram_pages_vma; 1654 unsigned long next = 0; 1655 unsigned long offset; 1656 unsigned long npages; 1657 bool readonly; 1658 1659 vma = vma_lookup(mm, addr); 1660 if (vma) { 1661 readonly = !(vma->vm_flags & VM_WRITE); 1662 1663 next = min(vma->vm_end, end); 1664 npages = (next - addr) >> PAGE_SHIFT; 1665 WRITE_ONCE(p->svms.faulting_task, current); 1666 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1667 readonly, owner, NULL, 1668 &hmm_range); 1669 WRITE_ONCE(p->svms.faulting_task, NULL); 1670 if (r) { 1671 pr_debug("failed %d to get svm range pages\n", r); 1672 if (r == -EBUSY) 1673 r = -EAGAIN; 1674 } 1675 } else { 1676 r = -EFAULT; 1677 } 1678 1679 if (!r) { 1680 offset = (addr - start) >> PAGE_SHIFT; 1681 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1682 hmm_range->hmm_pfns, &vram_pages_vma); 1683 if (r) 1684 pr_debug("failed %d to dma map range\n", r); 1685 else 1686 vram_pages += vram_pages_vma; 1687 } 1688 1689 svm_range_lock(prange); 1690 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { 1691 pr_debug("hmm update the range, need validate again\n"); 1692 r = -EAGAIN; 1693 } 1694 1695 if (!r && !list_empty(&prange->child_list)) { 1696 pr_debug("range split by unmap in parallel, validate again\n"); 1697 r = -EAGAIN; 1698 } 1699 1700 if (!r) { 1701 map_start_vma = max(map_start, prange->start + offset); 1702 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1703 if (map_start_vma <= map_last_vma) { 1704 offset = map_start_vma - prange->start; 1705 npages = map_last_vma - map_start_vma + 1; 1706 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1707 ctx->bitmap, wait, flush_tlb); 1708 } 1709 } 1710 1711 if (!r && next == end) 1712 prange->mapped_to_gpu = true; 1713 1714 svm_range_unlock(prange); 1715 1716 addr = next; 1717 } 1718 1719 if (addr == end) { 1720 prange->vram_pages = vram_pages; 1721 1722 /* if prange does not include any vram page and it 1723 * has not released svm_bo drop its svm_bo reference 1724 * and set its actaul_loc to sys ram 1725 */ 1726 if (!vram_pages && prange->ttm_res) { 1727 prange->actual_loc = 0; 1728 svm_range_vram_node_free(prange); 1729 } 1730 } 1731 1732 svm_range_unreserve_bos(ctx); 1733 if (!r) 1734 prange->validate_timestamp = ktime_get_boottime(); 1735 1736 free_ctx: 1737 kfree(ctx); 1738 1739 return r; 1740 } 1741 1742 /** 1743 * svm_range_list_lock_and_flush_work - flush pending deferred work 1744 * 1745 * @svms: the svm range list 1746 * @mm: the mm structure 1747 * 1748 * Context: Returns with mmap write lock held, pending deferred work flushed 1749 * 1750 */ 1751 void 1752 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1753 struct mm_struct *mm) 1754 { 1755 retry_flush_work: 1756 flush_work(&svms->deferred_list_work); 1757 mmap_write_lock(mm); 1758 1759 if (list_empty(&svms->deferred_range_list)) 1760 return; 1761 mmap_write_unlock(mm); 1762 pr_debug("retry flush\n"); 1763 goto retry_flush_work; 1764 } 1765 1766 static void svm_range_restore_work(struct work_struct *work) 1767 { 1768 struct delayed_work *dwork = to_delayed_work(work); 1769 struct amdkfd_process_info *process_info; 1770 struct svm_range_list *svms; 1771 struct svm_range *prange; 1772 struct kfd_process *p; 1773 struct mm_struct *mm; 1774 int evicted_ranges; 1775 int invalid; 1776 int r; 1777 1778 svms = container_of(dwork, struct svm_range_list, restore_work); 1779 evicted_ranges = atomic_read(&svms->evicted_ranges); 1780 if (!evicted_ranges) 1781 return; 1782 1783 pr_debug("restore svm ranges\n"); 1784 1785 p = container_of(svms, struct kfd_process, svms); 1786 process_info = p->kgd_process_info; 1787 1788 /* Keep mm reference when svm_range_validate_and_map ranges */ 1789 mm = get_task_mm(p->lead_thread); 1790 if (!mm) { 1791 pr_debug("svms 0x%p process mm gone\n", svms); 1792 return; 1793 } 1794 1795 mutex_lock(&process_info->lock); 1796 svm_range_list_lock_and_flush_work(svms, mm); 1797 mutex_lock(&svms->lock); 1798 1799 evicted_ranges = atomic_read(&svms->evicted_ranges); 1800 1801 list_for_each_entry(prange, &svms->list, list) { 1802 invalid = atomic_read(&prange->invalid); 1803 if (!invalid) 1804 continue; 1805 1806 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1807 prange->svms, prange, prange->start, prange->last, 1808 invalid); 1809 1810 /* 1811 * If range is migrating, wait for migration is done. 1812 */ 1813 mutex_lock(&prange->migrate_mutex); 1814 1815 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1816 MAX_GPU_INSTANCE, false, true, false); 1817 if (r) 1818 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1819 prange->start); 1820 1821 mutex_unlock(&prange->migrate_mutex); 1822 if (r) 1823 goto out_reschedule; 1824 1825 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1826 goto out_reschedule; 1827 } 1828 1829 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1830 evicted_ranges) 1831 goto out_reschedule; 1832 1833 evicted_ranges = 0; 1834 1835 r = kgd2kfd_resume_mm(mm); 1836 if (r) { 1837 /* No recovery from this failure. Probably the CP is 1838 * hanging. No point trying again. 1839 */ 1840 pr_debug("failed %d to resume KFD\n", r); 1841 } 1842 1843 pr_debug("restore svm ranges successfully\n"); 1844 1845 out_reschedule: 1846 mutex_unlock(&svms->lock); 1847 mmap_write_unlock(mm); 1848 mutex_unlock(&process_info->lock); 1849 1850 /* If validation failed, reschedule another attempt */ 1851 if (evicted_ranges) { 1852 pr_debug("reschedule to restore svm range\n"); 1853 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1854 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1855 1856 kfd_smi_event_queue_restore_rescheduled(mm); 1857 } 1858 mmput(mm); 1859 } 1860 1861 /** 1862 * svm_range_evict - evict svm range 1863 * @prange: svm range structure 1864 * @mm: current process mm_struct 1865 * @start: starting process queue number 1866 * @last: last process queue number 1867 * @event: mmu notifier event when range is evicted or migrated 1868 * 1869 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1870 * return to let CPU evict the buffer and proceed CPU pagetable update. 1871 * 1872 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1873 * If invalidation happens while restore work is running, restore work will 1874 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1875 * the queues. 1876 */ 1877 static int 1878 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1879 unsigned long start, unsigned long last, 1880 enum mmu_notifier_event event) 1881 { 1882 struct svm_range_list *svms = prange->svms; 1883 struct svm_range *pchild; 1884 struct kfd_process *p; 1885 int r = 0; 1886 1887 p = container_of(svms, struct kfd_process, svms); 1888 1889 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1890 svms, prange->start, prange->last, start, last); 1891 1892 if (!p->xnack_enabled || 1893 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1894 int evicted_ranges; 1895 bool mapped = prange->mapped_to_gpu; 1896 1897 list_for_each_entry(pchild, &prange->child_list, child_list) { 1898 if (!pchild->mapped_to_gpu) 1899 continue; 1900 mapped = true; 1901 mutex_lock_nested(&pchild->lock, 1); 1902 if (pchild->start <= last && pchild->last >= start) { 1903 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1904 pchild->start, pchild->last); 1905 atomic_inc(&pchild->invalid); 1906 } 1907 mutex_unlock(&pchild->lock); 1908 } 1909 1910 if (!mapped) 1911 return r; 1912 1913 if (prange->start <= last && prange->last >= start) 1914 atomic_inc(&prange->invalid); 1915 1916 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1917 if (evicted_ranges != 1) 1918 return r; 1919 1920 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1921 prange->svms, prange->start, prange->last); 1922 1923 /* First eviction, stop the queues */ 1924 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1925 if (r) 1926 pr_debug("failed to quiesce KFD\n"); 1927 1928 pr_debug("schedule to restore svm %p ranges\n", svms); 1929 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1930 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1931 } else { 1932 unsigned long s, l; 1933 uint32_t trigger; 1934 1935 if (event == MMU_NOTIFY_MIGRATE) 1936 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1937 else 1938 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1939 1940 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1941 prange->svms, start, last); 1942 list_for_each_entry(pchild, &prange->child_list, child_list) { 1943 mutex_lock_nested(&pchild->lock, 1); 1944 s = max(start, pchild->start); 1945 l = min(last, pchild->last); 1946 if (l >= s) 1947 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1948 mutex_unlock(&pchild->lock); 1949 } 1950 s = max(start, prange->start); 1951 l = min(last, prange->last); 1952 if (l >= s) 1953 svm_range_unmap_from_gpus(prange, s, l, trigger); 1954 } 1955 1956 return r; 1957 } 1958 1959 static struct svm_range *svm_range_clone(struct svm_range *old) 1960 { 1961 struct svm_range *new; 1962 1963 new = svm_range_new(old->svms, old->start, old->last, false); 1964 if (!new) 1965 return NULL; 1966 if (svm_range_copy_dma_addrs(new, old)) { 1967 svm_range_free(new, false); 1968 return NULL; 1969 } 1970 if (old->svm_bo) { 1971 new->ttm_res = old->ttm_res; 1972 new->offset = old->offset; 1973 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1974 spin_lock(&new->svm_bo->list_lock); 1975 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1976 spin_unlock(&new->svm_bo->list_lock); 1977 } 1978 new->flags = old->flags; 1979 new->preferred_loc = old->preferred_loc; 1980 new->prefetch_loc = old->prefetch_loc; 1981 new->actual_loc = old->actual_loc; 1982 new->granularity = old->granularity; 1983 new->mapped_to_gpu = old->mapped_to_gpu; 1984 new->vram_pages = old->vram_pages; 1985 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1986 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1987 1988 return new; 1989 } 1990 1991 void svm_range_set_max_pages(struct amdgpu_device *adev) 1992 { 1993 uint64_t max_pages; 1994 uint64_t pages, _pages; 1995 uint64_t min_pages = 0; 1996 int i, id; 1997 1998 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 1999 if (adev->kfd.dev->nodes[i]->xcp) 2000 id = adev->kfd.dev->nodes[i]->xcp->id; 2001 else 2002 id = -1; 2003 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2004 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2005 pages = rounddown_pow_of_two(pages); 2006 min_pages = min_not_zero(min_pages, pages); 2007 } 2008 2009 do { 2010 max_pages = READ_ONCE(max_svm_range_pages); 2011 _pages = min_not_zero(max_pages, min_pages); 2012 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2013 } 2014 2015 static int 2016 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2017 uint64_t max_pages, struct list_head *insert_list, 2018 struct list_head *update_list) 2019 { 2020 struct svm_range *prange; 2021 uint64_t l; 2022 2023 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2024 max_pages, start, last); 2025 2026 while (last >= start) { 2027 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2028 2029 prange = svm_range_new(svms, start, l, true); 2030 if (!prange) 2031 return -ENOMEM; 2032 list_add(&prange->list, insert_list); 2033 list_add(&prange->update_list, update_list); 2034 2035 start = l + 1; 2036 } 2037 return 0; 2038 } 2039 2040 /** 2041 * svm_range_add - add svm range and handle overlap 2042 * @p: the range add to this process svms 2043 * @start: page size aligned 2044 * @size: page size aligned 2045 * @nattr: number of attributes 2046 * @attrs: array of attributes 2047 * @update_list: output, the ranges need validate and update GPU mapping 2048 * @insert_list: output, the ranges need insert to svms 2049 * @remove_list: output, the ranges are replaced and need remove from svms 2050 * @remap_list: output, remap unaligned svm ranges 2051 * 2052 * Check if the virtual address range has overlap with any existing ranges, 2053 * split partly overlapping ranges and add new ranges in the gaps. All changes 2054 * should be applied to the range_list and interval tree transactionally. If 2055 * any range split or allocation fails, the entire update fails. Therefore any 2056 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2057 * unchanged. 2058 * 2059 * If the transaction succeeds, the caller can update and insert clones and 2060 * new ranges, then free the originals. 2061 * 2062 * Otherwise the caller can free the clones and new ranges, while the old 2063 * svm_ranges remain unchanged. 2064 * 2065 * Context: Process context, caller must hold svms->lock 2066 * 2067 * Return: 2068 * 0 - OK, otherwise error code 2069 */ 2070 static int 2071 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2072 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2073 struct list_head *update_list, struct list_head *insert_list, 2074 struct list_head *remove_list, struct list_head *remap_list) 2075 { 2076 unsigned long last = start + size - 1UL; 2077 struct svm_range_list *svms = &p->svms; 2078 struct interval_tree_node *node; 2079 struct svm_range *prange; 2080 struct svm_range *tmp; 2081 struct list_head new_list; 2082 int r = 0; 2083 2084 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2085 2086 INIT_LIST_HEAD(update_list); 2087 INIT_LIST_HEAD(insert_list); 2088 INIT_LIST_HEAD(remove_list); 2089 INIT_LIST_HEAD(&new_list); 2090 INIT_LIST_HEAD(remap_list); 2091 2092 node = interval_tree_iter_first(&svms->objects, start, last); 2093 while (node) { 2094 struct interval_tree_node *next; 2095 unsigned long next_start; 2096 2097 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2098 node->last); 2099 2100 prange = container_of(node, struct svm_range, it_node); 2101 next = interval_tree_iter_next(node, start, last); 2102 next_start = min(node->last, last) + 1; 2103 2104 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2105 prange->mapped_to_gpu) { 2106 /* nothing to do */ 2107 } else if (node->start < start || node->last > last) { 2108 /* node intersects the update range and its attributes 2109 * will change. Clone and split it, apply updates only 2110 * to the overlapping part 2111 */ 2112 struct svm_range *old = prange; 2113 2114 prange = svm_range_clone(old); 2115 if (!prange) { 2116 r = -ENOMEM; 2117 goto out; 2118 } 2119 2120 list_add(&old->update_list, remove_list); 2121 list_add(&prange->list, insert_list); 2122 list_add(&prange->update_list, update_list); 2123 2124 if (node->start < start) { 2125 pr_debug("change old range start\n"); 2126 r = svm_range_split_head(prange, start, 2127 insert_list, remap_list); 2128 if (r) 2129 goto out; 2130 } 2131 if (node->last > last) { 2132 pr_debug("change old range last\n"); 2133 r = svm_range_split_tail(prange, last, 2134 insert_list, remap_list); 2135 if (r) 2136 goto out; 2137 } 2138 } else { 2139 /* The node is contained within start..last, 2140 * just update it 2141 */ 2142 list_add(&prange->update_list, update_list); 2143 } 2144 2145 /* insert a new node if needed */ 2146 if (node->start > start) { 2147 r = svm_range_split_new(svms, start, node->start - 1, 2148 READ_ONCE(max_svm_range_pages), 2149 &new_list, update_list); 2150 if (r) 2151 goto out; 2152 } 2153 2154 node = next; 2155 start = next_start; 2156 } 2157 2158 /* add a final range at the end if needed */ 2159 if (start <= last) 2160 r = svm_range_split_new(svms, start, last, 2161 READ_ONCE(max_svm_range_pages), 2162 &new_list, update_list); 2163 2164 out: 2165 if (r) { 2166 list_for_each_entry_safe(prange, tmp, insert_list, list) 2167 svm_range_free(prange, false); 2168 list_for_each_entry_safe(prange, tmp, &new_list, list) 2169 svm_range_free(prange, true); 2170 } else { 2171 list_splice(&new_list, insert_list); 2172 } 2173 2174 return r; 2175 } 2176 2177 static void 2178 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2179 struct svm_range *prange) 2180 { 2181 unsigned long start; 2182 unsigned long last; 2183 2184 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2185 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2186 2187 if (prange->start == start && prange->last == last) 2188 return; 2189 2190 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2191 prange->svms, prange, start, last, prange->start, 2192 prange->last); 2193 2194 if (start != 0 && last != 0) { 2195 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2196 svm_range_remove_notifier(prange); 2197 } 2198 prange->it_node.start = prange->start; 2199 prange->it_node.last = prange->last; 2200 2201 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2202 svm_range_add_notifier_locked(mm, prange); 2203 } 2204 2205 static void 2206 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2207 struct mm_struct *mm) 2208 { 2209 switch (prange->work_item.op) { 2210 case SVM_OP_NULL: 2211 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2212 svms, prange, prange->start, prange->last); 2213 break; 2214 case SVM_OP_UNMAP_RANGE: 2215 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2216 svms, prange, prange->start, prange->last); 2217 svm_range_unlink(prange); 2218 svm_range_remove_notifier(prange); 2219 svm_range_free(prange, true); 2220 break; 2221 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2222 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2223 svms, prange, prange->start, prange->last); 2224 svm_range_update_notifier_and_interval_tree(mm, prange); 2225 break; 2226 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2227 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2228 svms, prange, prange->start, prange->last); 2229 svm_range_update_notifier_and_interval_tree(mm, prange); 2230 /* TODO: implement deferred validation and mapping */ 2231 break; 2232 case SVM_OP_ADD_RANGE: 2233 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2234 prange->start, prange->last); 2235 svm_range_add_to_svms(prange); 2236 svm_range_add_notifier_locked(mm, prange); 2237 break; 2238 case SVM_OP_ADD_RANGE_AND_MAP: 2239 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2240 prange, prange->start, prange->last); 2241 svm_range_add_to_svms(prange); 2242 svm_range_add_notifier_locked(mm, prange); 2243 /* TODO: implement deferred validation and mapping */ 2244 break; 2245 default: 2246 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2247 prange->work_item.op); 2248 } 2249 } 2250 2251 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2252 { 2253 struct kfd_process_device *pdd; 2254 struct kfd_process *p; 2255 int drain; 2256 uint32_t i; 2257 2258 p = container_of(svms, struct kfd_process, svms); 2259 2260 restart: 2261 drain = atomic_read(&svms->drain_pagefaults); 2262 if (!drain) 2263 return; 2264 2265 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2266 pdd = p->pdds[i]; 2267 if (!pdd) 2268 continue; 2269 2270 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2271 2272 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2273 pdd->dev->adev->irq.retry_cam_enabled ? 2274 &pdd->dev->adev->irq.ih : 2275 &pdd->dev->adev->irq.ih1); 2276 2277 if (pdd->dev->adev->irq.retry_cam_enabled) 2278 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2279 &pdd->dev->adev->irq.ih_soft); 2280 2281 2282 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2283 } 2284 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2285 goto restart; 2286 } 2287 2288 static void svm_range_deferred_list_work(struct work_struct *work) 2289 { 2290 struct svm_range_list *svms; 2291 struct svm_range *prange; 2292 struct mm_struct *mm; 2293 2294 svms = container_of(work, struct svm_range_list, deferred_list_work); 2295 pr_debug("enter svms 0x%p\n", svms); 2296 2297 spin_lock(&svms->deferred_list_lock); 2298 while (!list_empty(&svms->deferred_range_list)) { 2299 prange = list_first_entry(&svms->deferred_range_list, 2300 struct svm_range, deferred_list); 2301 spin_unlock(&svms->deferred_list_lock); 2302 2303 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2304 prange->start, prange->last, prange->work_item.op); 2305 2306 mm = prange->work_item.mm; 2307 retry: 2308 mmap_write_lock(mm); 2309 2310 /* Checking for the need to drain retry faults must be inside 2311 * mmap write lock to serialize with munmap notifiers. 2312 */ 2313 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2314 mmap_write_unlock(mm); 2315 svm_range_drain_retry_fault(svms); 2316 goto retry; 2317 } 2318 2319 /* Remove from deferred_list must be inside mmap write lock, for 2320 * two race cases: 2321 * 1. unmap_from_cpu may change work_item.op and add the range 2322 * to deferred_list again, cause use after free bug. 2323 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2324 * lock and continue because deferred_list is empty, but 2325 * deferred_list work is actually waiting for mmap lock. 2326 */ 2327 spin_lock(&svms->deferred_list_lock); 2328 list_del_init(&prange->deferred_list); 2329 spin_unlock(&svms->deferred_list_lock); 2330 2331 mutex_lock(&svms->lock); 2332 mutex_lock(&prange->migrate_mutex); 2333 while (!list_empty(&prange->child_list)) { 2334 struct svm_range *pchild; 2335 2336 pchild = list_first_entry(&prange->child_list, 2337 struct svm_range, child_list); 2338 pr_debug("child prange 0x%p op %d\n", pchild, 2339 pchild->work_item.op); 2340 list_del_init(&pchild->child_list); 2341 svm_range_handle_list_op(svms, pchild, mm); 2342 } 2343 mutex_unlock(&prange->migrate_mutex); 2344 2345 svm_range_handle_list_op(svms, prange, mm); 2346 mutex_unlock(&svms->lock); 2347 mmap_write_unlock(mm); 2348 2349 /* Pairs with mmget in svm_range_add_list_work */ 2350 mmput(mm); 2351 2352 spin_lock(&svms->deferred_list_lock); 2353 } 2354 spin_unlock(&svms->deferred_list_lock); 2355 pr_debug("exit svms 0x%p\n", svms); 2356 } 2357 2358 void 2359 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2360 struct mm_struct *mm, enum svm_work_list_ops op) 2361 { 2362 spin_lock(&svms->deferred_list_lock); 2363 /* if prange is on the deferred list */ 2364 if (!list_empty(&prange->deferred_list)) { 2365 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2366 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2367 if (op != SVM_OP_NULL && 2368 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2369 prange->work_item.op = op; 2370 } else { 2371 prange->work_item.op = op; 2372 2373 /* Pairs with mmput in deferred_list_work */ 2374 mmget(mm); 2375 prange->work_item.mm = mm; 2376 list_add_tail(&prange->deferred_list, 2377 &prange->svms->deferred_range_list); 2378 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2379 prange, prange->start, prange->last, op); 2380 } 2381 spin_unlock(&svms->deferred_list_lock); 2382 } 2383 2384 void schedule_deferred_list_work(struct svm_range_list *svms) 2385 { 2386 spin_lock(&svms->deferred_list_lock); 2387 if (!list_empty(&svms->deferred_range_list)) 2388 schedule_work(&svms->deferred_list_work); 2389 spin_unlock(&svms->deferred_list_lock); 2390 } 2391 2392 static void 2393 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2394 struct svm_range *prange, unsigned long start, 2395 unsigned long last) 2396 { 2397 struct svm_range *head; 2398 struct svm_range *tail; 2399 2400 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2401 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2402 prange->start, prange->last); 2403 return; 2404 } 2405 if (start > prange->last || last < prange->start) 2406 return; 2407 2408 head = tail = prange; 2409 if (start > prange->start) 2410 svm_range_split(prange, prange->start, start - 1, &tail); 2411 if (last < tail->last) 2412 svm_range_split(tail, last + 1, tail->last, &head); 2413 2414 if (head != prange && tail != prange) { 2415 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2416 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2417 } else if (tail != prange) { 2418 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2419 } else if (head != prange) { 2420 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2421 } else if (parent != prange) { 2422 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2423 } 2424 } 2425 2426 static void 2427 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2428 unsigned long start, unsigned long last) 2429 { 2430 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2431 struct svm_range_list *svms; 2432 struct svm_range *pchild; 2433 struct kfd_process *p; 2434 unsigned long s, l; 2435 bool unmap_parent; 2436 2437 p = kfd_lookup_process_by_mm(mm); 2438 if (!p) 2439 return; 2440 svms = &p->svms; 2441 2442 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2443 prange, prange->start, prange->last, start, last); 2444 2445 /* Make sure pending page faults are drained in the deferred worker 2446 * before the range is freed to avoid straggler interrupts on 2447 * unmapped memory causing "phantom faults". 2448 */ 2449 atomic_inc(&svms->drain_pagefaults); 2450 2451 unmap_parent = start <= prange->start && last >= prange->last; 2452 2453 list_for_each_entry(pchild, &prange->child_list, child_list) { 2454 mutex_lock_nested(&pchild->lock, 1); 2455 s = max(start, pchild->start); 2456 l = min(last, pchild->last); 2457 if (l >= s) 2458 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2459 svm_range_unmap_split(mm, prange, pchild, start, last); 2460 mutex_unlock(&pchild->lock); 2461 } 2462 s = max(start, prange->start); 2463 l = min(last, prange->last); 2464 if (l >= s) 2465 svm_range_unmap_from_gpus(prange, s, l, trigger); 2466 svm_range_unmap_split(mm, prange, prange, start, last); 2467 2468 if (unmap_parent) 2469 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2470 else 2471 svm_range_add_list_work(svms, prange, mm, 2472 SVM_OP_UPDATE_RANGE_NOTIFIER); 2473 schedule_deferred_list_work(svms); 2474 2475 kfd_unref_process(p); 2476 } 2477 2478 /** 2479 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2480 * @mni: mmu_interval_notifier struct 2481 * @range: mmu_notifier_range struct 2482 * @cur_seq: value to pass to mmu_interval_set_seq() 2483 * 2484 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2485 * is from migration, or CPU page invalidation callback. 2486 * 2487 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2488 * work thread, and split prange if only part of prange is unmapped. 2489 * 2490 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2491 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2492 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2493 * update GPU mapping to recover. 2494 * 2495 * Context: mmap lock, notifier_invalidate_start lock are held 2496 * for invalidate event, prange lock is held if this is from migration 2497 */ 2498 static bool 2499 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2500 const struct mmu_notifier_range *range, 2501 unsigned long cur_seq) 2502 { 2503 struct svm_range *prange; 2504 unsigned long start; 2505 unsigned long last; 2506 2507 if (range->event == MMU_NOTIFY_RELEASE) 2508 return true; 2509 if (!mmget_not_zero(mni->mm)) 2510 return true; 2511 2512 start = mni->interval_tree.start; 2513 last = mni->interval_tree.last; 2514 start = max(start, range->start) >> PAGE_SHIFT; 2515 last = min(last, range->end - 1) >> PAGE_SHIFT; 2516 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2517 start, last, range->start >> PAGE_SHIFT, 2518 (range->end - 1) >> PAGE_SHIFT, 2519 mni->interval_tree.start >> PAGE_SHIFT, 2520 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2521 2522 prange = container_of(mni, struct svm_range, notifier); 2523 2524 svm_range_lock(prange); 2525 mmu_interval_set_seq(mni, cur_seq); 2526 2527 switch (range->event) { 2528 case MMU_NOTIFY_UNMAP: 2529 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2530 break; 2531 default: 2532 svm_range_evict(prange, mni->mm, start, last, range->event); 2533 break; 2534 } 2535 2536 svm_range_unlock(prange); 2537 mmput(mni->mm); 2538 2539 return true; 2540 } 2541 2542 /** 2543 * svm_range_from_addr - find svm range from fault address 2544 * @svms: svm range list header 2545 * @addr: address to search range interval tree, in pages 2546 * @parent: parent range if range is on child list 2547 * 2548 * Context: The caller must hold svms->lock 2549 * 2550 * Return: the svm_range found or NULL 2551 */ 2552 struct svm_range * 2553 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2554 struct svm_range **parent) 2555 { 2556 struct interval_tree_node *node; 2557 struct svm_range *prange; 2558 struct svm_range *pchild; 2559 2560 node = interval_tree_iter_first(&svms->objects, addr, addr); 2561 if (!node) 2562 return NULL; 2563 2564 prange = container_of(node, struct svm_range, it_node); 2565 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2566 addr, prange->start, prange->last, node->start, node->last); 2567 2568 if (addr >= prange->start && addr <= prange->last) { 2569 if (parent) 2570 *parent = prange; 2571 return prange; 2572 } 2573 list_for_each_entry(pchild, &prange->child_list, child_list) 2574 if (addr >= pchild->start && addr <= pchild->last) { 2575 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2576 addr, pchild->start, pchild->last); 2577 if (parent) 2578 *parent = prange; 2579 return pchild; 2580 } 2581 2582 return NULL; 2583 } 2584 2585 /* svm_range_best_restore_location - decide the best fault restore location 2586 * @prange: svm range structure 2587 * @adev: the GPU on which vm fault happened 2588 * 2589 * This is only called when xnack is on, to decide the best location to restore 2590 * the range mapping after GPU vm fault. Caller uses the best location to do 2591 * migration if actual loc is not best location, then update GPU page table 2592 * mapping to the best location. 2593 * 2594 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2595 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2596 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2597 * if range actual loc is cpu, best_loc is cpu 2598 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2599 * range actual loc. 2600 * Otherwise, GPU no access, best_loc is -1. 2601 * 2602 * Return: 2603 * -1 means vm fault GPU no access 2604 * 0 for CPU or GPU id 2605 */ 2606 static int32_t 2607 svm_range_best_restore_location(struct svm_range *prange, 2608 struct kfd_node *node, 2609 int32_t *gpuidx) 2610 { 2611 struct kfd_node *bo_node, *preferred_node; 2612 struct kfd_process *p; 2613 uint32_t gpuid; 2614 int r; 2615 2616 p = container_of(prange->svms, struct kfd_process, svms); 2617 2618 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2619 if (r < 0) { 2620 pr_debug("failed to get gpuid from kgd\n"); 2621 return -1; 2622 } 2623 2624 if (node->adev->gmc.is_app_apu) 2625 return 0; 2626 2627 if (prange->preferred_loc == gpuid || 2628 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2629 return prange->preferred_loc; 2630 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2631 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2632 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2633 return prange->preferred_loc; 2634 /* fall through */ 2635 } 2636 2637 if (test_bit(*gpuidx, prange->bitmap_access)) 2638 return gpuid; 2639 2640 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2641 if (!prange->actual_loc) 2642 return 0; 2643 2644 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2645 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2646 return prange->actual_loc; 2647 else 2648 return 0; 2649 } 2650 2651 return -1; 2652 } 2653 2654 static int 2655 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2656 unsigned long *start, unsigned long *last, 2657 bool *is_heap_stack) 2658 { 2659 struct vm_area_struct *vma; 2660 struct interval_tree_node *node; 2661 unsigned long start_limit, end_limit; 2662 2663 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2664 if (!vma) { 2665 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2666 return -EFAULT; 2667 } 2668 2669 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2670 2671 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2672 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2673 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2674 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2675 /* First range that starts after the fault address */ 2676 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2677 if (node) { 2678 end_limit = min(end_limit, node->start); 2679 /* Last range that ends before the fault address */ 2680 node = container_of(rb_prev(&node->rb), 2681 struct interval_tree_node, rb); 2682 } else { 2683 /* Last range must end before addr because 2684 * there was no range after addr 2685 */ 2686 node = container_of(rb_last(&p->svms.objects.rb_root), 2687 struct interval_tree_node, rb); 2688 } 2689 if (node) { 2690 if (node->last >= addr) { 2691 WARN(1, "Overlap with prev node and page fault addr\n"); 2692 return -EFAULT; 2693 } 2694 start_limit = max(start_limit, node->last + 1); 2695 } 2696 2697 *start = start_limit; 2698 *last = end_limit - 1; 2699 2700 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2701 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2702 *start, *last, *is_heap_stack); 2703 2704 return 0; 2705 } 2706 2707 static int 2708 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2709 uint64_t *bo_s, uint64_t *bo_l) 2710 { 2711 struct amdgpu_bo_va_mapping *mapping; 2712 struct interval_tree_node *node; 2713 struct amdgpu_bo *bo = NULL; 2714 unsigned long userptr; 2715 uint32_t i; 2716 int r; 2717 2718 for (i = 0; i < p->n_pdds; i++) { 2719 struct amdgpu_vm *vm; 2720 2721 if (!p->pdds[i]->drm_priv) 2722 continue; 2723 2724 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2725 r = amdgpu_bo_reserve(vm->root.bo, false); 2726 if (r) 2727 return r; 2728 2729 /* Check userptr by searching entire vm->va interval tree */ 2730 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2731 while (node) { 2732 mapping = container_of((struct rb_node *)node, 2733 struct amdgpu_bo_va_mapping, rb); 2734 bo = mapping->bo_va->base.bo; 2735 2736 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2737 start << PAGE_SHIFT, 2738 last << PAGE_SHIFT, 2739 &userptr)) { 2740 node = interval_tree_iter_next(node, 0, ~0ULL); 2741 continue; 2742 } 2743 2744 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2745 start, last); 2746 if (bo_s && bo_l) { 2747 *bo_s = userptr >> PAGE_SHIFT; 2748 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2749 } 2750 amdgpu_bo_unreserve(vm->root.bo); 2751 return -EADDRINUSE; 2752 } 2753 amdgpu_bo_unreserve(vm->root.bo); 2754 } 2755 return 0; 2756 } 2757 2758 static struct 2759 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2760 struct kfd_process *p, 2761 struct mm_struct *mm, 2762 int64_t addr) 2763 { 2764 struct svm_range *prange = NULL; 2765 unsigned long start, last; 2766 uint32_t gpuid, gpuidx; 2767 bool is_heap_stack; 2768 uint64_t bo_s = 0; 2769 uint64_t bo_l = 0; 2770 int r; 2771 2772 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2773 &is_heap_stack)) 2774 return NULL; 2775 2776 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2777 if (r != -EADDRINUSE) 2778 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2779 2780 if (r == -EADDRINUSE) { 2781 if (addr >= bo_s && addr <= bo_l) 2782 return NULL; 2783 2784 /* Create one page svm range if 2MB range overlapping */ 2785 start = addr; 2786 last = addr; 2787 } 2788 2789 prange = svm_range_new(&p->svms, start, last, true); 2790 if (!prange) { 2791 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2792 return NULL; 2793 } 2794 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2795 pr_debug("failed to get gpuid from kgd\n"); 2796 svm_range_free(prange, true); 2797 return NULL; 2798 } 2799 2800 if (is_heap_stack) 2801 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2802 2803 svm_range_add_to_svms(prange); 2804 svm_range_add_notifier_locked(mm, prange); 2805 2806 return prange; 2807 } 2808 2809 /* svm_range_skip_recover - decide if prange can be recovered 2810 * @prange: svm range structure 2811 * 2812 * GPU vm retry fault handle skip recover the range for cases: 2813 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2814 * deferred list work will drain the stale fault before free the prange. 2815 * 2. prange is on deferred list to add interval notifier after split, or 2816 * 3. prange is child range, it is split from parent prange, recover later 2817 * after interval notifier is added. 2818 * 2819 * Return: true to skip recover, false to recover 2820 */ 2821 static bool svm_range_skip_recover(struct svm_range *prange) 2822 { 2823 struct svm_range_list *svms = prange->svms; 2824 2825 spin_lock(&svms->deferred_list_lock); 2826 if (list_empty(&prange->deferred_list) && 2827 list_empty(&prange->child_list)) { 2828 spin_unlock(&svms->deferred_list_lock); 2829 return false; 2830 } 2831 spin_unlock(&svms->deferred_list_lock); 2832 2833 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2834 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2835 svms, prange, prange->start, prange->last); 2836 return true; 2837 } 2838 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2839 prange->work_item.op == SVM_OP_ADD_RANGE) { 2840 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2841 svms, prange, prange->start, prange->last); 2842 return true; 2843 } 2844 return false; 2845 } 2846 2847 static void 2848 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2849 int32_t gpuidx) 2850 { 2851 struct kfd_process_device *pdd; 2852 2853 /* fault is on different page of same range 2854 * or fault is skipped to recover later 2855 * or fault is on invalid virtual address 2856 */ 2857 if (gpuidx == MAX_GPU_INSTANCE) { 2858 uint32_t gpuid; 2859 int r; 2860 2861 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2862 if (r < 0) 2863 return; 2864 } 2865 2866 /* fault is recovered 2867 * or fault cannot recover because GPU no access on the range 2868 */ 2869 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2870 if (pdd) 2871 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2872 } 2873 2874 static bool 2875 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2876 { 2877 unsigned long requested = VM_READ; 2878 2879 if (write_fault) 2880 requested |= VM_WRITE; 2881 2882 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2883 vma->vm_flags); 2884 return (vma->vm_flags & requested) == requested; 2885 } 2886 2887 int 2888 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2889 uint32_t vmid, uint32_t node_id, 2890 uint64_t addr, bool write_fault) 2891 { 2892 unsigned long start, last, size; 2893 struct mm_struct *mm = NULL; 2894 struct svm_range_list *svms; 2895 struct svm_range *prange; 2896 struct kfd_process *p; 2897 ktime_t timestamp = ktime_get_boottime(); 2898 struct kfd_node *node; 2899 int32_t best_loc; 2900 int32_t gpuidx = MAX_GPU_INSTANCE; 2901 bool write_locked = false; 2902 struct vm_area_struct *vma; 2903 bool migration = false; 2904 int r = 0; 2905 2906 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2907 pr_debug("device does not support SVM\n"); 2908 return -EFAULT; 2909 } 2910 2911 p = kfd_lookup_process_by_pasid(pasid); 2912 if (!p) { 2913 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2914 return 0; 2915 } 2916 svms = &p->svms; 2917 2918 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2919 2920 if (atomic_read(&svms->drain_pagefaults)) { 2921 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2922 r = 0; 2923 goto out; 2924 } 2925 2926 if (!p->xnack_enabled) { 2927 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2928 r = -EFAULT; 2929 goto out; 2930 } 2931 2932 /* p->lead_thread is available as kfd_process_wq_release flush the work 2933 * before releasing task ref. 2934 */ 2935 mm = get_task_mm(p->lead_thread); 2936 if (!mm) { 2937 pr_debug("svms 0x%p failed to get mm\n", svms); 2938 r = 0; 2939 goto out; 2940 } 2941 2942 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2943 if (!node) { 2944 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2945 vmid); 2946 r = -EFAULT; 2947 goto out; 2948 } 2949 mmap_read_lock(mm); 2950 retry_write_locked: 2951 mutex_lock(&svms->lock); 2952 prange = svm_range_from_addr(svms, addr, NULL); 2953 if (!prange) { 2954 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2955 svms, addr); 2956 if (!write_locked) { 2957 /* Need the write lock to create new range with MMU notifier. 2958 * Also flush pending deferred work to make sure the interval 2959 * tree is up to date before we add a new range 2960 */ 2961 mutex_unlock(&svms->lock); 2962 mmap_read_unlock(mm); 2963 mmap_write_lock(mm); 2964 write_locked = true; 2965 goto retry_write_locked; 2966 } 2967 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2968 if (!prange) { 2969 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2970 svms, addr); 2971 mmap_write_downgrade(mm); 2972 r = -EFAULT; 2973 goto out_unlock_svms; 2974 } 2975 } 2976 if (write_locked) 2977 mmap_write_downgrade(mm); 2978 2979 mutex_lock(&prange->migrate_mutex); 2980 2981 if (svm_range_skip_recover(prange)) { 2982 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2983 r = 0; 2984 goto out_unlock_range; 2985 } 2986 2987 /* skip duplicate vm fault on different pages of same range */ 2988 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2989 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2990 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2991 svms, prange->start, prange->last); 2992 r = 0; 2993 goto out_unlock_range; 2994 } 2995 2996 /* __do_munmap removed VMA, return success as we are handling stale 2997 * retry fault. 2998 */ 2999 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3000 if (!vma) { 3001 pr_debug("address 0x%llx VMA is removed\n", addr); 3002 r = 0; 3003 goto out_unlock_range; 3004 } 3005 3006 if (!svm_fault_allowed(vma, write_fault)) { 3007 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3008 write_fault ? "write" : "read"); 3009 r = -EPERM; 3010 goto out_unlock_range; 3011 } 3012 3013 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3014 if (best_loc == -1) { 3015 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3016 svms, prange->start, prange->last); 3017 r = -EACCES; 3018 goto out_unlock_range; 3019 } 3020 3021 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3022 svms, prange->start, prange->last, best_loc, 3023 prange->actual_loc); 3024 3025 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3026 write_fault, timestamp); 3027 3028 /* Align migration range start and size to granularity size */ 3029 size = 1UL << prange->granularity; 3030 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3031 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3032 if (prange->actual_loc != 0 || best_loc != 0) { 3033 migration = true; 3034 3035 if (best_loc) { 3036 r = svm_migrate_to_vram(prange, best_loc, start, last, 3037 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3038 if (r) { 3039 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3040 r, addr); 3041 /* Fallback to system memory if migration to 3042 * VRAM failed 3043 */ 3044 if (prange->actual_loc && prange->actual_loc != best_loc) 3045 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3046 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3047 else 3048 r = 0; 3049 } 3050 } else { 3051 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3052 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3053 } 3054 if (r) { 3055 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3056 r, svms, start, last); 3057 goto out_unlock_range; 3058 } 3059 } 3060 3061 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3062 false, false); 3063 if (r) 3064 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3065 r, svms, start, last); 3066 3067 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3068 migration); 3069 3070 out_unlock_range: 3071 mutex_unlock(&prange->migrate_mutex); 3072 out_unlock_svms: 3073 mutex_unlock(&svms->lock); 3074 mmap_read_unlock(mm); 3075 3076 svm_range_count_fault(node, p, gpuidx); 3077 3078 mmput(mm); 3079 out: 3080 kfd_unref_process(p); 3081 3082 if (r == -EAGAIN) { 3083 pr_debug("recover vm fault later\n"); 3084 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3085 r = 0; 3086 } 3087 return r; 3088 } 3089 3090 int 3091 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3092 { 3093 struct svm_range *prange, *pchild; 3094 uint64_t reserved_size = 0; 3095 uint64_t size; 3096 int r = 0; 3097 3098 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3099 3100 mutex_lock(&p->svms.lock); 3101 3102 list_for_each_entry(prange, &p->svms.list, list) { 3103 svm_range_lock(prange); 3104 list_for_each_entry(pchild, &prange->child_list, child_list) { 3105 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3106 if (xnack_enabled) { 3107 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3108 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3109 } else { 3110 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3111 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3112 if (r) 3113 goto out_unlock; 3114 reserved_size += size; 3115 } 3116 } 3117 3118 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3119 if (xnack_enabled) { 3120 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3121 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3122 } else { 3123 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3124 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3125 if (r) 3126 goto out_unlock; 3127 reserved_size += size; 3128 } 3129 out_unlock: 3130 svm_range_unlock(prange); 3131 if (r) 3132 break; 3133 } 3134 3135 if (r) 3136 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3137 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3138 else 3139 /* Change xnack mode must be inside svms lock, to avoid race with 3140 * svm_range_deferred_list_work unreserve memory in parallel. 3141 */ 3142 p->xnack_enabled = xnack_enabled; 3143 3144 mutex_unlock(&p->svms.lock); 3145 return r; 3146 } 3147 3148 void svm_range_list_fini(struct kfd_process *p) 3149 { 3150 struct svm_range *prange; 3151 struct svm_range *next; 3152 3153 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3154 3155 cancel_delayed_work_sync(&p->svms.restore_work); 3156 3157 /* Ensure list work is finished before process is destroyed */ 3158 flush_work(&p->svms.deferred_list_work); 3159 3160 /* 3161 * Ensure no retry fault comes in afterwards, as page fault handler will 3162 * not find kfd process and take mm lock to recover fault. 3163 */ 3164 atomic_inc(&p->svms.drain_pagefaults); 3165 svm_range_drain_retry_fault(&p->svms); 3166 3167 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3168 svm_range_unlink(prange); 3169 svm_range_remove_notifier(prange); 3170 svm_range_free(prange, true); 3171 } 3172 3173 mutex_destroy(&p->svms.lock); 3174 3175 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3176 } 3177 3178 int svm_range_list_init(struct kfd_process *p) 3179 { 3180 struct svm_range_list *svms = &p->svms; 3181 int i; 3182 3183 svms->objects = RB_ROOT_CACHED; 3184 mutex_init(&svms->lock); 3185 INIT_LIST_HEAD(&svms->list); 3186 atomic_set(&svms->evicted_ranges, 0); 3187 atomic_set(&svms->drain_pagefaults, 0); 3188 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3189 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3190 INIT_LIST_HEAD(&svms->deferred_range_list); 3191 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3192 spin_lock_init(&svms->deferred_list_lock); 3193 3194 for (i = 0; i < p->n_pdds; i++) 3195 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3196 bitmap_set(svms->bitmap_supported, i, 1); 3197 3198 return 0; 3199 } 3200 3201 /** 3202 * svm_range_check_vm - check if virtual address range mapped already 3203 * @p: current kfd_process 3204 * @start: range start address, in pages 3205 * @last: range last address, in pages 3206 * @bo_s: mapping start address in pages if address range already mapped 3207 * @bo_l: mapping last address in pages if address range already mapped 3208 * 3209 * The purpose is to avoid virtual address ranges already allocated by 3210 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3211 * It looks for each pdd in the kfd_process. 3212 * 3213 * Context: Process context 3214 * 3215 * Return 0 - OK, if the range is not mapped. 3216 * Otherwise error code: 3217 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3218 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3219 * a signal. Release all buffer reservations and return to user-space. 3220 */ 3221 static int 3222 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3223 uint64_t *bo_s, uint64_t *bo_l) 3224 { 3225 struct amdgpu_bo_va_mapping *mapping; 3226 struct interval_tree_node *node; 3227 uint32_t i; 3228 int r; 3229 3230 for (i = 0; i < p->n_pdds; i++) { 3231 struct amdgpu_vm *vm; 3232 3233 if (!p->pdds[i]->drm_priv) 3234 continue; 3235 3236 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3237 r = amdgpu_bo_reserve(vm->root.bo, false); 3238 if (r) 3239 return r; 3240 3241 node = interval_tree_iter_first(&vm->va, start, last); 3242 if (node) { 3243 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3244 start, last); 3245 mapping = container_of((struct rb_node *)node, 3246 struct amdgpu_bo_va_mapping, rb); 3247 if (bo_s && bo_l) { 3248 *bo_s = mapping->start; 3249 *bo_l = mapping->last; 3250 } 3251 amdgpu_bo_unreserve(vm->root.bo); 3252 return -EADDRINUSE; 3253 } 3254 amdgpu_bo_unreserve(vm->root.bo); 3255 } 3256 3257 return 0; 3258 } 3259 3260 /** 3261 * svm_range_is_valid - check if virtual address range is valid 3262 * @p: current kfd_process 3263 * @start: range start address, in pages 3264 * @size: range size, in pages 3265 * 3266 * Valid virtual address range means it belongs to one or more VMAs 3267 * 3268 * Context: Process context 3269 * 3270 * Return: 3271 * 0 - OK, otherwise error code 3272 */ 3273 static int 3274 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3275 { 3276 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3277 struct vm_area_struct *vma; 3278 unsigned long end; 3279 unsigned long start_unchg = start; 3280 3281 start <<= PAGE_SHIFT; 3282 end = start + (size << PAGE_SHIFT); 3283 do { 3284 vma = vma_lookup(p->mm, start); 3285 if (!vma || (vma->vm_flags & device_vma)) 3286 return -EFAULT; 3287 start = min(end, vma->vm_end); 3288 } while (start < end); 3289 3290 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3291 NULL); 3292 } 3293 3294 /** 3295 * svm_range_best_prefetch_location - decide the best prefetch location 3296 * @prange: svm range structure 3297 * 3298 * For xnack off: 3299 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3300 * can be CPU or GPU. 3301 * 3302 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3303 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3304 * the best prefetch location is always CPU, because GPU can not have coherent 3305 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3306 * 3307 * For xnack on: 3308 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3309 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3310 * 3311 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3312 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3313 * prefetch location is always CPU. 3314 * 3315 * Context: Process context 3316 * 3317 * Return: 3318 * 0 for CPU or GPU id 3319 */ 3320 static uint32_t 3321 svm_range_best_prefetch_location(struct svm_range *prange) 3322 { 3323 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3324 uint32_t best_loc = prange->prefetch_loc; 3325 struct kfd_process_device *pdd; 3326 struct kfd_node *bo_node; 3327 struct kfd_process *p; 3328 uint32_t gpuidx; 3329 3330 p = container_of(prange->svms, struct kfd_process, svms); 3331 3332 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3333 goto out; 3334 3335 bo_node = svm_range_get_node_by_id(prange, best_loc); 3336 if (!bo_node) { 3337 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3338 best_loc = 0; 3339 goto out; 3340 } 3341 3342 if (bo_node->adev->gmc.is_app_apu) { 3343 best_loc = 0; 3344 goto out; 3345 } 3346 3347 if (p->xnack_enabled) 3348 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3349 else 3350 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3351 MAX_GPU_INSTANCE); 3352 3353 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3354 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3355 if (!pdd) { 3356 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3357 continue; 3358 } 3359 3360 if (pdd->dev->adev == bo_node->adev) 3361 continue; 3362 3363 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3364 best_loc = 0; 3365 break; 3366 } 3367 } 3368 3369 out: 3370 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3371 p->xnack_enabled, &p->svms, prange->start, prange->last, 3372 best_loc); 3373 3374 return best_loc; 3375 } 3376 3377 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3378 * @mm: current process mm_struct 3379 * @prange: svm range structure 3380 * @migrated: output, true if migration is triggered 3381 * 3382 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3383 * from ram to vram. 3384 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3385 * from vram to ram. 3386 * 3387 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3388 * and restore work: 3389 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3390 * stops all queues, schedule restore work 3391 * 2. svm_range_restore_work wait for migration is done by 3392 * a. svm_range_validate_vram takes prange->migrate_mutex 3393 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3394 * 3. restore work update mappings of GPU, resume all queues. 3395 * 3396 * Context: Process context 3397 * 3398 * Return: 3399 * 0 - OK, otherwise - error code of migration 3400 */ 3401 static int 3402 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3403 bool *migrated) 3404 { 3405 uint32_t best_loc; 3406 int r = 0; 3407 3408 *migrated = false; 3409 best_loc = svm_range_best_prefetch_location(prange); 3410 3411 /* when best_loc is a gpu node and same as prange->actual_loc 3412 * we still need do migration as prange->actual_loc !=0 does 3413 * not mean all pages in prange are vram. hmm migrate will pick 3414 * up right pages during migration. 3415 */ 3416 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3417 (best_loc == 0 && prange->actual_loc == 0)) 3418 return 0; 3419 3420 if (!best_loc) { 3421 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3422 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3423 *migrated = !r; 3424 return r; 3425 } 3426 3427 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3428 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3429 *migrated = !r; 3430 3431 return r; 3432 } 3433 3434 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3435 { 3436 if (!fence) 3437 return -EINVAL; 3438 3439 if (dma_fence_is_signaled(&fence->base)) 3440 return 0; 3441 3442 if (fence->svm_bo) { 3443 WRITE_ONCE(fence->svm_bo->evicting, 1); 3444 schedule_work(&fence->svm_bo->eviction_work); 3445 } 3446 3447 return 0; 3448 } 3449 3450 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3451 { 3452 struct svm_range_bo *svm_bo; 3453 struct mm_struct *mm; 3454 int r = 0; 3455 3456 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3457 if (!svm_bo_ref_unless_zero(svm_bo)) 3458 return; /* svm_bo was freed while eviction was pending */ 3459 3460 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3461 mm = svm_bo->eviction_fence->mm; 3462 } else { 3463 svm_range_bo_unref(svm_bo); 3464 return; 3465 } 3466 3467 mmap_read_lock(mm); 3468 spin_lock(&svm_bo->list_lock); 3469 while (!list_empty(&svm_bo->range_list) && !r) { 3470 struct svm_range *prange = 3471 list_first_entry(&svm_bo->range_list, 3472 struct svm_range, svm_bo_list); 3473 int retries = 3; 3474 3475 list_del_init(&prange->svm_bo_list); 3476 spin_unlock(&svm_bo->list_lock); 3477 3478 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3479 prange->start, prange->last); 3480 3481 mutex_lock(&prange->migrate_mutex); 3482 do { 3483 /* migrate all vram pages in this prange to sys ram 3484 * after that prange->actual_loc should be zero 3485 */ 3486 r = svm_migrate_vram_to_ram(prange, mm, 3487 prange->start, prange->last, 3488 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3489 } while (!r && prange->actual_loc && --retries); 3490 3491 if (!r && prange->actual_loc) 3492 pr_info_once("Migration failed during eviction"); 3493 3494 if (!prange->actual_loc) { 3495 mutex_lock(&prange->lock); 3496 prange->svm_bo = NULL; 3497 mutex_unlock(&prange->lock); 3498 } 3499 mutex_unlock(&prange->migrate_mutex); 3500 3501 spin_lock(&svm_bo->list_lock); 3502 } 3503 spin_unlock(&svm_bo->list_lock); 3504 mmap_read_unlock(mm); 3505 mmput(mm); 3506 3507 dma_fence_signal(&svm_bo->eviction_fence->base); 3508 3509 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3510 * has been called in svm_migrate_vram_to_ram 3511 */ 3512 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3513 svm_range_bo_unref(svm_bo); 3514 } 3515 3516 static int 3517 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3518 uint64_t start, uint64_t size, uint32_t nattr, 3519 struct kfd_ioctl_svm_attribute *attrs) 3520 { 3521 struct amdkfd_process_info *process_info = p->kgd_process_info; 3522 struct list_head update_list; 3523 struct list_head insert_list; 3524 struct list_head remove_list; 3525 struct list_head remap_list; 3526 struct svm_range_list *svms; 3527 struct svm_range *prange; 3528 struct svm_range *next; 3529 bool update_mapping = false; 3530 bool flush_tlb; 3531 int r, ret = 0; 3532 3533 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3534 p->pasid, &p->svms, start, start + size - 1, size); 3535 3536 r = svm_range_check_attr(p, nattr, attrs); 3537 if (r) 3538 return r; 3539 3540 svms = &p->svms; 3541 3542 mutex_lock(&process_info->lock); 3543 3544 svm_range_list_lock_and_flush_work(svms, mm); 3545 3546 r = svm_range_is_valid(p, start, size); 3547 if (r) { 3548 pr_debug("invalid range r=%d\n", r); 3549 mmap_write_unlock(mm); 3550 goto out; 3551 } 3552 3553 mutex_lock(&svms->lock); 3554 3555 /* Add new range and split existing ranges as needed */ 3556 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3557 &insert_list, &remove_list, &remap_list); 3558 if (r) { 3559 mutex_unlock(&svms->lock); 3560 mmap_write_unlock(mm); 3561 goto out; 3562 } 3563 /* Apply changes as a transaction */ 3564 list_for_each_entry_safe(prange, next, &insert_list, list) { 3565 svm_range_add_to_svms(prange); 3566 svm_range_add_notifier_locked(mm, prange); 3567 } 3568 list_for_each_entry(prange, &update_list, update_list) { 3569 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3570 /* TODO: unmap ranges from GPU that lost access */ 3571 } 3572 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3573 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3574 prange->svms, prange, prange->start, 3575 prange->last); 3576 svm_range_unlink(prange); 3577 svm_range_remove_notifier(prange); 3578 svm_range_free(prange, false); 3579 } 3580 3581 mmap_write_downgrade(mm); 3582 /* Trigger migrations and revalidate and map to GPUs as needed. If 3583 * this fails we may be left with partially completed actions. There 3584 * is no clean way of rolling back to the previous state in such a 3585 * case because the rollback wouldn't be guaranteed to work either. 3586 */ 3587 list_for_each_entry(prange, &update_list, update_list) { 3588 bool migrated; 3589 3590 mutex_lock(&prange->migrate_mutex); 3591 3592 r = svm_range_trigger_migration(mm, prange, &migrated); 3593 if (r) 3594 goto out_unlock_range; 3595 3596 if (migrated && (!p->xnack_enabled || 3597 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3598 prange->mapped_to_gpu) { 3599 pr_debug("restore_work will update mappings of GPUs\n"); 3600 mutex_unlock(&prange->migrate_mutex); 3601 continue; 3602 } 3603 3604 if (!migrated && !update_mapping) { 3605 mutex_unlock(&prange->migrate_mutex); 3606 continue; 3607 } 3608 3609 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3610 3611 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3612 MAX_GPU_INSTANCE, true, true, flush_tlb); 3613 if (r) 3614 pr_debug("failed %d to map svm range\n", r); 3615 3616 out_unlock_range: 3617 mutex_unlock(&prange->migrate_mutex); 3618 if (r) 3619 ret = r; 3620 } 3621 3622 list_for_each_entry(prange, &remap_list, update_list) { 3623 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3624 prange, prange->start, prange->last); 3625 mutex_lock(&prange->migrate_mutex); 3626 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3627 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3628 if (r) 3629 pr_debug("failed %d on remap svm range\n", r); 3630 mutex_unlock(&prange->migrate_mutex); 3631 if (r) 3632 ret = r; 3633 } 3634 3635 dynamic_svm_range_dump(svms); 3636 3637 mutex_unlock(&svms->lock); 3638 mmap_read_unlock(mm); 3639 out: 3640 mutex_unlock(&process_info->lock); 3641 3642 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3643 &p->svms, start, start + size - 1, r); 3644 3645 return ret ? ret : r; 3646 } 3647 3648 static int 3649 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3650 uint64_t start, uint64_t size, uint32_t nattr, 3651 struct kfd_ioctl_svm_attribute *attrs) 3652 { 3653 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3654 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3655 bool get_preferred_loc = false; 3656 bool get_prefetch_loc = false; 3657 bool get_granularity = false; 3658 bool get_accessible = false; 3659 bool get_flags = false; 3660 uint64_t last = start + size - 1UL; 3661 uint8_t granularity = 0xff; 3662 struct interval_tree_node *node; 3663 struct svm_range_list *svms; 3664 struct svm_range *prange; 3665 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3666 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3667 uint32_t flags_and = 0xffffffff; 3668 uint32_t flags_or = 0; 3669 int gpuidx; 3670 uint32_t i; 3671 int r = 0; 3672 3673 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3674 start + size - 1, nattr); 3675 3676 /* Flush pending deferred work to avoid racing with deferred actions from 3677 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3678 * can still race with get_attr because we don't hold the mmap lock. But that 3679 * would be a race condition in the application anyway, and undefined 3680 * behaviour is acceptable in that case. 3681 */ 3682 flush_work(&p->svms.deferred_list_work); 3683 3684 mmap_read_lock(mm); 3685 r = svm_range_is_valid(p, start, size); 3686 mmap_read_unlock(mm); 3687 if (r) { 3688 pr_debug("invalid range r=%d\n", r); 3689 return r; 3690 } 3691 3692 for (i = 0; i < nattr; i++) { 3693 switch (attrs[i].type) { 3694 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3695 get_preferred_loc = true; 3696 break; 3697 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3698 get_prefetch_loc = true; 3699 break; 3700 case KFD_IOCTL_SVM_ATTR_ACCESS: 3701 get_accessible = true; 3702 break; 3703 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3704 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3705 get_flags = true; 3706 break; 3707 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3708 get_granularity = true; 3709 break; 3710 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3711 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3712 fallthrough; 3713 default: 3714 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3715 return -EINVAL; 3716 } 3717 } 3718 3719 svms = &p->svms; 3720 3721 mutex_lock(&svms->lock); 3722 3723 node = interval_tree_iter_first(&svms->objects, start, last); 3724 if (!node) { 3725 pr_debug("range attrs not found return default values\n"); 3726 svm_range_set_default_attributes(&location, &prefetch_loc, 3727 &granularity, &flags_and); 3728 flags_or = flags_and; 3729 if (p->xnack_enabled) 3730 bitmap_copy(bitmap_access, svms->bitmap_supported, 3731 MAX_GPU_INSTANCE); 3732 else 3733 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3734 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3735 goto fill_values; 3736 } 3737 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3738 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3739 3740 while (node) { 3741 struct interval_tree_node *next; 3742 3743 prange = container_of(node, struct svm_range, it_node); 3744 next = interval_tree_iter_next(node, start, last); 3745 3746 if (get_preferred_loc) { 3747 if (prange->preferred_loc == 3748 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3749 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3750 location != prange->preferred_loc)) { 3751 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3752 get_preferred_loc = false; 3753 } else { 3754 location = prange->preferred_loc; 3755 } 3756 } 3757 if (get_prefetch_loc) { 3758 if (prange->prefetch_loc == 3759 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3760 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3761 prefetch_loc != prange->prefetch_loc)) { 3762 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3763 get_prefetch_loc = false; 3764 } else { 3765 prefetch_loc = prange->prefetch_loc; 3766 } 3767 } 3768 if (get_accessible) { 3769 bitmap_and(bitmap_access, bitmap_access, 3770 prange->bitmap_access, MAX_GPU_INSTANCE); 3771 bitmap_and(bitmap_aip, bitmap_aip, 3772 prange->bitmap_aip, MAX_GPU_INSTANCE); 3773 } 3774 if (get_flags) { 3775 flags_and &= prange->flags; 3776 flags_or |= prange->flags; 3777 } 3778 3779 if (get_granularity && prange->granularity < granularity) 3780 granularity = prange->granularity; 3781 3782 node = next; 3783 } 3784 fill_values: 3785 mutex_unlock(&svms->lock); 3786 3787 for (i = 0; i < nattr; i++) { 3788 switch (attrs[i].type) { 3789 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3790 attrs[i].value = location; 3791 break; 3792 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3793 attrs[i].value = prefetch_loc; 3794 break; 3795 case KFD_IOCTL_SVM_ATTR_ACCESS: 3796 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3797 attrs[i].value); 3798 if (gpuidx < 0) { 3799 pr_debug("invalid gpuid %x\n", attrs[i].value); 3800 return -EINVAL; 3801 } 3802 if (test_bit(gpuidx, bitmap_access)) 3803 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3804 else if (test_bit(gpuidx, bitmap_aip)) 3805 attrs[i].type = 3806 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3807 else 3808 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3809 break; 3810 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3811 attrs[i].value = flags_and; 3812 break; 3813 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3814 attrs[i].value = ~flags_or; 3815 break; 3816 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3817 attrs[i].value = (uint32_t)granularity; 3818 break; 3819 } 3820 } 3821 3822 return 0; 3823 } 3824 3825 int kfd_criu_resume_svm(struct kfd_process *p) 3826 { 3827 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3828 int nattr_common = 4, nattr_accessibility = 1; 3829 struct criu_svm_metadata *criu_svm_md = NULL; 3830 struct svm_range_list *svms = &p->svms; 3831 struct criu_svm_metadata *next = NULL; 3832 uint32_t set_flags = 0xffffffff; 3833 int i, j, num_attrs, ret = 0; 3834 uint64_t set_attr_size; 3835 struct mm_struct *mm; 3836 3837 if (list_empty(&svms->criu_svm_metadata_list)) { 3838 pr_debug("No SVM data from CRIU restore stage 2\n"); 3839 return ret; 3840 } 3841 3842 mm = get_task_mm(p->lead_thread); 3843 if (!mm) { 3844 pr_err("failed to get mm for the target process\n"); 3845 return -ESRCH; 3846 } 3847 3848 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3849 3850 i = j = 0; 3851 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3852 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3853 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3854 3855 for (j = 0; j < num_attrs; j++) { 3856 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3857 i, j, criu_svm_md->data.attrs[j].type, 3858 i, j, criu_svm_md->data.attrs[j].value); 3859 switch (criu_svm_md->data.attrs[j].type) { 3860 /* During Checkpoint operation, the query for 3861 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3862 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3863 * not used by the range which was checkpointed. Care 3864 * must be taken to not restore with an invalid value 3865 * otherwise the gpuidx value will be invalid and 3866 * set_attr would eventually fail so just replace those 3867 * with another dummy attribute such as 3868 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3869 */ 3870 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3871 if (criu_svm_md->data.attrs[j].value == 3872 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3873 criu_svm_md->data.attrs[j].type = 3874 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3875 criu_svm_md->data.attrs[j].value = 0; 3876 } 3877 break; 3878 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3879 set_flags = criu_svm_md->data.attrs[j].value; 3880 break; 3881 default: 3882 break; 3883 } 3884 } 3885 3886 /* CLR_FLAGS is not available via get_attr during checkpoint but 3887 * it needs to be inserted before restoring the ranges so 3888 * allocate extra space for it before calling set_attr 3889 */ 3890 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3891 (num_attrs + 1); 3892 set_attr_new = krealloc(set_attr, set_attr_size, 3893 GFP_KERNEL); 3894 if (!set_attr_new) { 3895 ret = -ENOMEM; 3896 goto exit; 3897 } 3898 set_attr = set_attr_new; 3899 3900 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3901 sizeof(struct kfd_ioctl_svm_attribute)); 3902 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3903 set_attr[num_attrs].value = ~set_flags; 3904 3905 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3906 criu_svm_md->data.size, num_attrs + 1, 3907 set_attr); 3908 if (ret) { 3909 pr_err("CRIU: failed to set range attributes\n"); 3910 goto exit; 3911 } 3912 3913 i++; 3914 } 3915 exit: 3916 kfree(set_attr); 3917 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3918 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3919 criu_svm_md->data.start_addr); 3920 kfree(criu_svm_md); 3921 } 3922 3923 mmput(mm); 3924 return ret; 3925 3926 } 3927 3928 int kfd_criu_restore_svm(struct kfd_process *p, 3929 uint8_t __user *user_priv_ptr, 3930 uint64_t *priv_data_offset, 3931 uint64_t max_priv_data_size) 3932 { 3933 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3934 int nattr_common = 4, nattr_accessibility = 1; 3935 struct criu_svm_metadata *criu_svm_md = NULL; 3936 struct svm_range_list *svms = &p->svms; 3937 uint32_t num_devices; 3938 int ret = 0; 3939 3940 num_devices = p->n_pdds; 3941 /* Handle one SVM range object at a time, also the number of gpus are 3942 * assumed to be same on the restore node, checking must be done while 3943 * evaluating the topology earlier 3944 */ 3945 3946 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3947 (nattr_common + nattr_accessibility * num_devices); 3948 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3949 3950 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3951 svm_attrs_size; 3952 3953 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3954 if (!criu_svm_md) { 3955 pr_err("failed to allocate memory to store svm metadata\n"); 3956 return -ENOMEM; 3957 } 3958 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3959 ret = -EINVAL; 3960 goto exit; 3961 } 3962 3963 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3964 svm_priv_data_size); 3965 if (ret) { 3966 ret = -EFAULT; 3967 goto exit; 3968 } 3969 *priv_data_offset += svm_priv_data_size; 3970 3971 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3972 3973 return 0; 3974 3975 3976 exit: 3977 kfree(criu_svm_md); 3978 return ret; 3979 } 3980 3981 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3982 uint64_t *svm_priv_data_size) 3983 { 3984 uint64_t total_size, accessibility_size, common_attr_size; 3985 int nattr_common = 4, nattr_accessibility = 1; 3986 int num_devices = p->n_pdds; 3987 struct svm_range_list *svms; 3988 struct svm_range *prange; 3989 uint32_t count = 0; 3990 3991 *svm_priv_data_size = 0; 3992 3993 svms = &p->svms; 3994 if (!svms) 3995 return -EINVAL; 3996 3997 mutex_lock(&svms->lock); 3998 list_for_each_entry(prange, &svms->list, list) { 3999 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4000 prange, prange->start, prange->npages, 4001 prange->start + prange->npages - 1); 4002 count++; 4003 } 4004 mutex_unlock(&svms->lock); 4005 4006 *num_svm_ranges = count; 4007 /* Only the accessbility attributes need to be queried for all the gpus 4008 * individually, remaining ones are spanned across the entire process 4009 * regardless of the various gpu nodes. Of the remaining attributes, 4010 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4011 * 4012 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4013 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4014 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4015 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4016 * 4017 * ** ACCESSBILITY ATTRIBUTES ** 4018 * (Considered as one, type is altered during query, value is gpuid) 4019 * KFD_IOCTL_SVM_ATTR_ACCESS 4020 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4021 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4022 */ 4023 if (*num_svm_ranges > 0) { 4024 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4025 nattr_common; 4026 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4027 nattr_accessibility * num_devices; 4028 4029 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4030 common_attr_size + accessibility_size; 4031 4032 *svm_priv_data_size = *num_svm_ranges * total_size; 4033 } 4034 4035 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4036 *svm_priv_data_size); 4037 return 0; 4038 } 4039 4040 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4041 uint8_t __user *user_priv_data, 4042 uint64_t *priv_data_offset) 4043 { 4044 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4045 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4046 uint64_t svm_priv_data_size, query_attr_size = 0; 4047 int index, nattr_common = 4, ret = 0; 4048 struct svm_range_list *svms; 4049 int num_devices = p->n_pdds; 4050 struct svm_range *prange; 4051 struct mm_struct *mm; 4052 4053 svms = &p->svms; 4054 if (!svms) 4055 return -EINVAL; 4056 4057 mm = get_task_mm(p->lead_thread); 4058 if (!mm) { 4059 pr_err("failed to get mm for the target process\n"); 4060 return -ESRCH; 4061 } 4062 4063 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4064 (nattr_common + num_devices); 4065 4066 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4067 if (!query_attr) { 4068 ret = -ENOMEM; 4069 goto exit; 4070 } 4071 4072 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4073 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4074 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4075 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4076 4077 for (index = 0; index < num_devices; index++) { 4078 struct kfd_process_device *pdd = p->pdds[index]; 4079 4080 query_attr[index + nattr_common].type = 4081 KFD_IOCTL_SVM_ATTR_ACCESS; 4082 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4083 } 4084 4085 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4086 4087 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4088 if (!svm_priv) { 4089 ret = -ENOMEM; 4090 goto exit_query; 4091 } 4092 4093 index = 0; 4094 list_for_each_entry(prange, &svms->list, list) { 4095 4096 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4097 svm_priv->start_addr = prange->start; 4098 svm_priv->size = prange->npages; 4099 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4100 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4101 prange, prange->start, prange->npages, 4102 prange->start + prange->npages - 1, 4103 prange->npages * PAGE_SIZE); 4104 4105 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4106 svm_priv->size, 4107 (nattr_common + num_devices), 4108 svm_priv->attrs); 4109 if (ret) { 4110 pr_err("CRIU: failed to obtain range attributes\n"); 4111 goto exit_priv; 4112 } 4113 4114 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4115 svm_priv_data_size)) { 4116 pr_err("Failed to copy svm priv to user\n"); 4117 ret = -EFAULT; 4118 goto exit_priv; 4119 } 4120 4121 *priv_data_offset += svm_priv_data_size; 4122 4123 } 4124 4125 4126 exit_priv: 4127 kfree(svm_priv); 4128 exit_query: 4129 kfree(query_attr); 4130 exit: 4131 mmput(mm); 4132 return ret; 4133 } 4134 4135 int 4136 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4137 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4138 { 4139 struct mm_struct *mm = current->mm; 4140 int r; 4141 4142 start >>= PAGE_SHIFT; 4143 size >>= PAGE_SHIFT; 4144 4145 switch (op) { 4146 case KFD_IOCTL_SVM_OP_SET_ATTR: 4147 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4148 break; 4149 case KFD_IOCTL_SVM_OP_GET_ATTR: 4150 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4151 break; 4152 default: 4153 r = EINVAL; 4154 break; 4155 } 4156 4157 return r; 4158 } 4159