1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 410 struct kfd_process_device *pdd; 411 struct kfd_process *p; 412 struct mm_struct *mm; 413 414 mm = svm_bo->eviction_fence->mm; 415 /* 416 * The forked child process takes svm_bo device pages ref, svm_bo could be 417 * released after parent process is gone. 418 */ 419 p = kfd_lookup_process_by_mm(mm); 420 if (p) { 421 pdd = kfd_get_process_device_data(svm_bo->node, p); 422 if (pdd) 423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 424 kfd_unref_process(p); 425 } 426 mmput(mm); 427 } 428 429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 430 /* We're not in the eviction worker. Signal the fence. */ 431 dma_fence_signal(&svm_bo->eviction_fence->base); 432 dma_fence_put(&svm_bo->eviction_fence->base); 433 amdgpu_bo_unref(&svm_bo->bo); 434 kfree(svm_bo); 435 } 436 437 static void svm_range_bo_wq_release(struct work_struct *work) 438 { 439 struct svm_range_bo *svm_bo; 440 441 svm_bo = container_of(work, struct svm_range_bo, release_work); 442 svm_range_bo_release(&svm_bo->kref); 443 } 444 445 static void svm_range_bo_release_async(struct kref *kref) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(kref, struct svm_range_bo, kref); 450 pr_debug("svm_bo 0x%p\n", svm_bo); 451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 452 schedule_work(&svm_bo->release_work); 453 } 454 455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 456 { 457 kref_put(&svm_bo->kref, svm_range_bo_release_async); 458 } 459 460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 461 { 462 if (svm_bo) 463 kref_put(&svm_bo->kref, svm_range_bo_release); 464 } 465 466 static bool 467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 468 { 469 mutex_lock(&prange->lock); 470 if (!prange->svm_bo) { 471 mutex_unlock(&prange->lock); 472 return false; 473 } 474 if (prange->ttm_res) { 475 /* We still have a reference, all is well */ 476 mutex_unlock(&prange->lock); 477 return true; 478 } 479 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 480 /* 481 * Migrate from GPU to GPU, remove range from source svm_bo->node 482 * range list, and return false to allocate svm_bo from destination 483 * node. 484 */ 485 if (prange->svm_bo->node != node) { 486 mutex_unlock(&prange->lock); 487 488 spin_lock(&prange->svm_bo->list_lock); 489 list_del_init(&prange->svm_bo_list); 490 spin_unlock(&prange->svm_bo->list_lock); 491 492 svm_range_bo_unref(prange->svm_bo); 493 return false; 494 } 495 if (READ_ONCE(prange->svm_bo->evicting)) { 496 struct dma_fence *f; 497 struct svm_range_bo *svm_bo; 498 /* The BO is getting evicted, 499 * we need to get a new one 500 */ 501 mutex_unlock(&prange->lock); 502 svm_bo = prange->svm_bo; 503 f = dma_fence_get(&svm_bo->eviction_fence->base); 504 svm_range_bo_unref(prange->svm_bo); 505 /* wait for the fence to avoid long spin-loop 506 * at list_empty_careful 507 */ 508 dma_fence_wait(f, false); 509 dma_fence_put(f); 510 } else { 511 /* The BO was still around and we got 512 * a new reference to it 513 */ 514 mutex_unlock(&prange->lock); 515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 516 prange->svms, prange->start, prange->last); 517 518 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 519 return true; 520 } 521 522 } else { 523 mutex_unlock(&prange->lock); 524 } 525 526 /* We need a new svm_bo. Spin-loop to wait for concurrent 527 * svm_range_bo_release to finish removing this range from 528 * its range list and set prange->svm_bo to null. After this, 529 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 530 */ 531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 532 cond_resched(); 533 534 return false; 535 } 536 537 static struct svm_range_bo *svm_range_bo_new(void) 538 { 539 struct svm_range_bo *svm_bo; 540 541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 542 if (!svm_bo) 543 return NULL; 544 545 kref_init(&svm_bo->kref); 546 INIT_LIST_HEAD(&svm_bo->range_list); 547 spin_lock_init(&svm_bo->list_lock); 548 549 return svm_bo; 550 } 551 552 int 553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 554 bool clear) 555 { 556 struct kfd_process_device *pdd; 557 struct amdgpu_bo_param bp; 558 struct svm_range_bo *svm_bo; 559 struct amdgpu_bo_user *ubo; 560 struct amdgpu_bo *bo; 561 struct kfd_process *p; 562 struct mm_struct *mm; 563 int r; 564 565 p = container_of(prange->svms, struct kfd_process, svms); 566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 567 p->lead_thread->pid, prange->svms, 568 prange->start, prange->last); 569 570 if (svm_range_validate_svm_bo(node, prange)) 571 return 0; 572 573 svm_bo = svm_range_bo_new(); 574 if (!svm_bo) { 575 pr_debug("failed to alloc svm bo\n"); 576 return -ENOMEM; 577 } 578 mm = get_task_mm(p->lead_thread); 579 if (!mm) { 580 pr_debug("failed to get mm\n"); 581 kfree(svm_bo); 582 return -ESRCH; 583 } 584 svm_bo->node = node; 585 svm_bo->eviction_fence = 586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 587 mm, 588 svm_bo); 589 mmput(mm); 590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 591 svm_bo->evicting = 0; 592 memset(&bp, 0, sizeof(bp)); 593 bp.size = prange->npages * PAGE_SIZE; 594 bp.byte_align = PAGE_SIZE; 595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 599 bp.type = ttm_bo_type_device; 600 bp.resv = NULL; 601 if (node->xcp) 602 bp.xcp_id_plus1 = node->xcp->id + 1; 603 604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 605 if (r) { 606 pr_debug("failed %d to create bo\n", r); 607 goto create_bo_failed; 608 } 609 bo = &ubo->bo; 610 611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 612 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 613 bp.xcp_id_plus1 - 1); 614 615 r = amdgpu_bo_reserve(bo, true); 616 if (r) { 617 pr_debug("failed %d to reserve bo\n", r); 618 goto reserve_bo_failed; 619 } 620 621 if (clear) { 622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 623 if (r) { 624 pr_debug("failed %d to sync bo\n", r); 625 amdgpu_bo_unreserve(bo); 626 goto reserve_bo_failed; 627 } 628 } 629 630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 631 if (r) { 632 pr_debug("failed %d to reserve bo\n", r); 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 struct svm_range *tail = NULL; 1148 int r = svm_range_split(prange, prange->start, new_last, &tail); 1149 1150 if (!r) { 1151 list_add(&tail->list, insert_list); 1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1153 list_add(&tail->update_list, remap_list); 1154 } 1155 return r; 1156 } 1157 1158 static int 1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1160 struct list_head *insert_list, struct list_head *remap_list) 1161 { 1162 struct svm_range *head = NULL; 1163 int r = svm_range_split(prange, new_start, prange->last, &head); 1164 1165 if (!r) { 1166 list_add(&head->list, insert_list); 1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1168 list_add(&head->update_list, remap_list); 1169 } 1170 return r; 1171 } 1172 1173 static void 1174 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1175 struct svm_range *pchild, enum svm_work_list_ops op) 1176 { 1177 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1178 pchild, pchild->start, pchild->last, prange, op); 1179 1180 pchild->work_item.mm = mm; 1181 pchild->work_item.op = op; 1182 list_add_tail(&pchild->child_list, &prange->child_list); 1183 } 1184 1185 static bool 1186 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1187 { 1188 return (node_a->adev == node_b->adev || 1189 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1190 } 1191 1192 static uint64_t 1193 svm_range_get_pte_flags(struct kfd_node *node, 1194 struct svm_range *prange, int domain) 1195 { 1196 struct kfd_node *bo_node; 1197 uint32_t flags = prange->flags; 1198 uint32_t mapping_flags = 0; 1199 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1200 uint64_t pte_flags; 1201 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1202 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1203 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1204 unsigned int mtype_local; 1205 1206 if (domain == SVM_RANGE_VRAM_DOMAIN) 1207 bo_node = prange->svm_bo->node; 1208 1209 switch (gc_ip_version) { 1210 case IP_VERSION(9, 4, 1): 1211 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1212 if (bo_node == node) { 1213 mapping_flags |= coherent ? 1214 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1215 } else { 1216 mapping_flags |= coherent ? 1217 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1218 if (svm_nodes_in_same_hive(node, bo_node)) 1219 snoop = true; 1220 } 1221 } else { 1222 mapping_flags |= coherent ? 1223 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1224 } 1225 break; 1226 case IP_VERSION(9, 4, 2): 1227 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1228 if (bo_node == node) { 1229 mapping_flags |= coherent ? 1230 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1231 if (node->adev->gmc.xgmi.connected_to_cpu) 1232 snoop = true; 1233 } else { 1234 mapping_flags |= coherent ? 1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1236 if (svm_nodes_in_same_hive(node, bo_node)) 1237 snoop = true; 1238 } 1239 } else { 1240 mapping_flags |= coherent ? 1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1242 } 1243 break; 1244 case IP_VERSION(9, 4, 3): 1245 case IP_VERSION(9, 4, 4): 1246 case IP_VERSION(9, 5, 0): 1247 if (ext_coherent) 1248 mtype_local = (gc_ip_version < IP_VERSION(9, 5, 0) && !node->adev->rev_id) ? 1249 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_CC; 1250 else 1251 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1252 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1253 snoop = true; 1254 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1255 /* local HBM region close to partition */ 1256 if (bo_node->adev == node->adev && 1257 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1258 mapping_flags |= mtype_local; 1259 /* local HBM region far from partition or remote XGMI GPU 1260 * with regular system scope coherence 1261 */ 1262 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1263 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1264 /* PCIe P2P on GPUs pre-9.5.0 */ 1265 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1266 !svm_nodes_in_same_hive(bo_node, node)) 1267 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1268 /* Other remote memory */ 1269 else 1270 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1271 /* system memory accessed by the APU */ 1272 } else if (node->adev->flags & AMD_IS_APU) { 1273 /* On NUMA systems, locality is determined per-page 1274 * in amdgpu_gmc_override_vm_pte_flags 1275 */ 1276 if (num_possible_nodes() <= 1) 1277 mapping_flags |= mtype_local; 1278 else 1279 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1280 /* system memory accessed by the dGPU */ 1281 } else { 1282 if (gc_ip_version < IP_VERSION(9, 5, 0)) 1283 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1284 else 1285 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1286 } 1287 break; 1288 case IP_VERSION(12, 0, 0): 1289 case IP_VERSION(12, 0, 1): 1290 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1291 break; 1292 default: 1293 mapping_flags |= coherent ? 1294 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1295 } 1296 1297 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1298 1299 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1300 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1301 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1302 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1303 1304 pte_flags = AMDGPU_PTE_VALID; 1305 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1306 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1307 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1308 pte_flags |= AMDGPU_PTE_IS_PTE; 1309 1310 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1311 return pte_flags; 1312 } 1313 1314 static int 1315 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1316 uint64_t start, uint64_t last, 1317 struct dma_fence **fence) 1318 { 1319 uint64_t init_pte_value = 0; 1320 1321 pr_debug("[0x%llx 0x%llx]\n", start, last); 1322 1323 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1324 last, init_pte_value, 0, 0, NULL, NULL, 1325 fence); 1326 } 1327 1328 static int 1329 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1330 unsigned long last, uint32_t trigger) 1331 { 1332 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1333 struct kfd_process_device *pdd; 1334 struct dma_fence *fence = NULL; 1335 struct kfd_process *p; 1336 uint32_t gpuidx; 1337 int r = 0; 1338 1339 if (!prange->mapped_to_gpu) { 1340 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1341 prange, prange->start, prange->last); 1342 return 0; 1343 } 1344 1345 if (prange->start == start && prange->last == last) { 1346 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1347 prange->mapped_to_gpu = false; 1348 } 1349 1350 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1351 MAX_GPU_INSTANCE); 1352 p = container_of(prange->svms, struct kfd_process, svms); 1353 1354 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1355 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1356 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1357 if (!pdd) { 1358 pr_debug("failed to find device idx %d\n", gpuidx); 1359 return -EINVAL; 1360 } 1361 1362 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1363 start, last, trigger); 1364 1365 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1366 drm_priv_to_vm(pdd->drm_priv), 1367 start, last, &fence); 1368 if (r) 1369 break; 1370 1371 if (fence) { 1372 r = dma_fence_wait(fence, false); 1373 dma_fence_put(fence); 1374 fence = NULL; 1375 if (r) 1376 break; 1377 } 1378 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1379 } 1380 1381 return r; 1382 } 1383 1384 static int 1385 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1386 unsigned long offset, unsigned long npages, bool readonly, 1387 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1388 struct dma_fence **fence, bool flush_tlb) 1389 { 1390 struct amdgpu_device *adev = pdd->dev->adev; 1391 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1392 uint64_t pte_flags; 1393 unsigned long last_start; 1394 int last_domain; 1395 int r = 0; 1396 int64_t i, j; 1397 1398 last_start = prange->start + offset; 1399 1400 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1401 last_start, last_start + npages - 1, readonly); 1402 1403 for (i = offset; i < offset + npages; i++) { 1404 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1405 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1406 1407 /* Collect all pages in the same address range and memory domain 1408 * that can be mapped with a single call to update mapping. 1409 */ 1410 if (i < offset + npages - 1 && 1411 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1412 continue; 1413 1414 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1415 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1416 1417 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1418 if (readonly) 1419 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1420 1421 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1422 prange->svms, last_start, prange->start + i, 1423 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1424 pte_flags); 1425 1426 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1427 * different memory partition based on fpfn/lpfn, we should use 1428 * same vm_manager.vram_base_offset regardless memory partition. 1429 */ 1430 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1431 NULL, last_start, prange->start + i, 1432 pte_flags, 1433 (last_start - prange->start) << PAGE_SHIFT, 1434 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1435 NULL, dma_addr, &vm->last_update); 1436 1437 for (j = last_start - prange->start; j <= i; j++) 1438 dma_addr[j] |= last_domain; 1439 1440 if (r) { 1441 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1442 goto out; 1443 } 1444 last_start = prange->start + i + 1; 1445 } 1446 1447 r = amdgpu_vm_update_pdes(adev, vm, false); 1448 if (r) { 1449 pr_debug("failed %d to update directories 0x%lx\n", r, 1450 prange->start); 1451 goto out; 1452 } 1453 1454 if (fence) 1455 *fence = dma_fence_get(vm->last_update); 1456 1457 out: 1458 return r; 1459 } 1460 1461 static int 1462 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1463 unsigned long npages, bool readonly, 1464 unsigned long *bitmap, bool wait, bool flush_tlb) 1465 { 1466 struct kfd_process_device *pdd; 1467 struct amdgpu_device *bo_adev = NULL; 1468 struct kfd_process *p; 1469 struct dma_fence *fence = NULL; 1470 uint32_t gpuidx; 1471 int r = 0; 1472 1473 if (prange->svm_bo && prange->ttm_res) 1474 bo_adev = prange->svm_bo->node->adev; 1475 1476 p = container_of(prange->svms, struct kfd_process, svms); 1477 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1478 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1479 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1480 if (!pdd) { 1481 pr_debug("failed to find device idx %d\n", gpuidx); 1482 return -EINVAL; 1483 } 1484 1485 pdd = kfd_bind_process_to_device(pdd->dev, p); 1486 if (IS_ERR(pdd)) 1487 return -EINVAL; 1488 1489 if (bo_adev && pdd->dev->adev != bo_adev && 1490 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1491 pr_debug("cannot map to device idx %d\n", gpuidx); 1492 continue; 1493 } 1494 1495 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1496 prange->dma_addr[gpuidx], 1497 bo_adev, wait ? &fence : NULL, 1498 flush_tlb); 1499 if (r) 1500 break; 1501 1502 if (fence) { 1503 r = dma_fence_wait(fence, false); 1504 dma_fence_put(fence); 1505 fence = NULL; 1506 if (r) { 1507 pr_debug("failed %d to dma fence wait\n", r); 1508 break; 1509 } 1510 } 1511 1512 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1513 } 1514 1515 return r; 1516 } 1517 1518 struct svm_validate_context { 1519 struct kfd_process *process; 1520 struct svm_range *prange; 1521 bool intr; 1522 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1523 struct drm_exec exec; 1524 }; 1525 1526 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1527 { 1528 struct kfd_process_device *pdd; 1529 struct amdgpu_vm *vm; 1530 uint32_t gpuidx; 1531 int r; 1532 1533 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1534 drm_exec_until_all_locked(&ctx->exec) { 1535 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1536 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1537 if (!pdd) { 1538 pr_debug("failed to find device idx %d\n", gpuidx); 1539 r = -EINVAL; 1540 goto unreserve_out; 1541 } 1542 vm = drm_priv_to_vm(pdd->drm_priv); 1543 1544 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1545 drm_exec_retry_on_contention(&ctx->exec); 1546 if (unlikely(r)) { 1547 pr_debug("failed %d to reserve bo\n", r); 1548 goto unreserve_out; 1549 } 1550 } 1551 } 1552 1553 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1554 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1555 if (!pdd) { 1556 pr_debug("failed to find device idx %d\n", gpuidx); 1557 r = -EINVAL; 1558 goto unreserve_out; 1559 } 1560 1561 r = amdgpu_vm_validate(pdd->dev->adev, 1562 drm_priv_to_vm(pdd->drm_priv), NULL, 1563 svm_range_bo_validate, NULL); 1564 if (r) { 1565 pr_debug("failed %d validate pt bos\n", r); 1566 goto unreserve_out; 1567 } 1568 } 1569 1570 return 0; 1571 1572 unreserve_out: 1573 drm_exec_fini(&ctx->exec); 1574 return r; 1575 } 1576 1577 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1578 { 1579 drm_exec_fini(&ctx->exec); 1580 } 1581 1582 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1583 { 1584 struct kfd_process_device *pdd; 1585 1586 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1587 if (!pdd) 1588 return NULL; 1589 1590 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1591 } 1592 1593 /* 1594 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1595 * 1596 * To prevent concurrent destruction or change of range attributes, the 1597 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1598 * because that would block concurrent evictions and lead to deadlocks. To 1599 * serialize concurrent migrations or validations of the same range, the 1600 * prange->migrate_mutex must be held. 1601 * 1602 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1603 * eviction fence. 1604 * 1605 * The following sequence ensures race-free validation and GPU mapping: 1606 * 1607 * 1. Reserve page table (and SVM BO if range is in VRAM) 1608 * 2. hmm_range_fault to get page addresses (if system memory) 1609 * 3. DMA-map pages (if system memory) 1610 * 4-a. Take notifier lock 1611 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1612 * 4-c. Check that the range was not split or otherwise invalidated 1613 * 4-d. Update GPU page table 1614 * 4.e. Release notifier lock 1615 * 5. Release page table (and SVM BO) reservation 1616 */ 1617 static int svm_range_validate_and_map(struct mm_struct *mm, 1618 unsigned long map_start, unsigned long map_last, 1619 struct svm_range *prange, int32_t gpuidx, 1620 bool intr, bool wait, bool flush_tlb) 1621 { 1622 struct svm_validate_context *ctx; 1623 unsigned long start, end, addr; 1624 struct kfd_process *p; 1625 void *owner; 1626 int32_t idx; 1627 int r = 0; 1628 1629 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1630 if (!ctx) 1631 return -ENOMEM; 1632 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1633 ctx->prange = prange; 1634 ctx->intr = intr; 1635 1636 if (gpuidx < MAX_GPU_INSTANCE) { 1637 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1638 bitmap_set(ctx->bitmap, gpuidx, 1); 1639 } else if (ctx->process->xnack_enabled) { 1640 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1641 1642 /* If prefetch range to GPU, or GPU retry fault migrate range to 1643 * GPU, which has ACCESS attribute to the range, create mapping 1644 * on that GPU. 1645 */ 1646 if (prange->actual_loc) { 1647 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1648 prange->actual_loc); 1649 if (gpuidx < 0) { 1650 WARN_ONCE(1, "failed get device by id 0x%x\n", 1651 prange->actual_loc); 1652 r = -EINVAL; 1653 goto free_ctx; 1654 } 1655 if (test_bit(gpuidx, prange->bitmap_access)) 1656 bitmap_set(ctx->bitmap, gpuidx, 1); 1657 } 1658 1659 /* 1660 * If prange is already mapped or with always mapped flag, 1661 * update mapping on GPUs with ACCESS attribute 1662 */ 1663 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1664 if (prange->mapped_to_gpu || 1665 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1666 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1667 } 1668 } else { 1669 bitmap_or(ctx->bitmap, prange->bitmap_access, 1670 prange->bitmap_aip, MAX_GPU_INSTANCE); 1671 } 1672 1673 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1674 r = 0; 1675 goto free_ctx; 1676 } 1677 1678 if (prange->actual_loc && !prange->ttm_res) { 1679 /* This should never happen. actual_loc gets set by 1680 * svm_migrate_ram_to_vram after allocating a BO. 1681 */ 1682 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1683 r = -EINVAL; 1684 goto free_ctx; 1685 } 1686 1687 r = svm_range_reserve_bos(ctx, intr); 1688 if (r) 1689 goto free_ctx; 1690 1691 p = container_of(prange->svms, struct kfd_process, svms); 1692 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1693 MAX_GPU_INSTANCE)); 1694 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1695 if (kfd_svm_page_owner(p, idx) != owner) { 1696 owner = NULL; 1697 break; 1698 } 1699 } 1700 1701 start = map_start << PAGE_SHIFT; 1702 end = (map_last + 1) << PAGE_SHIFT; 1703 for (addr = start; !r && addr < end; ) { 1704 struct hmm_range *hmm_range = NULL; 1705 unsigned long map_start_vma; 1706 unsigned long map_last_vma; 1707 struct vm_area_struct *vma; 1708 unsigned long next = 0; 1709 unsigned long offset; 1710 unsigned long npages; 1711 bool readonly; 1712 1713 vma = vma_lookup(mm, addr); 1714 if (vma) { 1715 readonly = !(vma->vm_flags & VM_WRITE); 1716 1717 next = min(vma->vm_end, end); 1718 npages = (next - addr) >> PAGE_SHIFT; 1719 WRITE_ONCE(p->svms.faulting_task, current); 1720 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1721 readonly, owner, NULL, 1722 &hmm_range); 1723 WRITE_ONCE(p->svms.faulting_task, NULL); 1724 if (r) 1725 pr_debug("failed %d to get svm range pages\n", r); 1726 } else { 1727 r = -EFAULT; 1728 } 1729 1730 if (!r) { 1731 offset = (addr >> PAGE_SHIFT) - prange->start; 1732 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1733 hmm_range->hmm_pfns); 1734 if (r) 1735 pr_debug("failed %d to dma map range\n", r); 1736 } 1737 1738 svm_range_lock(prange); 1739 1740 /* Free backing memory of hmm_range if it was initialized 1741 * Overrride return value to TRY AGAIN only if prior returns 1742 * were successful 1743 */ 1744 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1745 pr_debug("hmm update the range, need validate again\n"); 1746 r = -EAGAIN; 1747 } 1748 1749 if (!r && !list_empty(&prange->child_list)) { 1750 pr_debug("range split by unmap in parallel, validate again\n"); 1751 r = -EAGAIN; 1752 } 1753 1754 if (!r) { 1755 map_start_vma = max(map_start, prange->start + offset); 1756 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1757 if (map_start_vma <= map_last_vma) { 1758 offset = map_start_vma - prange->start; 1759 npages = map_last_vma - map_start_vma + 1; 1760 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1761 ctx->bitmap, wait, flush_tlb); 1762 } 1763 } 1764 1765 if (!r && next == end) 1766 prange->mapped_to_gpu = true; 1767 1768 svm_range_unlock(prange); 1769 1770 addr = next; 1771 } 1772 1773 svm_range_unreserve_bos(ctx); 1774 if (!r) 1775 prange->validate_timestamp = ktime_get_boottime(); 1776 1777 free_ctx: 1778 kfree(ctx); 1779 1780 return r; 1781 } 1782 1783 /** 1784 * svm_range_list_lock_and_flush_work - flush pending deferred work 1785 * 1786 * @svms: the svm range list 1787 * @mm: the mm structure 1788 * 1789 * Context: Returns with mmap write lock held, pending deferred work flushed 1790 * 1791 */ 1792 void 1793 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1794 struct mm_struct *mm) 1795 { 1796 retry_flush_work: 1797 flush_work(&svms->deferred_list_work); 1798 mmap_write_lock(mm); 1799 1800 if (list_empty(&svms->deferred_range_list)) 1801 return; 1802 mmap_write_unlock(mm); 1803 pr_debug("retry flush\n"); 1804 goto retry_flush_work; 1805 } 1806 1807 static void svm_range_restore_work(struct work_struct *work) 1808 { 1809 struct delayed_work *dwork = to_delayed_work(work); 1810 struct amdkfd_process_info *process_info; 1811 struct svm_range_list *svms; 1812 struct svm_range *prange; 1813 struct kfd_process *p; 1814 struct mm_struct *mm; 1815 int evicted_ranges; 1816 int invalid; 1817 int r; 1818 1819 svms = container_of(dwork, struct svm_range_list, restore_work); 1820 evicted_ranges = atomic_read(&svms->evicted_ranges); 1821 if (!evicted_ranges) 1822 return; 1823 1824 pr_debug("restore svm ranges\n"); 1825 1826 p = container_of(svms, struct kfd_process, svms); 1827 process_info = p->kgd_process_info; 1828 1829 /* Keep mm reference when svm_range_validate_and_map ranges */ 1830 mm = get_task_mm(p->lead_thread); 1831 if (!mm) { 1832 pr_debug("svms 0x%p process mm gone\n", svms); 1833 return; 1834 } 1835 1836 mutex_lock(&process_info->lock); 1837 svm_range_list_lock_and_flush_work(svms, mm); 1838 mutex_lock(&svms->lock); 1839 1840 evicted_ranges = atomic_read(&svms->evicted_ranges); 1841 1842 list_for_each_entry(prange, &svms->list, list) { 1843 invalid = atomic_read(&prange->invalid); 1844 if (!invalid) 1845 continue; 1846 1847 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1848 prange->svms, prange, prange->start, prange->last, 1849 invalid); 1850 1851 /* 1852 * If range is migrating, wait for migration is done. 1853 */ 1854 mutex_lock(&prange->migrate_mutex); 1855 1856 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1857 MAX_GPU_INSTANCE, false, true, false); 1858 if (r) 1859 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1860 prange->start); 1861 1862 mutex_unlock(&prange->migrate_mutex); 1863 if (r) 1864 goto out_reschedule; 1865 1866 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1867 goto out_reschedule; 1868 } 1869 1870 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1871 evicted_ranges) 1872 goto out_reschedule; 1873 1874 evicted_ranges = 0; 1875 1876 r = kgd2kfd_resume_mm(mm); 1877 if (r) { 1878 /* No recovery from this failure. Probably the CP is 1879 * hanging. No point trying again. 1880 */ 1881 pr_debug("failed %d to resume KFD\n", r); 1882 } 1883 1884 pr_debug("restore svm ranges successfully\n"); 1885 1886 out_reschedule: 1887 mutex_unlock(&svms->lock); 1888 mmap_write_unlock(mm); 1889 mutex_unlock(&process_info->lock); 1890 1891 /* If validation failed, reschedule another attempt */ 1892 if (evicted_ranges) { 1893 pr_debug("reschedule to restore svm range\n"); 1894 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1895 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1896 1897 kfd_smi_event_queue_restore_rescheduled(mm); 1898 } 1899 mmput(mm); 1900 } 1901 1902 /** 1903 * svm_range_evict - evict svm range 1904 * @prange: svm range structure 1905 * @mm: current process mm_struct 1906 * @start: starting process queue number 1907 * @last: last process queue number 1908 * @event: mmu notifier event when range is evicted or migrated 1909 * 1910 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1911 * return to let CPU evict the buffer and proceed CPU pagetable update. 1912 * 1913 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1914 * If invalidation happens while restore work is running, restore work will 1915 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1916 * the queues. 1917 */ 1918 static int 1919 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1920 unsigned long start, unsigned long last, 1921 enum mmu_notifier_event event) 1922 { 1923 struct svm_range_list *svms = prange->svms; 1924 struct svm_range *pchild; 1925 struct kfd_process *p; 1926 int r = 0; 1927 1928 p = container_of(svms, struct kfd_process, svms); 1929 1930 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1931 svms, prange->start, prange->last, start, last); 1932 1933 if (!p->xnack_enabled || 1934 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1935 int evicted_ranges; 1936 bool mapped = prange->mapped_to_gpu; 1937 1938 list_for_each_entry(pchild, &prange->child_list, child_list) { 1939 if (!pchild->mapped_to_gpu) 1940 continue; 1941 mapped = true; 1942 mutex_lock_nested(&pchild->lock, 1); 1943 if (pchild->start <= last && pchild->last >= start) { 1944 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1945 pchild->start, pchild->last); 1946 atomic_inc(&pchild->invalid); 1947 } 1948 mutex_unlock(&pchild->lock); 1949 } 1950 1951 if (!mapped) 1952 return r; 1953 1954 if (prange->start <= last && prange->last >= start) 1955 atomic_inc(&prange->invalid); 1956 1957 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1958 if (evicted_ranges != 1) 1959 return r; 1960 1961 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1962 prange->svms, prange->start, prange->last); 1963 1964 /* First eviction, stop the queues */ 1965 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1966 if (r) 1967 pr_debug("failed to quiesce KFD\n"); 1968 1969 pr_debug("schedule to restore svm %p ranges\n", svms); 1970 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1971 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1972 } else { 1973 unsigned long s, l; 1974 uint32_t trigger; 1975 1976 if (event == MMU_NOTIFY_MIGRATE) 1977 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1978 else 1979 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1980 1981 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1982 prange->svms, start, last); 1983 list_for_each_entry(pchild, &prange->child_list, child_list) { 1984 mutex_lock_nested(&pchild->lock, 1); 1985 s = max(start, pchild->start); 1986 l = min(last, pchild->last); 1987 if (l >= s) 1988 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1989 mutex_unlock(&pchild->lock); 1990 } 1991 s = max(start, prange->start); 1992 l = min(last, prange->last); 1993 if (l >= s) 1994 svm_range_unmap_from_gpus(prange, s, l, trigger); 1995 } 1996 1997 return r; 1998 } 1999 2000 static struct svm_range *svm_range_clone(struct svm_range *old) 2001 { 2002 struct svm_range *new; 2003 2004 new = svm_range_new(old->svms, old->start, old->last, false); 2005 if (!new) 2006 return NULL; 2007 if (svm_range_copy_dma_addrs(new, old)) { 2008 svm_range_free(new, false); 2009 return NULL; 2010 } 2011 if (old->svm_bo) { 2012 new->ttm_res = old->ttm_res; 2013 new->offset = old->offset; 2014 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2015 spin_lock(&new->svm_bo->list_lock); 2016 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2017 spin_unlock(&new->svm_bo->list_lock); 2018 } 2019 new->flags = old->flags; 2020 new->preferred_loc = old->preferred_loc; 2021 new->prefetch_loc = old->prefetch_loc; 2022 new->actual_loc = old->actual_loc; 2023 new->granularity = old->granularity; 2024 new->mapped_to_gpu = old->mapped_to_gpu; 2025 new->vram_pages = old->vram_pages; 2026 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2027 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2028 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2029 2030 return new; 2031 } 2032 2033 void svm_range_set_max_pages(struct amdgpu_device *adev) 2034 { 2035 uint64_t max_pages; 2036 uint64_t pages, _pages; 2037 uint64_t min_pages = 0; 2038 int i, id; 2039 2040 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2041 if (adev->kfd.dev->nodes[i]->xcp) 2042 id = adev->kfd.dev->nodes[i]->xcp->id; 2043 else 2044 id = -1; 2045 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2046 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2047 pages = rounddown_pow_of_two(pages); 2048 min_pages = min_not_zero(min_pages, pages); 2049 } 2050 2051 do { 2052 max_pages = READ_ONCE(max_svm_range_pages); 2053 _pages = min_not_zero(max_pages, min_pages); 2054 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2055 } 2056 2057 static int 2058 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2059 uint64_t max_pages, struct list_head *insert_list, 2060 struct list_head *update_list) 2061 { 2062 struct svm_range *prange; 2063 uint64_t l; 2064 2065 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2066 max_pages, start, last); 2067 2068 while (last >= start) { 2069 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2070 2071 prange = svm_range_new(svms, start, l, true); 2072 if (!prange) 2073 return -ENOMEM; 2074 list_add(&prange->list, insert_list); 2075 list_add(&prange->update_list, update_list); 2076 2077 start = l + 1; 2078 } 2079 return 0; 2080 } 2081 2082 /** 2083 * svm_range_add - add svm range and handle overlap 2084 * @p: the range add to this process svms 2085 * @start: page size aligned 2086 * @size: page size aligned 2087 * @nattr: number of attributes 2088 * @attrs: array of attributes 2089 * @update_list: output, the ranges need validate and update GPU mapping 2090 * @insert_list: output, the ranges need insert to svms 2091 * @remove_list: output, the ranges are replaced and need remove from svms 2092 * @remap_list: output, remap unaligned svm ranges 2093 * 2094 * Check if the virtual address range has overlap with any existing ranges, 2095 * split partly overlapping ranges and add new ranges in the gaps. All changes 2096 * should be applied to the range_list and interval tree transactionally. If 2097 * any range split or allocation fails, the entire update fails. Therefore any 2098 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2099 * unchanged. 2100 * 2101 * If the transaction succeeds, the caller can update and insert clones and 2102 * new ranges, then free the originals. 2103 * 2104 * Otherwise the caller can free the clones and new ranges, while the old 2105 * svm_ranges remain unchanged. 2106 * 2107 * Context: Process context, caller must hold svms->lock 2108 * 2109 * Return: 2110 * 0 - OK, otherwise error code 2111 */ 2112 static int 2113 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2114 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2115 struct list_head *update_list, struct list_head *insert_list, 2116 struct list_head *remove_list, struct list_head *remap_list) 2117 { 2118 unsigned long last = start + size - 1UL; 2119 struct svm_range_list *svms = &p->svms; 2120 struct interval_tree_node *node; 2121 struct svm_range *prange; 2122 struct svm_range *tmp; 2123 struct list_head new_list; 2124 int r = 0; 2125 2126 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2127 2128 INIT_LIST_HEAD(update_list); 2129 INIT_LIST_HEAD(insert_list); 2130 INIT_LIST_HEAD(remove_list); 2131 INIT_LIST_HEAD(&new_list); 2132 INIT_LIST_HEAD(remap_list); 2133 2134 node = interval_tree_iter_first(&svms->objects, start, last); 2135 while (node) { 2136 struct interval_tree_node *next; 2137 unsigned long next_start; 2138 2139 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2140 node->last); 2141 2142 prange = container_of(node, struct svm_range, it_node); 2143 next = interval_tree_iter_next(node, start, last); 2144 next_start = min(node->last, last) + 1; 2145 2146 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2147 prange->mapped_to_gpu) { 2148 /* nothing to do */ 2149 } else if (node->start < start || node->last > last) { 2150 /* node intersects the update range and its attributes 2151 * will change. Clone and split it, apply updates only 2152 * to the overlapping part 2153 */ 2154 struct svm_range *old = prange; 2155 2156 prange = svm_range_clone(old); 2157 if (!prange) { 2158 r = -ENOMEM; 2159 goto out; 2160 } 2161 2162 list_add(&old->update_list, remove_list); 2163 list_add(&prange->list, insert_list); 2164 list_add(&prange->update_list, update_list); 2165 2166 if (node->start < start) { 2167 pr_debug("change old range start\n"); 2168 r = svm_range_split_head(prange, start, 2169 insert_list, remap_list); 2170 if (r) 2171 goto out; 2172 } 2173 if (node->last > last) { 2174 pr_debug("change old range last\n"); 2175 r = svm_range_split_tail(prange, last, 2176 insert_list, remap_list); 2177 if (r) 2178 goto out; 2179 } 2180 } else { 2181 /* The node is contained within start..last, 2182 * just update it 2183 */ 2184 list_add(&prange->update_list, update_list); 2185 } 2186 2187 /* insert a new node if needed */ 2188 if (node->start > start) { 2189 r = svm_range_split_new(svms, start, node->start - 1, 2190 READ_ONCE(max_svm_range_pages), 2191 &new_list, update_list); 2192 if (r) 2193 goto out; 2194 } 2195 2196 node = next; 2197 start = next_start; 2198 } 2199 2200 /* add a final range at the end if needed */ 2201 if (start <= last) 2202 r = svm_range_split_new(svms, start, last, 2203 READ_ONCE(max_svm_range_pages), 2204 &new_list, update_list); 2205 2206 out: 2207 if (r) { 2208 list_for_each_entry_safe(prange, tmp, insert_list, list) 2209 svm_range_free(prange, false); 2210 list_for_each_entry_safe(prange, tmp, &new_list, list) 2211 svm_range_free(prange, true); 2212 } else { 2213 list_splice(&new_list, insert_list); 2214 } 2215 2216 return r; 2217 } 2218 2219 static void 2220 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2221 struct svm_range *prange) 2222 { 2223 unsigned long start; 2224 unsigned long last; 2225 2226 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2227 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2228 2229 if (prange->start == start && prange->last == last) 2230 return; 2231 2232 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2233 prange->svms, prange, start, last, prange->start, 2234 prange->last); 2235 2236 if (start != 0 && last != 0) { 2237 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2238 svm_range_remove_notifier(prange); 2239 } 2240 prange->it_node.start = prange->start; 2241 prange->it_node.last = prange->last; 2242 2243 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2244 svm_range_add_notifier_locked(mm, prange); 2245 } 2246 2247 static void 2248 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2249 struct mm_struct *mm) 2250 { 2251 switch (prange->work_item.op) { 2252 case SVM_OP_NULL: 2253 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2254 svms, prange, prange->start, prange->last); 2255 break; 2256 case SVM_OP_UNMAP_RANGE: 2257 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2258 svms, prange, prange->start, prange->last); 2259 svm_range_unlink(prange); 2260 svm_range_remove_notifier(prange); 2261 svm_range_free(prange, true); 2262 break; 2263 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2264 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2265 svms, prange, prange->start, prange->last); 2266 svm_range_update_notifier_and_interval_tree(mm, prange); 2267 break; 2268 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2269 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2270 svms, prange, prange->start, prange->last); 2271 svm_range_update_notifier_and_interval_tree(mm, prange); 2272 /* TODO: implement deferred validation and mapping */ 2273 break; 2274 case SVM_OP_ADD_RANGE: 2275 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2276 prange->start, prange->last); 2277 svm_range_add_to_svms(prange); 2278 svm_range_add_notifier_locked(mm, prange); 2279 break; 2280 case SVM_OP_ADD_RANGE_AND_MAP: 2281 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2282 prange, prange->start, prange->last); 2283 svm_range_add_to_svms(prange); 2284 svm_range_add_notifier_locked(mm, prange); 2285 /* TODO: implement deferred validation and mapping */ 2286 break; 2287 default: 2288 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2289 prange->work_item.op); 2290 } 2291 } 2292 2293 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2294 { 2295 struct kfd_process_device *pdd; 2296 struct kfd_process *p; 2297 uint32_t i; 2298 2299 p = container_of(svms, struct kfd_process, svms); 2300 2301 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2302 pdd = p->pdds[i]; 2303 if (!pdd) 2304 continue; 2305 2306 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2307 2308 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2309 pdd->dev->adev->irq.retry_cam_enabled ? 2310 &pdd->dev->adev->irq.ih : 2311 &pdd->dev->adev->irq.ih1); 2312 2313 if (pdd->dev->adev->irq.retry_cam_enabled) 2314 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2315 &pdd->dev->adev->irq.ih_soft); 2316 2317 2318 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2319 } 2320 } 2321 2322 static void svm_range_deferred_list_work(struct work_struct *work) 2323 { 2324 struct svm_range_list *svms; 2325 struct svm_range *prange; 2326 struct mm_struct *mm; 2327 2328 svms = container_of(work, struct svm_range_list, deferred_list_work); 2329 pr_debug("enter svms 0x%p\n", svms); 2330 2331 spin_lock(&svms->deferred_list_lock); 2332 while (!list_empty(&svms->deferred_range_list)) { 2333 prange = list_first_entry(&svms->deferred_range_list, 2334 struct svm_range, deferred_list); 2335 spin_unlock(&svms->deferred_list_lock); 2336 2337 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2338 prange->start, prange->last, prange->work_item.op); 2339 2340 mm = prange->work_item.mm; 2341 2342 mmap_write_lock(mm); 2343 2344 /* Remove from deferred_list must be inside mmap write lock, for 2345 * two race cases: 2346 * 1. unmap_from_cpu may change work_item.op and add the range 2347 * to deferred_list again, cause use after free bug. 2348 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2349 * lock and continue because deferred_list is empty, but 2350 * deferred_list work is actually waiting for mmap lock. 2351 */ 2352 spin_lock(&svms->deferred_list_lock); 2353 list_del_init(&prange->deferred_list); 2354 spin_unlock(&svms->deferred_list_lock); 2355 2356 mutex_lock(&svms->lock); 2357 mutex_lock(&prange->migrate_mutex); 2358 while (!list_empty(&prange->child_list)) { 2359 struct svm_range *pchild; 2360 2361 pchild = list_first_entry(&prange->child_list, 2362 struct svm_range, child_list); 2363 pr_debug("child prange 0x%p op %d\n", pchild, 2364 pchild->work_item.op); 2365 list_del_init(&pchild->child_list); 2366 svm_range_handle_list_op(svms, pchild, mm); 2367 } 2368 mutex_unlock(&prange->migrate_mutex); 2369 2370 svm_range_handle_list_op(svms, prange, mm); 2371 mutex_unlock(&svms->lock); 2372 mmap_write_unlock(mm); 2373 2374 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2375 * last mm refcount, schedule release work to avoid circular locking 2376 */ 2377 mmput_async(mm); 2378 2379 spin_lock(&svms->deferred_list_lock); 2380 } 2381 spin_unlock(&svms->deferred_list_lock); 2382 pr_debug("exit svms 0x%p\n", svms); 2383 } 2384 2385 void 2386 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2387 struct mm_struct *mm, enum svm_work_list_ops op) 2388 { 2389 spin_lock(&svms->deferred_list_lock); 2390 /* if prange is on the deferred list */ 2391 if (!list_empty(&prange->deferred_list)) { 2392 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2393 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2394 if (op != SVM_OP_NULL && 2395 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2396 prange->work_item.op = op; 2397 } else { 2398 prange->work_item.op = op; 2399 2400 /* Pairs with mmput in deferred_list_work */ 2401 mmget(mm); 2402 prange->work_item.mm = mm; 2403 list_add_tail(&prange->deferred_list, 2404 &prange->svms->deferred_range_list); 2405 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2406 prange, prange->start, prange->last, op); 2407 } 2408 spin_unlock(&svms->deferred_list_lock); 2409 } 2410 2411 void schedule_deferred_list_work(struct svm_range_list *svms) 2412 { 2413 spin_lock(&svms->deferred_list_lock); 2414 if (!list_empty(&svms->deferred_range_list)) 2415 schedule_work(&svms->deferred_list_work); 2416 spin_unlock(&svms->deferred_list_lock); 2417 } 2418 2419 static void 2420 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2421 struct svm_range *prange, unsigned long start, 2422 unsigned long last) 2423 { 2424 struct svm_range *head; 2425 struct svm_range *tail; 2426 2427 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2428 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2429 prange->start, prange->last); 2430 return; 2431 } 2432 if (start > prange->last || last < prange->start) 2433 return; 2434 2435 head = tail = prange; 2436 if (start > prange->start) 2437 svm_range_split(prange, prange->start, start - 1, &tail); 2438 if (last < tail->last) 2439 svm_range_split(tail, last + 1, tail->last, &head); 2440 2441 if (head != prange && tail != prange) { 2442 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2443 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2444 } else if (tail != prange) { 2445 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2446 } else if (head != prange) { 2447 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2448 } else if (parent != prange) { 2449 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2450 } 2451 } 2452 2453 static void 2454 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2455 unsigned long start, unsigned long last) 2456 { 2457 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2458 struct svm_range_list *svms; 2459 struct svm_range *pchild; 2460 struct kfd_process *p; 2461 unsigned long s, l; 2462 bool unmap_parent; 2463 uint32_t i; 2464 2465 if (atomic_read(&prange->queue_refcount)) { 2466 int r; 2467 2468 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2469 prange->start << PAGE_SHIFT); 2470 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2471 if (r) 2472 pr_debug("failed %d to quiesce KFD queues\n", r); 2473 } 2474 2475 p = kfd_lookup_process_by_mm(mm); 2476 if (!p) 2477 return; 2478 svms = &p->svms; 2479 2480 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2481 prange, prange->start, prange->last, start, last); 2482 2483 /* calculate time stamps that are used to decide which page faults need be 2484 * dropped or handled before unmap pages from gpu vm 2485 */ 2486 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2487 struct kfd_process_device *pdd; 2488 struct amdgpu_device *adev; 2489 struct amdgpu_ih_ring *ih; 2490 uint32_t checkpoint_wptr; 2491 2492 pdd = p->pdds[i]; 2493 if (!pdd) 2494 continue; 2495 2496 adev = pdd->dev->adev; 2497 2498 /* Check and drain ih1 ring if cam not available */ 2499 if (adev->irq.ih1.ring_size) { 2500 ih = &adev->irq.ih1; 2501 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2502 if (ih->rptr != checkpoint_wptr) { 2503 svms->checkpoint_ts[i] = 2504 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2505 continue; 2506 } 2507 } 2508 2509 /* check if dev->irq.ih_soft is not empty */ 2510 ih = &adev->irq.ih_soft; 2511 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2512 if (ih->rptr != checkpoint_wptr) 2513 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2514 } 2515 2516 unmap_parent = start <= prange->start && last >= prange->last; 2517 2518 list_for_each_entry(pchild, &prange->child_list, child_list) { 2519 mutex_lock_nested(&pchild->lock, 1); 2520 s = max(start, pchild->start); 2521 l = min(last, pchild->last); 2522 if (l >= s) 2523 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2524 svm_range_unmap_split(mm, prange, pchild, start, last); 2525 mutex_unlock(&pchild->lock); 2526 } 2527 s = max(start, prange->start); 2528 l = min(last, prange->last); 2529 if (l >= s) 2530 svm_range_unmap_from_gpus(prange, s, l, trigger); 2531 svm_range_unmap_split(mm, prange, prange, start, last); 2532 2533 if (unmap_parent) 2534 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2535 else 2536 svm_range_add_list_work(svms, prange, mm, 2537 SVM_OP_UPDATE_RANGE_NOTIFIER); 2538 schedule_deferred_list_work(svms); 2539 2540 kfd_unref_process(p); 2541 } 2542 2543 /** 2544 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2545 * @mni: mmu_interval_notifier struct 2546 * @range: mmu_notifier_range struct 2547 * @cur_seq: value to pass to mmu_interval_set_seq() 2548 * 2549 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2550 * is from migration, or CPU page invalidation callback. 2551 * 2552 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2553 * work thread, and split prange if only part of prange is unmapped. 2554 * 2555 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2556 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2557 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2558 * update GPU mapping to recover. 2559 * 2560 * Context: mmap lock, notifier_invalidate_start lock are held 2561 * for invalidate event, prange lock is held if this is from migration 2562 */ 2563 static bool 2564 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2565 const struct mmu_notifier_range *range, 2566 unsigned long cur_seq) 2567 { 2568 struct svm_range *prange; 2569 unsigned long start; 2570 unsigned long last; 2571 2572 if (range->event == MMU_NOTIFY_RELEASE) 2573 return true; 2574 if (!mmget_not_zero(mni->mm)) 2575 return true; 2576 2577 start = mni->interval_tree.start; 2578 last = mni->interval_tree.last; 2579 start = max(start, range->start) >> PAGE_SHIFT; 2580 last = min(last, range->end - 1) >> PAGE_SHIFT; 2581 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2582 start, last, range->start >> PAGE_SHIFT, 2583 (range->end - 1) >> PAGE_SHIFT, 2584 mni->interval_tree.start >> PAGE_SHIFT, 2585 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2586 2587 prange = container_of(mni, struct svm_range, notifier); 2588 2589 svm_range_lock(prange); 2590 mmu_interval_set_seq(mni, cur_seq); 2591 2592 switch (range->event) { 2593 case MMU_NOTIFY_UNMAP: 2594 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2595 break; 2596 default: 2597 svm_range_evict(prange, mni->mm, start, last, range->event); 2598 break; 2599 } 2600 2601 svm_range_unlock(prange); 2602 mmput(mni->mm); 2603 2604 return true; 2605 } 2606 2607 /** 2608 * svm_range_from_addr - find svm range from fault address 2609 * @svms: svm range list header 2610 * @addr: address to search range interval tree, in pages 2611 * @parent: parent range if range is on child list 2612 * 2613 * Context: The caller must hold svms->lock 2614 * 2615 * Return: the svm_range found or NULL 2616 */ 2617 struct svm_range * 2618 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2619 struct svm_range **parent) 2620 { 2621 struct interval_tree_node *node; 2622 struct svm_range *prange; 2623 struct svm_range *pchild; 2624 2625 node = interval_tree_iter_first(&svms->objects, addr, addr); 2626 if (!node) 2627 return NULL; 2628 2629 prange = container_of(node, struct svm_range, it_node); 2630 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2631 addr, prange->start, prange->last, node->start, node->last); 2632 2633 if (addr >= prange->start && addr <= prange->last) { 2634 if (parent) 2635 *parent = prange; 2636 return prange; 2637 } 2638 list_for_each_entry(pchild, &prange->child_list, child_list) 2639 if (addr >= pchild->start && addr <= pchild->last) { 2640 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2641 addr, pchild->start, pchild->last); 2642 if (parent) 2643 *parent = prange; 2644 return pchild; 2645 } 2646 2647 return NULL; 2648 } 2649 2650 /* svm_range_best_restore_location - decide the best fault restore location 2651 * @prange: svm range structure 2652 * @adev: the GPU on which vm fault happened 2653 * 2654 * This is only called when xnack is on, to decide the best location to restore 2655 * the range mapping after GPU vm fault. Caller uses the best location to do 2656 * migration if actual loc is not best location, then update GPU page table 2657 * mapping to the best location. 2658 * 2659 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2660 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2661 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2662 * if range actual loc is cpu, best_loc is cpu 2663 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2664 * range actual loc. 2665 * Otherwise, GPU no access, best_loc is -1. 2666 * 2667 * Return: 2668 * -1 means vm fault GPU no access 2669 * 0 for CPU or GPU id 2670 */ 2671 static int32_t 2672 svm_range_best_restore_location(struct svm_range *prange, 2673 struct kfd_node *node, 2674 int32_t *gpuidx) 2675 { 2676 struct kfd_node *bo_node, *preferred_node; 2677 struct kfd_process *p; 2678 uint32_t gpuid; 2679 int r; 2680 2681 p = container_of(prange->svms, struct kfd_process, svms); 2682 2683 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2684 if (r < 0) { 2685 pr_debug("failed to get gpuid from kgd\n"); 2686 return -1; 2687 } 2688 2689 if (node->adev->apu_prefer_gtt) 2690 return 0; 2691 2692 if (prange->preferred_loc == gpuid || 2693 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2694 return prange->preferred_loc; 2695 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2696 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2697 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2698 return prange->preferred_loc; 2699 /* fall through */ 2700 } 2701 2702 if (test_bit(*gpuidx, prange->bitmap_access)) 2703 return gpuid; 2704 2705 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2706 if (!prange->actual_loc) 2707 return 0; 2708 2709 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2710 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2711 return prange->actual_loc; 2712 else 2713 return 0; 2714 } 2715 2716 return -1; 2717 } 2718 2719 static int 2720 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2721 unsigned long *start, unsigned long *last, 2722 bool *is_heap_stack) 2723 { 2724 struct vm_area_struct *vma; 2725 struct interval_tree_node *node; 2726 struct rb_node *rb_node; 2727 unsigned long start_limit, end_limit; 2728 2729 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2730 if (!vma) { 2731 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2732 return -EFAULT; 2733 } 2734 2735 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2736 2737 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2738 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2739 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2740 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2741 2742 /* First range that starts after the fault address */ 2743 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2744 if (node) { 2745 end_limit = min(end_limit, node->start); 2746 /* Last range that ends before the fault address */ 2747 rb_node = rb_prev(&node->rb); 2748 } else { 2749 /* Last range must end before addr because 2750 * there was no range after addr 2751 */ 2752 rb_node = rb_last(&p->svms.objects.rb_root); 2753 } 2754 if (rb_node) { 2755 node = container_of(rb_node, struct interval_tree_node, rb); 2756 if (node->last >= addr) { 2757 WARN(1, "Overlap with prev node and page fault addr\n"); 2758 return -EFAULT; 2759 } 2760 start_limit = max(start_limit, node->last + 1); 2761 } 2762 2763 *start = start_limit; 2764 *last = end_limit - 1; 2765 2766 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2767 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2768 *start, *last, *is_heap_stack); 2769 2770 return 0; 2771 } 2772 2773 static int 2774 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2775 uint64_t *bo_s, uint64_t *bo_l) 2776 { 2777 struct amdgpu_bo_va_mapping *mapping; 2778 struct interval_tree_node *node; 2779 struct amdgpu_bo *bo = NULL; 2780 unsigned long userptr; 2781 uint32_t i; 2782 int r; 2783 2784 for (i = 0; i < p->n_pdds; i++) { 2785 struct amdgpu_vm *vm; 2786 2787 if (!p->pdds[i]->drm_priv) 2788 continue; 2789 2790 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2791 r = amdgpu_bo_reserve(vm->root.bo, false); 2792 if (r) 2793 return r; 2794 2795 /* Check userptr by searching entire vm->va interval tree */ 2796 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2797 while (node) { 2798 mapping = container_of((struct rb_node *)node, 2799 struct amdgpu_bo_va_mapping, rb); 2800 bo = mapping->bo_va->base.bo; 2801 2802 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2803 start << PAGE_SHIFT, 2804 last << PAGE_SHIFT, 2805 &userptr)) { 2806 node = interval_tree_iter_next(node, 0, ~0ULL); 2807 continue; 2808 } 2809 2810 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2811 start, last); 2812 if (bo_s && bo_l) { 2813 *bo_s = userptr >> PAGE_SHIFT; 2814 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2815 } 2816 amdgpu_bo_unreserve(vm->root.bo); 2817 return -EADDRINUSE; 2818 } 2819 amdgpu_bo_unreserve(vm->root.bo); 2820 } 2821 return 0; 2822 } 2823 2824 static struct 2825 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2826 struct kfd_process *p, 2827 struct mm_struct *mm, 2828 int64_t addr) 2829 { 2830 struct svm_range *prange = NULL; 2831 unsigned long start, last; 2832 uint32_t gpuid, gpuidx; 2833 bool is_heap_stack; 2834 uint64_t bo_s = 0; 2835 uint64_t bo_l = 0; 2836 int r; 2837 2838 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2839 &is_heap_stack)) 2840 return NULL; 2841 2842 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2843 if (r != -EADDRINUSE) 2844 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2845 2846 if (r == -EADDRINUSE) { 2847 if (addr >= bo_s && addr <= bo_l) 2848 return NULL; 2849 2850 /* Create one page svm range if 2MB range overlapping */ 2851 start = addr; 2852 last = addr; 2853 } 2854 2855 prange = svm_range_new(&p->svms, start, last, true); 2856 if (!prange) { 2857 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2858 return NULL; 2859 } 2860 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2861 pr_debug("failed to get gpuid from kgd\n"); 2862 svm_range_free(prange, true); 2863 return NULL; 2864 } 2865 2866 if (is_heap_stack) 2867 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2868 2869 svm_range_add_to_svms(prange); 2870 svm_range_add_notifier_locked(mm, prange); 2871 2872 return prange; 2873 } 2874 2875 /* svm_range_skip_recover - decide if prange can be recovered 2876 * @prange: svm range structure 2877 * 2878 * GPU vm retry fault handle skip recover the range for cases: 2879 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2880 * deferred list work will drain the stale fault before free the prange. 2881 * 2. prange is on deferred list to add interval notifier after split, or 2882 * 3. prange is child range, it is split from parent prange, recover later 2883 * after interval notifier is added. 2884 * 2885 * Return: true to skip recover, false to recover 2886 */ 2887 static bool svm_range_skip_recover(struct svm_range *prange) 2888 { 2889 struct svm_range_list *svms = prange->svms; 2890 2891 spin_lock(&svms->deferred_list_lock); 2892 if (list_empty(&prange->deferred_list) && 2893 list_empty(&prange->child_list)) { 2894 spin_unlock(&svms->deferred_list_lock); 2895 return false; 2896 } 2897 spin_unlock(&svms->deferred_list_lock); 2898 2899 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2900 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2901 svms, prange, prange->start, prange->last); 2902 return true; 2903 } 2904 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2905 prange->work_item.op == SVM_OP_ADD_RANGE) { 2906 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2907 svms, prange, prange->start, prange->last); 2908 return true; 2909 } 2910 return false; 2911 } 2912 2913 static void 2914 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2915 int32_t gpuidx) 2916 { 2917 struct kfd_process_device *pdd; 2918 2919 /* fault is on different page of same range 2920 * or fault is skipped to recover later 2921 * or fault is on invalid virtual address 2922 */ 2923 if (gpuidx == MAX_GPU_INSTANCE) { 2924 uint32_t gpuid; 2925 int r; 2926 2927 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2928 if (r < 0) 2929 return; 2930 } 2931 2932 /* fault is recovered 2933 * or fault cannot recover because GPU no access on the range 2934 */ 2935 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2936 if (pdd) 2937 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2938 } 2939 2940 static bool 2941 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2942 { 2943 unsigned long requested = VM_READ; 2944 2945 if (write_fault) 2946 requested |= VM_WRITE; 2947 2948 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2949 vma->vm_flags); 2950 return (vma->vm_flags & requested) == requested; 2951 } 2952 2953 int 2954 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2955 uint32_t vmid, uint32_t node_id, 2956 uint64_t addr, uint64_t ts, bool write_fault) 2957 { 2958 unsigned long start, last, size; 2959 struct mm_struct *mm = NULL; 2960 struct svm_range_list *svms; 2961 struct svm_range *prange; 2962 struct kfd_process *p; 2963 ktime_t timestamp = ktime_get_boottime(); 2964 struct kfd_node *node; 2965 int32_t best_loc; 2966 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2967 bool write_locked = false; 2968 struct vm_area_struct *vma; 2969 bool migration = false; 2970 int r = 0; 2971 2972 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2973 pr_debug("device does not support SVM\n"); 2974 return -EFAULT; 2975 } 2976 2977 p = kfd_lookup_process_by_pasid(pasid, NULL); 2978 if (!p) { 2979 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2980 return 0; 2981 } 2982 svms = &p->svms; 2983 2984 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2985 2986 if (atomic_read(&svms->drain_pagefaults)) { 2987 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 2988 r = 0; 2989 goto out; 2990 } 2991 2992 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2993 if (!node) { 2994 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2995 vmid); 2996 r = -EFAULT; 2997 goto out; 2998 } 2999 3000 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3001 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3002 r = -EFAULT; 3003 goto out; 3004 } 3005 3006 if (!p->xnack_enabled) { 3007 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3008 r = -EFAULT; 3009 goto out; 3010 } 3011 3012 /* p->lead_thread is available as kfd_process_wq_release flush the work 3013 * before releasing task ref. 3014 */ 3015 mm = get_task_mm(p->lead_thread); 3016 if (!mm) { 3017 pr_debug("svms 0x%p failed to get mm\n", svms); 3018 r = 0; 3019 goto out; 3020 } 3021 3022 mmap_read_lock(mm); 3023 retry_write_locked: 3024 mutex_lock(&svms->lock); 3025 3026 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3027 if (svms->checkpoint_ts[gpuidx] != 0) { 3028 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3029 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3030 r = -EAGAIN; 3031 goto out_unlock_svms; 3032 } else { 3033 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3034 * to zero to avoid following ts wrap around give wrong comparing 3035 */ 3036 svms->checkpoint_ts[gpuidx] = 0; 3037 } 3038 } 3039 3040 prange = svm_range_from_addr(svms, addr, NULL); 3041 if (!prange) { 3042 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3043 svms, addr); 3044 if (!write_locked) { 3045 /* Need the write lock to create new range with MMU notifier. 3046 * Also flush pending deferred work to make sure the interval 3047 * tree is up to date before we add a new range 3048 */ 3049 mutex_unlock(&svms->lock); 3050 mmap_read_unlock(mm); 3051 mmap_write_lock(mm); 3052 write_locked = true; 3053 goto retry_write_locked; 3054 } 3055 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3056 if (!prange) { 3057 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3058 svms, addr); 3059 mmap_write_downgrade(mm); 3060 r = -EFAULT; 3061 goto out_unlock_svms; 3062 } 3063 } 3064 if (write_locked) 3065 mmap_write_downgrade(mm); 3066 3067 mutex_lock(&prange->migrate_mutex); 3068 3069 if (svm_range_skip_recover(prange)) { 3070 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3071 r = 0; 3072 goto out_unlock_range; 3073 } 3074 3075 /* skip duplicate vm fault on different pages of same range */ 3076 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3077 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3078 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3079 svms, prange->start, prange->last); 3080 r = 0; 3081 goto out_unlock_range; 3082 } 3083 3084 /* __do_munmap removed VMA, return success as we are handling stale 3085 * retry fault. 3086 */ 3087 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3088 if (!vma) { 3089 pr_debug("address 0x%llx VMA is removed\n", addr); 3090 r = 0; 3091 goto out_unlock_range; 3092 } 3093 3094 if (!svm_fault_allowed(vma, write_fault)) { 3095 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3096 write_fault ? "write" : "read"); 3097 r = -EPERM; 3098 goto out_unlock_range; 3099 } 3100 3101 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3102 if (best_loc == -1) { 3103 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3104 svms, prange->start, prange->last); 3105 r = -EACCES; 3106 goto out_unlock_range; 3107 } 3108 3109 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3110 svms, prange->start, prange->last, best_loc, 3111 prange->actual_loc); 3112 3113 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3114 write_fault, timestamp); 3115 3116 /* Align migration range start and size to granularity size */ 3117 size = 1UL << prange->granularity; 3118 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3119 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3120 if (prange->actual_loc != 0 || best_loc != 0) { 3121 if (best_loc) { 3122 r = svm_migrate_to_vram(prange, best_loc, start, last, 3123 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3124 if (r) { 3125 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3126 r, addr); 3127 /* Fallback to system memory if migration to 3128 * VRAM failed 3129 */ 3130 if (prange->actual_loc && prange->actual_loc != best_loc) 3131 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3132 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3133 else 3134 r = 0; 3135 } 3136 } else { 3137 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3138 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3139 } 3140 if (r) { 3141 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3142 r, svms, start, last); 3143 goto out_migrate_fail; 3144 } else { 3145 migration = true; 3146 } 3147 } 3148 3149 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3150 false, false); 3151 if (r) 3152 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3153 r, svms, start, last); 3154 3155 out_migrate_fail: 3156 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3157 migration); 3158 3159 out_unlock_range: 3160 mutex_unlock(&prange->migrate_mutex); 3161 out_unlock_svms: 3162 mutex_unlock(&svms->lock); 3163 mmap_read_unlock(mm); 3164 3165 if (r != -EAGAIN) 3166 svm_range_count_fault(node, p, gpuidx); 3167 3168 mmput(mm); 3169 out: 3170 kfd_unref_process(p); 3171 3172 if (r == -EAGAIN) { 3173 pr_debug("recover vm fault later\n"); 3174 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3175 r = 0; 3176 } 3177 return r; 3178 } 3179 3180 int 3181 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3182 { 3183 struct svm_range *prange, *pchild; 3184 uint64_t reserved_size = 0; 3185 uint64_t size; 3186 int r = 0; 3187 3188 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3189 3190 mutex_lock(&p->svms.lock); 3191 3192 list_for_each_entry(prange, &p->svms.list, list) { 3193 svm_range_lock(prange); 3194 list_for_each_entry(pchild, &prange->child_list, child_list) { 3195 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3196 if (xnack_enabled) { 3197 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3198 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3199 } else { 3200 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3201 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3202 if (r) 3203 goto out_unlock; 3204 reserved_size += size; 3205 } 3206 } 3207 3208 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3209 if (xnack_enabled) { 3210 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3211 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3212 } else { 3213 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3214 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3215 if (r) 3216 goto out_unlock; 3217 reserved_size += size; 3218 } 3219 out_unlock: 3220 svm_range_unlock(prange); 3221 if (r) 3222 break; 3223 } 3224 3225 if (r) 3226 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3227 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3228 else 3229 /* Change xnack mode must be inside svms lock, to avoid race with 3230 * svm_range_deferred_list_work unreserve memory in parallel. 3231 */ 3232 p->xnack_enabled = xnack_enabled; 3233 3234 mutex_unlock(&p->svms.lock); 3235 return r; 3236 } 3237 3238 void svm_range_list_fini(struct kfd_process *p) 3239 { 3240 struct svm_range *prange; 3241 struct svm_range *next; 3242 3243 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3244 &p->svms); 3245 3246 cancel_delayed_work_sync(&p->svms.restore_work); 3247 3248 /* Ensure list work is finished before process is destroyed */ 3249 flush_work(&p->svms.deferred_list_work); 3250 3251 /* 3252 * Ensure no retry fault comes in afterwards, as page fault handler will 3253 * not find kfd process and take mm lock to recover fault. 3254 * stop kfd page fault handing, then wait pending page faults got drained 3255 */ 3256 atomic_set(&p->svms.drain_pagefaults, 1); 3257 svm_range_drain_retry_fault(&p->svms); 3258 3259 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3260 svm_range_unlink(prange); 3261 svm_range_remove_notifier(prange); 3262 svm_range_free(prange, true); 3263 } 3264 3265 mutex_destroy(&p->svms.lock); 3266 3267 pr_debug("process pid %d svms 0x%p done\n", 3268 p->lead_thread->pid, &p->svms); 3269 } 3270 3271 int svm_range_list_init(struct kfd_process *p) 3272 { 3273 struct svm_range_list *svms = &p->svms; 3274 int i; 3275 3276 svms->objects = RB_ROOT_CACHED; 3277 mutex_init(&svms->lock); 3278 INIT_LIST_HEAD(&svms->list); 3279 atomic_set(&svms->evicted_ranges, 0); 3280 atomic_set(&svms->drain_pagefaults, 0); 3281 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3282 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3283 INIT_LIST_HEAD(&svms->deferred_range_list); 3284 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3285 spin_lock_init(&svms->deferred_list_lock); 3286 3287 for (i = 0; i < p->n_pdds; i++) 3288 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3289 bitmap_set(svms->bitmap_supported, i, 1); 3290 3291 /* Value of default granularity cannot exceed 0x1B, the 3292 * number of pages supported by a 4-level paging table 3293 */ 3294 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3295 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3296 3297 return 0; 3298 } 3299 3300 /** 3301 * svm_range_check_vm - check if virtual address range mapped already 3302 * @p: current kfd_process 3303 * @start: range start address, in pages 3304 * @last: range last address, in pages 3305 * @bo_s: mapping start address in pages if address range already mapped 3306 * @bo_l: mapping last address in pages if address range already mapped 3307 * 3308 * The purpose is to avoid virtual address ranges already allocated by 3309 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3310 * It looks for each pdd in the kfd_process. 3311 * 3312 * Context: Process context 3313 * 3314 * Return 0 - OK, if the range is not mapped. 3315 * Otherwise error code: 3316 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3317 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3318 * a signal. Release all buffer reservations and return to user-space. 3319 */ 3320 static int 3321 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3322 uint64_t *bo_s, uint64_t *bo_l) 3323 { 3324 struct amdgpu_bo_va_mapping *mapping; 3325 struct interval_tree_node *node; 3326 uint32_t i; 3327 int r; 3328 3329 for (i = 0; i < p->n_pdds; i++) { 3330 struct amdgpu_vm *vm; 3331 3332 if (!p->pdds[i]->drm_priv) 3333 continue; 3334 3335 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3336 r = amdgpu_bo_reserve(vm->root.bo, false); 3337 if (r) 3338 return r; 3339 3340 node = interval_tree_iter_first(&vm->va, start, last); 3341 if (node) { 3342 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3343 start, last); 3344 mapping = container_of((struct rb_node *)node, 3345 struct amdgpu_bo_va_mapping, rb); 3346 if (bo_s && bo_l) { 3347 *bo_s = mapping->start; 3348 *bo_l = mapping->last; 3349 } 3350 amdgpu_bo_unreserve(vm->root.bo); 3351 return -EADDRINUSE; 3352 } 3353 amdgpu_bo_unreserve(vm->root.bo); 3354 } 3355 3356 return 0; 3357 } 3358 3359 /** 3360 * svm_range_is_valid - check if virtual address range is valid 3361 * @p: current kfd_process 3362 * @start: range start address, in pages 3363 * @size: range size, in pages 3364 * 3365 * Valid virtual address range means it belongs to one or more VMAs 3366 * 3367 * Context: Process context 3368 * 3369 * Return: 3370 * 0 - OK, otherwise error code 3371 */ 3372 static int 3373 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3374 { 3375 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3376 struct vm_area_struct *vma; 3377 unsigned long end; 3378 unsigned long start_unchg = start; 3379 3380 start <<= PAGE_SHIFT; 3381 end = start + (size << PAGE_SHIFT); 3382 do { 3383 vma = vma_lookup(p->mm, start); 3384 if (!vma || (vma->vm_flags & device_vma)) 3385 return -EFAULT; 3386 start = min(end, vma->vm_end); 3387 } while (start < end); 3388 3389 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3390 NULL); 3391 } 3392 3393 /** 3394 * svm_range_best_prefetch_location - decide the best prefetch location 3395 * @prange: svm range structure 3396 * 3397 * For xnack off: 3398 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3399 * can be CPU or GPU. 3400 * 3401 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3402 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3403 * the best prefetch location is always CPU, because GPU can not have coherent 3404 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3405 * 3406 * For xnack on: 3407 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3408 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3409 * 3410 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3411 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3412 * prefetch location is always CPU. 3413 * 3414 * Context: Process context 3415 * 3416 * Return: 3417 * 0 for CPU or GPU id 3418 */ 3419 static uint32_t 3420 svm_range_best_prefetch_location(struct svm_range *prange) 3421 { 3422 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3423 uint32_t best_loc = prange->prefetch_loc; 3424 struct kfd_process_device *pdd; 3425 struct kfd_node *bo_node; 3426 struct kfd_process *p; 3427 uint32_t gpuidx; 3428 3429 p = container_of(prange->svms, struct kfd_process, svms); 3430 3431 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3432 goto out; 3433 3434 bo_node = svm_range_get_node_by_id(prange, best_loc); 3435 if (!bo_node) { 3436 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3437 best_loc = 0; 3438 goto out; 3439 } 3440 3441 if (bo_node->adev->apu_prefer_gtt) { 3442 best_loc = 0; 3443 goto out; 3444 } 3445 3446 if (p->xnack_enabled) 3447 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3448 else 3449 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3450 MAX_GPU_INSTANCE); 3451 3452 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3453 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3454 if (!pdd) { 3455 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3456 continue; 3457 } 3458 3459 if (pdd->dev->adev == bo_node->adev) 3460 continue; 3461 3462 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3463 best_loc = 0; 3464 break; 3465 } 3466 } 3467 3468 out: 3469 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3470 p->xnack_enabled, &p->svms, prange->start, prange->last, 3471 best_loc); 3472 3473 return best_loc; 3474 } 3475 3476 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3477 * @mm: current process mm_struct 3478 * @prange: svm range structure 3479 * @migrated: output, true if migration is triggered 3480 * 3481 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3482 * from ram to vram. 3483 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3484 * from vram to ram. 3485 * 3486 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3487 * and restore work: 3488 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3489 * stops all queues, schedule restore work 3490 * 2. svm_range_restore_work wait for migration is done by 3491 * a. svm_range_validate_vram takes prange->migrate_mutex 3492 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3493 * 3. restore work update mappings of GPU, resume all queues. 3494 * 3495 * Context: Process context 3496 * 3497 * Return: 3498 * 0 - OK, otherwise - error code of migration 3499 */ 3500 static int 3501 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3502 bool *migrated) 3503 { 3504 uint32_t best_loc; 3505 int r = 0; 3506 3507 *migrated = false; 3508 best_loc = svm_range_best_prefetch_location(prange); 3509 3510 /* when best_loc is a gpu node and same as prange->actual_loc 3511 * we still need do migration as prange->actual_loc !=0 does 3512 * not mean all pages in prange are vram. hmm migrate will pick 3513 * up right pages during migration. 3514 */ 3515 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3516 (best_loc == 0 && prange->actual_loc == 0)) 3517 return 0; 3518 3519 if (!best_loc) { 3520 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3521 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3522 *migrated = !r; 3523 return r; 3524 } 3525 3526 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3527 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3528 *migrated = !r; 3529 3530 return 0; 3531 } 3532 3533 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3534 { 3535 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3536 * signaled yet and we're under the protection of the fence->lock. 3537 * After the fence is signaled in svm_range_bo_release, we cannot get 3538 * here any more. 3539 * 3540 * Reference is dropped in svm_range_evict_svm_bo_worker. 3541 */ 3542 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3543 WRITE_ONCE(fence->svm_bo->evicting, 1); 3544 schedule_work(&fence->svm_bo->eviction_work); 3545 } 3546 3547 return 0; 3548 } 3549 3550 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3551 { 3552 struct svm_range_bo *svm_bo; 3553 struct mm_struct *mm; 3554 int r = 0; 3555 3556 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3557 3558 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3559 mm = svm_bo->eviction_fence->mm; 3560 } else { 3561 svm_range_bo_unref(svm_bo); 3562 return; 3563 } 3564 3565 mmap_read_lock(mm); 3566 spin_lock(&svm_bo->list_lock); 3567 while (!list_empty(&svm_bo->range_list) && !r) { 3568 struct svm_range *prange = 3569 list_first_entry(&svm_bo->range_list, 3570 struct svm_range, svm_bo_list); 3571 int retries = 3; 3572 3573 list_del_init(&prange->svm_bo_list); 3574 spin_unlock(&svm_bo->list_lock); 3575 3576 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3577 prange->start, prange->last); 3578 3579 mutex_lock(&prange->migrate_mutex); 3580 do { 3581 /* migrate all vram pages in this prange to sys ram 3582 * after that prange->actual_loc should be zero 3583 */ 3584 r = svm_migrate_vram_to_ram(prange, mm, 3585 prange->start, prange->last, 3586 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3587 } while (!r && prange->actual_loc && --retries); 3588 3589 if (!r && prange->actual_loc) 3590 pr_info_once("Migration failed during eviction"); 3591 3592 if (!prange->actual_loc) { 3593 mutex_lock(&prange->lock); 3594 prange->svm_bo = NULL; 3595 mutex_unlock(&prange->lock); 3596 } 3597 mutex_unlock(&prange->migrate_mutex); 3598 3599 spin_lock(&svm_bo->list_lock); 3600 } 3601 spin_unlock(&svm_bo->list_lock); 3602 mmap_read_unlock(mm); 3603 mmput(mm); 3604 3605 dma_fence_signal(&svm_bo->eviction_fence->base); 3606 3607 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3608 * has been called in svm_migrate_vram_to_ram 3609 */ 3610 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3611 svm_range_bo_unref(svm_bo); 3612 } 3613 3614 static int 3615 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3616 uint64_t start, uint64_t size, uint32_t nattr, 3617 struct kfd_ioctl_svm_attribute *attrs) 3618 { 3619 struct amdkfd_process_info *process_info = p->kgd_process_info; 3620 struct list_head update_list; 3621 struct list_head insert_list; 3622 struct list_head remove_list; 3623 struct list_head remap_list; 3624 struct svm_range_list *svms; 3625 struct svm_range *prange; 3626 struct svm_range *next; 3627 bool update_mapping = false; 3628 bool flush_tlb; 3629 int r, ret = 0; 3630 3631 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3632 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3633 3634 r = svm_range_check_attr(p, nattr, attrs); 3635 if (r) 3636 return r; 3637 3638 svms = &p->svms; 3639 3640 mutex_lock(&process_info->lock); 3641 3642 svm_range_list_lock_and_flush_work(svms, mm); 3643 3644 r = svm_range_is_valid(p, start, size); 3645 if (r) { 3646 pr_debug("invalid range r=%d\n", r); 3647 mmap_write_unlock(mm); 3648 goto out; 3649 } 3650 3651 mutex_lock(&svms->lock); 3652 3653 /* Add new range and split existing ranges as needed */ 3654 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3655 &insert_list, &remove_list, &remap_list); 3656 if (r) { 3657 mutex_unlock(&svms->lock); 3658 mmap_write_unlock(mm); 3659 goto out; 3660 } 3661 /* Apply changes as a transaction */ 3662 list_for_each_entry_safe(prange, next, &insert_list, list) { 3663 svm_range_add_to_svms(prange); 3664 svm_range_add_notifier_locked(mm, prange); 3665 } 3666 list_for_each_entry(prange, &update_list, update_list) { 3667 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3668 /* TODO: unmap ranges from GPU that lost access */ 3669 } 3670 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3671 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3672 prange->svms, prange, prange->start, 3673 prange->last); 3674 svm_range_unlink(prange); 3675 svm_range_remove_notifier(prange); 3676 svm_range_free(prange, false); 3677 } 3678 3679 mmap_write_downgrade(mm); 3680 /* Trigger migrations and revalidate and map to GPUs as needed. If 3681 * this fails we may be left with partially completed actions. There 3682 * is no clean way of rolling back to the previous state in such a 3683 * case because the rollback wouldn't be guaranteed to work either. 3684 */ 3685 list_for_each_entry(prange, &update_list, update_list) { 3686 bool migrated; 3687 3688 mutex_lock(&prange->migrate_mutex); 3689 3690 r = svm_range_trigger_migration(mm, prange, &migrated); 3691 if (r) 3692 goto out_unlock_range; 3693 3694 if (migrated && (!p->xnack_enabled || 3695 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3696 prange->mapped_to_gpu) { 3697 pr_debug("restore_work will update mappings of GPUs\n"); 3698 mutex_unlock(&prange->migrate_mutex); 3699 continue; 3700 } 3701 3702 if (!migrated && !update_mapping) { 3703 mutex_unlock(&prange->migrate_mutex); 3704 continue; 3705 } 3706 3707 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3708 3709 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3710 MAX_GPU_INSTANCE, true, true, flush_tlb); 3711 if (r) 3712 pr_debug("failed %d to map svm range\n", r); 3713 3714 out_unlock_range: 3715 mutex_unlock(&prange->migrate_mutex); 3716 if (r) 3717 ret = r; 3718 } 3719 3720 list_for_each_entry(prange, &remap_list, update_list) { 3721 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3722 prange, prange->start, prange->last); 3723 mutex_lock(&prange->migrate_mutex); 3724 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3725 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3726 if (r) 3727 pr_debug("failed %d on remap svm range\n", r); 3728 mutex_unlock(&prange->migrate_mutex); 3729 if (r) 3730 ret = r; 3731 } 3732 3733 dynamic_svm_range_dump(svms); 3734 3735 mutex_unlock(&svms->lock); 3736 mmap_read_unlock(mm); 3737 out: 3738 mutex_unlock(&process_info->lock); 3739 3740 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3741 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3742 3743 return ret ? ret : r; 3744 } 3745 3746 static int 3747 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3748 uint64_t start, uint64_t size, uint32_t nattr, 3749 struct kfd_ioctl_svm_attribute *attrs) 3750 { 3751 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3752 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3753 bool get_preferred_loc = false; 3754 bool get_prefetch_loc = false; 3755 bool get_granularity = false; 3756 bool get_accessible = false; 3757 bool get_flags = false; 3758 uint64_t last = start + size - 1UL; 3759 uint8_t granularity = 0xff; 3760 struct interval_tree_node *node; 3761 struct svm_range_list *svms; 3762 struct svm_range *prange; 3763 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3764 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3765 uint32_t flags_and = 0xffffffff; 3766 uint32_t flags_or = 0; 3767 int gpuidx; 3768 uint32_t i; 3769 int r = 0; 3770 3771 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3772 start + size - 1, nattr); 3773 3774 /* Flush pending deferred work to avoid racing with deferred actions from 3775 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3776 * can still race with get_attr because we don't hold the mmap lock. But that 3777 * would be a race condition in the application anyway, and undefined 3778 * behaviour is acceptable in that case. 3779 */ 3780 flush_work(&p->svms.deferred_list_work); 3781 3782 mmap_read_lock(mm); 3783 r = svm_range_is_valid(p, start, size); 3784 mmap_read_unlock(mm); 3785 if (r) { 3786 pr_debug("invalid range r=%d\n", r); 3787 return r; 3788 } 3789 3790 for (i = 0; i < nattr; i++) { 3791 switch (attrs[i].type) { 3792 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3793 get_preferred_loc = true; 3794 break; 3795 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3796 get_prefetch_loc = true; 3797 break; 3798 case KFD_IOCTL_SVM_ATTR_ACCESS: 3799 get_accessible = true; 3800 break; 3801 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3802 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3803 get_flags = true; 3804 break; 3805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3806 get_granularity = true; 3807 break; 3808 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3809 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3810 fallthrough; 3811 default: 3812 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3813 return -EINVAL; 3814 } 3815 } 3816 3817 svms = &p->svms; 3818 3819 mutex_lock(&svms->lock); 3820 3821 node = interval_tree_iter_first(&svms->objects, start, last); 3822 if (!node) { 3823 pr_debug("range attrs not found return default values\n"); 3824 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3825 &granularity, &flags_and); 3826 flags_or = flags_and; 3827 if (p->xnack_enabled) 3828 bitmap_copy(bitmap_access, svms->bitmap_supported, 3829 MAX_GPU_INSTANCE); 3830 else 3831 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3832 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3833 goto fill_values; 3834 } 3835 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3836 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3837 3838 while (node) { 3839 struct interval_tree_node *next; 3840 3841 prange = container_of(node, struct svm_range, it_node); 3842 next = interval_tree_iter_next(node, start, last); 3843 3844 if (get_preferred_loc) { 3845 if (prange->preferred_loc == 3846 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3847 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3848 location != prange->preferred_loc)) { 3849 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3850 get_preferred_loc = false; 3851 } else { 3852 location = prange->preferred_loc; 3853 } 3854 } 3855 if (get_prefetch_loc) { 3856 if (prange->prefetch_loc == 3857 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3858 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3859 prefetch_loc != prange->prefetch_loc)) { 3860 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3861 get_prefetch_loc = false; 3862 } else { 3863 prefetch_loc = prange->prefetch_loc; 3864 } 3865 } 3866 if (get_accessible) { 3867 bitmap_and(bitmap_access, bitmap_access, 3868 prange->bitmap_access, MAX_GPU_INSTANCE); 3869 bitmap_and(bitmap_aip, bitmap_aip, 3870 prange->bitmap_aip, MAX_GPU_INSTANCE); 3871 } 3872 if (get_flags) { 3873 flags_and &= prange->flags; 3874 flags_or |= prange->flags; 3875 } 3876 3877 if (get_granularity && prange->granularity < granularity) 3878 granularity = prange->granularity; 3879 3880 node = next; 3881 } 3882 fill_values: 3883 mutex_unlock(&svms->lock); 3884 3885 for (i = 0; i < nattr; i++) { 3886 switch (attrs[i].type) { 3887 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3888 attrs[i].value = location; 3889 break; 3890 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3891 attrs[i].value = prefetch_loc; 3892 break; 3893 case KFD_IOCTL_SVM_ATTR_ACCESS: 3894 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3895 attrs[i].value); 3896 if (gpuidx < 0) { 3897 pr_debug("invalid gpuid %x\n", attrs[i].value); 3898 return -EINVAL; 3899 } 3900 if (test_bit(gpuidx, bitmap_access)) 3901 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3902 else if (test_bit(gpuidx, bitmap_aip)) 3903 attrs[i].type = 3904 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3905 else 3906 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3907 break; 3908 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3909 attrs[i].value = flags_and; 3910 break; 3911 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3912 attrs[i].value = ~flags_or; 3913 break; 3914 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3915 attrs[i].value = (uint32_t)granularity; 3916 break; 3917 } 3918 } 3919 3920 return 0; 3921 } 3922 3923 int kfd_criu_resume_svm(struct kfd_process *p) 3924 { 3925 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3926 int nattr_common = 4, nattr_accessibility = 1; 3927 struct criu_svm_metadata *criu_svm_md = NULL; 3928 struct svm_range_list *svms = &p->svms; 3929 struct criu_svm_metadata *next = NULL; 3930 uint32_t set_flags = 0xffffffff; 3931 int i, j, num_attrs, ret = 0; 3932 uint64_t set_attr_size; 3933 struct mm_struct *mm; 3934 3935 if (list_empty(&svms->criu_svm_metadata_list)) { 3936 pr_debug("No SVM data from CRIU restore stage 2\n"); 3937 return ret; 3938 } 3939 3940 mm = get_task_mm(p->lead_thread); 3941 if (!mm) { 3942 pr_err("failed to get mm for the target process\n"); 3943 return -ESRCH; 3944 } 3945 3946 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3947 3948 i = j = 0; 3949 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3950 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3951 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3952 3953 for (j = 0; j < num_attrs; j++) { 3954 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3955 i, j, criu_svm_md->data.attrs[j].type, 3956 i, j, criu_svm_md->data.attrs[j].value); 3957 switch (criu_svm_md->data.attrs[j].type) { 3958 /* During Checkpoint operation, the query for 3959 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3960 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3961 * not used by the range which was checkpointed. Care 3962 * must be taken to not restore with an invalid value 3963 * otherwise the gpuidx value will be invalid and 3964 * set_attr would eventually fail so just replace those 3965 * with another dummy attribute such as 3966 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3967 */ 3968 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3969 if (criu_svm_md->data.attrs[j].value == 3970 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3971 criu_svm_md->data.attrs[j].type = 3972 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3973 criu_svm_md->data.attrs[j].value = 0; 3974 } 3975 break; 3976 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3977 set_flags = criu_svm_md->data.attrs[j].value; 3978 break; 3979 default: 3980 break; 3981 } 3982 } 3983 3984 /* CLR_FLAGS is not available via get_attr during checkpoint but 3985 * it needs to be inserted before restoring the ranges so 3986 * allocate extra space for it before calling set_attr 3987 */ 3988 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3989 (num_attrs + 1); 3990 set_attr_new = krealloc(set_attr, set_attr_size, 3991 GFP_KERNEL); 3992 if (!set_attr_new) { 3993 ret = -ENOMEM; 3994 goto exit; 3995 } 3996 set_attr = set_attr_new; 3997 3998 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3999 sizeof(struct kfd_ioctl_svm_attribute)); 4000 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4001 set_attr[num_attrs].value = ~set_flags; 4002 4003 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4004 criu_svm_md->data.size, num_attrs + 1, 4005 set_attr); 4006 if (ret) { 4007 pr_err("CRIU: failed to set range attributes\n"); 4008 goto exit; 4009 } 4010 4011 i++; 4012 } 4013 exit: 4014 kfree(set_attr); 4015 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4016 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4017 criu_svm_md->data.start_addr); 4018 kfree(criu_svm_md); 4019 } 4020 4021 mmput(mm); 4022 return ret; 4023 4024 } 4025 4026 int kfd_criu_restore_svm(struct kfd_process *p, 4027 uint8_t __user *user_priv_ptr, 4028 uint64_t *priv_data_offset, 4029 uint64_t max_priv_data_size) 4030 { 4031 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4032 int nattr_common = 4, nattr_accessibility = 1; 4033 struct criu_svm_metadata *criu_svm_md = NULL; 4034 struct svm_range_list *svms = &p->svms; 4035 uint32_t num_devices; 4036 int ret = 0; 4037 4038 num_devices = p->n_pdds; 4039 /* Handle one SVM range object at a time, also the number of gpus are 4040 * assumed to be same on the restore node, checking must be done while 4041 * evaluating the topology earlier 4042 */ 4043 4044 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4045 (nattr_common + nattr_accessibility * num_devices); 4046 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4047 4048 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4049 svm_attrs_size; 4050 4051 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4052 if (!criu_svm_md) { 4053 pr_err("failed to allocate memory to store svm metadata\n"); 4054 return -ENOMEM; 4055 } 4056 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4057 ret = -EINVAL; 4058 goto exit; 4059 } 4060 4061 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4062 svm_priv_data_size); 4063 if (ret) { 4064 ret = -EFAULT; 4065 goto exit; 4066 } 4067 *priv_data_offset += svm_priv_data_size; 4068 4069 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4070 4071 return 0; 4072 4073 4074 exit: 4075 kfree(criu_svm_md); 4076 return ret; 4077 } 4078 4079 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4080 uint64_t *svm_priv_data_size) 4081 { 4082 uint64_t total_size, accessibility_size, common_attr_size; 4083 int nattr_common = 4, nattr_accessibility = 1; 4084 int num_devices = p->n_pdds; 4085 struct svm_range_list *svms; 4086 struct svm_range *prange; 4087 uint32_t count = 0; 4088 4089 *svm_priv_data_size = 0; 4090 4091 svms = &p->svms; 4092 if (!svms) 4093 return -EINVAL; 4094 4095 mutex_lock(&svms->lock); 4096 list_for_each_entry(prange, &svms->list, list) { 4097 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4098 prange, prange->start, prange->npages, 4099 prange->start + prange->npages - 1); 4100 count++; 4101 } 4102 mutex_unlock(&svms->lock); 4103 4104 *num_svm_ranges = count; 4105 /* Only the accessbility attributes need to be queried for all the gpus 4106 * individually, remaining ones are spanned across the entire process 4107 * regardless of the various gpu nodes. Of the remaining attributes, 4108 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4109 * 4110 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4111 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4112 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4113 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4114 * 4115 * ** ACCESSBILITY ATTRIBUTES ** 4116 * (Considered as one, type is altered during query, value is gpuid) 4117 * KFD_IOCTL_SVM_ATTR_ACCESS 4118 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4119 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4120 */ 4121 if (*num_svm_ranges > 0) { 4122 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4123 nattr_common; 4124 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4125 nattr_accessibility * num_devices; 4126 4127 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4128 common_attr_size + accessibility_size; 4129 4130 *svm_priv_data_size = *num_svm_ranges * total_size; 4131 } 4132 4133 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4134 *svm_priv_data_size); 4135 return 0; 4136 } 4137 4138 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4139 uint8_t __user *user_priv_data, 4140 uint64_t *priv_data_offset) 4141 { 4142 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4143 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4144 uint64_t svm_priv_data_size, query_attr_size = 0; 4145 int index, nattr_common = 4, ret = 0; 4146 struct svm_range_list *svms; 4147 int num_devices = p->n_pdds; 4148 struct svm_range *prange; 4149 struct mm_struct *mm; 4150 4151 svms = &p->svms; 4152 if (!svms) 4153 return -EINVAL; 4154 4155 mm = get_task_mm(p->lead_thread); 4156 if (!mm) { 4157 pr_err("failed to get mm for the target process\n"); 4158 return -ESRCH; 4159 } 4160 4161 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4162 (nattr_common + num_devices); 4163 4164 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4165 if (!query_attr) { 4166 ret = -ENOMEM; 4167 goto exit; 4168 } 4169 4170 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4171 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4172 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4173 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4174 4175 for (index = 0; index < num_devices; index++) { 4176 struct kfd_process_device *pdd = p->pdds[index]; 4177 4178 query_attr[index + nattr_common].type = 4179 KFD_IOCTL_SVM_ATTR_ACCESS; 4180 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4181 } 4182 4183 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4184 4185 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4186 if (!svm_priv) { 4187 ret = -ENOMEM; 4188 goto exit_query; 4189 } 4190 4191 index = 0; 4192 list_for_each_entry(prange, &svms->list, list) { 4193 4194 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4195 svm_priv->start_addr = prange->start; 4196 svm_priv->size = prange->npages; 4197 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4198 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4199 prange, prange->start, prange->npages, 4200 prange->start + prange->npages - 1, 4201 prange->npages * PAGE_SIZE); 4202 4203 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4204 svm_priv->size, 4205 (nattr_common + num_devices), 4206 svm_priv->attrs); 4207 if (ret) { 4208 pr_err("CRIU: failed to obtain range attributes\n"); 4209 goto exit_priv; 4210 } 4211 4212 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4213 svm_priv_data_size)) { 4214 pr_err("Failed to copy svm priv to user\n"); 4215 ret = -EFAULT; 4216 goto exit_priv; 4217 } 4218 4219 *priv_data_offset += svm_priv_data_size; 4220 4221 } 4222 4223 4224 exit_priv: 4225 kfree(svm_priv); 4226 exit_query: 4227 kfree(query_attr); 4228 exit: 4229 mmput(mm); 4230 return ret; 4231 } 4232 4233 int 4234 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4235 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4236 { 4237 struct mm_struct *mm = current->mm; 4238 int r; 4239 4240 start >>= PAGE_SHIFT; 4241 size >>= PAGE_SHIFT; 4242 4243 switch (op) { 4244 case KFD_IOCTL_SVM_OP_SET_ATTR: 4245 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4246 break; 4247 case KFD_IOCTL_SVM_OP_GET_ATTR: 4248 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4249 break; 4250 default: 4251 r = EINVAL; 4252 break; 4253 } 4254 4255 return r; 4256 } 4257