1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "amdgpu_reset.h" 37 #include "kfd_priv.h" 38 #include "kfd_svm.h" 39 #include "kfd_migrate.h" 40 #include "kfd_smi_events.h" 41 42 #ifdef dev_fmt 43 #undef dev_fmt 44 #endif 45 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 46 47 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 48 49 /* Long enough to ensure no retry fault comes after svm range is restored and 50 * page table is updated. 51 */ 52 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 53 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 54 #define dynamic_svm_range_dump(svms) \ 55 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 56 #else 57 #define dynamic_svm_range_dump(svms) \ 58 do { if (0) svm_range_debug_dump(svms); } while (0) 59 #endif 60 61 /* Giant svm range split into smaller ranges based on this, it is decided using 62 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 63 * power of 2MB. 64 */ 65 static uint64_t max_svm_range_pages; 66 67 struct criu_svm_metadata { 68 struct list_head list; 69 struct kfd_criu_svm_range_priv_data data; 70 }; 71 72 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 73 static bool 74 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 75 const struct mmu_notifier_range *range, 76 unsigned long cur_seq); 77 static int 78 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 79 uint64_t *bo_s, uint64_t *bo_l); 80 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 81 .invalidate = svm_range_cpu_invalidate_pagetables, 82 }; 83 84 /** 85 * svm_range_unlink - unlink svm_range from lists and interval tree 86 * @prange: svm range structure to be removed 87 * 88 * Remove the svm_range from the svms and svm_bo lists and the svms 89 * interval tree. 90 * 91 * Context: The caller must hold svms->lock 92 */ 93 static void svm_range_unlink(struct svm_range *prange) 94 { 95 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 96 prange, prange->start, prange->last); 97 98 if (prange->svm_bo) { 99 spin_lock(&prange->svm_bo->list_lock); 100 list_del(&prange->svm_bo_list); 101 spin_unlock(&prange->svm_bo->list_lock); 102 } 103 104 list_del(&prange->list); 105 if (prange->it_node.start != 0 && prange->it_node.last != 0) 106 interval_tree_remove(&prange->it_node, &prange->svms->objects); 107 } 108 109 static void 110 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 111 { 112 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 113 prange, prange->start, prange->last); 114 115 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 116 prange->start << PAGE_SHIFT, 117 prange->npages << PAGE_SHIFT, 118 &svm_range_mn_ops); 119 } 120 121 /** 122 * svm_range_add_to_svms - add svm range to svms 123 * @prange: svm range structure to be added 124 * 125 * Add the svm range to svms interval tree and link list 126 * 127 * Context: The caller must hold svms->lock 128 */ 129 static void svm_range_add_to_svms(struct svm_range *prange) 130 { 131 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 132 prange, prange->start, prange->last); 133 134 list_move_tail(&prange->list, &prange->svms->list); 135 prange->it_node.start = prange->start; 136 prange->it_node.last = prange->last; 137 interval_tree_insert(&prange->it_node, &prange->svms->objects); 138 } 139 140 static void svm_range_remove_notifier(struct svm_range *prange) 141 { 142 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 143 prange->svms, prange, 144 prange->notifier.interval_tree.start >> PAGE_SHIFT, 145 prange->notifier.interval_tree.last >> PAGE_SHIFT); 146 147 if (prange->notifier.interval_tree.start != 0 && 148 prange->notifier.interval_tree.last != 0) 149 mmu_interval_notifier_remove(&prange->notifier); 150 } 151 152 static bool 153 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 154 { 155 return dma_addr && !dma_mapping_error(dev, dma_addr) && 156 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 157 } 158 159 static int 160 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 161 unsigned long offset, unsigned long npages, 162 unsigned long *hmm_pfns, uint32_t gpuidx) 163 { 164 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 165 dma_addr_t *addr = prange->dma_addr[gpuidx]; 166 struct device *dev = adev->dev; 167 struct page *page; 168 int i, r; 169 170 if (!addr) { 171 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 172 if (!addr) 173 return -ENOMEM; 174 prange->dma_addr[gpuidx] = addr; 175 } 176 177 addr += offset; 178 for (i = 0; i < npages; i++) { 179 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 180 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 181 182 page = hmm_pfn_to_page(hmm_pfns[i]); 183 if (is_zone_device_page(page)) { 184 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 185 186 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 187 bo_adev->vm_manager.vram_base_offset - 188 bo_adev->kfd.pgmap.range.start; 189 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 190 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 191 continue; 192 } 193 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 194 r = dma_mapping_error(dev, addr[i]); 195 if (r) { 196 dev_err(dev, "failed %d dma_map_page\n", r); 197 return r; 198 } 199 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 200 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 201 } 202 203 return 0; 204 } 205 206 static int 207 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 208 unsigned long offset, unsigned long npages, 209 unsigned long *hmm_pfns) 210 { 211 struct kfd_process *p; 212 uint32_t gpuidx; 213 int r; 214 215 p = container_of(prange->svms, struct kfd_process, svms); 216 217 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 218 struct kfd_process_device *pdd; 219 220 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 221 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 222 if (!pdd) { 223 pr_debug("failed to find device idx %d\n", gpuidx); 224 return -EINVAL; 225 } 226 227 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 228 hmm_pfns, gpuidx); 229 if (r) 230 break; 231 } 232 233 return r; 234 } 235 236 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 237 unsigned long offset, unsigned long npages) 238 { 239 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 240 int i; 241 242 if (!dma_addr) 243 return; 244 245 for (i = offset; i < offset + npages; i++) { 246 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 247 continue; 248 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 249 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 250 dma_addr[i] = 0; 251 } 252 } 253 254 void svm_range_dma_unmap(struct svm_range *prange) 255 { 256 struct kfd_process_device *pdd; 257 dma_addr_t *dma_addr; 258 struct device *dev; 259 struct kfd_process *p; 260 uint32_t gpuidx; 261 262 p = container_of(prange->svms, struct kfd_process, svms); 263 264 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 265 dma_addr = prange->dma_addr[gpuidx]; 266 if (!dma_addr) 267 continue; 268 269 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 270 if (!pdd) { 271 pr_debug("failed to find device idx %d\n", gpuidx); 272 continue; 273 } 274 dev = &pdd->dev->adev->pdev->dev; 275 276 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 277 } 278 } 279 280 static void svm_range_free(struct svm_range *prange, bool do_unmap) 281 { 282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 284 uint32_t gpuidx; 285 286 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 287 prange->start, prange->last); 288 289 svm_range_vram_node_free(prange); 290 if (do_unmap) 291 svm_range_dma_unmap(prange); 292 293 if (do_unmap && !p->xnack_enabled) { 294 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 295 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 296 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 297 } 298 299 /* free dma_addr array for each gpu */ 300 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 301 if (prange->dma_addr[gpuidx]) { 302 kvfree(prange->dma_addr[gpuidx]); 303 prange->dma_addr[gpuidx] = NULL; 304 } 305 } 306 307 mutex_destroy(&prange->lock); 308 mutex_destroy(&prange->migrate_mutex); 309 kfree(prange); 310 } 311 312 static void 313 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 314 int32_t *prefetch_loc, uint8_t *granularity, 315 uint32_t *flags) 316 { 317 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 319 *granularity = svms->default_granularity; 320 *flags = 321 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 322 } 323 324 static struct 325 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 326 uint64_t last, bool update_mem_usage) 327 { 328 uint64_t size = last - start + 1; 329 struct svm_range *prange; 330 struct kfd_process *p; 331 332 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 333 if (!prange) 334 return NULL; 335 336 p = container_of(svms, struct kfd_process, svms); 337 if (!p->xnack_enabled && update_mem_usage && 338 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 339 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 340 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 341 kfree(prange); 342 return NULL; 343 } 344 prange->npages = size; 345 prange->svms = svms; 346 prange->start = start; 347 prange->last = last; 348 INIT_LIST_HEAD(&prange->list); 349 INIT_LIST_HEAD(&prange->update_list); 350 INIT_LIST_HEAD(&prange->svm_bo_list); 351 INIT_LIST_HEAD(&prange->deferred_list); 352 INIT_LIST_HEAD(&prange->child_list); 353 atomic_set(&prange->invalid, 0); 354 prange->validate_timestamp = 0; 355 prange->vram_pages = 0; 356 mutex_init(&prange->migrate_mutex); 357 mutex_init(&prange->lock); 358 359 if (p->xnack_enabled) 360 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 361 MAX_GPU_INSTANCE); 362 363 svm_range_set_default_attributes(svms, &prange->preferred_loc, 364 &prange->prefetch_loc, 365 &prange->granularity, &prange->flags); 366 367 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 368 369 return prange; 370 } 371 372 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 373 { 374 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 375 return false; 376 377 return true; 378 } 379 380 static void svm_range_bo_release(struct kref *kref) 381 { 382 struct svm_range_bo *svm_bo; 383 384 svm_bo = container_of(kref, struct svm_range_bo, kref); 385 pr_debug("svm_bo 0x%p\n", svm_bo); 386 387 spin_lock(&svm_bo->list_lock); 388 while (!list_empty(&svm_bo->range_list)) { 389 struct svm_range *prange = 390 list_first_entry(&svm_bo->range_list, 391 struct svm_range, svm_bo_list); 392 /* list_del_init tells a concurrent svm_range_vram_node_new when 393 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 394 */ 395 list_del_init(&prange->svm_bo_list); 396 spin_unlock(&svm_bo->list_lock); 397 398 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 399 prange->start, prange->last); 400 mutex_lock(&prange->lock); 401 prange->svm_bo = NULL; 402 /* prange should not hold vram page now */ 403 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 404 mutex_unlock(&prange->lock); 405 406 spin_lock(&svm_bo->list_lock); 407 } 408 spin_unlock(&svm_bo->list_lock); 409 410 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 411 struct kfd_process_device *pdd; 412 struct kfd_process *p; 413 struct mm_struct *mm; 414 415 mm = svm_bo->eviction_fence->mm; 416 /* 417 * The forked child process takes svm_bo device pages ref, svm_bo could be 418 * released after parent process is gone. 419 */ 420 p = kfd_lookup_process_by_mm(mm); 421 if (p) { 422 pdd = kfd_get_process_device_data(svm_bo->node, p); 423 if (pdd) 424 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 425 kfd_unref_process(p); 426 } 427 mmput(mm); 428 } 429 430 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 431 /* We're not in the eviction worker. Signal the fence. */ 432 dma_fence_signal(&svm_bo->eviction_fence->base); 433 dma_fence_put(&svm_bo->eviction_fence->base); 434 amdgpu_bo_unref(&svm_bo->bo); 435 kfree(svm_bo); 436 } 437 438 static void svm_range_bo_wq_release(struct work_struct *work) 439 { 440 struct svm_range_bo *svm_bo; 441 442 svm_bo = container_of(work, struct svm_range_bo, release_work); 443 svm_range_bo_release(&svm_bo->kref); 444 } 445 446 static void svm_range_bo_release_async(struct kref *kref) 447 { 448 struct svm_range_bo *svm_bo; 449 450 svm_bo = container_of(kref, struct svm_range_bo, kref); 451 pr_debug("svm_bo 0x%p\n", svm_bo); 452 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 453 schedule_work(&svm_bo->release_work); 454 } 455 456 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 457 { 458 kref_put(&svm_bo->kref, svm_range_bo_release_async); 459 } 460 461 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 462 { 463 if (svm_bo) 464 kref_put(&svm_bo->kref, svm_range_bo_release); 465 } 466 467 static bool 468 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 469 { 470 mutex_lock(&prange->lock); 471 if (!prange->svm_bo) { 472 mutex_unlock(&prange->lock); 473 return false; 474 } 475 if (prange->ttm_res) { 476 /* We still have a reference, all is well */ 477 mutex_unlock(&prange->lock); 478 return true; 479 } 480 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 481 /* 482 * Migrate from GPU to GPU, remove range from source svm_bo->node 483 * range list, and return false to allocate svm_bo from destination 484 * node. 485 */ 486 if (prange->svm_bo->node != node) { 487 mutex_unlock(&prange->lock); 488 489 spin_lock(&prange->svm_bo->list_lock); 490 list_del_init(&prange->svm_bo_list); 491 spin_unlock(&prange->svm_bo->list_lock); 492 493 svm_range_bo_unref(prange->svm_bo); 494 return false; 495 } 496 if (READ_ONCE(prange->svm_bo->evicting)) { 497 struct dma_fence *f; 498 struct svm_range_bo *svm_bo; 499 /* The BO is getting evicted, 500 * we need to get a new one 501 */ 502 mutex_unlock(&prange->lock); 503 svm_bo = prange->svm_bo; 504 f = dma_fence_get(&svm_bo->eviction_fence->base); 505 svm_range_bo_unref(prange->svm_bo); 506 /* wait for the fence to avoid long spin-loop 507 * at list_empty_careful 508 */ 509 dma_fence_wait(f, false); 510 dma_fence_put(f); 511 } else { 512 /* The BO was still around and we got 513 * a new reference to it 514 */ 515 mutex_unlock(&prange->lock); 516 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 517 prange->svms, prange->start, prange->last); 518 519 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 520 return true; 521 } 522 523 } else { 524 mutex_unlock(&prange->lock); 525 } 526 527 /* We need a new svm_bo. Spin-loop to wait for concurrent 528 * svm_range_bo_release to finish removing this range from 529 * its range list and set prange->svm_bo to null. After this, 530 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 531 */ 532 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 533 cond_resched(); 534 535 return false; 536 } 537 538 static struct svm_range_bo *svm_range_bo_new(void) 539 { 540 struct svm_range_bo *svm_bo; 541 542 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 543 if (!svm_bo) 544 return NULL; 545 546 kref_init(&svm_bo->kref); 547 INIT_LIST_HEAD(&svm_bo->range_list); 548 spin_lock_init(&svm_bo->list_lock); 549 550 return svm_bo; 551 } 552 553 int 554 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 555 bool clear) 556 { 557 struct kfd_process_device *pdd; 558 struct amdgpu_bo_param bp; 559 struct svm_range_bo *svm_bo; 560 struct amdgpu_bo_user *ubo; 561 struct amdgpu_bo *bo; 562 struct kfd_process *p; 563 struct mm_struct *mm; 564 int r; 565 566 p = container_of(prange->svms, struct kfd_process, svms); 567 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 568 p->lead_thread->pid, prange->svms, 569 prange->start, prange->last); 570 571 if (svm_range_validate_svm_bo(node, prange)) 572 return 0; 573 574 svm_bo = svm_range_bo_new(); 575 if (!svm_bo) { 576 pr_debug("failed to alloc svm bo\n"); 577 return -ENOMEM; 578 } 579 mm = get_task_mm(p->lead_thread); 580 if (!mm) { 581 pr_debug("failed to get mm\n"); 582 kfree(svm_bo); 583 return -ESRCH; 584 } 585 svm_bo->node = node; 586 svm_bo->eviction_fence = 587 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 588 mm, 589 svm_bo, p->context_id); 590 mmput(mm); 591 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 592 svm_bo->evicting = 0; 593 memset(&bp, 0, sizeof(bp)); 594 bp.size = prange->npages * PAGE_SIZE; 595 bp.byte_align = PAGE_SIZE; 596 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 597 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 598 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 599 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 600 bp.type = ttm_bo_type_device; 601 bp.resv = NULL; 602 if (node->xcp) 603 bp.xcp_id_plus1 = node->xcp->id + 1; 604 605 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 606 if (r) { 607 pr_debug("failed %d to create bo\n", r); 608 goto create_bo_failed; 609 } 610 bo = &ubo->bo; 611 612 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 613 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 614 bp.xcp_id_plus1 - 1); 615 616 r = amdgpu_bo_reserve(bo, true); 617 if (r) { 618 pr_debug("failed %d to reserve bo\n", r); 619 goto reserve_bo_failed; 620 } 621 622 if (clear) { 623 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 624 if (r) { 625 pr_debug("failed %d to sync bo\n", r); 626 amdgpu_bo_unreserve(bo); 627 goto reserve_bo_failed; 628 } 629 } 630 631 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 632 if (r) { 633 pr_debug("failed %d to reserve bo\n", r); 634 amdgpu_bo_unreserve(bo); 635 goto reserve_bo_failed; 636 } 637 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 638 639 amdgpu_bo_unreserve(bo); 640 641 svm_bo->bo = bo; 642 prange->svm_bo = svm_bo; 643 prange->ttm_res = bo->tbo.resource; 644 prange->offset = 0; 645 646 spin_lock(&svm_bo->list_lock); 647 list_add(&prange->svm_bo_list, &svm_bo->range_list); 648 spin_unlock(&svm_bo->list_lock); 649 650 pdd = svm_range_get_pdd_by_node(prange, node); 651 if (pdd) 652 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 653 654 return 0; 655 656 reserve_bo_failed: 657 amdgpu_bo_unref(&bo); 658 create_bo_failed: 659 dma_fence_put(&svm_bo->eviction_fence->base); 660 kfree(svm_bo); 661 prange->ttm_res = NULL; 662 663 return r; 664 } 665 666 void svm_range_vram_node_free(struct svm_range *prange) 667 { 668 /* serialize prange->svm_bo unref */ 669 mutex_lock(&prange->lock); 670 /* prange->svm_bo has not been unref */ 671 if (prange->ttm_res) { 672 prange->ttm_res = NULL; 673 mutex_unlock(&prange->lock); 674 svm_range_bo_unref(prange->svm_bo); 675 } else 676 mutex_unlock(&prange->lock); 677 } 678 679 struct kfd_node * 680 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 681 { 682 struct kfd_process *p; 683 struct kfd_process_device *pdd; 684 685 p = container_of(prange->svms, struct kfd_process, svms); 686 pdd = kfd_process_device_data_by_id(p, gpu_id); 687 if (!pdd) { 688 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 689 return NULL; 690 } 691 692 return pdd->dev; 693 } 694 695 struct kfd_process_device * 696 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 697 { 698 struct kfd_process *p; 699 700 p = container_of(prange->svms, struct kfd_process, svms); 701 702 return kfd_get_process_device_data(node, p); 703 } 704 705 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 706 { 707 struct ttm_operation_ctx ctx = { false, false }; 708 709 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 710 711 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 712 } 713 714 static int 715 svm_range_check_attr(struct kfd_process *p, 716 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 717 { 718 uint32_t i; 719 720 for (i = 0; i < nattr; i++) { 721 uint32_t val = attrs[i].value; 722 int gpuidx = MAX_GPU_INSTANCE; 723 724 switch (attrs[i].type) { 725 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 726 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 727 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 728 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 729 break; 730 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 731 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 732 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 733 break; 734 case KFD_IOCTL_SVM_ATTR_ACCESS: 735 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 736 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 737 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 738 break; 739 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 740 break; 741 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 742 break; 743 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 744 break; 745 default: 746 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 747 return -EINVAL; 748 } 749 750 if (gpuidx < 0) { 751 pr_debug("no GPU 0x%x found\n", val); 752 return -EINVAL; 753 } else if (gpuidx < MAX_GPU_INSTANCE && 754 !test_bit(gpuidx, p->svms.bitmap_supported)) { 755 pr_debug("GPU 0x%x not supported\n", val); 756 return -EINVAL; 757 } 758 } 759 760 return 0; 761 } 762 763 static void 764 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 765 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 766 bool *update_mapping) 767 { 768 uint32_t i; 769 int gpuidx; 770 771 for (i = 0; i < nattr; i++) { 772 switch (attrs[i].type) { 773 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 774 prange->preferred_loc = attrs[i].value; 775 break; 776 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 777 prange->prefetch_loc = attrs[i].value; 778 break; 779 case KFD_IOCTL_SVM_ATTR_ACCESS: 780 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 781 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 782 if (!p->xnack_enabled) 783 *update_mapping = true; 784 785 gpuidx = kfd_process_gpuidx_from_gpuid(p, 786 attrs[i].value); 787 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 788 bitmap_clear(prange->bitmap_access, gpuidx, 1); 789 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 790 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 791 bitmap_set(prange->bitmap_access, gpuidx, 1); 792 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 793 } else { 794 bitmap_clear(prange->bitmap_access, gpuidx, 1); 795 bitmap_set(prange->bitmap_aip, gpuidx, 1); 796 } 797 break; 798 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 799 *update_mapping = true; 800 prange->flags |= attrs[i].value; 801 break; 802 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 803 *update_mapping = true; 804 prange->flags &= ~attrs[i].value; 805 break; 806 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 807 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 808 break; 809 default: 810 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 811 } 812 } 813 } 814 815 static bool 816 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 817 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 818 { 819 uint32_t i; 820 int gpuidx; 821 822 for (i = 0; i < nattr; i++) { 823 switch (attrs[i].type) { 824 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 825 if (prange->preferred_loc != attrs[i].value) 826 return false; 827 break; 828 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 829 /* Prefetch should always trigger a migration even 830 * if the value of the attribute didn't change. 831 */ 832 return false; 833 case KFD_IOCTL_SVM_ATTR_ACCESS: 834 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 835 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 836 gpuidx = kfd_process_gpuidx_from_gpuid(p, 837 attrs[i].value); 838 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 839 if (test_bit(gpuidx, prange->bitmap_access) || 840 test_bit(gpuidx, prange->bitmap_aip)) 841 return false; 842 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 843 if (!test_bit(gpuidx, prange->bitmap_access)) 844 return false; 845 } else { 846 if (!test_bit(gpuidx, prange->bitmap_aip)) 847 return false; 848 } 849 break; 850 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 851 if ((prange->flags & attrs[i].value) != attrs[i].value) 852 return false; 853 break; 854 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 855 if ((prange->flags & attrs[i].value) != 0) 856 return false; 857 break; 858 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 859 if (prange->granularity != attrs[i].value) 860 return false; 861 break; 862 default: 863 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 864 } 865 } 866 867 return true; 868 } 869 870 /** 871 * svm_range_debug_dump - print all range information from svms 872 * @svms: svm range list header 873 * 874 * debug output svm range start, end, prefetch location from svms 875 * interval tree and link list 876 * 877 * Context: The caller must hold svms->lock 878 */ 879 static void svm_range_debug_dump(struct svm_range_list *svms) 880 { 881 struct interval_tree_node *node; 882 struct svm_range *prange; 883 884 pr_debug("dump svms 0x%p list\n", svms); 885 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 886 887 list_for_each_entry(prange, &svms->list, list) { 888 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 889 prange, prange->start, prange->npages, 890 prange->start + prange->npages - 1, 891 prange->actual_loc); 892 } 893 894 pr_debug("dump svms 0x%p interval tree\n", svms); 895 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 896 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 897 while (node) { 898 prange = container_of(node, struct svm_range, it_node); 899 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 900 prange, prange->start, prange->npages, 901 prange->start + prange->npages - 1, 902 prange->actual_loc); 903 node = interval_tree_iter_next(node, 0, ~0ULL); 904 } 905 } 906 907 static void * 908 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 909 uint64_t offset, uint64_t *vram_pages) 910 { 911 unsigned char *src = (unsigned char *)psrc + offset; 912 unsigned char *dst; 913 uint64_t i; 914 915 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 916 if (!dst) 917 return NULL; 918 919 if (!vram_pages) { 920 memcpy(dst, src, num_elements * size); 921 return (void *)dst; 922 } 923 924 *vram_pages = 0; 925 for (i = 0; i < num_elements; i++) { 926 dma_addr_t *temp; 927 temp = (dma_addr_t *)dst + i; 928 *temp = *((dma_addr_t *)src + i); 929 if (*temp&SVM_RANGE_VRAM_DOMAIN) 930 (*vram_pages)++; 931 } 932 933 return (void *)dst; 934 } 935 936 static int 937 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 938 { 939 int i; 940 941 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 942 if (!src->dma_addr[i]) 943 continue; 944 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 945 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 946 if (!dst->dma_addr[i]) 947 return -ENOMEM; 948 } 949 950 return 0; 951 } 952 953 static int 954 svm_range_split_array(void *ppnew, void *ppold, size_t size, 955 uint64_t old_start, uint64_t old_n, 956 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 957 { 958 unsigned char *new, *old, *pold; 959 uint64_t d; 960 961 if (!ppold) 962 return 0; 963 pold = *(unsigned char **)ppold; 964 if (!pold) 965 return 0; 966 967 d = (new_start - old_start) * size; 968 /* get dma addr array for new range and calculte its vram page number */ 969 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 970 if (!new) 971 return -ENOMEM; 972 d = (new_start == old_start) ? new_n * size : 0; 973 old = svm_range_copy_array(pold, size, old_n, d, NULL); 974 if (!old) { 975 kvfree(new); 976 return -ENOMEM; 977 } 978 kvfree(pold); 979 *(void **)ppold = old; 980 *(void **)ppnew = new; 981 982 return 0; 983 } 984 985 static int 986 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 987 uint64_t start, uint64_t last) 988 { 989 uint64_t npages = last - start + 1; 990 int i, r; 991 992 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 993 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 994 sizeof(*old->dma_addr[i]), old->start, 995 npages, new->start, new->npages, 996 old->actual_loc ? &new->vram_pages : NULL); 997 if (r) 998 return r; 999 } 1000 if (old->actual_loc) 1001 old->vram_pages -= new->vram_pages; 1002 1003 return 0; 1004 } 1005 1006 static int 1007 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1008 uint64_t start, uint64_t last) 1009 { 1010 uint64_t npages = last - start + 1; 1011 1012 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1013 new->svms, new, new->start, start, last); 1014 1015 if (new->start == old->start) { 1016 new->offset = old->offset; 1017 old->offset += new->npages; 1018 } else { 1019 new->offset = old->offset + npages; 1020 } 1021 1022 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1023 new->ttm_res = old->ttm_res; 1024 1025 spin_lock(&new->svm_bo->list_lock); 1026 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1027 spin_unlock(&new->svm_bo->list_lock); 1028 1029 return 0; 1030 } 1031 1032 /** 1033 * svm_range_split_adjust - split range and adjust 1034 * 1035 * @new: new range 1036 * @old: the old range 1037 * @start: the old range adjust to start address in pages 1038 * @last: the old range adjust to last address in pages 1039 * 1040 * Copy system memory dma_addr or vram ttm_res in old range to new 1041 * range from new_start up to size new->npages, the remaining old range is from 1042 * start to last 1043 * 1044 * Return: 1045 * 0 - OK, -ENOMEM - out of memory 1046 */ 1047 static int 1048 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1049 uint64_t start, uint64_t last) 1050 { 1051 int r; 1052 1053 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1054 new->svms, new->start, old->start, old->last, start, last); 1055 1056 if (new->start < old->start || 1057 new->last > old->last) { 1058 WARN_ONCE(1, "invalid new range start or last\n"); 1059 return -EINVAL; 1060 } 1061 1062 r = svm_range_split_pages(new, old, start, last); 1063 if (r) 1064 return r; 1065 1066 if (old->actual_loc && old->ttm_res) { 1067 r = svm_range_split_nodes(new, old, start, last); 1068 if (r) 1069 return r; 1070 } 1071 1072 old->npages = last - start + 1; 1073 old->start = start; 1074 old->last = last; 1075 new->flags = old->flags; 1076 new->preferred_loc = old->preferred_loc; 1077 new->prefetch_loc = old->prefetch_loc; 1078 new->actual_loc = old->actual_loc; 1079 new->granularity = old->granularity; 1080 new->mapped_to_gpu = old->mapped_to_gpu; 1081 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1082 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1083 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1084 1085 return 0; 1086 } 1087 1088 /** 1089 * svm_range_split - split a range in 2 ranges 1090 * 1091 * @prange: the svm range to split 1092 * @start: the remaining range start address in pages 1093 * @last: the remaining range last address in pages 1094 * @new: the result new range generated 1095 * 1096 * Two cases only: 1097 * case 1: if start == prange->start 1098 * prange ==> prange[start, last] 1099 * new range [last + 1, prange->last] 1100 * 1101 * case 2: if last == prange->last 1102 * prange ==> prange[start, last] 1103 * new range [prange->start, start - 1] 1104 * 1105 * Return: 1106 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1107 */ 1108 static int 1109 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1110 struct svm_range **new) 1111 { 1112 uint64_t old_start = prange->start; 1113 uint64_t old_last = prange->last; 1114 struct svm_range_list *svms; 1115 int r = 0; 1116 1117 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1118 old_start, old_last, start, last); 1119 1120 if (old_start != start && old_last != last) 1121 return -EINVAL; 1122 if (start < old_start || last > old_last) 1123 return -EINVAL; 1124 1125 svms = prange->svms; 1126 if (old_start == start) 1127 *new = svm_range_new(svms, last + 1, old_last, false); 1128 else 1129 *new = svm_range_new(svms, old_start, start - 1, false); 1130 if (!*new) 1131 return -ENOMEM; 1132 1133 r = svm_range_split_adjust(*new, prange, start, last); 1134 if (r) { 1135 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1136 r, old_start, old_last, start, last); 1137 svm_range_free(*new, false); 1138 *new = NULL; 1139 } 1140 1141 return r; 1142 } 1143 1144 static int 1145 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1146 struct list_head *insert_list, struct list_head *remap_list) 1147 { 1148 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1149 unsigned long start_align = ALIGN(prange->start, 512); 1150 bool huge_page_mapping = last_align_down > start_align; 1151 struct svm_range *tail = NULL; 1152 int r; 1153 1154 r = svm_range_split(prange, prange->start, new_last, &tail); 1155 1156 if (r) 1157 return r; 1158 1159 list_add(&tail->list, insert_list); 1160 1161 if (huge_page_mapping && tail->start > start_align && 1162 tail->start < last_align_down && (!IS_ALIGNED(tail->start, 512))) 1163 list_add(&tail->update_list, remap_list); 1164 1165 return 0; 1166 } 1167 1168 static int 1169 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1170 struct list_head *insert_list, struct list_head *remap_list) 1171 { 1172 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1173 unsigned long start_align = ALIGN(prange->start, 512); 1174 bool huge_page_mapping = last_align_down > start_align; 1175 struct svm_range *head = NULL; 1176 int r; 1177 1178 r = svm_range_split(prange, new_start, prange->last, &head); 1179 1180 if (r) 1181 return r; 1182 1183 list_add(&head->list, insert_list); 1184 1185 if (huge_page_mapping && head->last + 1 > start_align && 1186 head->last + 1 < last_align_down && (!IS_ALIGNED(head->last, 512))) 1187 list_add(&head->update_list, remap_list); 1188 1189 return 0; 1190 } 1191 1192 static void 1193 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1194 { 1195 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1196 pchild, pchild->start, pchild->last, prange, op); 1197 1198 pchild->work_item.mm = NULL; 1199 pchild->work_item.op = op; 1200 list_add_tail(&pchild->child_list, &prange->child_list); 1201 } 1202 1203 static bool 1204 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1205 { 1206 return (node_a->adev == node_b->adev || 1207 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1208 } 1209 1210 static uint64_t 1211 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1212 struct svm_range *prange, int domain) 1213 { 1214 struct kfd_node *bo_node; 1215 uint32_t flags = prange->flags; 1216 uint32_t mapping_flags = 0; 1217 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1218 uint64_t pte_flags; 1219 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1220 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1221 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1222 unsigned int mtype_local; 1223 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) 1225 bo_node = prange->svm_bo->node; 1226 1227 switch (gc_ip_version) { 1228 case IP_VERSION(9, 4, 1): 1229 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1230 if (bo_node == node) { 1231 mapping_flags |= coherent ? 1232 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1233 } else { 1234 mapping_flags |= coherent ? 1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1236 if (svm_nodes_in_same_hive(node, bo_node)) 1237 snoop = true; 1238 } 1239 } else { 1240 mapping_flags |= coherent ? 1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1242 } 1243 break; 1244 case IP_VERSION(9, 4, 2): 1245 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1246 if (bo_node == node) { 1247 mapping_flags |= coherent ? 1248 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1249 if (node->adev->gmc.xgmi.connected_to_cpu) 1250 snoop = true; 1251 } else { 1252 mapping_flags |= coherent ? 1253 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1254 if (svm_nodes_in_same_hive(node, bo_node)) 1255 snoop = true; 1256 } 1257 } else { 1258 mapping_flags |= coherent ? 1259 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1260 } 1261 break; 1262 case IP_VERSION(9, 4, 3): 1263 case IP_VERSION(9, 4, 4): 1264 case IP_VERSION(9, 5, 0): 1265 if (ext_coherent) 1266 mtype_local = AMDGPU_VM_MTYPE_CC; 1267 else 1268 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1269 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1270 snoop = true; 1271 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1272 /* local HBM region close to partition */ 1273 if (bo_node->adev == node->adev && 1274 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1275 mapping_flags |= mtype_local; 1276 /* local HBM region far from partition or remote XGMI GPU 1277 * with regular system scope coherence 1278 */ 1279 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1280 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1281 /* PCIe P2P on GPUs pre-9.5.0 */ 1282 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1283 !svm_nodes_in_same_hive(bo_node, node)) 1284 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1285 /* Other remote memory */ 1286 else 1287 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1288 /* system memory accessed by the APU */ 1289 } else if (node->adev->flags & AMD_IS_APU) { 1290 /* On NUMA systems, locality is determined per-page 1291 * in amdgpu_gmc_override_vm_pte_flags 1292 */ 1293 if (num_possible_nodes() <= 1) 1294 mapping_flags |= mtype_local; 1295 else 1296 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1297 /* system memory accessed by the dGPU */ 1298 } else { 1299 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1300 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1301 else 1302 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1303 } 1304 break; 1305 case IP_VERSION(12, 0, 0): 1306 case IP_VERSION(12, 0, 1): 1307 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1308 break; 1309 case IP_VERSION(12, 1, 0): 1310 snoop = true; 1311 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1312 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1313 AMDGPU_VM_MTYPE_RW; 1314 /* local HBM */ 1315 if (bo_node->adev == node->adev) 1316 mapping_flags |= mtype_local; 1317 /* Remote GPU memory */ 1318 else 1319 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : 1320 AMDGPU_VM_MTYPE_NC; 1321 /* system memory accessed by the dGPU */ 1322 } else { 1323 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1324 } 1325 break; 1326 default: 1327 mapping_flags |= coherent ? 1328 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1329 } 1330 1331 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1332 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1333 1334 pte_flags = AMDGPU_PTE_VALID; 1335 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1336 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1337 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1338 pte_flags |= AMDGPU_PTE_IS_PTE; 1339 1340 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1341 pte_flags |= AMDGPU_PTE_READABLE; 1342 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1343 pte_flags |= AMDGPU_PTE_WRITEABLE; 1344 1345 if ((gc_ip_version == IP_VERSION(12, 1, 0)) && 1346 node->adev->have_atomics_support) 1347 pte_flags |= AMDGPU_PTE_BUS_ATOMICS; 1348 1349 return pte_flags; 1350 } 1351 1352 static int 1353 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1354 uint64_t start, uint64_t last, 1355 struct dma_fence **fence) 1356 { 1357 uint64_t init_pte_value = adev->gmc.init_pte_flags; 1358 1359 pr_debug("[0x%llx 0x%llx]\n", start, last); 1360 1361 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1362 last, init_pte_value, 0, 0, NULL, NULL, 1363 fence); 1364 } 1365 1366 static int 1367 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1368 unsigned long last, uint32_t trigger) 1369 { 1370 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1371 struct kfd_process_device *pdd; 1372 struct dma_fence *fence = NULL; 1373 struct kfd_process *p; 1374 uint32_t gpuidx; 1375 int r = 0; 1376 1377 if (!prange->mapped_to_gpu) { 1378 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1379 prange, prange->start, prange->last); 1380 return 0; 1381 } 1382 1383 if (prange->start == start && prange->last == last) { 1384 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1385 prange->mapped_to_gpu = false; 1386 } 1387 1388 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1389 MAX_GPU_INSTANCE); 1390 p = container_of(prange->svms, struct kfd_process, svms); 1391 1392 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1393 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1394 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1395 if (!pdd) { 1396 pr_debug("failed to find device idx %d\n", gpuidx); 1397 return -EINVAL; 1398 } 1399 1400 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1401 start, last, trigger); 1402 1403 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1404 drm_priv_to_vm(pdd->drm_priv), 1405 start, last, &fence); 1406 if (r) 1407 break; 1408 1409 if (fence) { 1410 r = dma_fence_wait(fence, false); 1411 dma_fence_put(fence); 1412 fence = NULL; 1413 if (r) 1414 break; 1415 } 1416 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1417 } 1418 1419 return r; 1420 } 1421 1422 static int 1423 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1424 unsigned long offset, unsigned long npages, bool readonly, 1425 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1426 struct dma_fence **fence, bool flush_tlb) 1427 { 1428 struct amdgpu_device *adev = pdd->dev->adev; 1429 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1430 uint64_t pte_flags; 1431 unsigned long last_start; 1432 int last_domain; 1433 int r = 0; 1434 int64_t i, j; 1435 1436 last_start = prange->start + offset; 1437 1438 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1439 last_start, last_start + npages - 1, readonly); 1440 1441 for (i = offset; i < offset + npages; i++) { 1442 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1443 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1444 1445 /* Collect all pages in the same address range and memory domain 1446 * that can be mapped with a single call to update mapping. 1447 */ 1448 if (i < offset + npages - 1 && 1449 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1450 continue; 1451 1452 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1453 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1454 1455 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1456 if (readonly) 1457 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1458 1459 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1460 prange->svms, last_start, prange->start + i, 1461 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1462 pte_flags); 1463 1464 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1465 * different memory partition based on fpfn/lpfn, we should use 1466 * same vm_manager.vram_base_offset regardless memory partition. 1467 */ 1468 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1469 NULL, last_start, prange->start + i, 1470 pte_flags, 1471 (last_start - prange->start) << PAGE_SHIFT, 1472 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1473 NULL, dma_addr, &vm->last_update); 1474 1475 for (j = last_start - prange->start; j <= i; j++) 1476 dma_addr[j] |= last_domain; 1477 1478 if (r) { 1479 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1480 goto out; 1481 } 1482 last_start = prange->start + i + 1; 1483 } 1484 1485 r = amdgpu_vm_update_pdes(adev, vm, false); 1486 if (r) { 1487 pr_debug("failed %d to update directories 0x%lx\n", r, 1488 prange->start); 1489 goto out; 1490 } 1491 1492 if (fence) 1493 *fence = dma_fence_get(vm->last_update); 1494 1495 out: 1496 return r; 1497 } 1498 1499 static int 1500 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1501 unsigned long npages, bool readonly, 1502 unsigned long *bitmap, bool wait, bool flush_tlb) 1503 { 1504 struct kfd_process_device *pdd; 1505 struct amdgpu_device *bo_adev = NULL; 1506 struct kfd_process *p; 1507 struct dma_fence *fence = NULL; 1508 uint32_t gpuidx; 1509 int r = 0; 1510 1511 if (prange->svm_bo && prange->ttm_res) 1512 bo_adev = prange->svm_bo->node->adev; 1513 1514 p = container_of(prange->svms, struct kfd_process, svms); 1515 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1516 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1517 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1518 if (!pdd) { 1519 pr_debug("failed to find device idx %d\n", gpuidx); 1520 return -EINVAL; 1521 } 1522 1523 pdd = kfd_bind_process_to_device(pdd->dev, p); 1524 if (IS_ERR(pdd)) 1525 return -EINVAL; 1526 1527 if (bo_adev && pdd->dev->adev != bo_adev && 1528 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1529 pr_debug("cannot map to device idx %d\n", gpuidx); 1530 continue; 1531 } 1532 1533 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1534 prange->dma_addr[gpuidx], 1535 bo_adev, wait ? &fence : NULL, 1536 flush_tlb); 1537 if (r) 1538 break; 1539 1540 if (fence) { 1541 r = dma_fence_wait(fence, false); 1542 dma_fence_put(fence); 1543 fence = NULL; 1544 if (r) { 1545 pr_debug("failed %d to dma fence wait\n", r); 1546 break; 1547 } 1548 } 1549 1550 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1551 } 1552 1553 return r; 1554 } 1555 1556 struct svm_validate_context { 1557 struct kfd_process *process; 1558 struct svm_range *prange; 1559 bool intr; 1560 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1561 struct drm_exec exec; 1562 }; 1563 1564 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1565 { 1566 struct kfd_process_device *pdd; 1567 struct amdgpu_vm *vm; 1568 uint32_t gpuidx; 1569 int r; 1570 1571 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1572 drm_exec_until_all_locked(&ctx->exec) { 1573 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1574 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1575 if (!pdd) { 1576 pr_debug("failed to find device idx %d\n", gpuidx); 1577 r = -EINVAL; 1578 goto unreserve_out; 1579 } 1580 vm = drm_priv_to_vm(pdd->drm_priv); 1581 1582 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1583 drm_exec_retry_on_contention(&ctx->exec); 1584 if (unlikely(r)) { 1585 pr_debug("failed %d to reserve bo\n", r); 1586 goto unreserve_out; 1587 } 1588 } 1589 } 1590 1591 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1592 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1593 if (!pdd) { 1594 pr_debug("failed to find device idx %d\n", gpuidx); 1595 r = -EINVAL; 1596 goto unreserve_out; 1597 } 1598 1599 r = amdgpu_vm_validate(pdd->dev->adev, 1600 drm_priv_to_vm(pdd->drm_priv), NULL, 1601 svm_range_bo_validate, NULL); 1602 if (r) { 1603 pr_debug("failed %d validate pt bos\n", r); 1604 goto unreserve_out; 1605 } 1606 } 1607 1608 return 0; 1609 1610 unreserve_out: 1611 drm_exec_fini(&ctx->exec); 1612 return r; 1613 } 1614 1615 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1616 { 1617 drm_exec_fini(&ctx->exec); 1618 } 1619 1620 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1621 { 1622 struct kfd_process_device *pdd; 1623 1624 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1625 if (!pdd) 1626 return NULL; 1627 1628 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1629 } 1630 1631 /* 1632 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1633 * 1634 * To prevent concurrent destruction or change of range attributes, the 1635 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1636 * because that would block concurrent evictions and lead to deadlocks. To 1637 * serialize concurrent migrations or validations of the same range, the 1638 * prange->migrate_mutex must be held. 1639 * 1640 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1641 * eviction fence. 1642 * 1643 * The following sequence ensures race-free validation and GPU mapping: 1644 * 1645 * 1. Reserve page table (and SVM BO if range is in VRAM) 1646 * 2. hmm_range_fault to get page addresses (if system memory) 1647 * 3. DMA-map pages (if system memory) 1648 * 4-a. Take notifier lock 1649 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1650 * 4-c. Check that the range was not split or otherwise invalidated 1651 * 4-d. Update GPU page table 1652 * 4.e. Release notifier lock 1653 * 5. Release page table (and SVM BO) reservation 1654 */ 1655 static int svm_range_validate_and_map(struct mm_struct *mm, 1656 unsigned long map_start, unsigned long map_last, 1657 struct svm_range *prange, int32_t gpuidx, 1658 bool intr, bool wait, bool flush_tlb) 1659 { 1660 struct svm_validate_context *ctx; 1661 unsigned long start, end, addr; 1662 struct kfd_process *p; 1663 void *owner; 1664 int32_t idx; 1665 int r = 0; 1666 1667 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1668 if (!ctx) 1669 return -ENOMEM; 1670 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1671 ctx->prange = prange; 1672 ctx->intr = intr; 1673 1674 if (gpuidx < MAX_GPU_INSTANCE) { 1675 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1676 bitmap_set(ctx->bitmap, gpuidx, 1); 1677 } else if (ctx->process->xnack_enabled) { 1678 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1679 1680 /* If prefetch range to GPU, or GPU retry fault migrate range to 1681 * GPU, which has ACCESS attribute to the range, create mapping 1682 * on that GPU. 1683 */ 1684 if (prange->actual_loc) { 1685 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1686 prange->actual_loc); 1687 if (gpuidx < 0) { 1688 WARN_ONCE(1, "failed get device by id 0x%x\n", 1689 prange->actual_loc); 1690 r = -EINVAL; 1691 goto free_ctx; 1692 } 1693 if (test_bit(gpuidx, prange->bitmap_access)) 1694 bitmap_set(ctx->bitmap, gpuidx, 1); 1695 } 1696 1697 /* 1698 * If prange is already mapped or with always mapped flag, 1699 * update mapping on GPUs with ACCESS attribute 1700 */ 1701 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1702 if (prange->mapped_to_gpu || 1703 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1704 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1705 } 1706 } else { 1707 bitmap_or(ctx->bitmap, prange->bitmap_access, 1708 prange->bitmap_aip, MAX_GPU_INSTANCE); 1709 } 1710 1711 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1712 r = 0; 1713 goto free_ctx; 1714 } 1715 1716 if (prange->actual_loc && !prange->ttm_res) { 1717 /* This should never happen. actual_loc gets set by 1718 * svm_migrate_ram_to_vram after allocating a BO. 1719 */ 1720 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1721 r = -EINVAL; 1722 goto free_ctx; 1723 } 1724 1725 r = svm_range_reserve_bos(ctx, intr); 1726 if (r) 1727 goto free_ctx; 1728 1729 p = container_of(prange->svms, struct kfd_process, svms); 1730 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1731 MAX_GPU_INSTANCE)); 1732 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1733 if (kfd_svm_page_owner(p, idx) != owner) { 1734 owner = NULL; 1735 break; 1736 } 1737 } 1738 1739 start = map_start << PAGE_SHIFT; 1740 end = (map_last + 1) << PAGE_SHIFT; 1741 for (addr = start; !r && addr < end; ) { 1742 struct amdgpu_hmm_range *range = NULL; 1743 unsigned long map_start_vma; 1744 unsigned long map_last_vma; 1745 struct vm_area_struct *vma; 1746 unsigned long next = 0; 1747 unsigned long offset; 1748 unsigned long npages; 1749 bool readonly; 1750 1751 vma = vma_lookup(mm, addr); 1752 if (vma) { 1753 readonly = !(vma->vm_flags & VM_WRITE); 1754 1755 next = min(vma->vm_end, end); 1756 npages = (next - addr) >> PAGE_SHIFT; 1757 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1758 * unmap the memory. If it's not already mapped, this is a no-op 1759 * If PROT_WRITE is provided without READ, warn first then unmap 1760 */ 1761 if (!(vma->vm_flags & VM_READ)) { 1762 unsigned long e, s; 1763 1764 svm_range_lock(prange); 1765 if (vma->vm_flags & VM_WRITE) 1766 pr_debug("VM_WRITE without VM_READ is not supported"); 1767 s = max(start, prange->start); 1768 e = min(end, prange->last); 1769 if (e >= s) 1770 r = svm_range_unmap_from_gpus(prange, s, e, 1771 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1772 svm_range_unlock(prange); 1773 /* If unmap returns non-zero, we'll bail on the next for loop 1774 * iteration, so just leave r and continue 1775 */ 1776 addr = next; 1777 continue; 1778 } 1779 1780 WRITE_ONCE(p->svms.faulting_task, current); 1781 range = amdgpu_hmm_range_alloc(NULL); 1782 if (likely(range)) 1783 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1784 readonly, owner, range); 1785 else 1786 r = -ENOMEM; 1787 WRITE_ONCE(p->svms.faulting_task, NULL); 1788 if (r) 1789 pr_debug("failed %d to get svm range pages\n", r); 1790 } else { 1791 r = -EFAULT; 1792 } 1793 1794 if (!r) { 1795 offset = (addr >> PAGE_SHIFT) - prange->start; 1796 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1797 range->hmm_range.hmm_pfns); 1798 if (r) 1799 pr_debug("failed %d to dma map range\n", r); 1800 } 1801 1802 svm_range_lock(prange); 1803 1804 /* Free backing memory of hmm_range if it was initialized 1805 * Override return value to TRY AGAIN only if prior returns 1806 * were successful 1807 */ 1808 if (range && !amdgpu_hmm_range_valid(range) && !r) { 1809 pr_debug("hmm update the range, need validate again\n"); 1810 r = -EAGAIN; 1811 } 1812 1813 /* Free the hmm range */ 1814 amdgpu_hmm_range_free(range); 1815 1816 if (!r && !list_empty(&prange->child_list)) { 1817 pr_debug("range split by unmap in parallel, validate again\n"); 1818 r = -EAGAIN; 1819 } 1820 1821 if (!r) { 1822 map_start_vma = max(map_start, prange->start + offset); 1823 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1824 if (map_start_vma <= map_last_vma) { 1825 offset = map_start_vma - prange->start; 1826 npages = map_last_vma - map_start_vma + 1; 1827 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1828 ctx->bitmap, wait, flush_tlb); 1829 } 1830 } 1831 1832 if (!r && next == end) 1833 prange->mapped_to_gpu = true; 1834 1835 svm_range_unlock(prange); 1836 1837 addr = next; 1838 } 1839 1840 svm_range_unreserve_bos(ctx); 1841 if (!r) 1842 prange->validate_timestamp = ktime_get_boottime(); 1843 1844 free_ctx: 1845 kfree(ctx); 1846 1847 return r; 1848 } 1849 1850 /** 1851 * svm_range_list_lock_and_flush_work - flush pending deferred work 1852 * 1853 * @svms: the svm range list 1854 * @mm: the mm structure 1855 * 1856 * Context: Returns with mmap write lock held, pending deferred work flushed 1857 * 1858 */ 1859 void 1860 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1861 struct mm_struct *mm) 1862 { 1863 retry_flush_work: 1864 flush_work(&svms->deferred_list_work); 1865 mmap_write_lock(mm); 1866 1867 if (list_empty(&svms->deferred_range_list)) 1868 return; 1869 mmap_write_unlock(mm); 1870 pr_debug("retry flush\n"); 1871 goto retry_flush_work; 1872 } 1873 1874 static void svm_range_restore_work(struct work_struct *work) 1875 { 1876 struct delayed_work *dwork = to_delayed_work(work); 1877 struct amdkfd_process_info *process_info; 1878 struct svm_range_list *svms; 1879 struct svm_range *prange; 1880 struct kfd_process *p; 1881 struct mm_struct *mm; 1882 int evicted_ranges; 1883 int invalid; 1884 int r; 1885 1886 svms = container_of(dwork, struct svm_range_list, restore_work); 1887 evicted_ranges = atomic_read(&svms->evicted_ranges); 1888 if (!evicted_ranges) 1889 return; 1890 1891 pr_debug("restore svm ranges\n"); 1892 1893 p = container_of(svms, struct kfd_process, svms); 1894 process_info = p->kgd_process_info; 1895 1896 /* Keep mm reference when svm_range_validate_and_map ranges */ 1897 mm = get_task_mm(p->lead_thread); 1898 if (!mm) { 1899 pr_debug("svms 0x%p process mm gone\n", svms); 1900 return; 1901 } 1902 1903 mutex_lock(&process_info->lock); 1904 svm_range_list_lock_and_flush_work(svms, mm); 1905 mutex_lock(&svms->lock); 1906 1907 evicted_ranges = atomic_read(&svms->evicted_ranges); 1908 1909 list_for_each_entry(prange, &svms->list, list) { 1910 invalid = atomic_read(&prange->invalid); 1911 if (!invalid) 1912 continue; 1913 1914 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1915 prange->svms, prange, prange->start, prange->last, 1916 invalid); 1917 1918 /* 1919 * If range is migrating, wait for migration is done. 1920 */ 1921 mutex_lock(&prange->migrate_mutex); 1922 1923 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1924 MAX_GPU_INSTANCE, false, true, false); 1925 if (r) 1926 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1927 prange->start); 1928 1929 mutex_unlock(&prange->migrate_mutex); 1930 if (r) 1931 goto out_reschedule; 1932 1933 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1934 goto out_reschedule; 1935 } 1936 1937 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1938 evicted_ranges) 1939 goto out_reschedule; 1940 1941 evicted_ranges = 0; 1942 1943 r = kgd2kfd_resume_mm(mm); 1944 if (r) { 1945 /* No recovery from this failure. Probably the CP is 1946 * hanging. No point trying again. 1947 */ 1948 pr_debug("failed %d to resume KFD\n", r); 1949 } 1950 1951 pr_debug("restore svm ranges successfully\n"); 1952 1953 out_reschedule: 1954 mutex_unlock(&svms->lock); 1955 mmap_write_unlock(mm); 1956 mutex_unlock(&process_info->lock); 1957 1958 /* If validation failed, reschedule another attempt */ 1959 if (evicted_ranges) { 1960 pr_debug("reschedule to restore svm range\n"); 1961 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1962 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1963 1964 kfd_smi_event_queue_restore_rescheduled(mm); 1965 } 1966 mmput(mm); 1967 } 1968 1969 /** 1970 * svm_range_evict - evict svm range 1971 * @prange: svm range structure 1972 * @mm: current process mm_struct 1973 * @start: starting process queue number 1974 * @last: last process queue number 1975 * @event: mmu notifier event when range is evicted or migrated 1976 * 1977 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1978 * return to let CPU evict the buffer and proceed CPU pagetable update. 1979 * 1980 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1981 * If invalidation happens while restore work is running, restore work will 1982 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1983 * the queues. 1984 */ 1985 static int 1986 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1987 unsigned long start, unsigned long last, 1988 enum mmu_notifier_event event) 1989 { 1990 struct svm_range_list *svms = prange->svms; 1991 struct svm_range *pchild; 1992 struct kfd_process *p; 1993 int r = 0; 1994 1995 p = container_of(svms, struct kfd_process, svms); 1996 1997 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1998 svms, prange->start, prange->last, start, last); 1999 2000 if (!p->xnack_enabled || 2001 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 2002 int evicted_ranges; 2003 bool mapped = prange->mapped_to_gpu; 2004 2005 list_for_each_entry(pchild, &prange->child_list, child_list) { 2006 if (!pchild->mapped_to_gpu) 2007 continue; 2008 mapped = true; 2009 mutex_lock_nested(&pchild->lock, 1); 2010 if (pchild->start <= last && pchild->last >= start) { 2011 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 2012 pchild->start, pchild->last); 2013 atomic_inc(&pchild->invalid); 2014 } 2015 mutex_unlock(&pchild->lock); 2016 } 2017 2018 if (!mapped) 2019 return r; 2020 2021 if (prange->start <= last && prange->last >= start) 2022 atomic_inc(&prange->invalid); 2023 2024 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 2025 if (evicted_ranges != 1) 2026 return r; 2027 2028 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 2029 prange->svms, prange->start, prange->last); 2030 2031 /* First eviction, stop the queues */ 2032 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2033 if (r) 2034 pr_debug("failed to quiesce KFD\n"); 2035 2036 pr_debug("schedule to restore svm %p ranges\n", svms); 2037 queue_delayed_work(system_freezable_wq, &svms->restore_work, 2038 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 2039 } else { 2040 unsigned long s, l; 2041 uint32_t trigger; 2042 2043 if (event == MMU_NOTIFY_MIGRATE) 2044 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 2045 else 2046 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2047 2048 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2049 prange->svms, start, last); 2050 list_for_each_entry(pchild, &prange->child_list, child_list) { 2051 mutex_lock_nested(&pchild->lock, 1); 2052 s = max(start, pchild->start); 2053 l = min(last, pchild->last); 2054 if (l >= s) 2055 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2056 mutex_unlock(&pchild->lock); 2057 } 2058 s = max(start, prange->start); 2059 l = min(last, prange->last); 2060 if (l >= s) 2061 svm_range_unmap_from_gpus(prange, s, l, trigger); 2062 } 2063 2064 return r; 2065 } 2066 2067 static struct svm_range *svm_range_clone(struct svm_range *old) 2068 { 2069 struct svm_range *new; 2070 2071 new = svm_range_new(old->svms, old->start, old->last, false); 2072 if (!new) 2073 return NULL; 2074 if (svm_range_copy_dma_addrs(new, old)) { 2075 svm_range_free(new, false); 2076 return NULL; 2077 } 2078 if (old->svm_bo) { 2079 new->ttm_res = old->ttm_res; 2080 new->offset = old->offset; 2081 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2082 spin_lock(&new->svm_bo->list_lock); 2083 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2084 spin_unlock(&new->svm_bo->list_lock); 2085 } 2086 new->flags = old->flags; 2087 new->preferred_loc = old->preferred_loc; 2088 new->prefetch_loc = old->prefetch_loc; 2089 new->actual_loc = old->actual_loc; 2090 new->granularity = old->granularity; 2091 new->mapped_to_gpu = old->mapped_to_gpu; 2092 new->vram_pages = old->vram_pages; 2093 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2094 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2095 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2096 2097 return new; 2098 } 2099 2100 void svm_range_set_max_pages(struct amdgpu_device *adev) 2101 { 2102 uint64_t max_pages; 2103 uint64_t pages, _pages; 2104 uint64_t min_pages = 0; 2105 int i, id; 2106 2107 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2108 if (adev->kfd.dev->nodes[i]->xcp) 2109 id = adev->kfd.dev->nodes[i]->xcp->id; 2110 else 2111 id = -1; 2112 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2113 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2114 pages = rounddown_pow_of_two(pages); 2115 min_pages = min_not_zero(min_pages, pages); 2116 } 2117 2118 do { 2119 max_pages = READ_ONCE(max_svm_range_pages); 2120 _pages = min_not_zero(max_pages, min_pages); 2121 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2122 } 2123 2124 static int 2125 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2126 uint64_t max_pages, struct list_head *insert_list, 2127 struct list_head *update_list) 2128 { 2129 struct svm_range *prange; 2130 uint64_t l; 2131 2132 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2133 max_pages, start, last); 2134 2135 while (last >= start) { 2136 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2137 2138 prange = svm_range_new(svms, start, l, true); 2139 if (!prange) 2140 return -ENOMEM; 2141 list_add(&prange->list, insert_list); 2142 list_add(&prange->update_list, update_list); 2143 2144 start = l + 1; 2145 } 2146 return 0; 2147 } 2148 2149 /** 2150 * svm_range_add - add svm range and handle overlap 2151 * @p: the range add to this process svms 2152 * @start: page size aligned 2153 * @size: page size aligned 2154 * @nattr: number of attributes 2155 * @attrs: array of attributes 2156 * @update_list: output, the ranges need validate and update GPU mapping 2157 * @insert_list: output, the ranges need insert to svms 2158 * @remove_list: output, the ranges are replaced and need remove from svms 2159 * @remap_list: output, remap unaligned svm ranges 2160 * 2161 * Check if the virtual address range has overlap with any existing ranges, 2162 * split partly overlapping ranges and add new ranges in the gaps. All changes 2163 * should be applied to the range_list and interval tree transactionally. If 2164 * any range split or allocation fails, the entire update fails. Therefore any 2165 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2166 * unchanged. 2167 * 2168 * If the transaction succeeds, the caller can update and insert clones and 2169 * new ranges, then free the originals. 2170 * 2171 * Otherwise the caller can free the clones and new ranges, while the old 2172 * svm_ranges remain unchanged. 2173 * 2174 * Context: Process context, caller must hold svms->lock 2175 * 2176 * Return: 2177 * 0 - OK, otherwise error code 2178 */ 2179 static int 2180 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2181 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2182 struct list_head *update_list, struct list_head *insert_list, 2183 struct list_head *remove_list, struct list_head *remap_list) 2184 { 2185 unsigned long last = start + size - 1UL; 2186 struct svm_range_list *svms = &p->svms; 2187 struct interval_tree_node *node; 2188 struct svm_range *prange; 2189 struct svm_range *tmp; 2190 struct list_head new_list; 2191 int r = 0; 2192 2193 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2194 2195 INIT_LIST_HEAD(update_list); 2196 INIT_LIST_HEAD(insert_list); 2197 INIT_LIST_HEAD(remove_list); 2198 INIT_LIST_HEAD(&new_list); 2199 INIT_LIST_HEAD(remap_list); 2200 2201 node = interval_tree_iter_first(&svms->objects, start, last); 2202 while (node) { 2203 struct interval_tree_node *next; 2204 unsigned long next_start; 2205 2206 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2207 node->last); 2208 2209 prange = container_of(node, struct svm_range, it_node); 2210 next = interval_tree_iter_next(node, start, last); 2211 next_start = min(node->last, last) + 1; 2212 2213 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2214 prange->mapped_to_gpu) { 2215 /* nothing to do */ 2216 } else if (node->start < start || node->last > last) { 2217 /* node intersects the update range and its attributes 2218 * will change. Clone and split it, apply updates only 2219 * to the overlapping part 2220 */ 2221 struct svm_range *old = prange; 2222 2223 prange = svm_range_clone(old); 2224 if (!prange) { 2225 r = -ENOMEM; 2226 goto out; 2227 } 2228 2229 list_add(&old->update_list, remove_list); 2230 list_add(&prange->list, insert_list); 2231 list_add(&prange->update_list, update_list); 2232 2233 if (node->start < start) { 2234 pr_debug("change old range start\n"); 2235 r = svm_range_split_head(prange, start, 2236 insert_list, remap_list); 2237 if (r) 2238 goto out; 2239 } 2240 if (node->last > last) { 2241 pr_debug("change old range last\n"); 2242 r = svm_range_split_tail(prange, last, 2243 insert_list, remap_list); 2244 if (r) 2245 goto out; 2246 } 2247 } else { 2248 /* The node is contained within start..last, 2249 * just update it 2250 */ 2251 list_add(&prange->update_list, update_list); 2252 } 2253 2254 /* insert a new node if needed */ 2255 if (node->start > start) { 2256 r = svm_range_split_new(svms, start, node->start - 1, 2257 READ_ONCE(max_svm_range_pages), 2258 &new_list, update_list); 2259 if (r) 2260 goto out; 2261 } 2262 2263 node = next; 2264 start = next_start; 2265 } 2266 2267 /* add a final range at the end if needed */ 2268 if (start <= last) 2269 r = svm_range_split_new(svms, start, last, 2270 READ_ONCE(max_svm_range_pages), 2271 &new_list, update_list); 2272 2273 out: 2274 if (r) { 2275 list_for_each_entry_safe(prange, tmp, insert_list, list) 2276 svm_range_free(prange, false); 2277 list_for_each_entry_safe(prange, tmp, &new_list, list) 2278 svm_range_free(prange, true); 2279 } else { 2280 list_splice(&new_list, insert_list); 2281 } 2282 2283 return r; 2284 } 2285 2286 static void 2287 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2288 struct svm_range *prange) 2289 { 2290 unsigned long start; 2291 unsigned long last; 2292 2293 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2294 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2295 2296 if (prange->start == start && prange->last == last) 2297 return; 2298 2299 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2300 prange->svms, prange, start, last, prange->start, 2301 prange->last); 2302 2303 if (start != 0 && last != 0) { 2304 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2305 svm_range_remove_notifier(prange); 2306 } 2307 prange->it_node.start = prange->start; 2308 prange->it_node.last = prange->last; 2309 2310 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2311 svm_range_add_notifier_locked(mm, prange); 2312 } 2313 2314 static void 2315 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2316 struct mm_struct *mm) 2317 { 2318 switch (prange->work_item.op) { 2319 case SVM_OP_NULL: 2320 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2321 svms, prange, prange->start, prange->last); 2322 break; 2323 case SVM_OP_UNMAP_RANGE: 2324 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2325 svms, prange, prange->start, prange->last); 2326 svm_range_unlink(prange); 2327 svm_range_remove_notifier(prange); 2328 svm_range_free(prange, true); 2329 break; 2330 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2331 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2332 svms, prange, prange->start, prange->last); 2333 svm_range_update_notifier_and_interval_tree(mm, prange); 2334 break; 2335 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2336 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2337 svms, prange, prange->start, prange->last); 2338 svm_range_update_notifier_and_interval_tree(mm, prange); 2339 /* TODO: implement deferred validation and mapping */ 2340 break; 2341 case SVM_OP_ADD_RANGE: 2342 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2343 prange->start, prange->last); 2344 svm_range_add_to_svms(prange); 2345 svm_range_add_notifier_locked(mm, prange); 2346 break; 2347 case SVM_OP_ADD_RANGE_AND_MAP: 2348 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2349 prange, prange->start, prange->last); 2350 svm_range_add_to_svms(prange); 2351 svm_range_add_notifier_locked(mm, prange); 2352 /* TODO: implement deferred validation and mapping */ 2353 break; 2354 default: 2355 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2356 prange->work_item.op); 2357 } 2358 } 2359 2360 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2361 { 2362 struct kfd_process_device *pdd; 2363 struct kfd_process *p; 2364 uint32_t i; 2365 2366 p = container_of(svms, struct kfd_process, svms); 2367 2368 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2369 pdd = p->pdds[i]; 2370 if (!pdd) 2371 continue; 2372 2373 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2374 2375 if (!down_read_trylock(&pdd->dev->adev->reset_domain->sem)) 2376 continue; 2377 2378 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2379 pdd->dev->adev->irq.retry_cam_enabled ? 2380 &pdd->dev->adev->irq.ih : 2381 &pdd->dev->adev->irq.ih1); 2382 2383 if (pdd->dev->adev->irq.retry_cam_enabled) 2384 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2385 &pdd->dev->adev->irq.ih_soft); 2386 2387 up_read(&pdd->dev->adev->reset_domain->sem); 2388 2389 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2390 } 2391 } 2392 2393 static void svm_range_deferred_list_work(struct work_struct *work) 2394 { 2395 struct svm_range_list *svms; 2396 struct svm_range *prange; 2397 struct mm_struct *mm; 2398 2399 svms = container_of(work, struct svm_range_list, deferred_list_work); 2400 pr_debug("enter svms 0x%p\n", svms); 2401 2402 spin_lock(&svms->deferred_list_lock); 2403 while (!list_empty(&svms->deferred_range_list)) { 2404 prange = list_first_entry(&svms->deferred_range_list, 2405 struct svm_range, deferred_list); 2406 spin_unlock(&svms->deferred_list_lock); 2407 2408 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2409 prange->start, prange->last, prange->work_item.op); 2410 2411 mm = prange->work_item.mm; 2412 2413 mmap_write_lock(mm); 2414 2415 /* Remove from deferred_list must be inside mmap write lock, for 2416 * two race cases: 2417 * 1. unmap_from_cpu may change work_item.op and add the range 2418 * to deferred_list again, cause use after free bug. 2419 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2420 * lock and continue because deferred_list is empty, but 2421 * deferred_list work is actually waiting for mmap lock. 2422 */ 2423 spin_lock(&svms->deferred_list_lock); 2424 list_del_init(&prange->deferred_list); 2425 spin_unlock(&svms->deferred_list_lock); 2426 2427 mutex_lock(&svms->lock); 2428 mutex_lock(&prange->migrate_mutex); 2429 while (!list_empty(&prange->child_list)) { 2430 struct svm_range *pchild; 2431 2432 pchild = list_first_entry(&prange->child_list, 2433 struct svm_range, child_list); 2434 pr_debug("child prange 0x%p op %d\n", pchild, 2435 pchild->work_item.op); 2436 list_del_init(&pchild->child_list); 2437 svm_range_handle_list_op(svms, pchild, mm); 2438 } 2439 mutex_unlock(&prange->migrate_mutex); 2440 2441 svm_range_handle_list_op(svms, prange, mm); 2442 mutex_unlock(&svms->lock); 2443 mmap_write_unlock(mm); 2444 2445 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2446 * last mm refcount, schedule release work to avoid circular locking 2447 */ 2448 mmput_async(mm); 2449 2450 spin_lock(&svms->deferred_list_lock); 2451 } 2452 spin_unlock(&svms->deferred_list_lock); 2453 pr_debug("exit svms 0x%p\n", svms); 2454 } 2455 2456 void 2457 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2458 struct mm_struct *mm, enum svm_work_list_ops op) 2459 { 2460 spin_lock(&svms->deferred_list_lock); 2461 /* if prange is on the deferred list */ 2462 if (!list_empty(&prange->deferred_list)) { 2463 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2464 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2465 if (op != SVM_OP_NULL && 2466 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2467 prange->work_item.op = op; 2468 } else { 2469 /* Pairs with mmput in deferred_list_work. 2470 * If process is exiting and mm is gone, don't update mmu notifier. 2471 */ 2472 if (mmget_not_zero(mm)) { 2473 prange->work_item.mm = mm; 2474 prange->work_item.op = op; 2475 list_add_tail(&prange->deferred_list, 2476 &prange->svms->deferred_range_list); 2477 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2478 prange, prange->start, prange->last, op); 2479 } 2480 } 2481 spin_unlock(&svms->deferred_list_lock); 2482 } 2483 2484 void schedule_deferred_list_work(struct svm_range_list *svms) 2485 { 2486 spin_lock(&svms->deferred_list_lock); 2487 if (!list_empty(&svms->deferred_range_list)) 2488 schedule_work(&svms->deferred_list_work); 2489 spin_unlock(&svms->deferred_list_lock); 2490 } 2491 2492 static void 2493 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2494 unsigned long last) 2495 { 2496 struct svm_range *head; 2497 struct svm_range *tail; 2498 2499 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2500 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2501 prange->start, prange->last); 2502 return; 2503 } 2504 if (start > prange->last || last < prange->start) 2505 return; 2506 2507 head = tail = prange; 2508 if (start > prange->start) 2509 svm_range_split(prange, prange->start, start - 1, &tail); 2510 if (last < tail->last) 2511 svm_range_split(tail, last + 1, tail->last, &head); 2512 2513 if (head != prange && tail != prange) { 2514 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2515 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2516 } else if (tail != prange) { 2517 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2518 } else if (head != prange) { 2519 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2520 } else if (parent != prange) { 2521 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2522 } 2523 } 2524 2525 static void 2526 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2527 unsigned long start, unsigned long last) 2528 { 2529 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2530 struct svm_range_list *svms; 2531 struct svm_range *pchild; 2532 struct kfd_process *p; 2533 unsigned long s, l; 2534 bool unmap_parent; 2535 uint32_t i; 2536 2537 if (atomic_read(&prange->queue_refcount)) { 2538 int r; 2539 2540 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2541 prange->start << PAGE_SHIFT); 2542 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2543 if (r) 2544 pr_debug("failed %d to quiesce KFD queues\n", r); 2545 } 2546 2547 p = kfd_lookup_process_by_mm(mm); 2548 if (!p) 2549 return; 2550 svms = &p->svms; 2551 2552 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2553 prange, prange->start, prange->last, start, last); 2554 2555 /* calculate time stamps that are used to decide which page faults need be 2556 * dropped or handled before unmap pages from gpu vm 2557 */ 2558 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2559 struct kfd_process_device *pdd; 2560 struct amdgpu_device *adev; 2561 struct amdgpu_ih_ring *ih; 2562 uint32_t checkpoint_wptr; 2563 2564 pdd = p->pdds[i]; 2565 if (!pdd) 2566 continue; 2567 2568 adev = pdd->dev->adev; 2569 2570 /* Check and drain ih1 ring if cam not available */ 2571 if (!adev->irq.retry_cam_enabled && adev->irq.ih1.ring_size) { 2572 ih = &adev->irq.ih1; 2573 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2574 if (ih->rptr != checkpoint_wptr) { 2575 svms->checkpoint_ts[i] = 2576 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2577 continue; 2578 } 2579 } 2580 2581 /* check if dev->irq.ih_soft is not empty */ 2582 ih = &adev->irq.ih_soft; 2583 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2584 if (ih->rptr != checkpoint_wptr) 2585 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2586 } 2587 2588 unmap_parent = start <= prange->start && last >= prange->last; 2589 2590 list_for_each_entry(pchild, &prange->child_list, child_list) { 2591 mutex_lock_nested(&pchild->lock, 1); 2592 s = max(start, pchild->start); 2593 l = min(last, pchild->last); 2594 if (l >= s) 2595 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2596 svm_range_unmap_split(prange, pchild, start, last); 2597 mutex_unlock(&pchild->lock); 2598 } 2599 s = max(start, prange->start); 2600 l = min(last, prange->last); 2601 if (l >= s) 2602 svm_range_unmap_from_gpus(prange, s, l, trigger); 2603 svm_range_unmap_split(prange, prange, start, last); 2604 2605 if (unmap_parent) 2606 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2607 else 2608 svm_range_add_list_work(svms, prange, mm, 2609 SVM_OP_UPDATE_RANGE_NOTIFIER); 2610 schedule_deferred_list_work(svms); 2611 2612 kfd_unref_process(p); 2613 } 2614 2615 /** 2616 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2617 * @mni: mmu_interval_notifier struct 2618 * @range: mmu_notifier_range struct 2619 * @cur_seq: value to pass to mmu_interval_set_seq() 2620 * 2621 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2622 * is from migration, or CPU page invalidation callback. 2623 * 2624 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2625 * work thread, and split prange if only part of prange is unmapped. 2626 * 2627 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2628 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2629 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2630 * update GPU mapping to recover. 2631 * 2632 * Context: mmap lock, notifier_invalidate_start lock are held 2633 * for invalidate event, prange lock is held if this is from migration 2634 */ 2635 static bool 2636 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2637 const struct mmu_notifier_range *range, 2638 unsigned long cur_seq) 2639 { 2640 struct svm_range *prange; 2641 unsigned long start; 2642 unsigned long last; 2643 2644 if (range->event == MMU_NOTIFY_RELEASE) 2645 return true; 2646 2647 start = mni->interval_tree.start; 2648 last = mni->interval_tree.last; 2649 start = max(start, range->start) >> PAGE_SHIFT; 2650 last = min(last, range->end - 1) >> PAGE_SHIFT; 2651 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2652 start, last, range->start >> PAGE_SHIFT, 2653 (range->end - 1) >> PAGE_SHIFT, 2654 mni->interval_tree.start >> PAGE_SHIFT, 2655 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2656 2657 prange = container_of(mni, struct svm_range, notifier); 2658 2659 svm_range_lock(prange); 2660 mmu_interval_set_seq(mni, cur_seq); 2661 2662 switch (range->event) { 2663 case MMU_NOTIFY_UNMAP: 2664 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2665 break; 2666 default: 2667 svm_range_evict(prange, mni->mm, start, last, range->event); 2668 break; 2669 } 2670 2671 svm_range_unlock(prange); 2672 2673 return true; 2674 } 2675 2676 /** 2677 * svm_range_from_addr - find svm range from fault address 2678 * @svms: svm range list header 2679 * @addr: address to search range interval tree, in pages 2680 * @parent: parent range if range is on child list 2681 * 2682 * Context: The caller must hold svms->lock 2683 * 2684 * Return: the svm_range found or NULL 2685 */ 2686 struct svm_range * 2687 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2688 struct svm_range **parent) 2689 { 2690 struct interval_tree_node *node; 2691 struct svm_range *prange; 2692 struct svm_range *pchild; 2693 2694 node = interval_tree_iter_first(&svms->objects, addr, addr); 2695 if (!node) 2696 return NULL; 2697 2698 prange = container_of(node, struct svm_range, it_node); 2699 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2700 addr, prange->start, prange->last, node->start, node->last); 2701 2702 if (addr >= prange->start && addr <= prange->last) { 2703 if (parent) 2704 *parent = prange; 2705 return prange; 2706 } 2707 list_for_each_entry(pchild, &prange->child_list, child_list) 2708 if (addr >= pchild->start && addr <= pchild->last) { 2709 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2710 addr, pchild->start, pchild->last); 2711 if (parent) 2712 *parent = prange; 2713 return pchild; 2714 } 2715 2716 return NULL; 2717 } 2718 2719 /* svm_range_best_restore_location - decide the best fault restore location 2720 * @prange: svm range structure 2721 * @adev: the GPU on which vm fault happened 2722 * 2723 * This is only called when xnack is on, to decide the best location to restore 2724 * the range mapping after GPU vm fault. Caller uses the best location to do 2725 * migration if actual loc is not best location, then update GPU page table 2726 * mapping to the best location. 2727 * 2728 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2729 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2730 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2731 * if range actual loc is cpu, best_loc is cpu 2732 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2733 * range actual loc. 2734 * Otherwise, GPU no access, best_loc is -1. 2735 * 2736 * Return: 2737 * -1 means vm fault GPU no access 2738 * 0 for CPU or GPU id 2739 */ 2740 static int32_t 2741 svm_range_best_restore_location(struct svm_range *prange, 2742 struct kfd_node *node, 2743 int32_t *gpuidx) 2744 { 2745 struct kfd_node *bo_node, *preferred_node; 2746 struct kfd_process *p; 2747 uint32_t gpuid; 2748 int r; 2749 2750 p = container_of(prange->svms, struct kfd_process, svms); 2751 2752 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2753 if (r < 0) { 2754 pr_debug("failed to get gpuid from kgd\n"); 2755 return -1; 2756 } 2757 2758 if (node->adev->apu_prefer_gtt) 2759 return 0; 2760 2761 if (prange->preferred_loc == gpuid || 2762 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2763 return prange->preferred_loc; 2764 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2765 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2766 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2767 return prange->preferred_loc; 2768 /* fall through */ 2769 } 2770 2771 if (test_bit(*gpuidx, prange->bitmap_access)) 2772 return gpuid; 2773 2774 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2775 if (!prange->actual_loc) 2776 return 0; 2777 2778 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2779 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2780 return prange->actual_loc; 2781 else 2782 return 0; 2783 } 2784 2785 return -1; 2786 } 2787 2788 static int 2789 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2790 unsigned long *start, unsigned long *last, 2791 bool *is_heap_stack) 2792 { 2793 struct vm_area_struct *vma; 2794 struct interval_tree_node *node; 2795 struct rb_node *rb_node; 2796 unsigned long start_limit, end_limit; 2797 2798 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2799 if (!vma) { 2800 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2801 return -EFAULT; 2802 } 2803 2804 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2805 2806 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2807 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2808 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2809 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2810 2811 /* First range that starts after the fault address */ 2812 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2813 if (node) { 2814 end_limit = min(end_limit, node->start); 2815 /* Last range that ends before the fault address */ 2816 rb_node = rb_prev(&node->rb); 2817 } else { 2818 /* Last range must end before addr because 2819 * there was no range after addr 2820 */ 2821 rb_node = rb_last(&p->svms.objects.rb_root); 2822 } 2823 if (rb_node) { 2824 node = container_of(rb_node, struct interval_tree_node, rb); 2825 if (node->last >= addr) { 2826 WARN(1, "Overlap with prev node and page fault addr\n"); 2827 return -EFAULT; 2828 } 2829 start_limit = max(start_limit, node->last + 1); 2830 } 2831 2832 *start = start_limit; 2833 *last = end_limit - 1; 2834 2835 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2836 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2837 *start, *last, *is_heap_stack); 2838 2839 return 0; 2840 } 2841 2842 static int 2843 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2844 uint64_t *bo_s, uint64_t *bo_l) 2845 { 2846 struct amdgpu_bo_va_mapping *mapping; 2847 struct interval_tree_node *node; 2848 struct amdgpu_bo *bo = NULL; 2849 unsigned long userptr; 2850 uint32_t i; 2851 int r; 2852 2853 for (i = 0; i < p->n_pdds; i++) { 2854 struct amdgpu_vm *vm; 2855 2856 if (!p->pdds[i]->drm_priv) 2857 continue; 2858 2859 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2860 r = amdgpu_bo_reserve(vm->root.bo, false); 2861 if (r) 2862 return r; 2863 2864 /* Check userptr by searching entire vm->va interval tree */ 2865 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2866 while (node) { 2867 mapping = container_of((struct rb_node *)node, 2868 struct amdgpu_bo_va_mapping, rb); 2869 bo = mapping->bo_va->base.bo; 2870 2871 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2872 start << PAGE_SHIFT, 2873 last << PAGE_SHIFT, 2874 &userptr)) { 2875 node = interval_tree_iter_next(node, 0, ~0ULL); 2876 continue; 2877 } 2878 2879 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2880 start, last); 2881 if (bo_s && bo_l) { 2882 *bo_s = userptr >> PAGE_SHIFT; 2883 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2884 } 2885 amdgpu_bo_unreserve(vm->root.bo); 2886 return -EADDRINUSE; 2887 } 2888 amdgpu_bo_unreserve(vm->root.bo); 2889 } 2890 return 0; 2891 } 2892 2893 static struct 2894 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2895 struct kfd_process *p, 2896 struct mm_struct *mm, 2897 int64_t addr) 2898 { 2899 struct svm_range *prange = NULL; 2900 unsigned long start, last; 2901 uint32_t gpuid, gpuidx; 2902 bool is_heap_stack; 2903 uint64_t bo_s = 0; 2904 uint64_t bo_l = 0; 2905 int r; 2906 2907 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2908 &is_heap_stack)) 2909 return NULL; 2910 2911 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2912 if (r != -EADDRINUSE) 2913 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2914 2915 if (r == -EADDRINUSE) { 2916 if (addr >= bo_s && addr <= bo_l) 2917 return NULL; 2918 2919 /* Create one page svm range if 2MB range overlapping */ 2920 start = addr; 2921 last = addr; 2922 } 2923 2924 prange = svm_range_new(&p->svms, start, last, true); 2925 if (!prange) { 2926 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2927 return NULL; 2928 } 2929 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2930 pr_debug("failed to get gpuid from kgd\n"); 2931 svm_range_free(prange, true); 2932 return NULL; 2933 } 2934 2935 if (is_heap_stack) 2936 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2937 2938 svm_range_add_to_svms(prange); 2939 svm_range_add_notifier_locked(mm, prange); 2940 2941 return prange; 2942 } 2943 2944 /* svm_range_skip_recover - decide if prange can be recovered 2945 * @prange: svm range structure 2946 * 2947 * GPU vm retry fault handle skip recover the range for cases: 2948 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2949 * deferred list work will drain the stale fault before free the prange. 2950 * 2. prange is on deferred list to add interval notifier after split, or 2951 * 3. prange is child range, it is split from parent prange, recover later 2952 * after interval notifier is added. 2953 * 2954 * Return: true to skip recover, false to recover 2955 */ 2956 static bool svm_range_skip_recover(struct svm_range *prange) 2957 { 2958 struct svm_range_list *svms = prange->svms; 2959 2960 spin_lock(&svms->deferred_list_lock); 2961 if (list_empty(&prange->deferred_list) && 2962 list_empty(&prange->child_list)) { 2963 spin_unlock(&svms->deferred_list_lock); 2964 return false; 2965 } 2966 spin_unlock(&svms->deferred_list_lock); 2967 2968 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2969 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2970 svms, prange, prange->start, prange->last); 2971 return true; 2972 } 2973 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2974 prange->work_item.op == SVM_OP_ADD_RANGE) { 2975 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2976 svms, prange, prange->start, prange->last); 2977 return true; 2978 } 2979 return false; 2980 } 2981 2982 static void 2983 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2984 int32_t gpuidx) 2985 { 2986 struct kfd_process_device *pdd; 2987 2988 /* fault is on different page of same range 2989 * or fault is skipped to recover later 2990 * or fault is on invalid virtual address 2991 */ 2992 if (gpuidx == MAX_GPU_INSTANCE) { 2993 uint32_t gpuid; 2994 int r; 2995 2996 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2997 if (r < 0) 2998 return; 2999 } 3000 3001 /* fault is recovered 3002 * or fault cannot recover because GPU no access on the range 3003 */ 3004 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3005 if (pdd) 3006 WRITE_ONCE(pdd->faults, pdd->faults + 1); 3007 } 3008 3009 static bool 3010 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 3011 { 3012 unsigned long requested = VM_READ; 3013 3014 if (write_fault) 3015 requested |= VM_WRITE; 3016 3017 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 3018 vma->vm_flags); 3019 return (vma->vm_flags & requested) == requested; 3020 } 3021 3022 int 3023 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 3024 uint32_t vmid, uint32_t node_id, 3025 uint64_t addr, uint64_t ts, bool write_fault) 3026 { 3027 unsigned long start, last, size; 3028 struct mm_struct *mm = NULL; 3029 struct svm_range_list *svms; 3030 struct svm_range *prange; 3031 struct kfd_process *p; 3032 ktime_t timestamp = ktime_get_boottime(); 3033 struct kfd_node *node; 3034 int32_t best_loc; 3035 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 3036 bool write_locked = false; 3037 struct vm_area_struct *vma; 3038 bool migration = false; 3039 int r = 0; 3040 3041 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 3042 pr_debug("device does not support SVM\n"); 3043 return -EFAULT; 3044 } 3045 3046 p = kfd_lookup_process_by_pasid(pasid, NULL); 3047 if (!p) { 3048 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 3049 return 0; 3050 } 3051 svms = &p->svms; 3052 3053 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3054 3055 if (atomic_read(&svms->drain_pagefaults)) { 3056 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3057 r = 0; 3058 goto out; 3059 } 3060 3061 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3062 if (!node) { 3063 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3064 vmid); 3065 r = -EFAULT; 3066 goto out; 3067 } 3068 3069 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3070 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3071 r = -EFAULT; 3072 goto out; 3073 } 3074 3075 if (!p->xnack_enabled) { 3076 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3077 r = -EFAULT; 3078 goto out; 3079 } 3080 3081 /* p->lead_thread is available as kfd_process_wq_release flush the work 3082 * before releasing task ref. 3083 */ 3084 mm = get_task_mm(p->lead_thread); 3085 if (!mm) { 3086 pr_debug("svms 0x%p failed to get mm\n", svms); 3087 r = 0; 3088 goto out; 3089 } 3090 3091 mmap_read_lock(mm); 3092 retry_write_locked: 3093 mutex_lock(&svms->lock); 3094 3095 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3096 if (svms->checkpoint_ts[gpuidx] != 0) { 3097 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3098 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3099 if (write_locked) 3100 mmap_write_downgrade(mm); 3101 r = -EAGAIN; 3102 goto out_unlock_svms; 3103 } else { 3104 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3105 * to zero to avoid following ts wrap around give wrong comparing 3106 */ 3107 svms->checkpoint_ts[gpuidx] = 0; 3108 } 3109 } 3110 3111 prange = svm_range_from_addr(svms, addr, NULL); 3112 if (!prange) { 3113 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3114 svms, addr); 3115 if (!write_locked) { 3116 /* Need the write lock to create new range with MMU notifier. 3117 * Also flush pending deferred work to make sure the interval 3118 * tree is up to date before we add a new range 3119 */ 3120 mutex_unlock(&svms->lock); 3121 mmap_read_unlock(mm); 3122 mmap_write_lock(mm); 3123 write_locked = true; 3124 goto retry_write_locked; 3125 } 3126 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3127 if (!prange) { 3128 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3129 svms, addr); 3130 mmap_write_downgrade(mm); 3131 r = -EFAULT; 3132 goto out_unlock_svms; 3133 } 3134 } 3135 if (write_locked) 3136 mmap_write_downgrade(mm); 3137 3138 mutex_lock(&prange->migrate_mutex); 3139 3140 if (svm_range_skip_recover(prange)) { 3141 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3142 r = 0; 3143 goto out_unlock_range; 3144 } 3145 3146 /* skip duplicate vm fault on different pages of same range */ 3147 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3148 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3149 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3150 svms, prange->start, prange->last); 3151 r = 0; 3152 goto out_unlock_range; 3153 } 3154 3155 /* __do_munmap removed VMA, return success as we are handling stale 3156 * retry fault. 3157 */ 3158 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3159 if (!vma) { 3160 pr_debug("address 0x%llx VMA is removed\n", addr); 3161 r = 0; 3162 goto out_unlock_range; 3163 } 3164 3165 if (!svm_fault_allowed(vma, write_fault)) { 3166 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3167 write_fault ? "write" : "read"); 3168 r = -EPERM; 3169 goto out_unlock_range; 3170 } 3171 3172 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3173 if (best_loc == -1) { 3174 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3175 svms, prange->start, prange->last); 3176 r = -EACCES; 3177 goto out_unlock_range; 3178 } 3179 3180 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3181 svms, prange->start, prange->last, best_loc, 3182 prange->actual_loc); 3183 3184 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3185 write_fault, timestamp); 3186 3187 /* Align migration range start and size to granularity size */ 3188 size = 1UL << prange->granularity; 3189 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3190 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3191 if (prange->actual_loc != 0 || best_loc != 0) { 3192 if (best_loc) { 3193 r = svm_migrate_to_vram(prange, best_loc, start, last, 3194 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3195 if (r) { 3196 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3197 r, addr); 3198 /* Fallback to system memory if migration to 3199 * VRAM failed 3200 */ 3201 if (prange->actual_loc && prange->actual_loc != best_loc) 3202 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3203 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3204 else 3205 r = 0; 3206 } 3207 } else { 3208 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3209 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3210 } 3211 if (r) { 3212 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3213 r, svms, start, last); 3214 goto out_migrate_fail; 3215 } else { 3216 migration = true; 3217 } 3218 } 3219 3220 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3221 false, false); 3222 if (r) 3223 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3224 r, svms, start, last); 3225 3226 out_migrate_fail: 3227 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3228 migration); 3229 3230 out_unlock_range: 3231 mutex_unlock(&prange->migrate_mutex); 3232 out_unlock_svms: 3233 mutex_unlock(&svms->lock); 3234 mmap_read_unlock(mm); 3235 3236 if (r != -EAGAIN) 3237 svm_range_count_fault(node, p, gpuidx); 3238 3239 mmput(mm); 3240 out: 3241 kfd_unref_process(p); 3242 3243 if (r == -EAGAIN) { 3244 pr_debug("recover vm fault later\n"); 3245 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3246 r = 0; 3247 } 3248 return r; 3249 } 3250 3251 int 3252 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3253 { 3254 struct svm_range *prange, *pchild; 3255 uint64_t reserved_size = 0; 3256 uint64_t size; 3257 int r = 0; 3258 3259 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3260 3261 mutex_lock(&p->svms.lock); 3262 3263 list_for_each_entry(prange, &p->svms.list, list) { 3264 svm_range_lock(prange); 3265 list_for_each_entry(pchild, &prange->child_list, child_list) { 3266 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3267 if (xnack_enabled) { 3268 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3269 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3270 } else { 3271 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3272 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3273 if (r) 3274 goto out_unlock; 3275 reserved_size += size; 3276 } 3277 } 3278 3279 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3280 if (xnack_enabled) { 3281 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3282 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3283 } else { 3284 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3285 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3286 if (r) 3287 goto out_unlock; 3288 reserved_size += size; 3289 } 3290 out_unlock: 3291 svm_range_unlock(prange); 3292 if (r) 3293 break; 3294 } 3295 3296 if (r) 3297 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3298 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3299 else 3300 /* Change xnack mode must be inside svms lock, to avoid race with 3301 * svm_range_deferred_list_work unreserve memory in parallel. 3302 */ 3303 p->xnack_enabled = xnack_enabled; 3304 3305 mutex_unlock(&p->svms.lock); 3306 return r; 3307 } 3308 3309 void svm_range_list_fini(struct kfd_process *p) 3310 { 3311 struct svm_range *prange; 3312 struct svm_range *next; 3313 3314 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3315 &p->svms); 3316 3317 cancel_delayed_work_sync(&p->svms.restore_work); 3318 3319 /* Ensure list work is finished before process is destroyed */ 3320 flush_work(&p->svms.deferred_list_work); 3321 3322 /* 3323 * Ensure no retry fault comes in afterwards, as page fault handler will 3324 * not find kfd process and take mm lock to recover fault. 3325 * stop kfd page fault handing, then wait pending page faults got drained 3326 */ 3327 atomic_set(&p->svms.drain_pagefaults, 1); 3328 svm_range_drain_retry_fault(&p->svms); 3329 3330 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3331 svm_range_unlink(prange); 3332 svm_range_remove_notifier(prange); 3333 svm_range_free(prange, true); 3334 } 3335 3336 mutex_destroy(&p->svms.lock); 3337 3338 pr_debug("process pid %d svms 0x%p done\n", 3339 p->lead_thread->pid, &p->svms); 3340 } 3341 3342 int svm_range_list_init(struct kfd_process *p) 3343 { 3344 struct svm_range_list *svms = &p->svms; 3345 int i; 3346 3347 svms->objects = RB_ROOT_CACHED; 3348 mutex_init(&svms->lock); 3349 INIT_LIST_HEAD(&svms->list); 3350 atomic_set(&svms->evicted_ranges, 0); 3351 atomic_set(&svms->drain_pagefaults, 0); 3352 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3353 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3354 INIT_LIST_HEAD(&svms->deferred_range_list); 3355 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3356 spin_lock_init(&svms->deferred_list_lock); 3357 3358 for (i = 0; i < p->n_pdds; i++) 3359 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3360 bitmap_set(svms->bitmap_supported, i, 1); 3361 3362 /* Value of default granularity cannot exceed 0x1B, the 3363 * number of pages supported by a 4-level paging table 3364 */ 3365 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3366 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3367 3368 return 0; 3369 } 3370 3371 /** 3372 * svm_range_check_vm - check if virtual address range mapped already 3373 * @p: current kfd_process 3374 * @start: range start address, in pages 3375 * @last: range last address, in pages 3376 * @bo_s: mapping start address in pages if address range already mapped 3377 * @bo_l: mapping last address in pages if address range already mapped 3378 * 3379 * The purpose is to avoid virtual address ranges already allocated by 3380 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3381 * It looks for each pdd in the kfd_process. 3382 * 3383 * Context: Process context 3384 * 3385 * Return 0 - OK, if the range is not mapped. 3386 * Otherwise error code: 3387 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3388 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3389 * a signal. Release all buffer reservations and return to user-space. 3390 */ 3391 static int 3392 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3393 uint64_t *bo_s, uint64_t *bo_l) 3394 { 3395 struct amdgpu_bo_va_mapping *mapping; 3396 struct interval_tree_node *node; 3397 uint32_t i; 3398 int r; 3399 3400 for (i = 0; i < p->n_pdds; i++) { 3401 struct amdgpu_vm *vm; 3402 3403 if (!p->pdds[i]->drm_priv) 3404 continue; 3405 3406 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3407 r = amdgpu_bo_reserve(vm->root.bo, false); 3408 if (r) 3409 return r; 3410 3411 node = interval_tree_iter_first(&vm->va, start, last); 3412 if (node) { 3413 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3414 start, last); 3415 mapping = container_of((struct rb_node *)node, 3416 struct amdgpu_bo_va_mapping, rb); 3417 if (bo_s && bo_l) { 3418 *bo_s = mapping->start; 3419 *bo_l = mapping->last; 3420 } 3421 amdgpu_bo_unreserve(vm->root.bo); 3422 return -EADDRINUSE; 3423 } 3424 amdgpu_bo_unreserve(vm->root.bo); 3425 } 3426 3427 return 0; 3428 } 3429 3430 /** 3431 * svm_range_is_valid - check if virtual address range is valid 3432 * @p: current kfd_process 3433 * @start: range start address, in pages 3434 * @size: range size, in pages 3435 * 3436 * Valid virtual address range means it belongs to one or more VMAs 3437 * 3438 * Context: Process context 3439 * 3440 * Return: 3441 * 0 - OK, otherwise error code 3442 */ 3443 static int 3444 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3445 { 3446 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3447 struct vm_area_struct *vma; 3448 unsigned long end; 3449 unsigned long start_unchg = start; 3450 3451 start <<= PAGE_SHIFT; 3452 end = start + (size << PAGE_SHIFT); 3453 do { 3454 vma = vma_lookup(p->mm, start); 3455 if (!vma || (vma->vm_flags & device_vma)) 3456 return -EFAULT; 3457 start = min(end, vma->vm_end); 3458 } while (start < end); 3459 3460 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3461 NULL); 3462 } 3463 3464 /** 3465 * svm_range_best_prefetch_location - decide the best prefetch location 3466 * @prange: svm range structure 3467 * 3468 * For xnack off: 3469 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3470 * can be CPU or GPU. 3471 * 3472 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3473 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3474 * the best prefetch location is always CPU, because GPU can not have coherent 3475 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3476 * 3477 * For xnack on: 3478 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3479 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3480 * 3481 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3482 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3483 * prefetch location is always CPU. 3484 * 3485 * Context: Process context 3486 * 3487 * Return: 3488 * 0 for CPU or GPU id 3489 */ 3490 static uint32_t 3491 svm_range_best_prefetch_location(struct svm_range *prange) 3492 { 3493 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3494 uint32_t best_loc = prange->prefetch_loc; 3495 struct kfd_process_device *pdd; 3496 struct kfd_node *bo_node; 3497 struct kfd_process *p; 3498 uint32_t gpuidx; 3499 3500 p = container_of(prange->svms, struct kfd_process, svms); 3501 3502 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3503 goto out; 3504 3505 bo_node = svm_range_get_node_by_id(prange, best_loc); 3506 if (!bo_node) { 3507 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3508 best_loc = 0; 3509 goto out; 3510 } 3511 3512 if (bo_node->adev->apu_prefer_gtt) { 3513 best_loc = 0; 3514 goto out; 3515 } 3516 3517 if (p->xnack_enabled) 3518 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3519 else 3520 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3521 MAX_GPU_INSTANCE); 3522 3523 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3524 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3525 if (!pdd) { 3526 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3527 continue; 3528 } 3529 3530 if (pdd->dev->adev == bo_node->adev) 3531 continue; 3532 3533 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3534 best_loc = 0; 3535 break; 3536 } 3537 } 3538 3539 out: 3540 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3541 p->xnack_enabled, &p->svms, prange->start, prange->last, 3542 best_loc); 3543 3544 return best_loc; 3545 } 3546 3547 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3548 * @mm: current process mm_struct 3549 * @prange: svm range structure 3550 * @migrated: output, true if migration is triggered 3551 * 3552 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3553 * from ram to vram. 3554 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3555 * from vram to ram. 3556 * 3557 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3558 * and restore work: 3559 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3560 * stops all queues, schedule restore work 3561 * 2. svm_range_restore_work wait for migration is done by 3562 * a. svm_range_validate_vram takes prange->migrate_mutex 3563 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3564 * 3. restore work update mappings of GPU, resume all queues. 3565 * 3566 * Context: Process context 3567 * 3568 * Return: 3569 * 0 - OK, otherwise - error code of migration 3570 */ 3571 static int 3572 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3573 bool *migrated) 3574 { 3575 uint32_t best_loc; 3576 int r = 0; 3577 3578 *migrated = false; 3579 best_loc = svm_range_best_prefetch_location(prange); 3580 3581 /* when best_loc is a gpu node and same as prange->actual_loc 3582 * we still need do migration as prange->actual_loc !=0 does 3583 * not mean all pages in prange are vram. hmm migrate will pick 3584 * up right pages during migration. 3585 */ 3586 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3587 (best_loc == 0 && prange->actual_loc == 0)) 3588 return 0; 3589 3590 if (!best_loc) { 3591 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3592 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3593 *migrated = !r; 3594 return r; 3595 } 3596 3597 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3598 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3599 *migrated = !r; 3600 3601 return 0; 3602 } 3603 3604 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3605 { 3606 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3607 * signaled yet and we're under the protection of the fence->lock. 3608 * After the fence is signaled in svm_range_bo_release, we cannot get 3609 * here any more. 3610 * 3611 * Reference is dropped in svm_range_evict_svm_bo_worker. 3612 */ 3613 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3614 WRITE_ONCE(fence->svm_bo->evicting, 1); 3615 schedule_work(&fence->svm_bo->eviction_work); 3616 } 3617 3618 return 0; 3619 } 3620 3621 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3622 { 3623 struct svm_range_bo *svm_bo; 3624 struct mm_struct *mm; 3625 int r = 0; 3626 3627 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3628 3629 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3630 mm = svm_bo->eviction_fence->mm; 3631 } else { 3632 svm_range_bo_unref(svm_bo); 3633 return; 3634 } 3635 3636 mmap_read_lock(mm); 3637 spin_lock(&svm_bo->list_lock); 3638 while (!list_empty(&svm_bo->range_list) && !r) { 3639 struct svm_range *prange = 3640 list_first_entry(&svm_bo->range_list, 3641 struct svm_range, svm_bo_list); 3642 int retries = 3; 3643 3644 list_del_init(&prange->svm_bo_list); 3645 spin_unlock(&svm_bo->list_lock); 3646 3647 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3648 prange->start, prange->last); 3649 3650 mutex_lock(&prange->migrate_mutex); 3651 do { 3652 /* migrate all vram pages in this prange to sys ram 3653 * after that prange->actual_loc should be zero 3654 */ 3655 r = svm_migrate_vram_to_ram(prange, mm, 3656 prange->start, prange->last, 3657 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3658 } while (!r && prange->actual_loc && --retries); 3659 3660 if (!r && prange->actual_loc) 3661 pr_info_once("Migration failed during eviction"); 3662 3663 if (!prange->actual_loc) { 3664 mutex_lock(&prange->lock); 3665 prange->svm_bo = NULL; 3666 mutex_unlock(&prange->lock); 3667 } 3668 mutex_unlock(&prange->migrate_mutex); 3669 3670 spin_lock(&svm_bo->list_lock); 3671 } 3672 spin_unlock(&svm_bo->list_lock); 3673 mmap_read_unlock(mm); 3674 mmput(mm); 3675 3676 dma_fence_signal(&svm_bo->eviction_fence->base); 3677 3678 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3679 * has been called in svm_migrate_vram_to_ram 3680 */ 3681 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3682 svm_range_bo_unref(svm_bo); 3683 } 3684 3685 static int 3686 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3687 uint64_t start, uint64_t size, uint32_t nattr, 3688 struct kfd_ioctl_svm_attribute *attrs) 3689 { 3690 struct amdkfd_process_info *process_info = p->kgd_process_info; 3691 struct list_head update_list; 3692 struct list_head insert_list; 3693 struct list_head remove_list; 3694 struct list_head remap_list; 3695 struct svm_range_list *svms; 3696 struct svm_range *prange; 3697 struct svm_range *next; 3698 bool update_mapping = false; 3699 bool flush_tlb; 3700 int r, ret = 0; 3701 3702 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3703 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3704 3705 r = svm_range_check_attr(p, nattr, attrs); 3706 if (r) 3707 return r; 3708 3709 svms = &p->svms; 3710 3711 mutex_lock(&process_info->lock); 3712 3713 svm_range_list_lock_and_flush_work(svms, mm); 3714 3715 r = svm_range_is_valid(p, start, size); 3716 if (r) { 3717 pr_debug("invalid range r=%d\n", r); 3718 mmap_write_unlock(mm); 3719 goto out; 3720 } 3721 3722 mutex_lock(&svms->lock); 3723 3724 /* Add new range and split existing ranges as needed */ 3725 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3726 &insert_list, &remove_list, &remap_list); 3727 if (r) { 3728 mutex_unlock(&svms->lock); 3729 mmap_write_unlock(mm); 3730 goto out; 3731 } 3732 /* Apply changes as a transaction */ 3733 list_for_each_entry_safe(prange, next, &insert_list, list) { 3734 svm_range_add_to_svms(prange); 3735 svm_range_add_notifier_locked(mm, prange); 3736 } 3737 list_for_each_entry(prange, &update_list, update_list) { 3738 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3739 /* TODO: unmap ranges from GPU that lost access */ 3740 } 3741 update_mapping |= !p->xnack_enabled && !list_empty(&remap_list); 3742 3743 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3744 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3745 prange->svms, prange, prange->start, 3746 prange->last); 3747 svm_range_unlink(prange); 3748 svm_range_remove_notifier(prange); 3749 svm_range_free(prange, false); 3750 } 3751 3752 mmap_write_downgrade(mm); 3753 /* Trigger migrations and revalidate and map to GPUs as needed. If 3754 * this fails we may be left with partially completed actions. There 3755 * is no clean way of rolling back to the previous state in such a 3756 * case because the rollback wouldn't be guaranteed to work either. 3757 */ 3758 list_for_each_entry(prange, &update_list, update_list) { 3759 bool migrated; 3760 3761 mutex_lock(&prange->migrate_mutex); 3762 3763 r = svm_range_trigger_migration(mm, prange, &migrated); 3764 if (r) 3765 goto out_unlock_range; 3766 3767 if (migrated && (!p->xnack_enabled || 3768 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3769 prange->mapped_to_gpu) { 3770 pr_debug("restore_work will update mappings of GPUs\n"); 3771 mutex_unlock(&prange->migrate_mutex); 3772 continue; 3773 } 3774 3775 if (!migrated && !update_mapping) { 3776 mutex_unlock(&prange->migrate_mutex); 3777 continue; 3778 } 3779 3780 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3781 3782 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3783 MAX_GPU_INSTANCE, true, true, flush_tlb); 3784 if (r) 3785 pr_debug("failed %d to map svm range\n", r); 3786 3787 out_unlock_range: 3788 mutex_unlock(&prange->migrate_mutex); 3789 if (r) 3790 ret = r; 3791 } 3792 3793 list_for_each_entry(prange, &remap_list, update_list) { 3794 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3795 prange, prange->start, prange->last); 3796 mutex_lock(&prange->migrate_mutex); 3797 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3798 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3799 if (r) 3800 pr_debug("failed %d on remap svm range\n", r); 3801 mutex_unlock(&prange->migrate_mutex); 3802 if (r) 3803 ret = r; 3804 } 3805 3806 dynamic_svm_range_dump(svms); 3807 3808 mutex_unlock(&svms->lock); 3809 mmap_read_unlock(mm); 3810 out: 3811 mutex_unlock(&process_info->lock); 3812 3813 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3814 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3815 3816 return ret ? ret : r; 3817 } 3818 3819 static int 3820 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3821 uint64_t start, uint64_t size, uint32_t nattr, 3822 struct kfd_ioctl_svm_attribute *attrs) 3823 { 3824 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3825 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3826 bool get_preferred_loc = false; 3827 bool get_prefetch_loc = false; 3828 bool get_granularity = false; 3829 bool get_accessible = false; 3830 bool get_flags = false; 3831 uint64_t last = start + size - 1UL; 3832 uint8_t granularity = 0xff; 3833 struct interval_tree_node *node; 3834 struct svm_range_list *svms; 3835 struct svm_range *prange; 3836 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3837 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3838 uint32_t flags_and = 0xffffffff; 3839 uint32_t flags_or = 0; 3840 int gpuidx; 3841 uint32_t i; 3842 int r = 0; 3843 3844 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3845 start + size - 1, nattr); 3846 3847 /* Flush pending deferred work to avoid racing with deferred actions from 3848 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3849 * can still race with get_attr because we don't hold the mmap lock. But that 3850 * would be a race condition in the application anyway, and undefined 3851 * behaviour is acceptable in that case. 3852 */ 3853 flush_work(&p->svms.deferred_list_work); 3854 3855 mmap_read_lock(mm); 3856 r = svm_range_is_valid(p, start, size); 3857 mmap_read_unlock(mm); 3858 if (r) { 3859 pr_debug("invalid range r=%d\n", r); 3860 return r; 3861 } 3862 3863 for (i = 0; i < nattr; i++) { 3864 switch (attrs[i].type) { 3865 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3866 get_preferred_loc = true; 3867 break; 3868 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3869 get_prefetch_loc = true; 3870 break; 3871 case KFD_IOCTL_SVM_ATTR_ACCESS: 3872 get_accessible = true; 3873 break; 3874 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3875 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3876 get_flags = true; 3877 break; 3878 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3879 get_granularity = true; 3880 break; 3881 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3882 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3883 fallthrough; 3884 default: 3885 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3886 return -EINVAL; 3887 } 3888 } 3889 3890 svms = &p->svms; 3891 3892 mutex_lock(&svms->lock); 3893 3894 node = interval_tree_iter_first(&svms->objects, start, last); 3895 if (!node) { 3896 pr_debug("range attrs not found return default values\n"); 3897 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3898 &granularity, &flags_and); 3899 flags_or = flags_and; 3900 if (p->xnack_enabled) 3901 bitmap_copy(bitmap_access, svms->bitmap_supported, 3902 MAX_GPU_INSTANCE); 3903 else 3904 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3905 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3906 goto fill_values; 3907 } 3908 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3909 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3910 3911 while (node) { 3912 struct interval_tree_node *next; 3913 3914 prange = container_of(node, struct svm_range, it_node); 3915 next = interval_tree_iter_next(node, start, last); 3916 3917 if (get_preferred_loc) { 3918 if (prange->preferred_loc == 3919 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3920 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3921 location != prange->preferred_loc)) { 3922 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3923 get_preferred_loc = false; 3924 } else { 3925 location = prange->preferred_loc; 3926 } 3927 } 3928 if (get_prefetch_loc) { 3929 if (prange->prefetch_loc == 3930 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3931 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3932 prefetch_loc != prange->prefetch_loc)) { 3933 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3934 get_prefetch_loc = false; 3935 } else { 3936 prefetch_loc = prange->prefetch_loc; 3937 } 3938 } 3939 if (get_accessible) { 3940 bitmap_and(bitmap_access, bitmap_access, 3941 prange->bitmap_access, MAX_GPU_INSTANCE); 3942 bitmap_and(bitmap_aip, bitmap_aip, 3943 prange->bitmap_aip, MAX_GPU_INSTANCE); 3944 } 3945 if (get_flags) { 3946 flags_and &= prange->flags; 3947 flags_or |= prange->flags; 3948 } 3949 3950 if (get_granularity && prange->granularity < granularity) 3951 granularity = prange->granularity; 3952 3953 node = next; 3954 } 3955 fill_values: 3956 mutex_unlock(&svms->lock); 3957 3958 for (i = 0; i < nattr; i++) { 3959 switch (attrs[i].type) { 3960 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3961 attrs[i].value = location; 3962 break; 3963 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3964 attrs[i].value = prefetch_loc; 3965 break; 3966 case KFD_IOCTL_SVM_ATTR_ACCESS: 3967 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3968 attrs[i].value); 3969 if (gpuidx < 0) { 3970 pr_debug("invalid gpuid %x\n", attrs[i].value); 3971 return -EINVAL; 3972 } 3973 if (test_bit(gpuidx, bitmap_access)) 3974 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3975 else if (test_bit(gpuidx, bitmap_aip)) 3976 attrs[i].type = 3977 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3978 else 3979 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3980 break; 3981 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3982 attrs[i].value = flags_and; 3983 break; 3984 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3985 attrs[i].value = ~flags_or; 3986 break; 3987 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3988 attrs[i].value = (uint32_t)granularity; 3989 break; 3990 } 3991 } 3992 3993 return 0; 3994 } 3995 3996 int kfd_criu_resume_svm(struct kfd_process *p) 3997 { 3998 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3999 int nattr_common = 4, nattr_accessibility = 1; 4000 struct criu_svm_metadata *criu_svm_md = NULL; 4001 struct svm_range_list *svms = &p->svms; 4002 struct criu_svm_metadata *next = NULL; 4003 uint32_t set_flags = 0xffffffff; 4004 int i, j, num_attrs, ret = 0; 4005 uint64_t set_attr_size; 4006 struct mm_struct *mm; 4007 4008 if (list_empty(&svms->criu_svm_metadata_list)) { 4009 pr_debug("No SVM data from CRIU restore stage 2\n"); 4010 return ret; 4011 } 4012 4013 mm = get_task_mm(p->lead_thread); 4014 if (!mm) { 4015 pr_err("failed to get mm for the target process\n"); 4016 return -ESRCH; 4017 } 4018 4019 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 4020 4021 i = j = 0; 4022 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 4023 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 4024 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 4025 4026 for (j = 0; j < num_attrs; j++) { 4027 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 4028 i, j, criu_svm_md->data.attrs[j].type, 4029 i, j, criu_svm_md->data.attrs[j].value); 4030 switch (criu_svm_md->data.attrs[j].type) { 4031 /* During Checkpoint operation, the query for 4032 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 4033 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 4034 * not used by the range which was checkpointed. Care 4035 * must be taken to not restore with an invalid value 4036 * otherwise the gpuidx value will be invalid and 4037 * set_attr would eventually fail so just replace those 4038 * with another dummy attribute such as 4039 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 4040 */ 4041 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 4042 if (criu_svm_md->data.attrs[j].value == 4043 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 4044 criu_svm_md->data.attrs[j].type = 4045 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4046 criu_svm_md->data.attrs[j].value = 0; 4047 } 4048 break; 4049 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4050 set_flags = criu_svm_md->data.attrs[j].value; 4051 break; 4052 default: 4053 break; 4054 } 4055 } 4056 4057 /* CLR_FLAGS is not available via get_attr during checkpoint but 4058 * it needs to be inserted before restoring the ranges so 4059 * allocate extra space for it before calling set_attr 4060 */ 4061 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4062 (num_attrs + 1); 4063 set_attr_new = krealloc(set_attr, set_attr_size, 4064 GFP_KERNEL); 4065 if (!set_attr_new) { 4066 ret = -ENOMEM; 4067 goto exit; 4068 } 4069 set_attr = set_attr_new; 4070 4071 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4072 sizeof(struct kfd_ioctl_svm_attribute)); 4073 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4074 set_attr[num_attrs].value = ~set_flags; 4075 4076 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4077 criu_svm_md->data.size, num_attrs + 1, 4078 set_attr); 4079 if (ret) { 4080 pr_err("CRIU: failed to set range attributes\n"); 4081 goto exit; 4082 } 4083 4084 i++; 4085 } 4086 exit: 4087 kfree(set_attr); 4088 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4089 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4090 criu_svm_md->data.start_addr); 4091 kfree(criu_svm_md); 4092 } 4093 4094 mmput(mm); 4095 return ret; 4096 4097 } 4098 4099 int kfd_criu_restore_svm(struct kfd_process *p, 4100 uint8_t __user *user_priv_ptr, 4101 uint64_t *priv_data_offset, 4102 uint64_t max_priv_data_size) 4103 { 4104 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4105 int nattr_common = 4, nattr_accessibility = 1; 4106 struct criu_svm_metadata *criu_svm_md = NULL; 4107 struct svm_range_list *svms = &p->svms; 4108 uint32_t num_devices; 4109 int ret = 0; 4110 4111 num_devices = p->n_pdds; 4112 /* Handle one SVM range object at a time, also the number of gpus are 4113 * assumed to be same on the restore node, checking must be done while 4114 * evaluating the topology earlier 4115 */ 4116 4117 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4118 (nattr_common + nattr_accessibility * num_devices); 4119 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4120 4121 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4122 svm_attrs_size; 4123 4124 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4125 if (!criu_svm_md) { 4126 pr_err("failed to allocate memory to store svm metadata\n"); 4127 return -ENOMEM; 4128 } 4129 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4130 ret = -EINVAL; 4131 goto exit; 4132 } 4133 4134 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4135 svm_priv_data_size); 4136 if (ret) { 4137 ret = -EFAULT; 4138 goto exit; 4139 } 4140 *priv_data_offset += svm_priv_data_size; 4141 4142 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4143 4144 return 0; 4145 4146 4147 exit: 4148 kfree(criu_svm_md); 4149 return ret; 4150 } 4151 4152 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4153 uint64_t *svm_priv_data_size) 4154 { 4155 uint64_t total_size, accessibility_size, common_attr_size; 4156 int nattr_common = 4, nattr_accessibility = 1; 4157 int num_devices = p->n_pdds; 4158 struct svm_range_list *svms; 4159 struct svm_range *prange; 4160 uint32_t count = 0; 4161 4162 *svm_priv_data_size = 0; 4163 4164 svms = &p->svms; 4165 4166 mutex_lock(&svms->lock); 4167 list_for_each_entry(prange, &svms->list, list) { 4168 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4169 prange, prange->start, prange->npages, 4170 prange->start + prange->npages - 1); 4171 count++; 4172 } 4173 mutex_unlock(&svms->lock); 4174 4175 *num_svm_ranges = count; 4176 /* Only the accessbility attributes need to be queried for all the gpus 4177 * individually, remaining ones are spanned across the entire process 4178 * regardless of the various gpu nodes. Of the remaining attributes, 4179 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4180 * 4181 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4182 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4183 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4184 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4185 * 4186 * ** ACCESSBILITY ATTRIBUTES ** 4187 * (Considered as one, type is altered during query, value is gpuid) 4188 * KFD_IOCTL_SVM_ATTR_ACCESS 4189 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4190 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4191 */ 4192 if (*num_svm_ranges > 0) { 4193 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4194 nattr_common; 4195 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4196 nattr_accessibility * num_devices; 4197 4198 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4199 common_attr_size + accessibility_size; 4200 4201 *svm_priv_data_size = *num_svm_ranges * total_size; 4202 } 4203 4204 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4205 *svm_priv_data_size); 4206 } 4207 4208 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4209 uint8_t __user *user_priv_data, 4210 uint64_t *priv_data_offset) 4211 { 4212 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4213 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4214 uint64_t svm_priv_data_size, query_attr_size = 0; 4215 int index, nattr_common = 4, ret = 0; 4216 struct svm_range_list *svms; 4217 int num_devices = p->n_pdds; 4218 struct svm_range *prange; 4219 struct mm_struct *mm; 4220 4221 svms = &p->svms; 4222 4223 mm = get_task_mm(p->lead_thread); 4224 if (!mm) { 4225 pr_err("failed to get mm for the target process\n"); 4226 return -ESRCH; 4227 } 4228 4229 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4230 (nattr_common + num_devices); 4231 4232 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4233 if (!query_attr) { 4234 ret = -ENOMEM; 4235 goto exit; 4236 } 4237 4238 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4239 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4240 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4241 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4242 4243 for (index = 0; index < num_devices; index++) { 4244 struct kfd_process_device *pdd = p->pdds[index]; 4245 4246 query_attr[index + nattr_common].type = 4247 KFD_IOCTL_SVM_ATTR_ACCESS; 4248 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4249 } 4250 4251 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4252 4253 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4254 if (!svm_priv) { 4255 ret = -ENOMEM; 4256 goto exit_query; 4257 } 4258 4259 index = 0; 4260 list_for_each_entry(prange, &svms->list, list) { 4261 4262 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4263 svm_priv->start_addr = prange->start; 4264 svm_priv->size = prange->npages; 4265 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4266 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4267 prange, prange->start, prange->npages, 4268 prange->start + prange->npages - 1, 4269 prange->npages * PAGE_SIZE); 4270 4271 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4272 svm_priv->size, 4273 (nattr_common + num_devices), 4274 svm_priv->attrs); 4275 if (ret) { 4276 pr_err("CRIU: failed to obtain range attributes\n"); 4277 goto exit_priv; 4278 } 4279 4280 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4281 svm_priv_data_size)) { 4282 pr_err("Failed to copy svm priv to user\n"); 4283 ret = -EFAULT; 4284 goto exit_priv; 4285 } 4286 4287 *priv_data_offset += svm_priv_data_size; 4288 4289 } 4290 4291 4292 exit_priv: 4293 kfree(svm_priv); 4294 exit_query: 4295 kfree(query_attr); 4296 exit: 4297 mmput(mm); 4298 return ret; 4299 } 4300 4301 int 4302 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4303 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4304 { 4305 struct mm_struct *mm = current->mm; 4306 int r; 4307 4308 start >>= PAGE_SHIFT; 4309 size >>= PAGE_SHIFT; 4310 4311 switch (op) { 4312 case KFD_IOCTL_SVM_OP_SET_ATTR: 4313 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4314 break; 4315 case KFD_IOCTL_SVM_OP_GET_ATTR: 4316 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4317 break; 4318 default: 4319 r = -EINVAL; 4320 break; 4321 } 4322 4323 return r; 4324 } 4325