1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 return 0; 202 } 203 204 static int 205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 206 unsigned long offset, unsigned long npages, 207 unsigned long *hmm_pfns) 208 { 209 struct kfd_process *p; 210 uint32_t gpuidx; 211 int r; 212 213 p = container_of(prange->svms, struct kfd_process, svms); 214 215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 216 struct kfd_process_device *pdd; 217 218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 219 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 220 if (!pdd) { 221 pr_debug("failed to find device idx %d\n", gpuidx); 222 return -EINVAL; 223 } 224 225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 226 hmm_pfns, gpuidx); 227 if (r) 228 break; 229 } 230 231 return r; 232 } 233 234 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 235 unsigned long offset, unsigned long npages) 236 { 237 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 238 int i; 239 240 if (!dma_addr) 241 return; 242 243 for (i = offset; i < offset + npages; i++) { 244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 245 continue; 246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 248 dma_addr[i] = 0; 249 } 250 } 251 252 void svm_range_dma_unmap(struct svm_range *prange) 253 { 254 struct kfd_process_device *pdd; 255 dma_addr_t *dma_addr; 256 struct device *dev; 257 struct kfd_process *p; 258 uint32_t gpuidx; 259 260 p = container_of(prange->svms, struct kfd_process, svms); 261 262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 263 dma_addr = prange->dma_addr[gpuidx]; 264 if (!dma_addr) 265 continue; 266 267 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 268 if (!pdd) { 269 pr_debug("failed to find device idx %d\n", gpuidx); 270 continue; 271 } 272 dev = &pdd->dev->adev->pdev->dev; 273 274 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 275 } 276 } 277 278 static void svm_range_free(struct svm_range *prange, bool do_unmap) 279 { 280 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 281 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 282 uint32_t gpuidx; 283 284 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 285 prange->start, prange->last); 286 287 svm_range_vram_node_free(prange); 288 if (do_unmap) 289 svm_range_dma_unmap(prange); 290 291 if (do_unmap && !p->xnack_enabled) { 292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 295 } 296 297 /* free dma_addr array for each gpu */ 298 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 299 if (prange->dma_addr[gpuidx]) { 300 kvfree(prange->dma_addr[gpuidx]); 301 prange->dma_addr[gpuidx] = NULL; 302 } 303 } 304 305 mutex_destroy(&prange->lock); 306 mutex_destroy(&prange->migrate_mutex); 307 kfree(prange); 308 } 309 310 static void 311 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 312 uint8_t *granularity, uint32_t *flags) 313 { 314 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 315 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 316 *granularity = 9; 317 *flags = 318 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 319 } 320 321 static struct 322 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 323 uint64_t last, bool update_mem_usage) 324 { 325 uint64_t size = last - start + 1; 326 struct svm_range *prange; 327 struct kfd_process *p; 328 329 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 330 if (!prange) 331 return NULL; 332 333 p = container_of(svms, struct kfd_process, svms); 334 if (!p->xnack_enabled && update_mem_usage && 335 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 336 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 337 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 338 kfree(prange); 339 return NULL; 340 } 341 prange->npages = size; 342 prange->svms = svms; 343 prange->start = start; 344 prange->last = last; 345 INIT_LIST_HEAD(&prange->list); 346 INIT_LIST_HEAD(&prange->update_list); 347 INIT_LIST_HEAD(&prange->svm_bo_list); 348 INIT_LIST_HEAD(&prange->deferred_list); 349 INIT_LIST_HEAD(&prange->child_list); 350 atomic_set(&prange->invalid, 0); 351 prange->validate_timestamp = 0; 352 mutex_init(&prange->migrate_mutex); 353 mutex_init(&prange->lock); 354 355 if (p->xnack_enabled) 356 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 357 MAX_GPU_INSTANCE); 358 359 svm_range_set_default_attributes(&prange->preferred_loc, 360 &prange->prefetch_loc, 361 &prange->granularity, &prange->flags); 362 363 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 364 365 return prange; 366 } 367 368 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 369 { 370 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 371 return false; 372 373 return true; 374 } 375 376 static void svm_range_bo_release(struct kref *kref) 377 { 378 struct svm_range_bo *svm_bo; 379 380 svm_bo = container_of(kref, struct svm_range_bo, kref); 381 pr_debug("svm_bo 0x%p\n", svm_bo); 382 383 spin_lock(&svm_bo->list_lock); 384 while (!list_empty(&svm_bo->range_list)) { 385 struct svm_range *prange = 386 list_first_entry(&svm_bo->range_list, 387 struct svm_range, svm_bo_list); 388 /* list_del_init tells a concurrent svm_range_vram_node_new when 389 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 390 */ 391 list_del_init(&prange->svm_bo_list); 392 spin_unlock(&svm_bo->list_lock); 393 394 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 395 prange->start, prange->last); 396 mutex_lock(&prange->lock); 397 prange->svm_bo = NULL; 398 mutex_unlock(&prange->lock); 399 400 spin_lock(&svm_bo->list_lock); 401 } 402 spin_unlock(&svm_bo->list_lock); 403 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 404 /* We're not in the eviction worker. 405 * Signal the fence and synchronize with any 406 * pending eviction work. 407 */ 408 dma_fence_signal(&svm_bo->eviction_fence->base); 409 cancel_work_sync(&svm_bo->eviction_work); 410 } 411 dma_fence_put(&svm_bo->eviction_fence->base); 412 amdgpu_bo_unref(&svm_bo->bo); 413 kfree(svm_bo); 414 } 415 416 static void svm_range_bo_wq_release(struct work_struct *work) 417 { 418 struct svm_range_bo *svm_bo; 419 420 svm_bo = container_of(work, struct svm_range_bo, release_work); 421 svm_range_bo_release(&svm_bo->kref); 422 } 423 424 static void svm_range_bo_release_async(struct kref *kref) 425 { 426 struct svm_range_bo *svm_bo; 427 428 svm_bo = container_of(kref, struct svm_range_bo, kref); 429 pr_debug("svm_bo 0x%p\n", svm_bo); 430 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 431 schedule_work(&svm_bo->release_work); 432 } 433 434 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 435 { 436 kref_put(&svm_bo->kref, svm_range_bo_release_async); 437 } 438 439 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 440 { 441 if (svm_bo) 442 kref_put(&svm_bo->kref, svm_range_bo_release); 443 } 444 445 static bool 446 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 447 { 448 mutex_lock(&prange->lock); 449 if (!prange->svm_bo) { 450 mutex_unlock(&prange->lock); 451 return false; 452 } 453 if (prange->ttm_res) { 454 /* We still have a reference, all is well */ 455 mutex_unlock(&prange->lock); 456 return true; 457 } 458 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 459 /* 460 * Migrate from GPU to GPU, remove range from source svm_bo->node 461 * range list, and return false to allocate svm_bo from destination 462 * node. 463 */ 464 if (prange->svm_bo->node != node) { 465 mutex_unlock(&prange->lock); 466 467 spin_lock(&prange->svm_bo->list_lock); 468 list_del_init(&prange->svm_bo_list); 469 spin_unlock(&prange->svm_bo->list_lock); 470 471 svm_range_bo_unref(prange->svm_bo); 472 return false; 473 } 474 if (READ_ONCE(prange->svm_bo->evicting)) { 475 struct dma_fence *f; 476 struct svm_range_bo *svm_bo; 477 /* The BO is getting evicted, 478 * we need to get a new one 479 */ 480 mutex_unlock(&prange->lock); 481 svm_bo = prange->svm_bo; 482 f = dma_fence_get(&svm_bo->eviction_fence->base); 483 svm_range_bo_unref(prange->svm_bo); 484 /* wait for the fence to avoid long spin-loop 485 * at list_empty_careful 486 */ 487 dma_fence_wait(f, false); 488 dma_fence_put(f); 489 } else { 490 /* The BO was still around and we got 491 * a new reference to it 492 */ 493 mutex_unlock(&prange->lock); 494 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 495 prange->svms, prange->start, prange->last); 496 497 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 498 return true; 499 } 500 501 } else { 502 mutex_unlock(&prange->lock); 503 } 504 505 /* We need a new svm_bo. Spin-loop to wait for concurrent 506 * svm_range_bo_release to finish removing this range from 507 * its range list and set prange->svm_bo to null. After this, 508 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 509 */ 510 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 511 cond_resched(); 512 513 return false; 514 } 515 516 static struct svm_range_bo *svm_range_bo_new(void) 517 { 518 struct svm_range_bo *svm_bo; 519 520 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 521 if (!svm_bo) 522 return NULL; 523 524 kref_init(&svm_bo->kref); 525 INIT_LIST_HEAD(&svm_bo->range_list); 526 spin_lock_init(&svm_bo->list_lock); 527 528 return svm_bo; 529 } 530 531 int 532 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 533 bool clear) 534 { 535 struct amdgpu_bo_param bp; 536 struct svm_range_bo *svm_bo; 537 struct amdgpu_bo_user *ubo; 538 struct amdgpu_bo *bo; 539 struct kfd_process *p; 540 struct mm_struct *mm; 541 int r; 542 543 p = container_of(prange->svms, struct kfd_process, svms); 544 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 545 prange->start, prange->last); 546 547 if (svm_range_validate_svm_bo(node, prange)) 548 return 0; 549 550 svm_bo = svm_range_bo_new(); 551 if (!svm_bo) { 552 pr_debug("failed to alloc svm bo\n"); 553 return -ENOMEM; 554 } 555 mm = get_task_mm(p->lead_thread); 556 if (!mm) { 557 pr_debug("failed to get mm\n"); 558 kfree(svm_bo); 559 return -ESRCH; 560 } 561 svm_bo->node = node; 562 svm_bo->eviction_fence = 563 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 564 mm, 565 svm_bo); 566 mmput(mm); 567 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 568 svm_bo->evicting = 0; 569 memset(&bp, 0, sizeof(bp)); 570 bp.size = prange->npages * PAGE_SIZE; 571 bp.byte_align = PAGE_SIZE; 572 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 573 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 574 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 575 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 576 bp.type = ttm_bo_type_device; 577 bp.resv = NULL; 578 if (node->xcp) 579 bp.xcp_id_plus1 = node->xcp->id + 1; 580 581 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 582 if (r) { 583 pr_debug("failed %d to create bo\n", r); 584 goto create_bo_failed; 585 } 586 bo = &ubo->bo; 587 588 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 589 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 590 bp.xcp_id_plus1 - 1); 591 592 r = amdgpu_bo_reserve(bo, true); 593 if (r) { 594 pr_debug("failed %d to reserve bo\n", r); 595 goto reserve_bo_failed; 596 } 597 598 if (clear) { 599 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 600 if (r) { 601 pr_debug("failed %d to sync bo\n", r); 602 amdgpu_bo_unreserve(bo); 603 goto reserve_bo_failed; 604 } 605 } 606 607 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 608 if (r) { 609 pr_debug("failed %d to reserve bo\n", r); 610 amdgpu_bo_unreserve(bo); 611 goto reserve_bo_failed; 612 } 613 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 614 615 amdgpu_bo_unreserve(bo); 616 617 svm_bo->bo = bo; 618 prange->svm_bo = svm_bo; 619 prange->ttm_res = bo->tbo.resource; 620 prange->offset = 0; 621 622 spin_lock(&svm_bo->list_lock); 623 list_add(&prange->svm_bo_list, &svm_bo->range_list); 624 spin_unlock(&svm_bo->list_lock); 625 626 return 0; 627 628 reserve_bo_failed: 629 amdgpu_bo_unref(&bo); 630 create_bo_failed: 631 dma_fence_put(&svm_bo->eviction_fence->base); 632 kfree(svm_bo); 633 prange->ttm_res = NULL; 634 635 return r; 636 } 637 638 void svm_range_vram_node_free(struct svm_range *prange) 639 { 640 /* serialize prange->svm_bo unref */ 641 mutex_lock(&prange->lock); 642 /* prange->svm_bo has not been unref */ 643 if (prange->ttm_res) { 644 prange->ttm_res = NULL; 645 mutex_unlock(&prange->lock); 646 svm_range_bo_unref(prange->svm_bo); 647 } else 648 mutex_unlock(&prange->lock); 649 } 650 651 struct kfd_node * 652 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 653 { 654 struct kfd_process *p; 655 struct kfd_process_device *pdd; 656 657 p = container_of(prange->svms, struct kfd_process, svms); 658 pdd = kfd_process_device_data_by_id(p, gpu_id); 659 if (!pdd) { 660 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 661 return NULL; 662 } 663 664 return pdd->dev; 665 } 666 667 struct kfd_process_device * 668 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 669 { 670 struct kfd_process *p; 671 672 p = container_of(prange->svms, struct kfd_process, svms); 673 674 return kfd_get_process_device_data(node, p); 675 } 676 677 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 678 { 679 struct ttm_operation_ctx ctx = { false, false }; 680 681 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 682 683 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 684 } 685 686 static int 687 svm_range_check_attr(struct kfd_process *p, 688 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 689 { 690 uint32_t i; 691 692 for (i = 0; i < nattr; i++) { 693 uint32_t val = attrs[i].value; 694 int gpuidx = MAX_GPU_INSTANCE; 695 696 switch (attrs[i].type) { 697 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 698 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 699 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 700 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 701 break; 702 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 703 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 704 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 705 break; 706 case KFD_IOCTL_SVM_ATTR_ACCESS: 707 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 708 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 709 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 710 break; 711 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 712 break; 713 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 714 break; 715 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 716 break; 717 default: 718 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 719 return -EINVAL; 720 } 721 722 if (gpuidx < 0) { 723 pr_debug("no GPU 0x%x found\n", val); 724 return -EINVAL; 725 } else if (gpuidx < MAX_GPU_INSTANCE && 726 !test_bit(gpuidx, p->svms.bitmap_supported)) { 727 pr_debug("GPU 0x%x not supported\n", val); 728 return -EINVAL; 729 } 730 } 731 732 return 0; 733 } 734 735 static void 736 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 737 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 738 bool *update_mapping) 739 { 740 uint32_t i; 741 int gpuidx; 742 743 for (i = 0; i < nattr; i++) { 744 switch (attrs[i].type) { 745 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 746 prange->preferred_loc = attrs[i].value; 747 break; 748 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 749 prange->prefetch_loc = attrs[i].value; 750 break; 751 case KFD_IOCTL_SVM_ATTR_ACCESS: 752 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 753 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 754 if (!p->xnack_enabled) 755 *update_mapping = true; 756 757 gpuidx = kfd_process_gpuidx_from_gpuid(p, 758 attrs[i].value); 759 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 760 bitmap_clear(prange->bitmap_access, gpuidx, 1); 761 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 762 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 763 bitmap_set(prange->bitmap_access, gpuidx, 1); 764 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 765 } else { 766 bitmap_clear(prange->bitmap_access, gpuidx, 1); 767 bitmap_set(prange->bitmap_aip, gpuidx, 1); 768 } 769 break; 770 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 771 *update_mapping = true; 772 prange->flags |= attrs[i].value; 773 break; 774 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 775 *update_mapping = true; 776 prange->flags &= ~attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 779 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 780 break; 781 default: 782 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 783 } 784 } 785 } 786 787 static bool 788 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 789 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 790 { 791 uint32_t i; 792 int gpuidx; 793 794 for (i = 0; i < nattr; i++) { 795 switch (attrs[i].type) { 796 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 797 if (prange->preferred_loc != attrs[i].value) 798 return false; 799 break; 800 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 801 /* Prefetch should always trigger a migration even 802 * if the value of the attribute didn't change. 803 */ 804 return false; 805 case KFD_IOCTL_SVM_ATTR_ACCESS: 806 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 807 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 808 gpuidx = kfd_process_gpuidx_from_gpuid(p, 809 attrs[i].value); 810 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 811 if (test_bit(gpuidx, prange->bitmap_access) || 812 test_bit(gpuidx, prange->bitmap_aip)) 813 return false; 814 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 815 if (!test_bit(gpuidx, prange->bitmap_access)) 816 return false; 817 } else { 818 if (!test_bit(gpuidx, prange->bitmap_aip)) 819 return false; 820 } 821 break; 822 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 823 if ((prange->flags & attrs[i].value) != attrs[i].value) 824 return false; 825 break; 826 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 827 if ((prange->flags & attrs[i].value) != 0) 828 return false; 829 break; 830 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 831 if (prange->granularity != attrs[i].value) 832 return false; 833 break; 834 default: 835 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 836 } 837 } 838 839 return true; 840 } 841 842 /** 843 * svm_range_debug_dump - print all range information from svms 844 * @svms: svm range list header 845 * 846 * debug output svm range start, end, prefetch location from svms 847 * interval tree and link list 848 * 849 * Context: The caller must hold svms->lock 850 */ 851 static void svm_range_debug_dump(struct svm_range_list *svms) 852 { 853 struct interval_tree_node *node; 854 struct svm_range *prange; 855 856 pr_debug("dump svms 0x%p list\n", svms); 857 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 858 859 list_for_each_entry(prange, &svms->list, list) { 860 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 861 prange, prange->start, prange->npages, 862 prange->start + prange->npages - 1, 863 prange->actual_loc); 864 } 865 866 pr_debug("dump svms 0x%p interval tree\n", svms); 867 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 868 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 869 while (node) { 870 prange = container_of(node, struct svm_range, it_node); 871 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 872 prange, prange->start, prange->npages, 873 prange->start + prange->npages - 1, 874 prange->actual_loc); 875 node = interval_tree_iter_next(node, 0, ~0ULL); 876 } 877 } 878 879 static void * 880 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 881 uint64_t offset) 882 { 883 unsigned char *dst; 884 885 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 886 if (!dst) 887 return NULL; 888 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 889 890 return (void *)dst; 891 } 892 893 static int 894 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 895 { 896 int i; 897 898 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 899 if (!src->dma_addr[i]) 900 continue; 901 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 902 sizeof(*src->dma_addr[i]), src->npages, 0); 903 if (!dst->dma_addr[i]) 904 return -ENOMEM; 905 } 906 907 return 0; 908 } 909 910 static int 911 svm_range_split_array(void *ppnew, void *ppold, size_t size, 912 uint64_t old_start, uint64_t old_n, 913 uint64_t new_start, uint64_t new_n) 914 { 915 unsigned char *new, *old, *pold; 916 uint64_t d; 917 918 if (!ppold) 919 return 0; 920 pold = *(unsigned char **)ppold; 921 if (!pold) 922 return 0; 923 924 d = (new_start - old_start) * size; 925 new = svm_range_copy_array(pold, size, new_n, d); 926 if (!new) 927 return -ENOMEM; 928 d = (new_start == old_start) ? new_n * size : 0; 929 old = svm_range_copy_array(pold, size, old_n, d); 930 if (!old) { 931 kvfree(new); 932 return -ENOMEM; 933 } 934 kvfree(pold); 935 *(void **)ppold = old; 936 *(void **)ppnew = new; 937 938 return 0; 939 } 940 941 static int 942 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 943 uint64_t start, uint64_t last) 944 { 945 uint64_t npages = last - start + 1; 946 int i, r; 947 948 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 949 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 950 sizeof(*old->dma_addr[i]), old->start, 951 npages, new->start, new->npages); 952 if (r) 953 return r; 954 } 955 956 return 0; 957 } 958 959 static int 960 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 961 uint64_t start, uint64_t last) 962 { 963 uint64_t npages = last - start + 1; 964 965 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 966 new->svms, new, new->start, start, last); 967 968 if (new->start == old->start) { 969 new->offset = old->offset; 970 old->offset += new->npages; 971 } else { 972 new->offset = old->offset + npages; 973 } 974 975 new->svm_bo = svm_range_bo_ref(old->svm_bo); 976 new->ttm_res = old->ttm_res; 977 978 spin_lock(&new->svm_bo->list_lock); 979 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 980 spin_unlock(&new->svm_bo->list_lock); 981 982 return 0; 983 } 984 985 /** 986 * svm_range_split_adjust - split range and adjust 987 * 988 * @new: new range 989 * @old: the old range 990 * @start: the old range adjust to start address in pages 991 * @last: the old range adjust to last address in pages 992 * 993 * Copy system memory dma_addr or vram ttm_res in old range to new 994 * range from new_start up to size new->npages, the remaining old range is from 995 * start to last 996 * 997 * Return: 998 * 0 - OK, -ENOMEM - out of memory 999 */ 1000 static int 1001 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1002 uint64_t start, uint64_t last) 1003 { 1004 int r; 1005 1006 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1007 new->svms, new->start, old->start, old->last, start, last); 1008 1009 if (new->start < old->start || 1010 new->last > old->last) { 1011 WARN_ONCE(1, "invalid new range start or last\n"); 1012 return -EINVAL; 1013 } 1014 1015 r = svm_range_split_pages(new, old, start, last); 1016 if (r) 1017 return r; 1018 1019 if (old->actual_loc && old->ttm_res) { 1020 r = svm_range_split_nodes(new, old, start, last); 1021 if (r) 1022 return r; 1023 } 1024 1025 old->npages = last - start + 1; 1026 old->start = start; 1027 old->last = last; 1028 new->flags = old->flags; 1029 new->preferred_loc = old->preferred_loc; 1030 new->prefetch_loc = old->prefetch_loc; 1031 new->actual_loc = old->actual_loc; 1032 new->granularity = old->granularity; 1033 new->mapped_to_gpu = old->mapped_to_gpu; 1034 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1035 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1036 1037 return 0; 1038 } 1039 1040 /** 1041 * svm_range_split - split a range in 2 ranges 1042 * 1043 * @prange: the svm range to split 1044 * @start: the remaining range start address in pages 1045 * @last: the remaining range last address in pages 1046 * @new: the result new range generated 1047 * 1048 * Two cases only: 1049 * case 1: if start == prange->start 1050 * prange ==> prange[start, last] 1051 * new range [last + 1, prange->last] 1052 * 1053 * case 2: if last == prange->last 1054 * prange ==> prange[start, last] 1055 * new range [prange->start, start - 1] 1056 * 1057 * Return: 1058 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1059 */ 1060 static int 1061 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1062 struct svm_range **new) 1063 { 1064 uint64_t old_start = prange->start; 1065 uint64_t old_last = prange->last; 1066 struct svm_range_list *svms; 1067 int r = 0; 1068 1069 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1070 old_start, old_last, start, last); 1071 1072 if (old_start != start && old_last != last) 1073 return -EINVAL; 1074 if (start < old_start || last > old_last) 1075 return -EINVAL; 1076 1077 svms = prange->svms; 1078 if (old_start == start) 1079 *new = svm_range_new(svms, last + 1, old_last, false); 1080 else 1081 *new = svm_range_new(svms, old_start, start - 1, false); 1082 if (!*new) 1083 return -ENOMEM; 1084 1085 r = svm_range_split_adjust(*new, prange, start, last); 1086 if (r) { 1087 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1088 r, old_start, old_last, start, last); 1089 svm_range_free(*new, false); 1090 *new = NULL; 1091 } 1092 1093 return r; 1094 } 1095 1096 static int 1097 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1098 struct list_head *insert_list, struct list_head *remap_list) 1099 { 1100 struct svm_range *tail; 1101 int r = svm_range_split(prange, prange->start, new_last, &tail); 1102 1103 if (!r) { 1104 list_add(&tail->list, insert_list); 1105 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1106 list_add(&tail->update_list, remap_list); 1107 } 1108 return r; 1109 } 1110 1111 static int 1112 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1113 struct list_head *insert_list, struct list_head *remap_list) 1114 { 1115 struct svm_range *head; 1116 int r = svm_range_split(prange, new_start, prange->last, &head); 1117 1118 if (!r) { 1119 list_add(&head->list, insert_list); 1120 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1121 list_add(&head->update_list, remap_list); 1122 } 1123 return r; 1124 } 1125 1126 static void 1127 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1128 struct svm_range *pchild, enum svm_work_list_ops op) 1129 { 1130 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1131 pchild, pchild->start, pchild->last, prange, op); 1132 1133 pchild->work_item.mm = mm; 1134 pchild->work_item.op = op; 1135 list_add_tail(&pchild->child_list, &prange->child_list); 1136 } 1137 1138 /** 1139 * svm_range_split_by_granularity - collect ranges within granularity boundary 1140 * 1141 * @p: the process with svms list 1142 * @mm: mm structure 1143 * @addr: the vm fault address in pages, to split the prange 1144 * @parent: parent range if prange is from child list 1145 * @prange: prange to split 1146 * 1147 * Trims @prange to be a single aligned block of prange->granularity if 1148 * possible. The head and tail are added to the child_list in @parent. 1149 * 1150 * Context: caller must hold mmap_read_lock and prange->lock 1151 * 1152 * Return: 1153 * 0 - OK, otherwise error code 1154 */ 1155 int 1156 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1157 unsigned long addr, struct svm_range *parent, 1158 struct svm_range *prange) 1159 { 1160 struct svm_range *head, *tail; 1161 unsigned long start, last, size; 1162 int r; 1163 1164 /* Align splited range start and size to granularity size, then a single 1165 * PTE will be used for whole range, this reduces the number of PTE 1166 * updated and the L1 TLB space used for translation. 1167 */ 1168 size = 1UL << prange->granularity; 1169 start = ALIGN_DOWN(addr, size); 1170 last = ALIGN(addr + 1, size) - 1; 1171 1172 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1173 prange->svms, prange->start, prange->last, start, last, size); 1174 1175 if (start > prange->start) { 1176 r = svm_range_split(prange, start, prange->last, &head); 1177 if (r) 1178 return r; 1179 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1180 } 1181 1182 if (last < prange->last) { 1183 r = svm_range_split(prange, prange->start, last, &tail); 1184 if (r) 1185 return r; 1186 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1187 } 1188 1189 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1190 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1191 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1192 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1193 prange, prange->start, prange->last, 1194 SVM_OP_ADD_RANGE_AND_MAP); 1195 } 1196 return 0; 1197 } 1198 static bool 1199 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1200 { 1201 return (node_a->adev == node_b->adev || 1202 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1203 } 1204 1205 static uint64_t 1206 svm_range_get_pte_flags(struct kfd_node *node, 1207 struct svm_range *prange, int domain) 1208 { 1209 struct kfd_node *bo_node; 1210 uint32_t flags = prange->flags; 1211 uint32_t mapping_flags = 0; 1212 uint64_t pte_flags; 1213 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1214 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1215 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1216 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1217 unsigned int mtype_local; 1218 1219 if (domain == SVM_RANGE_VRAM_DOMAIN) 1220 bo_node = prange->svm_bo->node; 1221 1222 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1223 case IP_VERSION(9, 4, 1): 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1225 if (bo_node == node) { 1226 mapping_flags |= coherent ? 1227 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1228 } else { 1229 mapping_flags |= coherent ? 1230 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1231 if (svm_nodes_in_same_hive(node, bo_node)) 1232 snoop = true; 1233 } 1234 } else { 1235 mapping_flags |= coherent ? 1236 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1237 } 1238 break; 1239 case IP_VERSION(9, 4, 2): 1240 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1241 if (bo_node == node) { 1242 mapping_flags |= coherent ? 1243 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1244 if (node->adev->gmc.xgmi.connected_to_cpu) 1245 snoop = true; 1246 } else { 1247 mapping_flags |= coherent ? 1248 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1249 if (svm_nodes_in_same_hive(node, bo_node)) 1250 snoop = true; 1251 } 1252 } else { 1253 mapping_flags |= coherent ? 1254 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1255 } 1256 break; 1257 case IP_VERSION(9, 4, 3): 1258 if (ext_coherent) 1259 mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC; 1260 else 1261 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1262 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1263 snoop = true; 1264 if (uncached) { 1265 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1266 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1267 /* local HBM region close to partition */ 1268 if (bo_node->adev == node->adev && 1269 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1270 mapping_flags |= mtype_local; 1271 /* local HBM region far from partition or remote XGMI GPU 1272 * with regular system scope coherence 1273 */ 1274 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1275 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1276 /* PCIe P2P or extended system scope coherence */ 1277 else 1278 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1279 /* system memory accessed by the APU */ 1280 } else if (node->adev->flags & AMD_IS_APU) { 1281 /* On NUMA systems, locality is determined per-page 1282 * in amdgpu_gmc_override_vm_pte_flags 1283 */ 1284 if (num_possible_nodes() <= 1) 1285 mapping_flags |= mtype_local; 1286 else 1287 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1288 /* system memory accessed by the dGPU */ 1289 } else { 1290 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1291 } 1292 break; 1293 default: 1294 mapping_flags |= coherent ? 1295 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1296 } 1297 1298 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1299 1300 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1301 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1302 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1303 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1304 1305 pte_flags = AMDGPU_PTE_VALID; 1306 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1307 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1308 1309 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1310 return pte_flags; 1311 } 1312 1313 static int 1314 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1315 uint64_t start, uint64_t last, 1316 struct dma_fence **fence) 1317 { 1318 uint64_t init_pte_value = 0; 1319 1320 pr_debug("[0x%llx 0x%llx]\n", start, last); 1321 1322 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1323 last, init_pte_value, 0, 0, NULL, NULL, 1324 fence); 1325 } 1326 1327 static int 1328 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1329 unsigned long last, uint32_t trigger) 1330 { 1331 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1332 struct kfd_process_device *pdd; 1333 struct dma_fence *fence = NULL; 1334 struct kfd_process *p; 1335 uint32_t gpuidx; 1336 int r = 0; 1337 1338 if (!prange->mapped_to_gpu) { 1339 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1340 prange, prange->start, prange->last); 1341 return 0; 1342 } 1343 1344 if (prange->start == start && prange->last == last) { 1345 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1346 prange->mapped_to_gpu = false; 1347 } 1348 1349 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1350 MAX_GPU_INSTANCE); 1351 p = container_of(prange->svms, struct kfd_process, svms); 1352 1353 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1354 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1355 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1356 if (!pdd) { 1357 pr_debug("failed to find device idx %d\n", gpuidx); 1358 return -EINVAL; 1359 } 1360 1361 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1362 start, last, trigger); 1363 1364 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1365 drm_priv_to_vm(pdd->drm_priv), 1366 start, last, &fence); 1367 if (r) 1368 break; 1369 1370 if (fence) { 1371 r = dma_fence_wait(fence, false); 1372 dma_fence_put(fence); 1373 fence = NULL; 1374 if (r) 1375 break; 1376 } 1377 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1378 } 1379 1380 return r; 1381 } 1382 1383 static int 1384 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1385 unsigned long offset, unsigned long npages, bool readonly, 1386 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1387 struct dma_fence **fence, bool flush_tlb) 1388 { 1389 struct amdgpu_device *adev = pdd->dev->adev; 1390 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1391 uint64_t pte_flags; 1392 unsigned long last_start; 1393 int last_domain; 1394 int r = 0; 1395 int64_t i, j; 1396 1397 last_start = prange->start + offset; 1398 1399 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1400 last_start, last_start + npages - 1, readonly); 1401 1402 for (i = offset; i < offset + npages; i++) { 1403 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1404 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1405 1406 /* Collect all pages in the same address range and memory domain 1407 * that can be mapped with a single call to update mapping. 1408 */ 1409 if (i < offset + npages - 1 && 1410 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1411 continue; 1412 1413 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1414 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1415 1416 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1417 if (readonly) 1418 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1419 1420 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1421 prange->svms, last_start, prange->start + i, 1422 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1423 pte_flags); 1424 1425 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1426 * different memory partition based on fpfn/lpfn, we should use 1427 * same vm_manager.vram_base_offset regardless memory partition. 1428 */ 1429 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1430 NULL, last_start, prange->start + i, 1431 pte_flags, 1432 (last_start - prange->start) << PAGE_SHIFT, 1433 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1434 NULL, dma_addr, &vm->last_update); 1435 1436 for (j = last_start - prange->start; j <= i; j++) 1437 dma_addr[j] |= last_domain; 1438 1439 if (r) { 1440 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1441 goto out; 1442 } 1443 last_start = prange->start + i + 1; 1444 } 1445 1446 r = amdgpu_vm_update_pdes(adev, vm, false); 1447 if (r) { 1448 pr_debug("failed %d to update directories 0x%lx\n", r, 1449 prange->start); 1450 goto out; 1451 } 1452 1453 if (fence) 1454 *fence = dma_fence_get(vm->last_update); 1455 1456 out: 1457 return r; 1458 } 1459 1460 static int 1461 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1462 unsigned long npages, bool readonly, 1463 unsigned long *bitmap, bool wait, bool flush_tlb) 1464 { 1465 struct kfd_process_device *pdd; 1466 struct amdgpu_device *bo_adev = NULL; 1467 struct kfd_process *p; 1468 struct dma_fence *fence = NULL; 1469 uint32_t gpuidx; 1470 int r = 0; 1471 1472 if (prange->svm_bo && prange->ttm_res) 1473 bo_adev = prange->svm_bo->node->adev; 1474 1475 p = container_of(prange->svms, struct kfd_process, svms); 1476 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1477 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1478 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1479 if (!pdd) { 1480 pr_debug("failed to find device idx %d\n", gpuidx); 1481 return -EINVAL; 1482 } 1483 1484 pdd = kfd_bind_process_to_device(pdd->dev, p); 1485 if (IS_ERR(pdd)) 1486 return -EINVAL; 1487 1488 if (bo_adev && pdd->dev->adev != bo_adev && 1489 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1490 pr_debug("cannot map to device idx %d\n", gpuidx); 1491 continue; 1492 } 1493 1494 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1495 prange->dma_addr[gpuidx], 1496 bo_adev, wait ? &fence : NULL, 1497 flush_tlb); 1498 if (r) 1499 break; 1500 1501 if (fence) { 1502 r = dma_fence_wait(fence, false); 1503 dma_fence_put(fence); 1504 fence = NULL; 1505 if (r) { 1506 pr_debug("failed %d to dma fence wait\n", r); 1507 break; 1508 } 1509 } 1510 1511 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1512 } 1513 1514 return r; 1515 } 1516 1517 struct svm_validate_context { 1518 struct kfd_process *process; 1519 struct svm_range *prange; 1520 bool intr; 1521 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1522 struct drm_exec exec; 1523 }; 1524 1525 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1526 { 1527 struct kfd_process_device *pdd; 1528 struct amdgpu_vm *vm; 1529 uint32_t gpuidx; 1530 int r; 1531 1532 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1533 drm_exec_until_all_locked(&ctx->exec) { 1534 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1535 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1536 if (!pdd) { 1537 pr_debug("failed to find device idx %d\n", gpuidx); 1538 r = -EINVAL; 1539 goto unreserve_out; 1540 } 1541 vm = drm_priv_to_vm(pdd->drm_priv); 1542 1543 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1544 drm_exec_retry_on_contention(&ctx->exec); 1545 if (unlikely(r)) { 1546 pr_debug("failed %d to reserve bo\n", r); 1547 goto unreserve_out; 1548 } 1549 } 1550 } 1551 1552 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1553 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1554 if (!pdd) { 1555 pr_debug("failed to find device idx %d\n", gpuidx); 1556 r = -EINVAL; 1557 goto unreserve_out; 1558 } 1559 1560 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1561 drm_priv_to_vm(pdd->drm_priv), 1562 svm_range_bo_validate, NULL); 1563 if (r) { 1564 pr_debug("failed %d validate pt bos\n", r); 1565 goto unreserve_out; 1566 } 1567 } 1568 1569 return 0; 1570 1571 unreserve_out: 1572 drm_exec_fini(&ctx->exec); 1573 return r; 1574 } 1575 1576 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1577 { 1578 drm_exec_fini(&ctx->exec); 1579 } 1580 1581 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1582 { 1583 struct kfd_process_device *pdd; 1584 1585 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1586 if (!pdd) 1587 return NULL; 1588 1589 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1590 } 1591 1592 /* 1593 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1594 * 1595 * To prevent concurrent destruction or change of range attributes, the 1596 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1597 * because that would block concurrent evictions and lead to deadlocks. To 1598 * serialize concurrent migrations or validations of the same range, the 1599 * prange->migrate_mutex must be held. 1600 * 1601 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1602 * eviction fence. 1603 * 1604 * The following sequence ensures race-free validation and GPU mapping: 1605 * 1606 * 1. Reserve page table (and SVM BO if range is in VRAM) 1607 * 2. hmm_range_fault to get page addresses (if system memory) 1608 * 3. DMA-map pages (if system memory) 1609 * 4-a. Take notifier lock 1610 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1611 * 4-c. Check that the range was not split or otherwise invalidated 1612 * 4-d. Update GPU page table 1613 * 4.e. Release notifier lock 1614 * 5. Release page table (and SVM BO) reservation 1615 */ 1616 static int svm_range_validate_and_map(struct mm_struct *mm, 1617 struct svm_range *prange, int32_t gpuidx, 1618 bool intr, bool wait, bool flush_tlb) 1619 { 1620 struct svm_validate_context *ctx; 1621 unsigned long start, end, addr; 1622 struct kfd_process *p; 1623 void *owner; 1624 int32_t idx; 1625 int r = 0; 1626 1627 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1628 if (!ctx) 1629 return -ENOMEM; 1630 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1631 ctx->prange = prange; 1632 ctx->intr = intr; 1633 1634 if (gpuidx < MAX_GPU_INSTANCE) { 1635 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1636 bitmap_set(ctx->bitmap, gpuidx, 1); 1637 } else if (ctx->process->xnack_enabled) { 1638 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1639 1640 /* If prefetch range to GPU, or GPU retry fault migrate range to 1641 * GPU, which has ACCESS attribute to the range, create mapping 1642 * on that GPU. 1643 */ 1644 if (prange->actual_loc) { 1645 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1646 prange->actual_loc); 1647 if (gpuidx < 0) { 1648 WARN_ONCE(1, "failed get device by id 0x%x\n", 1649 prange->actual_loc); 1650 r = -EINVAL; 1651 goto free_ctx; 1652 } 1653 if (test_bit(gpuidx, prange->bitmap_access)) 1654 bitmap_set(ctx->bitmap, gpuidx, 1); 1655 } 1656 } else { 1657 bitmap_or(ctx->bitmap, prange->bitmap_access, 1658 prange->bitmap_aip, MAX_GPU_INSTANCE); 1659 } 1660 1661 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1662 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1663 if (!prange->mapped_to_gpu || 1664 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1665 r = 0; 1666 goto free_ctx; 1667 } 1668 } 1669 1670 if (prange->actual_loc && !prange->ttm_res) { 1671 /* This should never happen. actual_loc gets set by 1672 * svm_migrate_ram_to_vram after allocating a BO. 1673 */ 1674 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1675 r = -EINVAL; 1676 goto free_ctx; 1677 } 1678 1679 svm_range_reserve_bos(ctx, intr); 1680 1681 p = container_of(prange->svms, struct kfd_process, svms); 1682 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1683 MAX_GPU_INSTANCE)); 1684 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1685 if (kfd_svm_page_owner(p, idx) != owner) { 1686 owner = NULL; 1687 break; 1688 } 1689 } 1690 1691 start = prange->start << PAGE_SHIFT; 1692 end = (prange->last + 1) << PAGE_SHIFT; 1693 for (addr = start; !r && addr < end; ) { 1694 struct hmm_range *hmm_range; 1695 struct vm_area_struct *vma; 1696 unsigned long next = 0; 1697 unsigned long offset; 1698 unsigned long npages; 1699 bool readonly; 1700 1701 vma = vma_lookup(mm, addr); 1702 if (vma) { 1703 readonly = !(vma->vm_flags & VM_WRITE); 1704 1705 next = min(vma->vm_end, end); 1706 npages = (next - addr) >> PAGE_SHIFT; 1707 WRITE_ONCE(p->svms.faulting_task, current); 1708 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1709 readonly, owner, NULL, 1710 &hmm_range); 1711 WRITE_ONCE(p->svms.faulting_task, NULL); 1712 if (r) { 1713 pr_debug("failed %d to get svm range pages\n", r); 1714 if (r == -EBUSY) 1715 r = -EAGAIN; 1716 } 1717 } else { 1718 r = -EFAULT; 1719 } 1720 1721 if (!r) { 1722 offset = (addr - start) >> PAGE_SHIFT; 1723 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1724 hmm_range->hmm_pfns); 1725 if (r) 1726 pr_debug("failed %d to dma map range\n", r); 1727 } 1728 1729 svm_range_lock(prange); 1730 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { 1731 pr_debug("hmm update the range, need validate again\n"); 1732 r = -EAGAIN; 1733 } 1734 1735 if (!r && !list_empty(&prange->child_list)) { 1736 pr_debug("range split by unmap in parallel, validate again\n"); 1737 r = -EAGAIN; 1738 } 1739 1740 if (!r) 1741 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1742 ctx->bitmap, wait, flush_tlb); 1743 1744 if (!r && next == end) 1745 prange->mapped_to_gpu = true; 1746 1747 svm_range_unlock(prange); 1748 1749 addr = next; 1750 } 1751 1752 svm_range_unreserve_bos(ctx); 1753 if (!r) 1754 prange->validate_timestamp = ktime_get_boottime(); 1755 1756 free_ctx: 1757 kfree(ctx); 1758 1759 return r; 1760 } 1761 1762 /** 1763 * svm_range_list_lock_and_flush_work - flush pending deferred work 1764 * 1765 * @svms: the svm range list 1766 * @mm: the mm structure 1767 * 1768 * Context: Returns with mmap write lock held, pending deferred work flushed 1769 * 1770 */ 1771 void 1772 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1773 struct mm_struct *mm) 1774 { 1775 retry_flush_work: 1776 flush_work(&svms->deferred_list_work); 1777 mmap_write_lock(mm); 1778 1779 if (list_empty(&svms->deferred_range_list)) 1780 return; 1781 mmap_write_unlock(mm); 1782 pr_debug("retry flush\n"); 1783 goto retry_flush_work; 1784 } 1785 1786 static void svm_range_restore_work(struct work_struct *work) 1787 { 1788 struct delayed_work *dwork = to_delayed_work(work); 1789 struct amdkfd_process_info *process_info; 1790 struct svm_range_list *svms; 1791 struct svm_range *prange; 1792 struct kfd_process *p; 1793 struct mm_struct *mm; 1794 int evicted_ranges; 1795 int invalid; 1796 int r; 1797 1798 svms = container_of(dwork, struct svm_range_list, restore_work); 1799 evicted_ranges = atomic_read(&svms->evicted_ranges); 1800 if (!evicted_ranges) 1801 return; 1802 1803 pr_debug("restore svm ranges\n"); 1804 1805 p = container_of(svms, struct kfd_process, svms); 1806 process_info = p->kgd_process_info; 1807 1808 /* Keep mm reference when svm_range_validate_and_map ranges */ 1809 mm = get_task_mm(p->lead_thread); 1810 if (!mm) { 1811 pr_debug("svms 0x%p process mm gone\n", svms); 1812 return; 1813 } 1814 1815 mutex_lock(&process_info->lock); 1816 svm_range_list_lock_and_flush_work(svms, mm); 1817 mutex_lock(&svms->lock); 1818 1819 evicted_ranges = atomic_read(&svms->evicted_ranges); 1820 1821 list_for_each_entry(prange, &svms->list, list) { 1822 invalid = atomic_read(&prange->invalid); 1823 if (!invalid) 1824 continue; 1825 1826 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1827 prange->svms, prange, prange->start, prange->last, 1828 invalid); 1829 1830 /* 1831 * If range is migrating, wait for migration is done. 1832 */ 1833 mutex_lock(&prange->migrate_mutex); 1834 1835 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1836 false, true, false); 1837 if (r) 1838 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1839 prange->start); 1840 1841 mutex_unlock(&prange->migrate_mutex); 1842 if (r) 1843 goto out_reschedule; 1844 1845 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1846 goto out_reschedule; 1847 } 1848 1849 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1850 evicted_ranges) 1851 goto out_reschedule; 1852 1853 evicted_ranges = 0; 1854 1855 r = kgd2kfd_resume_mm(mm); 1856 if (r) { 1857 /* No recovery from this failure. Probably the CP is 1858 * hanging. No point trying again. 1859 */ 1860 pr_debug("failed %d to resume KFD\n", r); 1861 } 1862 1863 pr_debug("restore svm ranges successfully\n"); 1864 1865 out_reschedule: 1866 mutex_unlock(&svms->lock); 1867 mmap_write_unlock(mm); 1868 mutex_unlock(&process_info->lock); 1869 1870 /* If validation failed, reschedule another attempt */ 1871 if (evicted_ranges) { 1872 pr_debug("reschedule to restore svm range\n"); 1873 schedule_delayed_work(&svms->restore_work, 1874 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1875 1876 kfd_smi_event_queue_restore_rescheduled(mm); 1877 } 1878 mmput(mm); 1879 } 1880 1881 /** 1882 * svm_range_evict - evict svm range 1883 * @prange: svm range structure 1884 * @mm: current process mm_struct 1885 * @start: starting process queue number 1886 * @last: last process queue number 1887 * @event: mmu notifier event when range is evicted or migrated 1888 * 1889 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1890 * return to let CPU evict the buffer and proceed CPU pagetable update. 1891 * 1892 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1893 * If invalidation happens while restore work is running, restore work will 1894 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1895 * the queues. 1896 */ 1897 static int 1898 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1899 unsigned long start, unsigned long last, 1900 enum mmu_notifier_event event) 1901 { 1902 struct svm_range_list *svms = prange->svms; 1903 struct svm_range *pchild; 1904 struct kfd_process *p; 1905 int r = 0; 1906 1907 p = container_of(svms, struct kfd_process, svms); 1908 1909 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1910 svms, prange->start, prange->last, start, last); 1911 1912 if (!p->xnack_enabled || 1913 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1914 int evicted_ranges; 1915 bool mapped = prange->mapped_to_gpu; 1916 1917 list_for_each_entry(pchild, &prange->child_list, child_list) { 1918 if (!pchild->mapped_to_gpu) 1919 continue; 1920 mapped = true; 1921 mutex_lock_nested(&pchild->lock, 1); 1922 if (pchild->start <= last && pchild->last >= start) { 1923 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1924 pchild->start, pchild->last); 1925 atomic_inc(&pchild->invalid); 1926 } 1927 mutex_unlock(&pchild->lock); 1928 } 1929 1930 if (!mapped) 1931 return r; 1932 1933 if (prange->start <= last && prange->last >= start) 1934 atomic_inc(&prange->invalid); 1935 1936 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1937 if (evicted_ranges != 1) 1938 return r; 1939 1940 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1941 prange->svms, prange->start, prange->last); 1942 1943 /* First eviction, stop the queues */ 1944 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1945 if (r) 1946 pr_debug("failed to quiesce KFD\n"); 1947 1948 pr_debug("schedule to restore svm %p ranges\n", svms); 1949 schedule_delayed_work(&svms->restore_work, 1950 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1951 } else { 1952 unsigned long s, l; 1953 uint32_t trigger; 1954 1955 if (event == MMU_NOTIFY_MIGRATE) 1956 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1957 else 1958 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1959 1960 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1961 prange->svms, start, last); 1962 list_for_each_entry(pchild, &prange->child_list, child_list) { 1963 mutex_lock_nested(&pchild->lock, 1); 1964 s = max(start, pchild->start); 1965 l = min(last, pchild->last); 1966 if (l >= s) 1967 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1968 mutex_unlock(&pchild->lock); 1969 } 1970 s = max(start, prange->start); 1971 l = min(last, prange->last); 1972 if (l >= s) 1973 svm_range_unmap_from_gpus(prange, s, l, trigger); 1974 } 1975 1976 return r; 1977 } 1978 1979 static struct svm_range *svm_range_clone(struct svm_range *old) 1980 { 1981 struct svm_range *new; 1982 1983 new = svm_range_new(old->svms, old->start, old->last, false); 1984 if (!new) 1985 return NULL; 1986 if (svm_range_copy_dma_addrs(new, old)) { 1987 svm_range_free(new, false); 1988 return NULL; 1989 } 1990 if (old->svm_bo) { 1991 new->ttm_res = old->ttm_res; 1992 new->offset = old->offset; 1993 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1994 spin_lock(&new->svm_bo->list_lock); 1995 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1996 spin_unlock(&new->svm_bo->list_lock); 1997 } 1998 new->flags = old->flags; 1999 new->preferred_loc = old->preferred_loc; 2000 new->prefetch_loc = old->prefetch_loc; 2001 new->actual_loc = old->actual_loc; 2002 new->granularity = old->granularity; 2003 new->mapped_to_gpu = old->mapped_to_gpu; 2004 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2005 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2006 2007 return new; 2008 } 2009 2010 void svm_range_set_max_pages(struct amdgpu_device *adev) 2011 { 2012 uint64_t max_pages; 2013 uint64_t pages, _pages; 2014 uint64_t min_pages = 0; 2015 int i, id; 2016 2017 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2018 if (adev->kfd.dev->nodes[i]->xcp) 2019 id = adev->kfd.dev->nodes[i]->xcp->id; 2020 else 2021 id = -1; 2022 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2023 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2024 pages = rounddown_pow_of_two(pages); 2025 min_pages = min_not_zero(min_pages, pages); 2026 } 2027 2028 do { 2029 max_pages = READ_ONCE(max_svm_range_pages); 2030 _pages = min_not_zero(max_pages, min_pages); 2031 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2032 } 2033 2034 static int 2035 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2036 uint64_t max_pages, struct list_head *insert_list, 2037 struct list_head *update_list) 2038 { 2039 struct svm_range *prange; 2040 uint64_t l; 2041 2042 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2043 max_pages, start, last); 2044 2045 while (last >= start) { 2046 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2047 2048 prange = svm_range_new(svms, start, l, true); 2049 if (!prange) 2050 return -ENOMEM; 2051 list_add(&prange->list, insert_list); 2052 list_add(&prange->update_list, update_list); 2053 2054 start = l + 1; 2055 } 2056 return 0; 2057 } 2058 2059 /** 2060 * svm_range_add - add svm range and handle overlap 2061 * @p: the range add to this process svms 2062 * @start: page size aligned 2063 * @size: page size aligned 2064 * @nattr: number of attributes 2065 * @attrs: array of attributes 2066 * @update_list: output, the ranges need validate and update GPU mapping 2067 * @insert_list: output, the ranges need insert to svms 2068 * @remove_list: output, the ranges are replaced and need remove from svms 2069 * @remap_list: output, remap unaligned svm ranges 2070 * 2071 * Check if the virtual address range has overlap with any existing ranges, 2072 * split partly overlapping ranges and add new ranges in the gaps. All changes 2073 * should be applied to the range_list and interval tree transactionally. If 2074 * any range split or allocation fails, the entire update fails. Therefore any 2075 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2076 * unchanged. 2077 * 2078 * If the transaction succeeds, the caller can update and insert clones and 2079 * new ranges, then free the originals. 2080 * 2081 * Otherwise the caller can free the clones and new ranges, while the old 2082 * svm_ranges remain unchanged. 2083 * 2084 * Context: Process context, caller must hold svms->lock 2085 * 2086 * Return: 2087 * 0 - OK, otherwise error code 2088 */ 2089 static int 2090 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2091 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2092 struct list_head *update_list, struct list_head *insert_list, 2093 struct list_head *remove_list, struct list_head *remap_list) 2094 { 2095 unsigned long last = start + size - 1UL; 2096 struct svm_range_list *svms = &p->svms; 2097 struct interval_tree_node *node; 2098 struct svm_range *prange; 2099 struct svm_range *tmp; 2100 struct list_head new_list; 2101 int r = 0; 2102 2103 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2104 2105 INIT_LIST_HEAD(update_list); 2106 INIT_LIST_HEAD(insert_list); 2107 INIT_LIST_HEAD(remove_list); 2108 INIT_LIST_HEAD(&new_list); 2109 INIT_LIST_HEAD(remap_list); 2110 2111 node = interval_tree_iter_first(&svms->objects, start, last); 2112 while (node) { 2113 struct interval_tree_node *next; 2114 unsigned long next_start; 2115 2116 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2117 node->last); 2118 2119 prange = container_of(node, struct svm_range, it_node); 2120 next = interval_tree_iter_next(node, start, last); 2121 next_start = min(node->last, last) + 1; 2122 2123 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2124 prange->mapped_to_gpu) { 2125 /* nothing to do */ 2126 } else if (node->start < start || node->last > last) { 2127 /* node intersects the update range and its attributes 2128 * will change. Clone and split it, apply updates only 2129 * to the overlapping part 2130 */ 2131 struct svm_range *old = prange; 2132 2133 prange = svm_range_clone(old); 2134 if (!prange) { 2135 r = -ENOMEM; 2136 goto out; 2137 } 2138 2139 list_add(&old->update_list, remove_list); 2140 list_add(&prange->list, insert_list); 2141 list_add(&prange->update_list, update_list); 2142 2143 if (node->start < start) { 2144 pr_debug("change old range start\n"); 2145 r = svm_range_split_head(prange, start, 2146 insert_list, remap_list); 2147 if (r) 2148 goto out; 2149 } 2150 if (node->last > last) { 2151 pr_debug("change old range last\n"); 2152 r = svm_range_split_tail(prange, last, 2153 insert_list, remap_list); 2154 if (r) 2155 goto out; 2156 } 2157 } else { 2158 /* The node is contained within start..last, 2159 * just update it 2160 */ 2161 list_add(&prange->update_list, update_list); 2162 } 2163 2164 /* insert a new node if needed */ 2165 if (node->start > start) { 2166 r = svm_range_split_new(svms, start, node->start - 1, 2167 READ_ONCE(max_svm_range_pages), 2168 &new_list, update_list); 2169 if (r) 2170 goto out; 2171 } 2172 2173 node = next; 2174 start = next_start; 2175 } 2176 2177 /* add a final range at the end if needed */ 2178 if (start <= last) 2179 r = svm_range_split_new(svms, start, last, 2180 READ_ONCE(max_svm_range_pages), 2181 &new_list, update_list); 2182 2183 out: 2184 if (r) { 2185 list_for_each_entry_safe(prange, tmp, insert_list, list) 2186 svm_range_free(prange, false); 2187 list_for_each_entry_safe(prange, tmp, &new_list, list) 2188 svm_range_free(prange, true); 2189 } else { 2190 list_splice(&new_list, insert_list); 2191 } 2192 2193 return r; 2194 } 2195 2196 static void 2197 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2198 struct svm_range *prange) 2199 { 2200 unsigned long start; 2201 unsigned long last; 2202 2203 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2204 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2205 2206 if (prange->start == start && prange->last == last) 2207 return; 2208 2209 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2210 prange->svms, prange, start, last, prange->start, 2211 prange->last); 2212 2213 if (start != 0 && last != 0) { 2214 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2215 svm_range_remove_notifier(prange); 2216 } 2217 prange->it_node.start = prange->start; 2218 prange->it_node.last = prange->last; 2219 2220 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2221 svm_range_add_notifier_locked(mm, prange); 2222 } 2223 2224 static void 2225 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2226 struct mm_struct *mm) 2227 { 2228 switch (prange->work_item.op) { 2229 case SVM_OP_NULL: 2230 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2231 svms, prange, prange->start, prange->last); 2232 break; 2233 case SVM_OP_UNMAP_RANGE: 2234 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2235 svms, prange, prange->start, prange->last); 2236 svm_range_unlink(prange); 2237 svm_range_remove_notifier(prange); 2238 svm_range_free(prange, true); 2239 break; 2240 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2241 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2242 svms, prange, prange->start, prange->last); 2243 svm_range_update_notifier_and_interval_tree(mm, prange); 2244 break; 2245 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2246 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2247 svms, prange, prange->start, prange->last); 2248 svm_range_update_notifier_and_interval_tree(mm, prange); 2249 /* TODO: implement deferred validation and mapping */ 2250 break; 2251 case SVM_OP_ADD_RANGE: 2252 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2253 prange->start, prange->last); 2254 svm_range_add_to_svms(prange); 2255 svm_range_add_notifier_locked(mm, prange); 2256 break; 2257 case SVM_OP_ADD_RANGE_AND_MAP: 2258 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2259 prange, prange->start, prange->last); 2260 svm_range_add_to_svms(prange); 2261 svm_range_add_notifier_locked(mm, prange); 2262 /* TODO: implement deferred validation and mapping */ 2263 break; 2264 default: 2265 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2266 prange->work_item.op); 2267 } 2268 } 2269 2270 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2271 { 2272 struct kfd_process_device *pdd; 2273 struct kfd_process *p; 2274 int drain; 2275 uint32_t i; 2276 2277 p = container_of(svms, struct kfd_process, svms); 2278 2279 restart: 2280 drain = atomic_read(&svms->drain_pagefaults); 2281 if (!drain) 2282 return; 2283 2284 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2285 pdd = p->pdds[i]; 2286 if (!pdd) 2287 continue; 2288 2289 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2290 2291 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2292 pdd->dev->adev->irq.retry_cam_enabled ? 2293 &pdd->dev->adev->irq.ih : 2294 &pdd->dev->adev->irq.ih1); 2295 2296 if (pdd->dev->adev->irq.retry_cam_enabled) 2297 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2298 &pdd->dev->adev->irq.ih_soft); 2299 2300 2301 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2302 } 2303 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2304 goto restart; 2305 } 2306 2307 static void svm_range_deferred_list_work(struct work_struct *work) 2308 { 2309 struct svm_range_list *svms; 2310 struct svm_range *prange; 2311 struct mm_struct *mm; 2312 2313 svms = container_of(work, struct svm_range_list, deferred_list_work); 2314 pr_debug("enter svms 0x%p\n", svms); 2315 2316 spin_lock(&svms->deferred_list_lock); 2317 while (!list_empty(&svms->deferred_range_list)) { 2318 prange = list_first_entry(&svms->deferred_range_list, 2319 struct svm_range, deferred_list); 2320 spin_unlock(&svms->deferred_list_lock); 2321 2322 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2323 prange->start, prange->last, prange->work_item.op); 2324 2325 mm = prange->work_item.mm; 2326 retry: 2327 mmap_write_lock(mm); 2328 2329 /* Checking for the need to drain retry faults must be inside 2330 * mmap write lock to serialize with munmap notifiers. 2331 */ 2332 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2333 mmap_write_unlock(mm); 2334 svm_range_drain_retry_fault(svms); 2335 goto retry; 2336 } 2337 2338 /* Remove from deferred_list must be inside mmap write lock, for 2339 * two race cases: 2340 * 1. unmap_from_cpu may change work_item.op and add the range 2341 * to deferred_list again, cause use after free bug. 2342 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2343 * lock and continue because deferred_list is empty, but 2344 * deferred_list work is actually waiting for mmap lock. 2345 */ 2346 spin_lock(&svms->deferred_list_lock); 2347 list_del_init(&prange->deferred_list); 2348 spin_unlock(&svms->deferred_list_lock); 2349 2350 mutex_lock(&svms->lock); 2351 mutex_lock(&prange->migrate_mutex); 2352 while (!list_empty(&prange->child_list)) { 2353 struct svm_range *pchild; 2354 2355 pchild = list_first_entry(&prange->child_list, 2356 struct svm_range, child_list); 2357 pr_debug("child prange 0x%p op %d\n", pchild, 2358 pchild->work_item.op); 2359 list_del_init(&pchild->child_list); 2360 svm_range_handle_list_op(svms, pchild, mm); 2361 } 2362 mutex_unlock(&prange->migrate_mutex); 2363 2364 svm_range_handle_list_op(svms, prange, mm); 2365 mutex_unlock(&svms->lock); 2366 mmap_write_unlock(mm); 2367 2368 /* Pairs with mmget in svm_range_add_list_work */ 2369 mmput(mm); 2370 2371 spin_lock(&svms->deferred_list_lock); 2372 } 2373 spin_unlock(&svms->deferred_list_lock); 2374 pr_debug("exit svms 0x%p\n", svms); 2375 } 2376 2377 void 2378 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2379 struct mm_struct *mm, enum svm_work_list_ops op) 2380 { 2381 spin_lock(&svms->deferred_list_lock); 2382 /* if prange is on the deferred list */ 2383 if (!list_empty(&prange->deferred_list)) { 2384 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2385 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2386 if (op != SVM_OP_NULL && 2387 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2388 prange->work_item.op = op; 2389 } else { 2390 prange->work_item.op = op; 2391 2392 /* Pairs with mmput in deferred_list_work */ 2393 mmget(mm); 2394 prange->work_item.mm = mm; 2395 list_add_tail(&prange->deferred_list, 2396 &prange->svms->deferred_range_list); 2397 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2398 prange, prange->start, prange->last, op); 2399 } 2400 spin_unlock(&svms->deferred_list_lock); 2401 } 2402 2403 void schedule_deferred_list_work(struct svm_range_list *svms) 2404 { 2405 spin_lock(&svms->deferred_list_lock); 2406 if (!list_empty(&svms->deferred_range_list)) 2407 schedule_work(&svms->deferred_list_work); 2408 spin_unlock(&svms->deferred_list_lock); 2409 } 2410 2411 static void 2412 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2413 struct svm_range *prange, unsigned long start, 2414 unsigned long last) 2415 { 2416 struct svm_range *head; 2417 struct svm_range *tail; 2418 2419 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2420 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2421 prange->start, prange->last); 2422 return; 2423 } 2424 if (start > prange->last || last < prange->start) 2425 return; 2426 2427 head = tail = prange; 2428 if (start > prange->start) 2429 svm_range_split(prange, prange->start, start - 1, &tail); 2430 if (last < tail->last) 2431 svm_range_split(tail, last + 1, tail->last, &head); 2432 2433 if (head != prange && tail != prange) { 2434 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2435 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2436 } else if (tail != prange) { 2437 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2438 } else if (head != prange) { 2439 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2440 } else if (parent != prange) { 2441 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2442 } 2443 } 2444 2445 static void 2446 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2447 unsigned long start, unsigned long last) 2448 { 2449 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2450 struct svm_range_list *svms; 2451 struct svm_range *pchild; 2452 struct kfd_process *p; 2453 unsigned long s, l; 2454 bool unmap_parent; 2455 2456 p = kfd_lookup_process_by_mm(mm); 2457 if (!p) 2458 return; 2459 svms = &p->svms; 2460 2461 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2462 prange, prange->start, prange->last, start, last); 2463 2464 /* Make sure pending page faults are drained in the deferred worker 2465 * before the range is freed to avoid straggler interrupts on 2466 * unmapped memory causing "phantom faults". 2467 */ 2468 atomic_inc(&svms->drain_pagefaults); 2469 2470 unmap_parent = start <= prange->start && last >= prange->last; 2471 2472 list_for_each_entry(pchild, &prange->child_list, child_list) { 2473 mutex_lock_nested(&pchild->lock, 1); 2474 s = max(start, pchild->start); 2475 l = min(last, pchild->last); 2476 if (l >= s) 2477 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2478 svm_range_unmap_split(mm, prange, pchild, start, last); 2479 mutex_unlock(&pchild->lock); 2480 } 2481 s = max(start, prange->start); 2482 l = min(last, prange->last); 2483 if (l >= s) 2484 svm_range_unmap_from_gpus(prange, s, l, trigger); 2485 svm_range_unmap_split(mm, prange, prange, start, last); 2486 2487 if (unmap_parent) 2488 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2489 else 2490 svm_range_add_list_work(svms, prange, mm, 2491 SVM_OP_UPDATE_RANGE_NOTIFIER); 2492 schedule_deferred_list_work(svms); 2493 2494 kfd_unref_process(p); 2495 } 2496 2497 /** 2498 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2499 * @mni: mmu_interval_notifier struct 2500 * @range: mmu_notifier_range struct 2501 * @cur_seq: value to pass to mmu_interval_set_seq() 2502 * 2503 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2504 * is from migration, or CPU page invalidation callback. 2505 * 2506 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2507 * work thread, and split prange if only part of prange is unmapped. 2508 * 2509 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2510 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2511 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2512 * update GPU mapping to recover. 2513 * 2514 * Context: mmap lock, notifier_invalidate_start lock are held 2515 * for invalidate event, prange lock is held if this is from migration 2516 */ 2517 static bool 2518 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2519 const struct mmu_notifier_range *range, 2520 unsigned long cur_seq) 2521 { 2522 struct svm_range *prange; 2523 unsigned long start; 2524 unsigned long last; 2525 2526 if (range->event == MMU_NOTIFY_RELEASE) 2527 return true; 2528 if (!mmget_not_zero(mni->mm)) 2529 return true; 2530 2531 start = mni->interval_tree.start; 2532 last = mni->interval_tree.last; 2533 start = max(start, range->start) >> PAGE_SHIFT; 2534 last = min(last, range->end - 1) >> PAGE_SHIFT; 2535 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2536 start, last, range->start >> PAGE_SHIFT, 2537 (range->end - 1) >> PAGE_SHIFT, 2538 mni->interval_tree.start >> PAGE_SHIFT, 2539 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2540 2541 prange = container_of(mni, struct svm_range, notifier); 2542 2543 svm_range_lock(prange); 2544 mmu_interval_set_seq(mni, cur_seq); 2545 2546 switch (range->event) { 2547 case MMU_NOTIFY_UNMAP: 2548 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2549 break; 2550 default: 2551 svm_range_evict(prange, mni->mm, start, last, range->event); 2552 break; 2553 } 2554 2555 svm_range_unlock(prange); 2556 mmput(mni->mm); 2557 2558 return true; 2559 } 2560 2561 /** 2562 * svm_range_from_addr - find svm range from fault address 2563 * @svms: svm range list header 2564 * @addr: address to search range interval tree, in pages 2565 * @parent: parent range if range is on child list 2566 * 2567 * Context: The caller must hold svms->lock 2568 * 2569 * Return: the svm_range found or NULL 2570 */ 2571 struct svm_range * 2572 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2573 struct svm_range **parent) 2574 { 2575 struct interval_tree_node *node; 2576 struct svm_range *prange; 2577 struct svm_range *pchild; 2578 2579 node = interval_tree_iter_first(&svms->objects, addr, addr); 2580 if (!node) 2581 return NULL; 2582 2583 prange = container_of(node, struct svm_range, it_node); 2584 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2585 addr, prange->start, prange->last, node->start, node->last); 2586 2587 if (addr >= prange->start && addr <= prange->last) { 2588 if (parent) 2589 *parent = prange; 2590 return prange; 2591 } 2592 list_for_each_entry(pchild, &prange->child_list, child_list) 2593 if (addr >= pchild->start && addr <= pchild->last) { 2594 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2595 addr, pchild->start, pchild->last); 2596 if (parent) 2597 *parent = prange; 2598 return pchild; 2599 } 2600 2601 return NULL; 2602 } 2603 2604 /* svm_range_best_restore_location - decide the best fault restore location 2605 * @prange: svm range structure 2606 * @adev: the GPU on which vm fault happened 2607 * 2608 * This is only called when xnack is on, to decide the best location to restore 2609 * the range mapping after GPU vm fault. Caller uses the best location to do 2610 * migration if actual loc is not best location, then update GPU page table 2611 * mapping to the best location. 2612 * 2613 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2614 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2615 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2616 * if range actual loc is cpu, best_loc is cpu 2617 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2618 * range actual loc. 2619 * Otherwise, GPU no access, best_loc is -1. 2620 * 2621 * Return: 2622 * -1 means vm fault GPU no access 2623 * 0 for CPU or GPU id 2624 */ 2625 static int32_t 2626 svm_range_best_restore_location(struct svm_range *prange, 2627 struct kfd_node *node, 2628 int32_t *gpuidx) 2629 { 2630 struct kfd_node *bo_node, *preferred_node; 2631 struct kfd_process *p; 2632 uint32_t gpuid; 2633 int r; 2634 2635 p = container_of(prange->svms, struct kfd_process, svms); 2636 2637 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2638 if (r < 0) { 2639 pr_debug("failed to get gpuid from kgd\n"); 2640 return -1; 2641 } 2642 2643 if (node->adev->gmc.is_app_apu) 2644 return 0; 2645 2646 if (prange->preferred_loc == gpuid || 2647 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2648 return prange->preferred_loc; 2649 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2650 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2651 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2652 return prange->preferred_loc; 2653 /* fall through */ 2654 } 2655 2656 if (test_bit(*gpuidx, prange->bitmap_access)) 2657 return gpuid; 2658 2659 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2660 if (!prange->actual_loc) 2661 return 0; 2662 2663 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2664 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2665 return prange->actual_loc; 2666 else 2667 return 0; 2668 } 2669 2670 return -1; 2671 } 2672 2673 static int 2674 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2675 unsigned long *start, unsigned long *last, 2676 bool *is_heap_stack) 2677 { 2678 struct vm_area_struct *vma; 2679 struct interval_tree_node *node; 2680 unsigned long start_limit, end_limit; 2681 2682 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2683 if (!vma) { 2684 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2685 return -EFAULT; 2686 } 2687 2688 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2689 2690 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2691 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2692 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2693 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2694 /* First range that starts after the fault address */ 2695 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2696 if (node) { 2697 end_limit = min(end_limit, node->start); 2698 /* Last range that ends before the fault address */ 2699 node = container_of(rb_prev(&node->rb), 2700 struct interval_tree_node, rb); 2701 } else { 2702 /* Last range must end before addr because 2703 * there was no range after addr 2704 */ 2705 node = container_of(rb_last(&p->svms.objects.rb_root), 2706 struct interval_tree_node, rb); 2707 } 2708 if (node) { 2709 if (node->last >= addr) { 2710 WARN(1, "Overlap with prev node and page fault addr\n"); 2711 return -EFAULT; 2712 } 2713 start_limit = max(start_limit, node->last + 1); 2714 } 2715 2716 *start = start_limit; 2717 *last = end_limit - 1; 2718 2719 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2720 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2721 *start, *last, *is_heap_stack); 2722 2723 return 0; 2724 } 2725 2726 static int 2727 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2728 uint64_t *bo_s, uint64_t *bo_l) 2729 { 2730 struct amdgpu_bo_va_mapping *mapping; 2731 struct interval_tree_node *node; 2732 struct amdgpu_bo *bo = NULL; 2733 unsigned long userptr; 2734 uint32_t i; 2735 int r; 2736 2737 for (i = 0; i < p->n_pdds; i++) { 2738 struct amdgpu_vm *vm; 2739 2740 if (!p->pdds[i]->drm_priv) 2741 continue; 2742 2743 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2744 r = amdgpu_bo_reserve(vm->root.bo, false); 2745 if (r) 2746 return r; 2747 2748 /* Check userptr by searching entire vm->va interval tree */ 2749 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2750 while (node) { 2751 mapping = container_of((struct rb_node *)node, 2752 struct amdgpu_bo_va_mapping, rb); 2753 bo = mapping->bo_va->base.bo; 2754 2755 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2756 start << PAGE_SHIFT, 2757 last << PAGE_SHIFT, 2758 &userptr)) { 2759 node = interval_tree_iter_next(node, 0, ~0ULL); 2760 continue; 2761 } 2762 2763 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2764 start, last); 2765 if (bo_s && bo_l) { 2766 *bo_s = userptr >> PAGE_SHIFT; 2767 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2768 } 2769 amdgpu_bo_unreserve(vm->root.bo); 2770 return -EADDRINUSE; 2771 } 2772 amdgpu_bo_unreserve(vm->root.bo); 2773 } 2774 return 0; 2775 } 2776 2777 static struct 2778 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2779 struct kfd_process *p, 2780 struct mm_struct *mm, 2781 int64_t addr) 2782 { 2783 struct svm_range *prange = NULL; 2784 unsigned long start, last; 2785 uint32_t gpuid, gpuidx; 2786 bool is_heap_stack; 2787 uint64_t bo_s = 0; 2788 uint64_t bo_l = 0; 2789 int r; 2790 2791 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2792 &is_heap_stack)) 2793 return NULL; 2794 2795 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2796 if (r != -EADDRINUSE) 2797 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2798 2799 if (r == -EADDRINUSE) { 2800 if (addr >= bo_s && addr <= bo_l) 2801 return NULL; 2802 2803 /* Create one page svm range if 2MB range overlapping */ 2804 start = addr; 2805 last = addr; 2806 } 2807 2808 prange = svm_range_new(&p->svms, start, last, true); 2809 if (!prange) { 2810 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2811 return NULL; 2812 } 2813 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2814 pr_debug("failed to get gpuid from kgd\n"); 2815 svm_range_free(prange, true); 2816 return NULL; 2817 } 2818 2819 if (is_heap_stack) 2820 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2821 2822 svm_range_add_to_svms(prange); 2823 svm_range_add_notifier_locked(mm, prange); 2824 2825 return prange; 2826 } 2827 2828 /* svm_range_skip_recover - decide if prange can be recovered 2829 * @prange: svm range structure 2830 * 2831 * GPU vm retry fault handle skip recover the range for cases: 2832 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2833 * deferred list work will drain the stale fault before free the prange. 2834 * 2. prange is on deferred list to add interval notifier after split, or 2835 * 3. prange is child range, it is split from parent prange, recover later 2836 * after interval notifier is added. 2837 * 2838 * Return: true to skip recover, false to recover 2839 */ 2840 static bool svm_range_skip_recover(struct svm_range *prange) 2841 { 2842 struct svm_range_list *svms = prange->svms; 2843 2844 spin_lock(&svms->deferred_list_lock); 2845 if (list_empty(&prange->deferred_list) && 2846 list_empty(&prange->child_list)) { 2847 spin_unlock(&svms->deferred_list_lock); 2848 return false; 2849 } 2850 spin_unlock(&svms->deferred_list_lock); 2851 2852 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2853 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2854 svms, prange, prange->start, prange->last); 2855 return true; 2856 } 2857 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2858 prange->work_item.op == SVM_OP_ADD_RANGE) { 2859 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2860 svms, prange, prange->start, prange->last); 2861 return true; 2862 } 2863 return false; 2864 } 2865 2866 static void 2867 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2868 int32_t gpuidx) 2869 { 2870 struct kfd_process_device *pdd; 2871 2872 /* fault is on different page of same range 2873 * or fault is skipped to recover later 2874 * or fault is on invalid virtual address 2875 */ 2876 if (gpuidx == MAX_GPU_INSTANCE) { 2877 uint32_t gpuid; 2878 int r; 2879 2880 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2881 if (r < 0) 2882 return; 2883 } 2884 2885 /* fault is recovered 2886 * or fault cannot recover because GPU no access on the range 2887 */ 2888 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2889 if (pdd) 2890 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2891 } 2892 2893 static bool 2894 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2895 { 2896 unsigned long requested = VM_READ; 2897 2898 if (write_fault) 2899 requested |= VM_WRITE; 2900 2901 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2902 vma->vm_flags); 2903 return (vma->vm_flags & requested) == requested; 2904 } 2905 2906 int 2907 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2908 uint32_t vmid, uint32_t node_id, 2909 uint64_t addr, bool write_fault) 2910 { 2911 struct mm_struct *mm = NULL; 2912 struct svm_range_list *svms; 2913 struct svm_range *prange; 2914 struct kfd_process *p; 2915 ktime_t timestamp = ktime_get_boottime(); 2916 struct kfd_node *node; 2917 int32_t best_loc; 2918 int32_t gpuidx = MAX_GPU_INSTANCE; 2919 bool write_locked = false; 2920 struct vm_area_struct *vma; 2921 bool migration = false; 2922 int r = 0; 2923 2924 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2925 pr_debug("device does not support SVM\n"); 2926 return -EFAULT; 2927 } 2928 2929 p = kfd_lookup_process_by_pasid(pasid); 2930 if (!p) { 2931 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2932 return 0; 2933 } 2934 svms = &p->svms; 2935 2936 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2937 2938 if (atomic_read(&svms->drain_pagefaults)) { 2939 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2940 r = 0; 2941 goto out; 2942 } 2943 2944 if (!p->xnack_enabled) { 2945 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2946 r = -EFAULT; 2947 goto out; 2948 } 2949 2950 /* p->lead_thread is available as kfd_process_wq_release flush the work 2951 * before releasing task ref. 2952 */ 2953 mm = get_task_mm(p->lead_thread); 2954 if (!mm) { 2955 pr_debug("svms 0x%p failed to get mm\n", svms); 2956 r = 0; 2957 goto out; 2958 } 2959 2960 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2961 if (!node) { 2962 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2963 vmid); 2964 r = -EFAULT; 2965 goto out; 2966 } 2967 mmap_read_lock(mm); 2968 retry_write_locked: 2969 mutex_lock(&svms->lock); 2970 prange = svm_range_from_addr(svms, addr, NULL); 2971 if (!prange) { 2972 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2973 svms, addr); 2974 if (!write_locked) { 2975 /* Need the write lock to create new range with MMU notifier. 2976 * Also flush pending deferred work to make sure the interval 2977 * tree is up to date before we add a new range 2978 */ 2979 mutex_unlock(&svms->lock); 2980 mmap_read_unlock(mm); 2981 mmap_write_lock(mm); 2982 write_locked = true; 2983 goto retry_write_locked; 2984 } 2985 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2986 if (!prange) { 2987 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2988 svms, addr); 2989 mmap_write_downgrade(mm); 2990 r = -EFAULT; 2991 goto out_unlock_svms; 2992 } 2993 } 2994 if (write_locked) 2995 mmap_write_downgrade(mm); 2996 2997 mutex_lock(&prange->migrate_mutex); 2998 2999 if (svm_range_skip_recover(prange)) { 3000 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3001 r = 0; 3002 goto out_unlock_range; 3003 } 3004 3005 /* skip duplicate vm fault on different pages of same range */ 3006 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3007 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3008 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3009 svms, prange->start, prange->last); 3010 r = 0; 3011 goto out_unlock_range; 3012 } 3013 3014 /* __do_munmap removed VMA, return success as we are handling stale 3015 * retry fault. 3016 */ 3017 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3018 if (!vma) { 3019 pr_debug("address 0x%llx VMA is removed\n", addr); 3020 r = 0; 3021 goto out_unlock_range; 3022 } 3023 3024 if (!svm_fault_allowed(vma, write_fault)) { 3025 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3026 write_fault ? "write" : "read"); 3027 r = -EPERM; 3028 goto out_unlock_range; 3029 } 3030 3031 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3032 if (best_loc == -1) { 3033 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3034 svms, prange->start, prange->last); 3035 r = -EACCES; 3036 goto out_unlock_range; 3037 } 3038 3039 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3040 svms, prange->start, prange->last, best_loc, 3041 prange->actual_loc); 3042 3043 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3044 write_fault, timestamp); 3045 3046 if (prange->actual_loc != best_loc) { 3047 migration = true; 3048 if (best_loc) { 3049 r = svm_migrate_to_vram(prange, best_loc, mm, 3050 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3051 if (r) { 3052 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3053 r, addr); 3054 /* Fallback to system memory if migration to 3055 * VRAM failed 3056 */ 3057 if (prange->actual_loc) 3058 r = svm_migrate_vram_to_ram(prange, mm, 3059 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3060 NULL); 3061 else 3062 r = 0; 3063 } 3064 } else { 3065 r = svm_migrate_vram_to_ram(prange, mm, 3066 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3067 NULL); 3068 } 3069 if (r) { 3070 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3071 r, svms, prange->start, prange->last); 3072 goto out_unlock_range; 3073 } 3074 } 3075 3076 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3077 if (r) 3078 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3079 r, svms, prange->start, prange->last); 3080 3081 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3082 migration); 3083 3084 out_unlock_range: 3085 mutex_unlock(&prange->migrate_mutex); 3086 out_unlock_svms: 3087 mutex_unlock(&svms->lock); 3088 mmap_read_unlock(mm); 3089 3090 svm_range_count_fault(node, p, gpuidx); 3091 3092 mmput(mm); 3093 out: 3094 kfd_unref_process(p); 3095 3096 if (r == -EAGAIN) { 3097 pr_debug("recover vm fault later\n"); 3098 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3099 r = 0; 3100 } 3101 return r; 3102 } 3103 3104 int 3105 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3106 { 3107 struct svm_range *prange, *pchild; 3108 uint64_t reserved_size = 0; 3109 uint64_t size; 3110 int r = 0; 3111 3112 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3113 3114 mutex_lock(&p->svms.lock); 3115 3116 list_for_each_entry(prange, &p->svms.list, list) { 3117 svm_range_lock(prange); 3118 list_for_each_entry(pchild, &prange->child_list, child_list) { 3119 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3120 if (xnack_enabled) { 3121 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3122 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3123 } else { 3124 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3125 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3126 if (r) 3127 goto out_unlock; 3128 reserved_size += size; 3129 } 3130 } 3131 3132 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3133 if (xnack_enabled) { 3134 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3135 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3136 } else { 3137 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3138 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3139 if (r) 3140 goto out_unlock; 3141 reserved_size += size; 3142 } 3143 out_unlock: 3144 svm_range_unlock(prange); 3145 if (r) 3146 break; 3147 } 3148 3149 if (r) 3150 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3151 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3152 else 3153 /* Change xnack mode must be inside svms lock, to avoid race with 3154 * svm_range_deferred_list_work unreserve memory in parallel. 3155 */ 3156 p->xnack_enabled = xnack_enabled; 3157 3158 mutex_unlock(&p->svms.lock); 3159 return r; 3160 } 3161 3162 void svm_range_list_fini(struct kfd_process *p) 3163 { 3164 struct svm_range *prange; 3165 struct svm_range *next; 3166 3167 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3168 3169 cancel_delayed_work_sync(&p->svms.restore_work); 3170 3171 /* Ensure list work is finished before process is destroyed */ 3172 flush_work(&p->svms.deferred_list_work); 3173 3174 /* 3175 * Ensure no retry fault comes in afterwards, as page fault handler will 3176 * not find kfd process and take mm lock to recover fault. 3177 */ 3178 atomic_inc(&p->svms.drain_pagefaults); 3179 svm_range_drain_retry_fault(&p->svms); 3180 3181 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3182 svm_range_unlink(prange); 3183 svm_range_remove_notifier(prange); 3184 svm_range_free(prange, true); 3185 } 3186 3187 mutex_destroy(&p->svms.lock); 3188 3189 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3190 } 3191 3192 int svm_range_list_init(struct kfd_process *p) 3193 { 3194 struct svm_range_list *svms = &p->svms; 3195 int i; 3196 3197 svms->objects = RB_ROOT_CACHED; 3198 mutex_init(&svms->lock); 3199 INIT_LIST_HEAD(&svms->list); 3200 atomic_set(&svms->evicted_ranges, 0); 3201 atomic_set(&svms->drain_pagefaults, 0); 3202 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3203 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3204 INIT_LIST_HEAD(&svms->deferred_range_list); 3205 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3206 spin_lock_init(&svms->deferred_list_lock); 3207 3208 for (i = 0; i < p->n_pdds; i++) 3209 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3210 bitmap_set(svms->bitmap_supported, i, 1); 3211 3212 return 0; 3213 } 3214 3215 /** 3216 * svm_range_check_vm - check if virtual address range mapped already 3217 * @p: current kfd_process 3218 * @start: range start address, in pages 3219 * @last: range last address, in pages 3220 * @bo_s: mapping start address in pages if address range already mapped 3221 * @bo_l: mapping last address in pages if address range already mapped 3222 * 3223 * The purpose is to avoid virtual address ranges already allocated by 3224 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3225 * It looks for each pdd in the kfd_process. 3226 * 3227 * Context: Process context 3228 * 3229 * Return 0 - OK, if the range is not mapped. 3230 * Otherwise error code: 3231 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3232 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3233 * a signal. Release all buffer reservations and return to user-space. 3234 */ 3235 static int 3236 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3237 uint64_t *bo_s, uint64_t *bo_l) 3238 { 3239 struct amdgpu_bo_va_mapping *mapping; 3240 struct interval_tree_node *node; 3241 uint32_t i; 3242 int r; 3243 3244 for (i = 0; i < p->n_pdds; i++) { 3245 struct amdgpu_vm *vm; 3246 3247 if (!p->pdds[i]->drm_priv) 3248 continue; 3249 3250 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3251 r = amdgpu_bo_reserve(vm->root.bo, false); 3252 if (r) 3253 return r; 3254 3255 node = interval_tree_iter_first(&vm->va, start, last); 3256 if (node) { 3257 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3258 start, last); 3259 mapping = container_of((struct rb_node *)node, 3260 struct amdgpu_bo_va_mapping, rb); 3261 if (bo_s && bo_l) { 3262 *bo_s = mapping->start; 3263 *bo_l = mapping->last; 3264 } 3265 amdgpu_bo_unreserve(vm->root.bo); 3266 return -EADDRINUSE; 3267 } 3268 amdgpu_bo_unreserve(vm->root.bo); 3269 } 3270 3271 return 0; 3272 } 3273 3274 /** 3275 * svm_range_is_valid - check if virtual address range is valid 3276 * @p: current kfd_process 3277 * @start: range start address, in pages 3278 * @size: range size, in pages 3279 * 3280 * Valid virtual address range means it belongs to one or more VMAs 3281 * 3282 * Context: Process context 3283 * 3284 * Return: 3285 * 0 - OK, otherwise error code 3286 */ 3287 static int 3288 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3289 { 3290 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3291 struct vm_area_struct *vma; 3292 unsigned long end; 3293 unsigned long start_unchg = start; 3294 3295 start <<= PAGE_SHIFT; 3296 end = start + (size << PAGE_SHIFT); 3297 do { 3298 vma = vma_lookup(p->mm, start); 3299 if (!vma || (vma->vm_flags & device_vma)) 3300 return -EFAULT; 3301 start = min(end, vma->vm_end); 3302 } while (start < end); 3303 3304 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3305 NULL); 3306 } 3307 3308 /** 3309 * svm_range_best_prefetch_location - decide the best prefetch location 3310 * @prange: svm range structure 3311 * 3312 * For xnack off: 3313 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3314 * can be CPU or GPU. 3315 * 3316 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3317 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3318 * the best prefetch location is always CPU, because GPU can not have coherent 3319 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3320 * 3321 * For xnack on: 3322 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3323 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3324 * 3325 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3326 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3327 * prefetch location is always CPU. 3328 * 3329 * Context: Process context 3330 * 3331 * Return: 3332 * 0 for CPU or GPU id 3333 */ 3334 static uint32_t 3335 svm_range_best_prefetch_location(struct svm_range *prange) 3336 { 3337 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3338 uint32_t best_loc = prange->prefetch_loc; 3339 struct kfd_process_device *pdd; 3340 struct kfd_node *bo_node; 3341 struct kfd_process *p; 3342 uint32_t gpuidx; 3343 3344 p = container_of(prange->svms, struct kfd_process, svms); 3345 3346 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3347 goto out; 3348 3349 bo_node = svm_range_get_node_by_id(prange, best_loc); 3350 if (!bo_node) { 3351 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3352 best_loc = 0; 3353 goto out; 3354 } 3355 3356 if (bo_node->adev->gmc.is_app_apu) { 3357 best_loc = 0; 3358 goto out; 3359 } 3360 3361 if (p->xnack_enabled) 3362 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3363 else 3364 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3365 MAX_GPU_INSTANCE); 3366 3367 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3368 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3369 if (!pdd) { 3370 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3371 continue; 3372 } 3373 3374 if (pdd->dev->adev == bo_node->adev) 3375 continue; 3376 3377 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3378 best_loc = 0; 3379 break; 3380 } 3381 } 3382 3383 out: 3384 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3385 p->xnack_enabled, &p->svms, prange->start, prange->last, 3386 best_loc); 3387 3388 return best_loc; 3389 } 3390 3391 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3392 * @mm: current process mm_struct 3393 * @prange: svm range structure 3394 * @migrated: output, true if migration is triggered 3395 * 3396 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3397 * from ram to vram. 3398 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3399 * from vram to ram. 3400 * 3401 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3402 * and restore work: 3403 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3404 * stops all queues, schedule restore work 3405 * 2. svm_range_restore_work wait for migration is done by 3406 * a. svm_range_validate_vram takes prange->migrate_mutex 3407 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3408 * 3. restore work update mappings of GPU, resume all queues. 3409 * 3410 * Context: Process context 3411 * 3412 * Return: 3413 * 0 - OK, otherwise - error code of migration 3414 */ 3415 static int 3416 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3417 bool *migrated) 3418 { 3419 uint32_t best_loc; 3420 int r = 0; 3421 3422 *migrated = false; 3423 best_loc = svm_range_best_prefetch_location(prange); 3424 3425 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3426 best_loc == prange->actual_loc) 3427 return 0; 3428 3429 if (!best_loc) { 3430 r = svm_migrate_vram_to_ram(prange, mm, 3431 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3432 *migrated = !r; 3433 return r; 3434 } 3435 3436 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3437 *migrated = !r; 3438 3439 return r; 3440 } 3441 3442 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3443 { 3444 if (!fence) 3445 return -EINVAL; 3446 3447 if (dma_fence_is_signaled(&fence->base)) 3448 return 0; 3449 3450 if (fence->svm_bo) { 3451 WRITE_ONCE(fence->svm_bo->evicting, 1); 3452 schedule_work(&fence->svm_bo->eviction_work); 3453 } 3454 3455 return 0; 3456 } 3457 3458 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3459 { 3460 struct svm_range_bo *svm_bo; 3461 struct mm_struct *mm; 3462 int r = 0; 3463 3464 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3465 if (!svm_bo_ref_unless_zero(svm_bo)) 3466 return; /* svm_bo was freed while eviction was pending */ 3467 3468 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3469 mm = svm_bo->eviction_fence->mm; 3470 } else { 3471 svm_range_bo_unref(svm_bo); 3472 return; 3473 } 3474 3475 mmap_read_lock(mm); 3476 spin_lock(&svm_bo->list_lock); 3477 while (!list_empty(&svm_bo->range_list) && !r) { 3478 struct svm_range *prange = 3479 list_first_entry(&svm_bo->range_list, 3480 struct svm_range, svm_bo_list); 3481 int retries = 3; 3482 3483 list_del_init(&prange->svm_bo_list); 3484 spin_unlock(&svm_bo->list_lock); 3485 3486 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3487 prange->start, prange->last); 3488 3489 mutex_lock(&prange->migrate_mutex); 3490 do { 3491 r = svm_migrate_vram_to_ram(prange, mm, 3492 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3493 } while (!r && prange->actual_loc && --retries); 3494 3495 if (!r && prange->actual_loc) 3496 pr_info_once("Migration failed during eviction"); 3497 3498 if (!prange->actual_loc) { 3499 mutex_lock(&prange->lock); 3500 prange->svm_bo = NULL; 3501 mutex_unlock(&prange->lock); 3502 } 3503 mutex_unlock(&prange->migrate_mutex); 3504 3505 spin_lock(&svm_bo->list_lock); 3506 } 3507 spin_unlock(&svm_bo->list_lock); 3508 mmap_read_unlock(mm); 3509 mmput(mm); 3510 3511 dma_fence_signal(&svm_bo->eviction_fence->base); 3512 3513 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3514 * has been called in svm_migrate_vram_to_ram 3515 */ 3516 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3517 svm_range_bo_unref(svm_bo); 3518 } 3519 3520 static int 3521 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3522 uint64_t start, uint64_t size, uint32_t nattr, 3523 struct kfd_ioctl_svm_attribute *attrs) 3524 { 3525 struct amdkfd_process_info *process_info = p->kgd_process_info; 3526 struct list_head update_list; 3527 struct list_head insert_list; 3528 struct list_head remove_list; 3529 struct list_head remap_list; 3530 struct svm_range_list *svms; 3531 struct svm_range *prange; 3532 struct svm_range *next; 3533 bool update_mapping = false; 3534 bool flush_tlb; 3535 int r, ret = 0; 3536 3537 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3538 p->pasid, &p->svms, start, start + size - 1, size); 3539 3540 r = svm_range_check_attr(p, nattr, attrs); 3541 if (r) 3542 return r; 3543 3544 svms = &p->svms; 3545 3546 mutex_lock(&process_info->lock); 3547 3548 svm_range_list_lock_and_flush_work(svms, mm); 3549 3550 r = svm_range_is_valid(p, start, size); 3551 if (r) { 3552 pr_debug("invalid range r=%d\n", r); 3553 mmap_write_unlock(mm); 3554 goto out; 3555 } 3556 3557 mutex_lock(&svms->lock); 3558 3559 /* Add new range and split existing ranges as needed */ 3560 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3561 &insert_list, &remove_list, &remap_list); 3562 if (r) { 3563 mutex_unlock(&svms->lock); 3564 mmap_write_unlock(mm); 3565 goto out; 3566 } 3567 /* Apply changes as a transaction */ 3568 list_for_each_entry_safe(prange, next, &insert_list, list) { 3569 svm_range_add_to_svms(prange); 3570 svm_range_add_notifier_locked(mm, prange); 3571 } 3572 list_for_each_entry(prange, &update_list, update_list) { 3573 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3574 /* TODO: unmap ranges from GPU that lost access */ 3575 } 3576 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3577 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3578 prange->svms, prange, prange->start, 3579 prange->last); 3580 svm_range_unlink(prange); 3581 svm_range_remove_notifier(prange); 3582 svm_range_free(prange, false); 3583 } 3584 3585 mmap_write_downgrade(mm); 3586 /* Trigger migrations and revalidate and map to GPUs as needed. If 3587 * this fails we may be left with partially completed actions. There 3588 * is no clean way of rolling back to the previous state in such a 3589 * case because the rollback wouldn't be guaranteed to work either. 3590 */ 3591 list_for_each_entry(prange, &update_list, update_list) { 3592 bool migrated; 3593 3594 mutex_lock(&prange->migrate_mutex); 3595 3596 r = svm_range_trigger_migration(mm, prange, &migrated); 3597 if (r) 3598 goto out_unlock_range; 3599 3600 if (migrated && (!p->xnack_enabled || 3601 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3602 prange->mapped_to_gpu) { 3603 pr_debug("restore_work will update mappings of GPUs\n"); 3604 mutex_unlock(&prange->migrate_mutex); 3605 continue; 3606 } 3607 3608 if (!migrated && !update_mapping) { 3609 mutex_unlock(&prange->migrate_mutex); 3610 continue; 3611 } 3612 3613 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3614 3615 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3616 true, true, flush_tlb); 3617 if (r) 3618 pr_debug("failed %d to map svm range\n", r); 3619 3620 out_unlock_range: 3621 mutex_unlock(&prange->migrate_mutex); 3622 if (r) 3623 ret = r; 3624 } 3625 3626 list_for_each_entry(prange, &remap_list, update_list) { 3627 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3628 prange, prange->start, prange->last); 3629 mutex_lock(&prange->migrate_mutex); 3630 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3631 true, true, prange->mapped_to_gpu); 3632 if (r) 3633 pr_debug("failed %d on remap svm range\n", r); 3634 mutex_unlock(&prange->migrate_mutex); 3635 if (r) 3636 ret = r; 3637 } 3638 3639 dynamic_svm_range_dump(svms); 3640 3641 mutex_unlock(&svms->lock); 3642 mmap_read_unlock(mm); 3643 out: 3644 mutex_unlock(&process_info->lock); 3645 3646 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3647 &p->svms, start, start + size - 1, r); 3648 3649 return ret ? ret : r; 3650 } 3651 3652 static int 3653 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3654 uint64_t start, uint64_t size, uint32_t nattr, 3655 struct kfd_ioctl_svm_attribute *attrs) 3656 { 3657 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3658 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3659 bool get_preferred_loc = false; 3660 bool get_prefetch_loc = false; 3661 bool get_granularity = false; 3662 bool get_accessible = false; 3663 bool get_flags = false; 3664 uint64_t last = start + size - 1UL; 3665 uint8_t granularity = 0xff; 3666 struct interval_tree_node *node; 3667 struct svm_range_list *svms; 3668 struct svm_range *prange; 3669 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3670 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3671 uint32_t flags_and = 0xffffffff; 3672 uint32_t flags_or = 0; 3673 int gpuidx; 3674 uint32_t i; 3675 int r = 0; 3676 3677 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3678 start + size - 1, nattr); 3679 3680 /* Flush pending deferred work to avoid racing with deferred actions from 3681 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3682 * can still race with get_attr because we don't hold the mmap lock. But that 3683 * would be a race condition in the application anyway, and undefined 3684 * behaviour is acceptable in that case. 3685 */ 3686 flush_work(&p->svms.deferred_list_work); 3687 3688 mmap_read_lock(mm); 3689 r = svm_range_is_valid(p, start, size); 3690 mmap_read_unlock(mm); 3691 if (r) { 3692 pr_debug("invalid range r=%d\n", r); 3693 return r; 3694 } 3695 3696 for (i = 0; i < nattr; i++) { 3697 switch (attrs[i].type) { 3698 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3699 get_preferred_loc = true; 3700 break; 3701 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3702 get_prefetch_loc = true; 3703 break; 3704 case KFD_IOCTL_SVM_ATTR_ACCESS: 3705 get_accessible = true; 3706 break; 3707 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3708 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3709 get_flags = true; 3710 break; 3711 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3712 get_granularity = true; 3713 break; 3714 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3715 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3716 fallthrough; 3717 default: 3718 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3719 return -EINVAL; 3720 } 3721 } 3722 3723 svms = &p->svms; 3724 3725 mutex_lock(&svms->lock); 3726 3727 node = interval_tree_iter_first(&svms->objects, start, last); 3728 if (!node) { 3729 pr_debug("range attrs not found return default values\n"); 3730 svm_range_set_default_attributes(&location, &prefetch_loc, 3731 &granularity, &flags_and); 3732 flags_or = flags_and; 3733 if (p->xnack_enabled) 3734 bitmap_copy(bitmap_access, svms->bitmap_supported, 3735 MAX_GPU_INSTANCE); 3736 else 3737 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3738 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3739 goto fill_values; 3740 } 3741 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3742 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3743 3744 while (node) { 3745 struct interval_tree_node *next; 3746 3747 prange = container_of(node, struct svm_range, it_node); 3748 next = interval_tree_iter_next(node, start, last); 3749 3750 if (get_preferred_loc) { 3751 if (prange->preferred_loc == 3752 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3753 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3754 location != prange->preferred_loc)) { 3755 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3756 get_preferred_loc = false; 3757 } else { 3758 location = prange->preferred_loc; 3759 } 3760 } 3761 if (get_prefetch_loc) { 3762 if (prange->prefetch_loc == 3763 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3764 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3765 prefetch_loc != prange->prefetch_loc)) { 3766 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3767 get_prefetch_loc = false; 3768 } else { 3769 prefetch_loc = prange->prefetch_loc; 3770 } 3771 } 3772 if (get_accessible) { 3773 bitmap_and(bitmap_access, bitmap_access, 3774 prange->bitmap_access, MAX_GPU_INSTANCE); 3775 bitmap_and(bitmap_aip, bitmap_aip, 3776 prange->bitmap_aip, MAX_GPU_INSTANCE); 3777 } 3778 if (get_flags) { 3779 flags_and &= prange->flags; 3780 flags_or |= prange->flags; 3781 } 3782 3783 if (get_granularity && prange->granularity < granularity) 3784 granularity = prange->granularity; 3785 3786 node = next; 3787 } 3788 fill_values: 3789 mutex_unlock(&svms->lock); 3790 3791 for (i = 0; i < nattr; i++) { 3792 switch (attrs[i].type) { 3793 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3794 attrs[i].value = location; 3795 break; 3796 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3797 attrs[i].value = prefetch_loc; 3798 break; 3799 case KFD_IOCTL_SVM_ATTR_ACCESS: 3800 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3801 attrs[i].value); 3802 if (gpuidx < 0) { 3803 pr_debug("invalid gpuid %x\n", attrs[i].value); 3804 return -EINVAL; 3805 } 3806 if (test_bit(gpuidx, bitmap_access)) 3807 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3808 else if (test_bit(gpuidx, bitmap_aip)) 3809 attrs[i].type = 3810 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3811 else 3812 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3813 break; 3814 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3815 attrs[i].value = flags_and; 3816 break; 3817 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3818 attrs[i].value = ~flags_or; 3819 break; 3820 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3821 attrs[i].value = (uint32_t)granularity; 3822 break; 3823 } 3824 } 3825 3826 return 0; 3827 } 3828 3829 int kfd_criu_resume_svm(struct kfd_process *p) 3830 { 3831 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3832 int nattr_common = 4, nattr_accessibility = 1; 3833 struct criu_svm_metadata *criu_svm_md = NULL; 3834 struct svm_range_list *svms = &p->svms; 3835 struct criu_svm_metadata *next = NULL; 3836 uint32_t set_flags = 0xffffffff; 3837 int i, j, num_attrs, ret = 0; 3838 uint64_t set_attr_size; 3839 struct mm_struct *mm; 3840 3841 if (list_empty(&svms->criu_svm_metadata_list)) { 3842 pr_debug("No SVM data from CRIU restore stage 2\n"); 3843 return ret; 3844 } 3845 3846 mm = get_task_mm(p->lead_thread); 3847 if (!mm) { 3848 pr_err("failed to get mm for the target process\n"); 3849 return -ESRCH; 3850 } 3851 3852 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3853 3854 i = j = 0; 3855 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3856 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3857 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3858 3859 for (j = 0; j < num_attrs; j++) { 3860 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3861 i, j, criu_svm_md->data.attrs[j].type, 3862 i, j, criu_svm_md->data.attrs[j].value); 3863 switch (criu_svm_md->data.attrs[j].type) { 3864 /* During Checkpoint operation, the query for 3865 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3866 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3867 * not used by the range which was checkpointed. Care 3868 * must be taken to not restore with an invalid value 3869 * otherwise the gpuidx value will be invalid and 3870 * set_attr would eventually fail so just replace those 3871 * with another dummy attribute such as 3872 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3873 */ 3874 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3875 if (criu_svm_md->data.attrs[j].value == 3876 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3877 criu_svm_md->data.attrs[j].type = 3878 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3879 criu_svm_md->data.attrs[j].value = 0; 3880 } 3881 break; 3882 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3883 set_flags = criu_svm_md->data.attrs[j].value; 3884 break; 3885 default: 3886 break; 3887 } 3888 } 3889 3890 /* CLR_FLAGS is not available via get_attr during checkpoint but 3891 * it needs to be inserted before restoring the ranges so 3892 * allocate extra space for it before calling set_attr 3893 */ 3894 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3895 (num_attrs + 1); 3896 set_attr_new = krealloc(set_attr, set_attr_size, 3897 GFP_KERNEL); 3898 if (!set_attr_new) { 3899 ret = -ENOMEM; 3900 goto exit; 3901 } 3902 set_attr = set_attr_new; 3903 3904 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3905 sizeof(struct kfd_ioctl_svm_attribute)); 3906 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3907 set_attr[num_attrs].value = ~set_flags; 3908 3909 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3910 criu_svm_md->data.size, num_attrs + 1, 3911 set_attr); 3912 if (ret) { 3913 pr_err("CRIU: failed to set range attributes\n"); 3914 goto exit; 3915 } 3916 3917 i++; 3918 } 3919 exit: 3920 kfree(set_attr); 3921 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3922 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3923 criu_svm_md->data.start_addr); 3924 kfree(criu_svm_md); 3925 } 3926 3927 mmput(mm); 3928 return ret; 3929 3930 } 3931 3932 int kfd_criu_restore_svm(struct kfd_process *p, 3933 uint8_t __user *user_priv_ptr, 3934 uint64_t *priv_data_offset, 3935 uint64_t max_priv_data_size) 3936 { 3937 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3938 int nattr_common = 4, nattr_accessibility = 1; 3939 struct criu_svm_metadata *criu_svm_md = NULL; 3940 struct svm_range_list *svms = &p->svms; 3941 uint32_t num_devices; 3942 int ret = 0; 3943 3944 num_devices = p->n_pdds; 3945 /* Handle one SVM range object at a time, also the number of gpus are 3946 * assumed to be same on the restore node, checking must be done while 3947 * evaluating the topology earlier 3948 */ 3949 3950 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3951 (nattr_common + nattr_accessibility * num_devices); 3952 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3953 3954 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3955 svm_attrs_size; 3956 3957 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3958 if (!criu_svm_md) { 3959 pr_err("failed to allocate memory to store svm metadata\n"); 3960 return -ENOMEM; 3961 } 3962 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3963 ret = -EINVAL; 3964 goto exit; 3965 } 3966 3967 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3968 svm_priv_data_size); 3969 if (ret) { 3970 ret = -EFAULT; 3971 goto exit; 3972 } 3973 *priv_data_offset += svm_priv_data_size; 3974 3975 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3976 3977 return 0; 3978 3979 3980 exit: 3981 kfree(criu_svm_md); 3982 return ret; 3983 } 3984 3985 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3986 uint64_t *svm_priv_data_size) 3987 { 3988 uint64_t total_size, accessibility_size, common_attr_size; 3989 int nattr_common = 4, nattr_accessibility = 1; 3990 int num_devices = p->n_pdds; 3991 struct svm_range_list *svms; 3992 struct svm_range *prange; 3993 uint32_t count = 0; 3994 3995 *svm_priv_data_size = 0; 3996 3997 svms = &p->svms; 3998 if (!svms) 3999 return -EINVAL; 4000 4001 mutex_lock(&svms->lock); 4002 list_for_each_entry(prange, &svms->list, list) { 4003 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4004 prange, prange->start, prange->npages, 4005 prange->start + prange->npages - 1); 4006 count++; 4007 } 4008 mutex_unlock(&svms->lock); 4009 4010 *num_svm_ranges = count; 4011 /* Only the accessbility attributes need to be queried for all the gpus 4012 * individually, remaining ones are spanned across the entire process 4013 * regardless of the various gpu nodes. Of the remaining attributes, 4014 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4015 * 4016 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4017 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4018 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4019 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4020 * 4021 * ** ACCESSBILITY ATTRIBUTES ** 4022 * (Considered as one, type is altered during query, value is gpuid) 4023 * KFD_IOCTL_SVM_ATTR_ACCESS 4024 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4025 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4026 */ 4027 if (*num_svm_ranges > 0) { 4028 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4029 nattr_common; 4030 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4031 nattr_accessibility * num_devices; 4032 4033 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4034 common_attr_size + accessibility_size; 4035 4036 *svm_priv_data_size = *num_svm_ranges * total_size; 4037 } 4038 4039 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4040 *svm_priv_data_size); 4041 return 0; 4042 } 4043 4044 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4045 uint8_t __user *user_priv_data, 4046 uint64_t *priv_data_offset) 4047 { 4048 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4049 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4050 uint64_t svm_priv_data_size, query_attr_size = 0; 4051 int index, nattr_common = 4, ret = 0; 4052 struct svm_range_list *svms; 4053 int num_devices = p->n_pdds; 4054 struct svm_range *prange; 4055 struct mm_struct *mm; 4056 4057 svms = &p->svms; 4058 if (!svms) 4059 return -EINVAL; 4060 4061 mm = get_task_mm(p->lead_thread); 4062 if (!mm) { 4063 pr_err("failed to get mm for the target process\n"); 4064 return -ESRCH; 4065 } 4066 4067 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4068 (nattr_common + num_devices); 4069 4070 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4071 if (!query_attr) { 4072 ret = -ENOMEM; 4073 goto exit; 4074 } 4075 4076 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4077 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4078 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4079 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4080 4081 for (index = 0; index < num_devices; index++) { 4082 struct kfd_process_device *pdd = p->pdds[index]; 4083 4084 query_attr[index + nattr_common].type = 4085 KFD_IOCTL_SVM_ATTR_ACCESS; 4086 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4087 } 4088 4089 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4090 4091 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4092 if (!svm_priv) { 4093 ret = -ENOMEM; 4094 goto exit_query; 4095 } 4096 4097 index = 0; 4098 list_for_each_entry(prange, &svms->list, list) { 4099 4100 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4101 svm_priv->start_addr = prange->start; 4102 svm_priv->size = prange->npages; 4103 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4104 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4105 prange, prange->start, prange->npages, 4106 prange->start + prange->npages - 1, 4107 prange->npages * PAGE_SIZE); 4108 4109 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4110 svm_priv->size, 4111 (nattr_common + num_devices), 4112 svm_priv->attrs); 4113 if (ret) { 4114 pr_err("CRIU: failed to obtain range attributes\n"); 4115 goto exit_priv; 4116 } 4117 4118 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4119 svm_priv_data_size)) { 4120 pr_err("Failed to copy svm priv to user\n"); 4121 ret = -EFAULT; 4122 goto exit_priv; 4123 } 4124 4125 *priv_data_offset += svm_priv_data_size; 4126 4127 } 4128 4129 4130 exit_priv: 4131 kfree(svm_priv); 4132 exit_query: 4133 kfree(query_attr); 4134 exit: 4135 mmput(mm); 4136 return ret; 4137 } 4138 4139 int 4140 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4141 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4142 { 4143 struct mm_struct *mm = current->mm; 4144 int r; 4145 4146 start >>= PAGE_SHIFT; 4147 size >>= PAGE_SHIFT; 4148 4149 switch (op) { 4150 case KFD_IOCTL_SVM_OP_SET_ATTR: 4151 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4152 break; 4153 case KFD_IOCTL_SVM_OP_GET_ATTR: 4154 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4155 break; 4156 default: 4157 r = EINVAL; 4158 break; 4159 } 4160 4161 return r; 4162 } 4163