1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 313 uint8_t *granularity, uint32_t *flags) 314 { 315 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 316 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *granularity = 9; 318 *flags = 319 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 320 } 321 322 static struct 323 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 324 uint64_t last, bool update_mem_usage) 325 { 326 uint64_t size = last - start + 1; 327 struct svm_range *prange; 328 struct kfd_process *p; 329 330 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 331 if (!prange) 332 return NULL; 333 334 p = container_of(svms, struct kfd_process, svms); 335 if (!p->xnack_enabled && update_mem_usage && 336 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 337 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 338 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 339 kfree(prange); 340 return NULL; 341 } 342 prange->npages = size; 343 prange->svms = svms; 344 prange->start = start; 345 prange->last = last; 346 INIT_LIST_HEAD(&prange->list); 347 INIT_LIST_HEAD(&prange->update_list); 348 INIT_LIST_HEAD(&prange->svm_bo_list); 349 INIT_LIST_HEAD(&prange->deferred_list); 350 INIT_LIST_HEAD(&prange->child_list); 351 atomic_set(&prange->invalid, 0); 352 prange->validate_timestamp = 0; 353 prange->vram_pages = 0; 354 mutex_init(&prange->migrate_mutex); 355 mutex_init(&prange->lock); 356 357 if (p->xnack_enabled) 358 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 359 MAX_GPU_INSTANCE); 360 361 svm_range_set_default_attributes(&prange->preferred_loc, 362 &prange->prefetch_loc, 363 &prange->granularity, &prange->flags); 364 365 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 366 367 return prange; 368 } 369 370 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 371 { 372 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 373 return false; 374 375 return true; 376 } 377 378 static void svm_range_bo_release(struct kref *kref) 379 { 380 struct svm_range_bo *svm_bo; 381 382 svm_bo = container_of(kref, struct svm_range_bo, kref); 383 pr_debug("svm_bo 0x%p\n", svm_bo); 384 385 spin_lock(&svm_bo->list_lock); 386 while (!list_empty(&svm_bo->range_list)) { 387 struct svm_range *prange = 388 list_first_entry(&svm_bo->range_list, 389 struct svm_range, svm_bo_list); 390 /* list_del_init tells a concurrent svm_range_vram_node_new when 391 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 392 */ 393 list_del_init(&prange->svm_bo_list); 394 spin_unlock(&svm_bo->list_lock); 395 396 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 397 prange->start, prange->last); 398 mutex_lock(&prange->lock); 399 prange->svm_bo = NULL; 400 /* prange should not hold vram page now */ 401 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 402 mutex_unlock(&prange->lock); 403 404 spin_lock(&svm_bo->list_lock); 405 } 406 spin_unlock(&svm_bo->list_lock); 407 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 408 /* We're not in the eviction worker. Signal the fence. */ 409 dma_fence_signal(&svm_bo->eviction_fence->base); 410 dma_fence_put(&svm_bo->eviction_fence->base); 411 amdgpu_bo_unref(&svm_bo->bo); 412 kfree(svm_bo); 413 } 414 415 static void svm_range_bo_wq_release(struct work_struct *work) 416 { 417 struct svm_range_bo *svm_bo; 418 419 svm_bo = container_of(work, struct svm_range_bo, release_work); 420 svm_range_bo_release(&svm_bo->kref); 421 } 422 423 static void svm_range_bo_release_async(struct kref *kref) 424 { 425 struct svm_range_bo *svm_bo; 426 427 svm_bo = container_of(kref, struct svm_range_bo, kref); 428 pr_debug("svm_bo 0x%p\n", svm_bo); 429 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 430 schedule_work(&svm_bo->release_work); 431 } 432 433 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 434 { 435 kref_put(&svm_bo->kref, svm_range_bo_release_async); 436 } 437 438 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 439 { 440 if (svm_bo) 441 kref_put(&svm_bo->kref, svm_range_bo_release); 442 } 443 444 static bool 445 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 446 { 447 mutex_lock(&prange->lock); 448 if (!prange->svm_bo) { 449 mutex_unlock(&prange->lock); 450 return false; 451 } 452 if (prange->ttm_res) { 453 /* We still have a reference, all is well */ 454 mutex_unlock(&prange->lock); 455 return true; 456 } 457 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 458 /* 459 * Migrate from GPU to GPU, remove range from source svm_bo->node 460 * range list, and return false to allocate svm_bo from destination 461 * node. 462 */ 463 if (prange->svm_bo->node != node) { 464 mutex_unlock(&prange->lock); 465 466 spin_lock(&prange->svm_bo->list_lock); 467 list_del_init(&prange->svm_bo_list); 468 spin_unlock(&prange->svm_bo->list_lock); 469 470 svm_range_bo_unref(prange->svm_bo); 471 return false; 472 } 473 if (READ_ONCE(prange->svm_bo->evicting)) { 474 struct dma_fence *f; 475 struct svm_range_bo *svm_bo; 476 /* The BO is getting evicted, 477 * we need to get a new one 478 */ 479 mutex_unlock(&prange->lock); 480 svm_bo = prange->svm_bo; 481 f = dma_fence_get(&svm_bo->eviction_fence->base); 482 svm_range_bo_unref(prange->svm_bo); 483 /* wait for the fence to avoid long spin-loop 484 * at list_empty_careful 485 */ 486 dma_fence_wait(f, false); 487 dma_fence_put(f); 488 } else { 489 /* The BO was still around and we got 490 * a new reference to it 491 */ 492 mutex_unlock(&prange->lock); 493 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 494 prange->svms, prange->start, prange->last); 495 496 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 497 return true; 498 } 499 500 } else { 501 mutex_unlock(&prange->lock); 502 } 503 504 /* We need a new svm_bo. Spin-loop to wait for concurrent 505 * svm_range_bo_release to finish removing this range from 506 * its range list and set prange->svm_bo to null. After this, 507 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 508 */ 509 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 510 cond_resched(); 511 512 return false; 513 } 514 515 static struct svm_range_bo *svm_range_bo_new(void) 516 { 517 struct svm_range_bo *svm_bo; 518 519 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 520 if (!svm_bo) 521 return NULL; 522 523 kref_init(&svm_bo->kref); 524 INIT_LIST_HEAD(&svm_bo->range_list); 525 spin_lock_init(&svm_bo->list_lock); 526 527 return svm_bo; 528 } 529 530 int 531 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 532 bool clear) 533 { 534 struct amdgpu_bo_param bp; 535 struct svm_range_bo *svm_bo; 536 struct amdgpu_bo_user *ubo; 537 struct amdgpu_bo *bo; 538 struct kfd_process *p; 539 struct mm_struct *mm; 540 int r; 541 542 p = container_of(prange->svms, struct kfd_process, svms); 543 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 544 prange->start, prange->last); 545 546 if (svm_range_validate_svm_bo(node, prange)) 547 return 0; 548 549 svm_bo = svm_range_bo_new(); 550 if (!svm_bo) { 551 pr_debug("failed to alloc svm bo\n"); 552 return -ENOMEM; 553 } 554 mm = get_task_mm(p->lead_thread); 555 if (!mm) { 556 pr_debug("failed to get mm\n"); 557 kfree(svm_bo); 558 return -ESRCH; 559 } 560 svm_bo->node = node; 561 svm_bo->eviction_fence = 562 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 563 mm, 564 svm_bo); 565 mmput(mm); 566 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 567 svm_bo->evicting = 0; 568 memset(&bp, 0, sizeof(bp)); 569 bp.size = prange->npages * PAGE_SIZE; 570 bp.byte_align = PAGE_SIZE; 571 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 572 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 573 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 574 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 575 bp.type = ttm_bo_type_device; 576 bp.resv = NULL; 577 if (node->xcp) 578 bp.xcp_id_plus1 = node->xcp->id + 1; 579 580 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 581 if (r) { 582 pr_debug("failed %d to create bo\n", r); 583 goto create_bo_failed; 584 } 585 bo = &ubo->bo; 586 587 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 588 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 589 bp.xcp_id_plus1 - 1); 590 591 r = amdgpu_bo_reserve(bo, true); 592 if (r) { 593 pr_debug("failed %d to reserve bo\n", r); 594 goto reserve_bo_failed; 595 } 596 597 if (clear) { 598 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 599 if (r) { 600 pr_debug("failed %d to sync bo\n", r); 601 amdgpu_bo_unreserve(bo); 602 goto reserve_bo_failed; 603 } 604 } 605 606 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 607 if (r) { 608 pr_debug("failed %d to reserve bo\n", r); 609 amdgpu_bo_unreserve(bo); 610 goto reserve_bo_failed; 611 } 612 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 613 614 amdgpu_bo_unreserve(bo); 615 616 svm_bo->bo = bo; 617 prange->svm_bo = svm_bo; 618 prange->ttm_res = bo->tbo.resource; 619 prange->offset = 0; 620 621 spin_lock(&svm_bo->list_lock); 622 list_add(&prange->svm_bo_list, &svm_bo->range_list); 623 spin_unlock(&svm_bo->list_lock); 624 625 return 0; 626 627 reserve_bo_failed: 628 amdgpu_bo_unref(&bo); 629 create_bo_failed: 630 dma_fence_put(&svm_bo->eviction_fence->base); 631 kfree(svm_bo); 632 prange->ttm_res = NULL; 633 634 return r; 635 } 636 637 void svm_range_vram_node_free(struct svm_range *prange) 638 { 639 /* serialize prange->svm_bo unref */ 640 mutex_lock(&prange->lock); 641 /* prange->svm_bo has not been unref */ 642 if (prange->ttm_res) { 643 prange->ttm_res = NULL; 644 mutex_unlock(&prange->lock); 645 svm_range_bo_unref(prange->svm_bo); 646 } else 647 mutex_unlock(&prange->lock); 648 } 649 650 struct kfd_node * 651 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 652 { 653 struct kfd_process *p; 654 struct kfd_process_device *pdd; 655 656 p = container_of(prange->svms, struct kfd_process, svms); 657 pdd = kfd_process_device_data_by_id(p, gpu_id); 658 if (!pdd) { 659 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 660 return NULL; 661 } 662 663 return pdd->dev; 664 } 665 666 struct kfd_process_device * 667 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 668 { 669 struct kfd_process *p; 670 671 p = container_of(prange->svms, struct kfd_process, svms); 672 673 return kfd_get_process_device_data(node, p); 674 } 675 676 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 677 { 678 struct ttm_operation_ctx ctx = { false, false }; 679 680 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 681 682 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 683 } 684 685 static int 686 svm_range_check_attr(struct kfd_process *p, 687 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 688 { 689 uint32_t i; 690 691 for (i = 0; i < nattr; i++) { 692 uint32_t val = attrs[i].value; 693 int gpuidx = MAX_GPU_INSTANCE; 694 695 switch (attrs[i].type) { 696 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 697 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 698 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 699 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 700 break; 701 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 702 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 703 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 704 break; 705 case KFD_IOCTL_SVM_ATTR_ACCESS: 706 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 707 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 708 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 709 break; 710 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 711 break; 712 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 713 break; 714 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 715 break; 716 default: 717 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 718 return -EINVAL; 719 } 720 721 if (gpuidx < 0) { 722 pr_debug("no GPU 0x%x found\n", val); 723 return -EINVAL; 724 } else if (gpuidx < MAX_GPU_INSTANCE && 725 !test_bit(gpuidx, p->svms.bitmap_supported)) { 726 pr_debug("GPU 0x%x not supported\n", val); 727 return -EINVAL; 728 } 729 } 730 731 return 0; 732 } 733 734 static void 735 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 736 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 737 bool *update_mapping) 738 { 739 uint32_t i; 740 int gpuidx; 741 742 for (i = 0; i < nattr; i++) { 743 switch (attrs[i].type) { 744 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 745 prange->preferred_loc = attrs[i].value; 746 break; 747 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 748 prange->prefetch_loc = attrs[i].value; 749 break; 750 case KFD_IOCTL_SVM_ATTR_ACCESS: 751 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 752 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 753 if (!p->xnack_enabled) 754 *update_mapping = true; 755 756 gpuidx = kfd_process_gpuidx_from_gpuid(p, 757 attrs[i].value); 758 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 759 bitmap_clear(prange->bitmap_access, gpuidx, 1); 760 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 761 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 762 bitmap_set(prange->bitmap_access, gpuidx, 1); 763 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 764 } else { 765 bitmap_clear(prange->bitmap_access, gpuidx, 1); 766 bitmap_set(prange->bitmap_aip, gpuidx, 1); 767 } 768 break; 769 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 770 *update_mapping = true; 771 prange->flags |= attrs[i].value; 772 break; 773 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 774 *update_mapping = true; 775 prange->flags &= ~attrs[i].value; 776 break; 777 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 778 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 779 break; 780 default: 781 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 782 } 783 } 784 } 785 786 static bool 787 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 788 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 789 { 790 uint32_t i; 791 int gpuidx; 792 793 for (i = 0; i < nattr; i++) { 794 switch (attrs[i].type) { 795 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 796 if (prange->preferred_loc != attrs[i].value) 797 return false; 798 break; 799 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 800 /* Prefetch should always trigger a migration even 801 * if the value of the attribute didn't change. 802 */ 803 return false; 804 case KFD_IOCTL_SVM_ATTR_ACCESS: 805 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 806 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 807 gpuidx = kfd_process_gpuidx_from_gpuid(p, 808 attrs[i].value); 809 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 810 if (test_bit(gpuidx, prange->bitmap_access) || 811 test_bit(gpuidx, prange->bitmap_aip)) 812 return false; 813 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 814 if (!test_bit(gpuidx, prange->bitmap_access)) 815 return false; 816 } else { 817 if (!test_bit(gpuidx, prange->bitmap_aip)) 818 return false; 819 } 820 break; 821 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 822 if ((prange->flags & attrs[i].value) != attrs[i].value) 823 return false; 824 break; 825 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 826 if ((prange->flags & attrs[i].value) != 0) 827 return false; 828 break; 829 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 830 if (prange->granularity != attrs[i].value) 831 return false; 832 break; 833 default: 834 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 835 } 836 } 837 838 return true; 839 } 840 841 /** 842 * svm_range_debug_dump - print all range information from svms 843 * @svms: svm range list header 844 * 845 * debug output svm range start, end, prefetch location from svms 846 * interval tree and link list 847 * 848 * Context: The caller must hold svms->lock 849 */ 850 static void svm_range_debug_dump(struct svm_range_list *svms) 851 { 852 struct interval_tree_node *node; 853 struct svm_range *prange; 854 855 pr_debug("dump svms 0x%p list\n", svms); 856 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 857 858 list_for_each_entry(prange, &svms->list, list) { 859 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 860 prange, prange->start, prange->npages, 861 prange->start + prange->npages - 1, 862 prange->actual_loc); 863 } 864 865 pr_debug("dump svms 0x%p interval tree\n", svms); 866 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 867 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 868 while (node) { 869 prange = container_of(node, struct svm_range, it_node); 870 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 871 prange, prange->start, prange->npages, 872 prange->start + prange->npages - 1, 873 prange->actual_loc); 874 node = interval_tree_iter_next(node, 0, ~0ULL); 875 } 876 } 877 878 static void * 879 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 880 uint64_t offset, uint64_t *vram_pages) 881 { 882 unsigned char *src = (unsigned char *)psrc + offset; 883 unsigned char *dst; 884 uint64_t i; 885 886 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 887 if (!dst) 888 return NULL; 889 890 if (!vram_pages) { 891 memcpy(dst, src, num_elements * size); 892 return (void *)dst; 893 } 894 895 *vram_pages = 0; 896 for (i = 0; i < num_elements; i++) { 897 dma_addr_t *temp; 898 temp = (dma_addr_t *)dst + i; 899 *temp = *((dma_addr_t *)src + i); 900 if (*temp&SVM_RANGE_VRAM_DOMAIN) 901 (*vram_pages)++; 902 } 903 904 return (void *)dst; 905 } 906 907 static int 908 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 909 { 910 int i; 911 912 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 913 if (!src->dma_addr[i]) 914 continue; 915 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 916 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 917 if (!dst->dma_addr[i]) 918 return -ENOMEM; 919 } 920 921 return 0; 922 } 923 924 static int 925 svm_range_split_array(void *ppnew, void *ppold, size_t size, 926 uint64_t old_start, uint64_t old_n, 927 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 928 { 929 unsigned char *new, *old, *pold; 930 uint64_t d; 931 932 if (!ppold) 933 return 0; 934 pold = *(unsigned char **)ppold; 935 if (!pold) 936 return 0; 937 938 d = (new_start - old_start) * size; 939 /* get dma addr array for new range and calculte its vram page number */ 940 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 941 if (!new) 942 return -ENOMEM; 943 d = (new_start == old_start) ? new_n * size : 0; 944 old = svm_range_copy_array(pold, size, old_n, d, NULL); 945 if (!old) { 946 kvfree(new); 947 return -ENOMEM; 948 } 949 kvfree(pold); 950 *(void **)ppold = old; 951 *(void **)ppnew = new; 952 953 return 0; 954 } 955 956 static int 957 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 958 uint64_t start, uint64_t last) 959 { 960 uint64_t npages = last - start + 1; 961 int i, r; 962 963 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 964 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 965 sizeof(*old->dma_addr[i]), old->start, 966 npages, new->start, new->npages, 967 old->actual_loc ? &new->vram_pages : NULL); 968 if (r) 969 return r; 970 } 971 if (old->actual_loc) 972 old->vram_pages -= new->vram_pages; 973 974 return 0; 975 } 976 977 static int 978 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 979 uint64_t start, uint64_t last) 980 { 981 uint64_t npages = last - start + 1; 982 983 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 984 new->svms, new, new->start, start, last); 985 986 if (new->start == old->start) { 987 new->offset = old->offset; 988 old->offset += new->npages; 989 } else { 990 new->offset = old->offset + npages; 991 } 992 993 new->svm_bo = svm_range_bo_ref(old->svm_bo); 994 new->ttm_res = old->ttm_res; 995 996 spin_lock(&new->svm_bo->list_lock); 997 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 998 spin_unlock(&new->svm_bo->list_lock); 999 1000 return 0; 1001 } 1002 1003 /** 1004 * svm_range_split_adjust - split range and adjust 1005 * 1006 * @new: new range 1007 * @old: the old range 1008 * @start: the old range adjust to start address in pages 1009 * @last: the old range adjust to last address in pages 1010 * 1011 * Copy system memory dma_addr or vram ttm_res in old range to new 1012 * range from new_start up to size new->npages, the remaining old range is from 1013 * start to last 1014 * 1015 * Return: 1016 * 0 - OK, -ENOMEM - out of memory 1017 */ 1018 static int 1019 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1020 uint64_t start, uint64_t last) 1021 { 1022 int r; 1023 1024 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1025 new->svms, new->start, old->start, old->last, start, last); 1026 1027 if (new->start < old->start || 1028 new->last > old->last) { 1029 WARN_ONCE(1, "invalid new range start or last\n"); 1030 return -EINVAL; 1031 } 1032 1033 r = svm_range_split_pages(new, old, start, last); 1034 if (r) 1035 return r; 1036 1037 if (old->actual_loc && old->ttm_res) { 1038 r = svm_range_split_nodes(new, old, start, last); 1039 if (r) 1040 return r; 1041 } 1042 1043 old->npages = last - start + 1; 1044 old->start = start; 1045 old->last = last; 1046 new->flags = old->flags; 1047 new->preferred_loc = old->preferred_loc; 1048 new->prefetch_loc = old->prefetch_loc; 1049 new->actual_loc = old->actual_loc; 1050 new->granularity = old->granularity; 1051 new->mapped_to_gpu = old->mapped_to_gpu; 1052 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1053 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1054 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1055 1056 return 0; 1057 } 1058 1059 /** 1060 * svm_range_split - split a range in 2 ranges 1061 * 1062 * @prange: the svm range to split 1063 * @start: the remaining range start address in pages 1064 * @last: the remaining range last address in pages 1065 * @new: the result new range generated 1066 * 1067 * Two cases only: 1068 * case 1: if start == prange->start 1069 * prange ==> prange[start, last] 1070 * new range [last + 1, prange->last] 1071 * 1072 * case 2: if last == prange->last 1073 * prange ==> prange[start, last] 1074 * new range [prange->start, start - 1] 1075 * 1076 * Return: 1077 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1078 */ 1079 static int 1080 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1081 struct svm_range **new) 1082 { 1083 uint64_t old_start = prange->start; 1084 uint64_t old_last = prange->last; 1085 struct svm_range_list *svms; 1086 int r = 0; 1087 1088 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1089 old_start, old_last, start, last); 1090 1091 if (old_start != start && old_last != last) 1092 return -EINVAL; 1093 if (start < old_start || last > old_last) 1094 return -EINVAL; 1095 1096 svms = prange->svms; 1097 if (old_start == start) 1098 *new = svm_range_new(svms, last + 1, old_last, false); 1099 else 1100 *new = svm_range_new(svms, old_start, start - 1, false); 1101 if (!*new) 1102 return -ENOMEM; 1103 1104 r = svm_range_split_adjust(*new, prange, start, last); 1105 if (r) { 1106 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1107 r, old_start, old_last, start, last); 1108 svm_range_free(*new, false); 1109 *new = NULL; 1110 } 1111 1112 return r; 1113 } 1114 1115 static int 1116 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1117 struct list_head *insert_list, struct list_head *remap_list) 1118 { 1119 struct svm_range *tail = NULL; 1120 int r = svm_range_split(prange, prange->start, new_last, &tail); 1121 1122 if (!r) { 1123 list_add(&tail->list, insert_list); 1124 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1125 list_add(&tail->update_list, remap_list); 1126 } 1127 return r; 1128 } 1129 1130 static int 1131 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1132 struct list_head *insert_list, struct list_head *remap_list) 1133 { 1134 struct svm_range *head = NULL; 1135 int r = svm_range_split(prange, new_start, prange->last, &head); 1136 1137 if (!r) { 1138 list_add(&head->list, insert_list); 1139 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1140 list_add(&head->update_list, remap_list); 1141 } 1142 return r; 1143 } 1144 1145 static void 1146 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1147 struct svm_range *pchild, enum svm_work_list_ops op) 1148 { 1149 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1150 pchild, pchild->start, pchild->last, prange, op); 1151 1152 pchild->work_item.mm = mm; 1153 pchild->work_item.op = op; 1154 list_add_tail(&pchild->child_list, &prange->child_list); 1155 } 1156 1157 static bool 1158 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1159 { 1160 return (node_a->adev == node_b->adev || 1161 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1162 } 1163 1164 static uint64_t 1165 svm_range_get_pte_flags(struct kfd_node *node, 1166 struct svm_range *prange, int domain) 1167 { 1168 struct kfd_node *bo_node; 1169 uint32_t flags = prange->flags; 1170 uint32_t mapping_flags = 0; 1171 uint64_t pte_flags; 1172 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1173 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1174 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1175 unsigned int mtype_local; 1176 1177 if (domain == SVM_RANGE_VRAM_DOMAIN) 1178 bo_node = prange->svm_bo->node; 1179 1180 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1181 case IP_VERSION(9, 4, 1): 1182 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1183 if (bo_node == node) { 1184 mapping_flags |= coherent ? 1185 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1186 } else { 1187 mapping_flags |= coherent ? 1188 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1189 if (svm_nodes_in_same_hive(node, bo_node)) 1190 snoop = true; 1191 } 1192 } else { 1193 mapping_flags |= coherent ? 1194 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1195 } 1196 break; 1197 case IP_VERSION(9, 4, 2): 1198 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1199 if (bo_node == node) { 1200 mapping_flags |= coherent ? 1201 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1202 if (node->adev->gmc.xgmi.connected_to_cpu) 1203 snoop = true; 1204 } else { 1205 mapping_flags |= coherent ? 1206 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1207 if (svm_nodes_in_same_hive(node, bo_node)) 1208 snoop = true; 1209 } 1210 } else { 1211 mapping_flags |= coherent ? 1212 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1213 } 1214 break; 1215 case IP_VERSION(9, 4, 3): 1216 case IP_VERSION(9, 4, 4): 1217 if (ext_coherent) 1218 mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC; 1219 else 1220 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1221 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1222 snoop = true; 1223 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1224 /* local HBM region close to partition */ 1225 if (bo_node->adev == node->adev && 1226 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1227 mapping_flags |= mtype_local; 1228 /* local HBM region far from partition or remote XGMI GPU 1229 * with regular system scope coherence 1230 */ 1231 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1232 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1233 /* PCIe P2P or extended system scope coherence */ 1234 else 1235 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1236 /* system memory accessed by the APU */ 1237 } else if (node->adev->flags & AMD_IS_APU) { 1238 /* On NUMA systems, locality is determined per-page 1239 * in amdgpu_gmc_override_vm_pte_flags 1240 */ 1241 if (num_possible_nodes() <= 1) 1242 mapping_flags |= mtype_local; 1243 else 1244 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1245 /* system memory accessed by the dGPU */ 1246 } else { 1247 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1248 } 1249 break; 1250 case IP_VERSION(12, 0, 0): 1251 case IP_VERSION(12, 0, 1): 1252 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1253 if (bo_node != node) 1254 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1255 } else { 1256 mapping_flags |= coherent ? 1257 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1258 } 1259 break; 1260 default: 1261 mapping_flags |= coherent ? 1262 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1263 } 1264 1265 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1266 1267 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1268 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1269 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1270 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1271 1272 pte_flags = AMDGPU_PTE_VALID; 1273 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1274 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1275 if (KFD_GC_VERSION(node) >= IP_VERSION(12, 0, 0)) 1276 pte_flags |= AMDGPU_PTE_IS_PTE; 1277 1278 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1279 return pte_flags; 1280 } 1281 1282 static int 1283 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1284 uint64_t start, uint64_t last, 1285 struct dma_fence **fence) 1286 { 1287 uint64_t init_pte_value = 0; 1288 1289 pr_debug("[0x%llx 0x%llx]\n", start, last); 1290 1291 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1292 last, init_pte_value, 0, 0, NULL, NULL, 1293 fence); 1294 } 1295 1296 static int 1297 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1298 unsigned long last, uint32_t trigger) 1299 { 1300 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1301 struct kfd_process_device *pdd; 1302 struct dma_fence *fence = NULL; 1303 struct kfd_process *p; 1304 uint32_t gpuidx; 1305 int r = 0; 1306 1307 if (!prange->mapped_to_gpu) { 1308 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1309 prange, prange->start, prange->last); 1310 return 0; 1311 } 1312 1313 if (prange->start == start && prange->last == last) { 1314 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1315 prange->mapped_to_gpu = false; 1316 } 1317 1318 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1319 MAX_GPU_INSTANCE); 1320 p = container_of(prange->svms, struct kfd_process, svms); 1321 1322 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1323 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1324 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1325 if (!pdd) { 1326 pr_debug("failed to find device idx %d\n", gpuidx); 1327 return -EINVAL; 1328 } 1329 1330 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1331 start, last, trigger); 1332 1333 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1334 drm_priv_to_vm(pdd->drm_priv), 1335 start, last, &fence); 1336 if (r) 1337 break; 1338 1339 if (fence) { 1340 r = dma_fence_wait(fence, false); 1341 dma_fence_put(fence); 1342 fence = NULL; 1343 if (r) 1344 break; 1345 } 1346 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1347 } 1348 1349 return r; 1350 } 1351 1352 static int 1353 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1354 unsigned long offset, unsigned long npages, bool readonly, 1355 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1356 struct dma_fence **fence, bool flush_tlb) 1357 { 1358 struct amdgpu_device *adev = pdd->dev->adev; 1359 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1360 uint64_t pte_flags; 1361 unsigned long last_start; 1362 int last_domain; 1363 int r = 0; 1364 int64_t i, j; 1365 1366 last_start = prange->start + offset; 1367 1368 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1369 last_start, last_start + npages - 1, readonly); 1370 1371 for (i = offset; i < offset + npages; i++) { 1372 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1373 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1374 1375 /* Collect all pages in the same address range and memory domain 1376 * that can be mapped with a single call to update mapping. 1377 */ 1378 if (i < offset + npages - 1 && 1379 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1380 continue; 1381 1382 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1383 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1384 1385 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1386 if (readonly) 1387 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1388 1389 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1390 prange->svms, last_start, prange->start + i, 1391 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1392 pte_flags); 1393 1394 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1395 * different memory partition based on fpfn/lpfn, we should use 1396 * same vm_manager.vram_base_offset regardless memory partition. 1397 */ 1398 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1399 NULL, last_start, prange->start + i, 1400 pte_flags, 1401 (last_start - prange->start) << PAGE_SHIFT, 1402 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1403 NULL, dma_addr, &vm->last_update); 1404 1405 for (j = last_start - prange->start; j <= i; j++) 1406 dma_addr[j] |= last_domain; 1407 1408 if (r) { 1409 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1410 goto out; 1411 } 1412 last_start = prange->start + i + 1; 1413 } 1414 1415 r = amdgpu_vm_update_pdes(adev, vm, false); 1416 if (r) { 1417 pr_debug("failed %d to update directories 0x%lx\n", r, 1418 prange->start); 1419 goto out; 1420 } 1421 1422 if (fence) 1423 *fence = dma_fence_get(vm->last_update); 1424 1425 out: 1426 return r; 1427 } 1428 1429 static int 1430 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1431 unsigned long npages, bool readonly, 1432 unsigned long *bitmap, bool wait, bool flush_tlb) 1433 { 1434 struct kfd_process_device *pdd; 1435 struct amdgpu_device *bo_adev = NULL; 1436 struct kfd_process *p; 1437 struct dma_fence *fence = NULL; 1438 uint32_t gpuidx; 1439 int r = 0; 1440 1441 if (prange->svm_bo && prange->ttm_res) 1442 bo_adev = prange->svm_bo->node->adev; 1443 1444 p = container_of(prange->svms, struct kfd_process, svms); 1445 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1446 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1447 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1448 if (!pdd) { 1449 pr_debug("failed to find device idx %d\n", gpuidx); 1450 return -EINVAL; 1451 } 1452 1453 pdd = kfd_bind_process_to_device(pdd->dev, p); 1454 if (IS_ERR(pdd)) 1455 return -EINVAL; 1456 1457 if (bo_adev && pdd->dev->adev != bo_adev && 1458 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1459 pr_debug("cannot map to device idx %d\n", gpuidx); 1460 continue; 1461 } 1462 1463 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1464 prange->dma_addr[gpuidx], 1465 bo_adev, wait ? &fence : NULL, 1466 flush_tlb); 1467 if (r) 1468 break; 1469 1470 if (fence) { 1471 r = dma_fence_wait(fence, false); 1472 dma_fence_put(fence); 1473 fence = NULL; 1474 if (r) { 1475 pr_debug("failed %d to dma fence wait\n", r); 1476 break; 1477 } 1478 } 1479 1480 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1481 } 1482 1483 return r; 1484 } 1485 1486 struct svm_validate_context { 1487 struct kfd_process *process; 1488 struct svm_range *prange; 1489 bool intr; 1490 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1491 struct drm_exec exec; 1492 }; 1493 1494 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1495 { 1496 struct kfd_process_device *pdd; 1497 struct amdgpu_vm *vm; 1498 uint32_t gpuidx; 1499 int r; 1500 1501 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1502 drm_exec_until_all_locked(&ctx->exec) { 1503 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1504 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1505 if (!pdd) { 1506 pr_debug("failed to find device idx %d\n", gpuidx); 1507 r = -EINVAL; 1508 goto unreserve_out; 1509 } 1510 vm = drm_priv_to_vm(pdd->drm_priv); 1511 1512 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1513 drm_exec_retry_on_contention(&ctx->exec); 1514 if (unlikely(r)) { 1515 pr_debug("failed %d to reserve bo\n", r); 1516 goto unreserve_out; 1517 } 1518 } 1519 } 1520 1521 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1522 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1523 if (!pdd) { 1524 pr_debug("failed to find device idx %d\n", gpuidx); 1525 r = -EINVAL; 1526 goto unreserve_out; 1527 } 1528 1529 r = amdgpu_vm_validate(pdd->dev->adev, 1530 drm_priv_to_vm(pdd->drm_priv), NULL, 1531 svm_range_bo_validate, NULL); 1532 if (r) { 1533 pr_debug("failed %d validate pt bos\n", r); 1534 goto unreserve_out; 1535 } 1536 } 1537 1538 return 0; 1539 1540 unreserve_out: 1541 drm_exec_fini(&ctx->exec); 1542 return r; 1543 } 1544 1545 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1546 { 1547 drm_exec_fini(&ctx->exec); 1548 } 1549 1550 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1551 { 1552 struct kfd_process_device *pdd; 1553 1554 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1555 if (!pdd) 1556 return NULL; 1557 1558 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1559 } 1560 1561 /* 1562 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1563 * 1564 * To prevent concurrent destruction or change of range attributes, the 1565 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1566 * because that would block concurrent evictions and lead to deadlocks. To 1567 * serialize concurrent migrations or validations of the same range, the 1568 * prange->migrate_mutex must be held. 1569 * 1570 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1571 * eviction fence. 1572 * 1573 * The following sequence ensures race-free validation and GPU mapping: 1574 * 1575 * 1. Reserve page table (and SVM BO if range is in VRAM) 1576 * 2. hmm_range_fault to get page addresses (if system memory) 1577 * 3. DMA-map pages (if system memory) 1578 * 4-a. Take notifier lock 1579 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1580 * 4-c. Check that the range was not split or otherwise invalidated 1581 * 4-d. Update GPU page table 1582 * 4.e. Release notifier lock 1583 * 5. Release page table (and SVM BO) reservation 1584 */ 1585 static int svm_range_validate_and_map(struct mm_struct *mm, 1586 unsigned long map_start, unsigned long map_last, 1587 struct svm_range *prange, int32_t gpuidx, 1588 bool intr, bool wait, bool flush_tlb) 1589 { 1590 struct svm_validate_context *ctx; 1591 unsigned long start, end, addr; 1592 struct kfd_process *p; 1593 void *owner; 1594 int32_t idx; 1595 int r = 0; 1596 1597 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1598 if (!ctx) 1599 return -ENOMEM; 1600 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1601 ctx->prange = prange; 1602 ctx->intr = intr; 1603 1604 if (gpuidx < MAX_GPU_INSTANCE) { 1605 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1606 bitmap_set(ctx->bitmap, gpuidx, 1); 1607 } else if (ctx->process->xnack_enabled) { 1608 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1609 1610 /* If prefetch range to GPU, or GPU retry fault migrate range to 1611 * GPU, which has ACCESS attribute to the range, create mapping 1612 * on that GPU. 1613 */ 1614 if (prange->actual_loc) { 1615 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1616 prange->actual_loc); 1617 if (gpuidx < 0) { 1618 WARN_ONCE(1, "failed get device by id 0x%x\n", 1619 prange->actual_loc); 1620 r = -EINVAL; 1621 goto free_ctx; 1622 } 1623 if (test_bit(gpuidx, prange->bitmap_access)) 1624 bitmap_set(ctx->bitmap, gpuidx, 1); 1625 } 1626 1627 /* 1628 * If prange is already mapped or with always mapped flag, 1629 * update mapping on GPUs with ACCESS attribute 1630 */ 1631 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1632 if (prange->mapped_to_gpu || 1633 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1634 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1635 } 1636 } else { 1637 bitmap_or(ctx->bitmap, prange->bitmap_access, 1638 prange->bitmap_aip, MAX_GPU_INSTANCE); 1639 } 1640 1641 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1642 r = 0; 1643 goto free_ctx; 1644 } 1645 1646 if (prange->actual_loc && !prange->ttm_res) { 1647 /* This should never happen. actual_loc gets set by 1648 * svm_migrate_ram_to_vram after allocating a BO. 1649 */ 1650 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1651 r = -EINVAL; 1652 goto free_ctx; 1653 } 1654 1655 r = svm_range_reserve_bos(ctx, intr); 1656 if (r) 1657 goto free_ctx; 1658 1659 p = container_of(prange->svms, struct kfd_process, svms); 1660 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1661 MAX_GPU_INSTANCE)); 1662 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1663 if (kfd_svm_page_owner(p, idx) != owner) { 1664 owner = NULL; 1665 break; 1666 } 1667 } 1668 1669 start = map_start << PAGE_SHIFT; 1670 end = (map_last + 1) << PAGE_SHIFT; 1671 for (addr = start; !r && addr < end; ) { 1672 struct hmm_range *hmm_range = NULL; 1673 unsigned long map_start_vma; 1674 unsigned long map_last_vma; 1675 struct vm_area_struct *vma; 1676 unsigned long next = 0; 1677 unsigned long offset; 1678 unsigned long npages; 1679 bool readonly; 1680 1681 vma = vma_lookup(mm, addr); 1682 if (vma) { 1683 readonly = !(vma->vm_flags & VM_WRITE); 1684 1685 next = min(vma->vm_end, end); 1686 npages = (next - addr) >> PAGE_SHIFT; 1687 WRITE_ONCE(p->svms.faulting_task, current); 1688 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1689 readonly, owner, NULL, 1690 &hmm_range); 1691 WRITE_ONCE(p->svms.faulting_task, NULL); 1692 if (r) 1693 pr_debug("failed %d to get svm range pages\n", r); 1694 } else { 1695 r = -EFAULT; 1696 } 1697 1698 if (!r) { 1699 offset = (addr >> PAGE_SHIFT) - prange->start; 1700 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1701 hmm_range->hmm_pfns); 1702 if (r) 1703 pr_debug("failed %d to dma map range\n", r); 1704 } 1705 1706 svm_range_lock(prange); 1707 1708 /* Free backing memory of hmm_range if it was initialized 1709 * Overrride return value to TRY AGAIN only if prior returns 1710 * were successful 1711 */ 1712 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1713 pr_debug("hmm update the range, need validate again\n"); 1714 r = -EAGAIN; 1715 } 1716 1717 if (!r && !list_empty(&prange->child_list)) { 1718 pr_debug("range split by unmap in parallel, validate again\n"); 1719 r = -EAGAIN; 1720 } 1721 1722 if (!r) { 1723 map_start_vma = max(map_start, prange->start + offset); 1724 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1725 if (map_start_vma <= map_last_vma) { 1726 offset = map_start_vma - prange->start; 1727 npages = map_last_vma - map_start_vma + 1; 1728 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1729 ctx->bitmap, wait, flush_tlb); 1730 } 1731 } 1732 1733 if (!r && next == end) 1734 prange->mapped_to_gpu = true; 1735 1736 svm_range_unlock(prange); 1737 1738 addr = next; 1739 } 1740 1741 svm_range_unreserve_bos(ctx); 1742 if (!r) 1743 prange->validate_timestamp = ktime_get_boottime(); 1744 1745 free_ctx: 1746 kfree(ctx); 1747 1748 return r; 1749 } 1750 1751 /** 1752 * svm_range_list_lock_and_flush_work - flush pending deferred work 1753 * 1754 * @svms: the svm range list 1755 * @mm: the mm structure 1756 * 1757 * Context: Returns with mmap write lock held, pending deferred work flushed 1758 * 1759 */ 1760 void 1761 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1762 struct mm_struct *mm) 1763 { 1764 retry_flush_work: 1765 flush_work(&svms->deferred_list_work); 1766 mmap_write_lock(mm); 1767 1768 if (list_empty(&svms->deferred_range_list)) 1769 return; 1770 mmap_write_unlock(mm); 1771 pr_debug("retry flush\n"); 1772 goto retry_flush_work; 1773 } 1774 1775 static void svm_range_restore_work(struct work_struct *work) 1776 { 1777 struct delayed_work *dwork = to_delayed_work(work); 1778 struct amdkfd_process_info *process_info; 1779 struct svm_range_list *svms; 1780 struct svm_range *prange; 1781 struct kfd_process *p; 1782 struct mm_struct *mm; 1783 int evicted_ranges; 1784 int invalid; 1785 int r; 1786 1787 svms = container_of(dwork, struct svm_range_list, restore_work); 1788 evicted_ranges = atomic_read(&svms->evicted_ranges); 1789 if (!evicted_ranges) 1790 return; 1791 1792 pr_debug("restore svm ranges\n"); 1793 1794 p = container_of(svms, struct kfd_process, svms); 1795 process_info = p->kgd_process_info; 1796 1797 /* Keep mm reference when svm_range_validate_and_map ranges */ 1798 mm = get_task_mm(p->lead_thread); 1799 if (!mm) { 1800 pr_debug("svms 0x%p process mm gone\n", svms); 1801 return; 1802 } 1803 1804 mutex_lock(&process_info->lock); 1805 svm_range_list_lock_and_flush_work(svms, mm); 1806 mutex_lock(&svms->lock); 1807 1808 evicted_ranges = atomic_read(&svms->evicted_ranges); 1809 1810 list_for_each_entry(prange, &svms->list, list) { 1811 invalid = atomic_read(&prange->invalid); 1812 if (!invalid) 1813 continue; 1814 1815 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1816 prange->svms, prange, prange->start, prange->last, 1817 invalid); 1818 1819 /* 1820 * If range is migrating, wait for migration is done. 1821 */ 1822 mutex_lock(&prange->migrate_mutex); 1823 1824 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1825 MAX_GPU_INSTANCE, false, true, false); 1826 if (r) 1827 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1828 prange->start); 1829 1830 mutex_unlock(&prange->migrate_mutex); 1831 if (r) 1832 goto out_reschedule; 1833 1834 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1835 goto out_reschedule; 1836 } 1837 1838 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1839 evicted_ranges) 1840 goto out_reschedule; 1841 1842 evicted_ranges = 0; 1843 1844 r = kgd2kfd_resume_mm(mm); 1845 if (r) { 1846 /* No recovery from this failure. Probably the CP is 1847 * hanging. No point trying again. 1848 */ 1849 pr_debug("failed %d to resume KFD\n", r); 1850 } 1851 1852 pr_debug("restore svm ranges successfully\n"); 1853 1854 out_reschedule: 1855 mutex_unlock(&svms->lock); 1856 mmap_write_unlock(mm); 1857 mutex_unlock(&process_info->lock); 1858 1859 /* If validation failed, reschedule another attempt */ 1860 if (evicted_ranges) { 1861 pr_debug("reschedule to restore svm range\n"); 1862 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1863 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1864 1865 kfd_smi_event_queue_restore_rescheduled(mm); 1866 } 1867 mmput(mm); 1868 } 1869 1870 /** 1871 * svm_range_evict - evict svm range 1872 * @prange: svm range structure 1873 * @mm: current process mm_struct 1874 * @start: starting process queue number 1875 * @last: last process queue number 1876 * @event: mmu notifier event when range is evicted or migrated 1877 * 1878 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1879 * return to let CPU evict the buffer and proceed CPU pagetable update. 1880 * 1881 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1882 * If invalidation happens while restore work is running, restore work will 1883 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1884 * the queues. 1885 */ 1886 static int 1887 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1888 unsigned long start, unsigned long last, 1889 enum mmu_notifier_event event) 1890 { 1891 struct svm_range_list *svms = prange->svms; 1892 struct svm_range *pchild; 1893 struct kfd_process *p; 1894 int r = 0; 1895 1896 p = container_of(svms, struct kfd_process, svms); 1897 1898 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1899 svms, prange->start, prange->last, start, last); 1900 1901 if (!p->xnack_enabled || 1902 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1903 int evicted_ranges; 1904 bool mapped = prange->mapped_to_gpu; 1905 1906 list_for_each_entry(pchild, &prange->child_list, child_list) { 1907 if (!pchild->mapped_to_gpu) 1908 continue; 1909 mapped = true; 1910 mutex_lock_nested(&pchild->lock, 1); 1911 if (pchild->start <= last && pchild->last >= start) { 1912 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1913 pchild->start, pchild->last); 1914 atomic_inc(&pchild->invalid); 1915 } 1916 mutex_unlock(&pchild->lock); 1917 } 1918 1919 if (!mapped) 1920 return r; 1921 1922 if (prange->start <= last && prange->last >= start) 1923 atomic_inc(&prange->invalid); 1924 1925 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1926 if (evicted_ranges != 1) 1927 return r; 1928 1929 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1930 prange->svms, prange->start, prange->last); 1931 1932 /* First eviction, stop the queues */ 1933 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1934 if (r) 1935 pr_debug("failed to quiesce KFD\n"); 1936 1937 pr_debug("schedule to restore svm %p ranges\n", svms); 1938 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1939 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1940 } else { 1941 unsigned long s, l; 1942 uint32_t trigger; 1943 1944 if (event == MMU_NOTIFY_MIGRATE) 1945 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1946 else 1947 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1948 1949 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1950 prange->svms, start, last); 1951 list_for_each_entry(pchild, &prange->child_list, child_list) { 1952 mutex_lock_nested(&pchild->lock, 1); 1953 s = max(start, pchild->start); 1954 l = min(last, pchild->last); 1955 if (l >= s) 1956 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1957 mutex_unlock(&pchild->lock); 1958 } 1959 s = max(start, prange->start); 1960 l = min(last, prange->last); 1961 if (l >= s) 1962 svm_range_unmap_from_gpus(prange, s, l, trigger); 1963 } 1964 1965 return r; 1966 } 1967 1968 static struct svm_range *svm_range_clone(struct svm_range *old) 1969 { 1970 struct svm_range *new; 1971 1972 new = svm_range_new(old->svms, old->start, old->last, false); 1973 if (!new) 1974 return NULL; 1975 if (svm_range_copy_dma_addrs(new, old)) { 1976 svm_range_free(new, false); 1977 return NULL; 1978 } 1979 if (old->svm_bo) { 1980 new->ttm_res = old->ttm_res; 1981 new->offset = old->offset; 1982 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1983 spin_lock(&new->svm_bo->list_lock); 1984 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1985 spin_unlock(&new->svm_bo->list_lock); 1986 } 1987 new->flags = old->flags; 1988 new->preferred_loc = old->preferred_loc; 1989 new->prefetch_loc = old->prefetch_loc; 1990 new->actual_loc = old->actual_loc; 1991 new->granularity = old->granularity; 1992 new->mapped_to_gpu = old->mapped_to_gpu; 1993 new->vram_pages = old->vram_pages; 1994 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1995 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1996 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1997 1998 return new; 1999 } 2000 2001 void svm_range_set_max_pages(struct amdgpu_device *adev) 2002 { 2003 uint64_t max_pages; 2004 uint64_t pages, _pages; 2005 uint64_t min_pages = 0; 2006 int i, id; 2007 2008 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2009 if (adev->kfd.dev->nodes[i]->xcp) 2010 id = adev->kfd.dev->nodes[i]->xcp->id; 2011 else 2012 id = -1; 2013 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2014 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2015 pages = rounddown_pow_of_two(pages); 2016 min_pages = min_not_zero(min_pages, pages); 2017 } 2018 2019 do { 2020 max_pages = READ_ONCE(max_svm_range_pages); 2021 _pages = min_not_zero(max_pages, min_pages); 2022 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2023 } 2024 2025 static int 2026 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2027 uint64_t max_pages, struct list_head *insert_list, 2028 struct list_head *update_list) 2029 { 2030 struct svm_range *prange; 2031 uint64_t l; 2032 2033 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2034 max_pages, start, last); 2035 2036 while (last >= start) { 2037 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2038 2039 prange = svm_range_new(svms, start, l, true); 2040 if (!prange) 2041 return -ENOMEM; 2042 list_add(&prange->list, insert_list); 2043 list_add(&prange->update_list, update_list); 2044 2045 start = l + 1; 2046 } 2047 return 0; 2048 } 2049 2050 /** 2051 * svm_range_add - add svm range and handle overlap 2052 * @p: the range add to this process svms 2053 * @start: page size aligned 2054 * @size: page size aligned 2055 * @nattr: number of attributes 2056 * @attrs: array of attributes 2057 * @update_list: output, the ranges need validate and update GPU mapping 2058 * @insert_list: output, the ranges need insert to svms 2059 * @remove_list: output, the ranges are replaced and need remove from svms 2060 * @remap_list: output, remap unaligned svm ranges 2061 * 2062 * Check if the virtual address range has overlap with any existing ranges, 2063 * split partly overlapping ranges and add new ranges in the gaps. All changes 2064 * should be applied to the range_list and interval tree transactionally. If 2065 * any range split or allocation fails, the entire update fails. Therefore any 2066 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2067 * unchanged. 2068 * 2069 * If the transaction succeeds, the caller can update and insert clones and 2070 * new ranges, then free the originals. 2071 * 2072 * Otherwise the caller can free the clones and new ranges, while the old 2073 * svm_ranges remain unchanged. 2074 * 2075 * Context: Process context, caller must hold svms->lock 2076 * 2077 * Return: 2078 * 0 - OK, otherwise error code 2079 */ 2080 static int 2081 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2082 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2083 struct list_head *update_list, struct list_head *insert_list, 2084 struct list_head *remove_list, struct list_head *remap_list) 2085 { 2086 unsigned long last = start + size - 1UL; 2087 struct svm_range_list *svms = &p->svms; 2088 struct interval_tree_node *node; 2089 struct svm_range *prange; 2090 struct svm_range *tmp; 2091 struct list_head new_list; 2092 int r = 0; 2093 2094 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2095 2096 INIT_LIST_HEAD(update_list); 2097 INIT_LIST_HEAD(insert_list); 2098 INIT_LIST_HEAD(remove_list); 2099 INIT_LIST_HEAD(&new_list); 2100 INIT_LIST_HEAD(remap_list); 2101 2102 node = interval_tree_iter_first(&svms->objects, start, last); 2103 while (node) { 2104 struct interval_tree_node *next; 2105 unsigned long next_start; 2106 2107 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2108 node->last); 2109 2110 prange = container_of(node, struct svm_range, it_node); 2111 next = interval_tree_iter_next(node, start, last); 2112 next_start = min(node->last, last) + 1; 2113 2114 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2115 prange->mapped_to_gpu) { 2116 /* nothing to do */ 2117 } else if (node->start < start || node->last > last) { 2118 /* node intersects the update range and its attributes 2119 * will change. Clone and split it, apply updates only 2120 * to the overlapping part 2121 */ 2122 struct svm_range *old = prange; 2123 2124 prange = svm_range_clone(old); 2125 if (!prange) { 2126 r = -ENOMEM; 2127 goto out; 2128 } 2129 2130 list_add(&old->update_list, remove_list); 2131 list_add(&prange->list, insert_list); 2132 list_add(&prange->update_list, update_list); 2133 2134 if (node->start < start) { 2135 pr_debug("change old range start\n"); 2136 r = svm_range_split_head(prange, start, 2137 insert_list, remap_list); 2138 if (r) 2139 goto out; 2140 } 2141 if (node->last > last) { 2142 pr_debug("change old range last\n"); 2143 r = svm_range_split_tail(prange, last, 2144 insert_list, remap_list); 2145 if (r) 2146 goto out; 2147 } 2148 } else { 2149 /* The node is contained within start..last, 2150 * just update it 2151 */ 2152 list_add(&prange->update_list, update_list); 2153 } 2154 2155 /* insert a new node if needed */ 2156 if (node->start > start) { 2157 r = svm_range_split_new(svms, start, node->start - 1, 2158 READ_ONCE(max_svm_range_pages), 2159 &new_list, update_list); 2160 if (r) 2161 goto out; 2162 } 2163 2164 node = next; 2165 start = next_start; 2166 } 2167 2168 /* add a final range at the end if needed */ 2169 if (start <= last) 2170 r = svm_range_split_new(svms, start, last, 2171 READ_ONCE(max_svm_range_pages), 2172 &new_list, update_list); 2173 2174 out: 2175 if (r) { 2176 list_for_each_entry_safe(prange, tmp, insert_list, list) 2177 svm_range_free(prange, false); 2178 list_for_each_entry_safe(prange, tmp, &new_list, list) 2179 svm_range_free(prange, true); 2180 } else { 2181 list_splice(&new_list, insert_list); 2182 } 2183 2184 return r; 2185 } 2186 2187 static void 2188 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2189 struct svm_range *prange) 2190 { 2191 unsigned long start; 2192 unsigned long last; 2193 2194 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2195 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2196 2197 if (prange->start == start && prange->last == last) 2198 return; 2199 2200 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2201 prange->svms, prange, start, last, prange->start, 2202 prange->last); 2203 2204 if (start != 0 && last != 0) { 2205 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2206 svm_range_remove_notifier(prange); 2207 } 2208 prange->it_node.start = prange->start; 2209 prange->it_node.last = prange->last; 2210 2211 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2212 svm_range_add_notifier_locked(mm, prange); 2213 } 2214 2215 static void 2216 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2217 struct mm_struct *mm) 2218 { 2219 switch (prange->work_item.op) { 2220 case SVM_OP_NULL: 2221 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2222 svms, prange, prange->start, prange->last); 2223 break; 2224 case SVM_OP_UNMAP_RANGE: 2225 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2226 svms, prange, prange->start, prange->last); 2227 svm_range_unlink(prange); 2228 svm_range_remove_notifier(prange); 2229 svm_range_free(prange, true); 2230 break; 2231 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2232 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2233 svms, prange, prange->start, prange->last); 2234 svm_range_update_notifier_and_interval_tree(mm, prange); 2235 break; 2236 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2237 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2238 svms, prange, prange->start, prange->last); 2239 svm_range_update_notifier_and_interval_tree(mm, prange); 2240 /* TODO: implement deferred validation and mapping */ 2241 break; 2242 case SVM_OP_ADD_RANGE: 2243 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2244 prange->start, prange->last); 2245 svm_range_add_to_svms(prange); 2246 svm_range_add_notifier_locked(mm, prange); 2247 break; 2248 case SVM_OP_ADD_RANGE_AND_MAP: 2249 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2250 prange, prange->start, prange->last); 2251 svm_range_add_to_svms(prange); 2252 svm_range_add_notifier_locked(mm, prange); 2253 /* TODO: implement deferred validation and mapping */ 2254 break; 2255 default: 2256 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2257 prange->work_item.op); 2258 } 2259 } 2260 2261 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2262 { 2263 struct kfd_process_device *pdd; 2264 struct kfd_process *p; 2265 uint32_t i; 2266 2267 p = container_of(svms, struct kfd_process, svms); 2268 2269 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2270 pdd = p->pdds[i]; 2271 if (!pdd) 2272 continue; 2273 2274 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2275 2276 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2277 pdd->dev->adev->irq.retry_cam_enabled ? 2278 &pdd->dev->adev->irq.ih : 2279 &pdd->dev->adev->irq.ih1); 2280 2281 if (pdd->dev->adev->irq.retry_cam_enabled) 2282 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2283 &pdd->dev->adev->irq.ih_soft); 2284 2285 2286 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2287 } 2288 } 2289 2290 static void svm_range_deferred_list_work(struct work_struct *work) 2291 { 2292 struct svm_range_list *svms; 2293 struct svm_range *prange; 2294 struct mm_struct *mm; 2295 2296 svms = container_of(work, struct svm_range_list, deferred_list_work); 2297 pr_debug("enter svms 0x%p\n", svms); 2298 2299 spin_lock(&svms->deferred_list_lock); 2300 while (!list_empty(&svms->deferred_range_list)) { 2301 prange = list_first_entry(&svms->deferred_range_list, 2302 struct svm_range, deferred_list); 2303 spin_unlock(&svms->deferred_list_lock); 2304 2305 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2306 prange->start, prange->last, prange->work_item.op); 2307 2308 mm = prange->work_item.mm; 2309 2310 mmap_write_lock(mm); 2311 2312 /* Remove from deferred_list must be inside mmap write lock, for 2313 * two race cases: 2314 * 1. unmap_from_cpu may change work_item.op and add the range 2315 * to deferred_list again, cause use after free bug. 2316 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2317 * lock and continue because deferred_list is empty, but 2318 * deferred_list work is actually waiting for mmap lock. 2319 */ 2320 spin_lock(&svms->deferred_list_lock); 2321 list_del_init(&prange->deferred_list); 2322 spin_unlock(&svms->deferred_list_lock); 2323 2324 mutex_lock(&svms->lock); 2325 mutex_lock(&prange->migrate_mutex); 2326 while (!list_empty(&prange->child_list)) { 2327 struct svm_range *pchild; 2328 2329 pchild = list_first_entry(&prange->child_list, 2330 struct svm_range, child_list); 2331 pr_debug("child prange 0x%p op %d\n", pchild, 2332 pchild->work_item.op); 2333 list_del_init(&pchild->child_list); 2334 svm_range_handle_list_op(svms, pchild, mm); 2335 } 2336 mutex_unlock(&prange->migrate_mutex); 2337 2338 svm_range_handle_list_op(svms, prange, mm); 2339 mutex_unlock(&svms->lock); 2340 mmap_write_unlock(mm); 2341 2342 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2343 * last mm refcount, schedule release work to avoid circular locking 2344 */ 2345 mmput_async(mm); 2346 2347 spin_lock(&svms->deferred_list_lock); 2348 } 2349 spin_unlock(&svms->deferred_list_lock); 2350 pr_debug("exit svms 0x%p\n", svms); 2351 } 2352 2353 void 2354 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2355 struct mm_struct *mm, enum svm_work_list_ops op) 2356 { 2357 spin_lock(&svms->deferred_list_lock); 2358 /* if prange is on the deferred list */ 2359 if (!list_empty(&prange->deferred_list)) { 2360 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2361 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2362 if (op != SVM_OP_NULL && 2363 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2364 prange->work_item.op = op; 2365 } else { 2366 prange->work_item.op = op; 2367 2368 /* Pairs with mmput in deferred_list_work */ 2369 mmget(mm); 2370 prange->work_item.mm = mm; 2371 list_add_tail(&prange->deferred_list, 2372 &prange->svms->deferred_range_list); 2373 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2374 prange, prange->start, prange->last, op); 2375 } 2376 spin_unlock(&svms->deferred_list_lock); 2377 } 2378 2379 void schedule_deferred_list_work(struct svm_range_list *svms) 2380 { 2381 spin_lock(&svms->deferred_list_lock); 2382 if (!list_empty(&svms->deferred_range_list)) 2383 schedule_work(&svms->deferred_list_work); 2384 spin_unlock(&svms->deferred_list_lock); 2385 } 2386 2387 static void 2388 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2389 struct svm_range *prange, unsigned long start, 2390 unsigned long last) 2391 { 2392 struct svm_range *head; 2393 struct svm_range *tail; 2394 2395 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2396 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2397 prange->start, prange->last); 2398 return; 2399 } 2400 if (start > prange->last || last < prange->start) 2401 return; 2402 2403 head = tail = prange; 2404 if (start > prange->start) 2405 svm_range_split(prange, prange->start, start - 1, &tail); 2406 if (last < tail->last) 2407 svm_range_split(tail, last + 1, tail->last, &head); 2408 2409 if (head != prange && tail != prange) { 2410 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2411 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2412 } else if (tail != prange) { 2413 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2414 } else if (head != prange) { 2415 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2416 } else if (parent != prange) { 2417 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2418 } 2419 } 2420 2421 static void 2422 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2423 unsigned long start, unsigned long last) 2424 { 2425 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2426 struct svm_range_list *svms; 2427 struct svm_range *pchild; 2428 struct kfd_process *p; 2429 unsigned long s, l; 2430 bool unmap_parent; 2431 uint32_t i; 2432 2433 if (atomic_read(&prange->queue_refcount)) { 2434 int r; 2435 2436 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2437 prange->start << PAGE_SHIFT); 2438 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2439 if (r) 2440 pr_debug("failed %d to quiesce KFD queues\n", r); 2441 } 2442 2443 p = kfd_lookup_process_by_mm(mm); 2444 if (!p) 2445 return; 2446 svms = &p->svms; 2447 2448 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2449 prange, prange->start, prange->last, start, last); 2450 2451 /* calculate time stamps that are used to decide which page faults need be 2452 * dropped or handled before unmap pages from gpu vm 2453 */ 2454 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2455 struct kfd_process_device *pdd; 2456 struct amdgpu_device *adev; 2457 struct amdgpu_ih_ring *ih; 2458 uint32_t checkpoint_wptr; 2459 2460 pdd = p->pdds[i]; 2461 if (!pdd) 2462 continue; 2463 2464 adev = pdd->dev->adev; 2465 2466 /* Check and drain ih1 ring if cam not available */ 2467 ih = &adev->irq.ih1; 2468 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2469 if (ih->rptr != checkpoint_wptr) { 2470 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2471 continue; 2472 } 2473 2474 /* check if dev->irq.ih_soft is not empty */ 2475 ih = &adev->irq.ih_soft; 2476 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2477 if (ih->rptr != checkpoint_wptr) 2478 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2479 } 2480 2481 unmap_parent = start <= prange->start && last >= prange->last; 2482 2483 list_for_each_entry(pchild, &prange->child_list, child_list) { 2484 mutex_lock_nested(&pchild->lock, 1); 2485 s = max(start, pchild->start); 2486 l = min(last, pchild->last); 2487 if (l >= s) 2488 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2489 svm_range_unmap_split(mm, prange, pchild, start, last); 2490 mutex_unlock(&pchild->lock); 2491 } 2492 s = max(start, prange->start); 2493 l = min(last, prange->last); 2494 if (l >= s) 2495 svm_range_unmap_from_gpus(prange, s, l, trigger); 2496 svm_range_unmap_split(mm, prange, prange, start, last); 2497 2498 if (unmap_parent) 2499 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2500 else 2501 svm_range_add_list_work(svms, prange, mm, 2502 SVM_OP_UPDATE_RANGE_NOTIFIER); 2503 schedule_deferred_list_work(svms); 2504 2505 kfd_unref_process(p); 2506 } 2507 2508 /** 2509 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2510 * @mni: mmu_interval_notifier struct 2511 * @range: mmu_notifier_range struct 2512 * @cur_seq: value to pass to mmu_interval_set_seq() 2513 * 2514 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2515 * is from migration, or CPU page invalidation callback. 2516 * 2517 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2518 * work thread, and split prange if only part of prange is unmapped. 2519 * 2520 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2521 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2522 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2523 * update GPU mapping to recover. 2524 * 2525 * Context: mmap lock, notifier_invalidate_start lock are held 2526 * for invalidate event, prange lock is held if this is from migration 2527 */ 2528 static bool 2529 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2530 const struct mmu_notifier_range *range, 2531 unsigned long cur_seq) 2532 { 2533 struct svm_range *prange; 2534 unsigned long start; 2535 unsigned long last; 2536 2537 if (range->event == MMU_NOTIFY_RELEASE) 2538 return true; 2539 if (!mmget_not_zero(mni->mm)) 2540 return true; 2541 2542 start = mni->interval_tree.start; 2543 last = mni->interval_tree.last; 2544 start = max(start, range->start) >> PAGE_SHIFT; 2545 last = min(last, range->end - 1) >> PAGE_SHIFT; 2546 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2547 start, last, range->start >> PAGE_SHIFT, 2548 (range->end - 1) >> PAGE_SHIFT, 2549 mni->interval_tree.start >> PAGE_SHIFT, 2550 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2551 2552 prange = container_of(mni, struct svm_range, notifier); 2553 2554 svm_range_lock(prange); 2555 mmu_interval_set_seq(mni, cur_seq); 2556 2557 switch (range->event) { 2558 case MMU_NOTIFY_UNMAP: 2559 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2560 break; 2561 default: 2562 svm_range_evict(prange, mni->mm, start, last, range->event); 2563 break; 2564 } 2565 2566 svm_range_unlock(prange); 2567 mmput(mni->mm); 2568 2569 return true; 2570 } 2571 2572 /** 2573 * svm_range_from_addr - find svm range from fault address 2574 * @svms: svm range list header 2575 * @addr: address to search range interval tree, in pages 2576 * @parent: parent range if range is on child list 2577 * 2578 * Context: The caller must hold svms->lock 2579 * 2580 * Return: the svm_range found or NULL 2581 */ 2582 struct svm_range * 2583 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2584 struct svm_range **parent) 2585 { 2586 struct interval_tree_node *node; 2587 struct svm_range *prange; 2588 struct svm_range *pchild; 2589 2590 node = interval_tree_iter_first(&svms->objects, addr, addr); 2591 if (!node) 2592 return NULL; 2593 2594 prange = container_of(node, struct svm_range, it_node); 2595 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2596 addr, prange->start, prange->last, node->start, node->last); 2597 2598 if (addr >= prange->start && addr <= prange->last) { 2599 if (parent) 2600 *parent = prange; 2601 return prange; 2602 } 2603 list_for_each_entry(pchild, &prange->child_list, child_list) 2604 if (addr >= pchild->start && addr <= pchild->last) { 2605 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2606 addr, pchild->start, pchild->last); 2607 if (parent) 2608 *parent = prange; 2609 return pchild; 2610 } 2611 2612 return NULL; 2613 } 2614 2615 /* svm_range_best_restore_location - decide the best fault restore location 2616 * @prange: svm range structure 2617 * @adev: the GPU on which vm fault happened 2618 * 2619 * This is only called when xnack is on, to decide the best location to restore 2620 * the range mapping after GPU vm fault. Caller uses the best location to do 2621 * migration if actual loc is not best location, then update GPU page table 2622 * mapping to the best location. 2623 * 2624 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2625 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2626 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2627 * if range actual loc is cpu, best_loc is cpu 2628 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2629 * range actual loc. 2630 * Otherwise, GPU no access, best_loc is -1. 2631 * 2632 * Return: 2633 * -1 means vm fault GPU no access 2634 * 0 for CPU or GPU id 2635 */ 2636 static int32_t 2637 svm_range_best_restore_location(struct svm_range *prange, 2638 struct kfd_node *node, 2639 int32_t *gpuidx) 2640 { 2641 struct kfd_node *bo_node, *preferred_node; 2642 struct kfd_process *p; 2643 uint32_t gpuid; 2644 int r; 2645 2646 p = container_of(prange->svms, struct kfd_process, svms); 2647 2648 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2649 if (r < 0) { 2650 pr_debug("failed to get gpuid from kgd\n"); 2651 return -1; 2652 } 2653 2654 if (node->adev->flags & AMD_IS_APU) 2655 return 0; 2656 2657 if (prange->preferred_loc == gpuid || 2658 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2659 return prange->preferred_loc; 2660 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2661 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2662 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2663 return prange->preferred_loc; 2664 /* fall through */ 2665 } 2666 2667 if (test_bit(*gpuidx, prange->bitmap_access)) 2668 return gpuid; 2669 2670 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2671 if (!prange->actual_loc) 2672 return 0; 2673 2674 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2675 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2676 return prange->actual_loc; 2677 else 2678 return 0; 2679 } 2680 2681 return -1; 2682 } 2683 2684 static int 2685 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2686 unsigned long *start, unsigned long *last, 2687 bool *is_heap_stack) 2688 { 2689 struct vm_area_struct *vma; 2690 struct interval_tree_node *node; 2691 struct rb_node *rb_node; 2692 unsigned long start_limit, end_limit; 2693 2694 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2695 if (!vma) { 2696 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2697 return -EFAULT; 2698 } 2699 2700 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2701 2702 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2703 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2704 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2705 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2706 /* First range that starts after the fault address */ 2707 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2708 if (node) { 2709 end_limit = min(end_limit, node->start); 2710 /* Last range that ends before the fault address */ 2711 rb_node = rb_prev(&node->rb); 2712 } else { 2713 /* Last range must end before addr because 2714 * there was no range after addr 2715 */ 2716 rb_node = rb_last(&p->svms.objects.rb_root); 2717 } 2718 if (rb_node) { 2719 node = container_of(rb_node, struct interval_tree_node, rb); 2720 if (node->last >= addr) { 2721 WARN(1, "Overlap with prev node and page fault addr\n"); 2722 return -EFAULT; 2723 } 2724 start_limit = max(start_limit, node->last + 1); 2725 } 2726 2727 *start = start_limit; 2728 *last = end_limit - 1; 2729 2730 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2731 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2732 *start, *last, *is_heap_stack); 2733 2734 return 0; 2735 } 2736 2737 static int 2738 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2739 uint64_t *bo_s, uint64_t *bo_l) 2740 { 2741 struct amdgpu_bo_va_mapping *mapping; 2742 struct interval_tree_node *node; 2743 struct amdgpu_bo *bo = NULL; 2744 unsigned long userptr; 2745 uint32_t i; 2746 int r; 2747 2748 for (i = 0; i < p->n_pdds; i++) { 2749 struct amdgpu_vm *vm; 2750 2751 if (!p->pdds[i]->drm_priv) 2752 continue; 2753 2754 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2755 r = amdgpu_bo_reserve(vm->root.bo, false); 2756 if (r) 2757 return r; 2758 2759 /* Check userptr by searching entire vm->va interval tree */ 2760 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2761 while (node) { 2762 mapping = container_of((struct rb_node *)node, 2763 struct amdgpu_bo_va_mapping, rb); 2764 bo = mapping->bo_va->base.bo; 2765 2766 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2767 start << PAGE_SHIFT, 2768 last << PAGE_SHIFT, 2769 &userptr)) { 2770 node = interval_tree_iter_next(node, 0, ~0ULL); 2771 continue; 2772 } 2773 2774 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2775 start, last); 2776 if (bo_s && bo_l) { 2777 *bo_s = userptr >> PAGE_SHIFT; 2778 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2779 } 2780 amdgpu_bo_unreserve(vm->root.bo); 2781 return -EADDRINUSE; 2782 } 2783 amdgpu_bo_unreserve(vm->root.bo); 2784 } 2785 return 0; 2786 } 2787 2788 static struct 2789 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2790 struct kfd_process *p, 2791 struct mm_struct *mm, 2792 int64_t addr) 2793 { 2794 struct svm_range *prange = NULL; 2795 unsigned long start, last; 2796 uint32_t gpuid, gpuidx; 2797 bool is_heap_stack; 2798 uint64_t bo_s = 0; 2799 uint64_t bo_l = 0; 2800 int r; 2801 2802 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2803 &is_heap_stack)) 2804 return NULL; 2805 2806 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2807 if (r != -EADDRINUSE) 2808 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2809 2810 if (r == -EADDRINUSE) { 2811 if (addr >= bo_s && addr <= bo_l) 2812 return NULL; 2813 2814 /* Create one page svm range if 2MB range overlapping */ 2815 start = addr; 2816 last = addr; 2817 } 2818 2819 prange = svm_range_new(&p->svms, start, last, true); 2820 if (!prange) { 2821 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2822 return NULL; 2823 } 2824 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2825 pr_debug("failed to get gpuid from kgd\n"); 2826 svm_range_free(prange, true); 2827 return NULL; 2828 } 2829 2830 if (is_heap_stack) 2831 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2832 2833 svm_range_add_to_svms(prange); 2834 svm_range_add_notifier_locked(mm, prange); 2835 2836 return prange; 2837 } 2838 2839 /* svm_range_skip_recover - decide if prange can be recovered 2840 * @prange: svm range structure 2841 * 2842 * GPU vm retry fault handle skip recover the range for cases: 2843 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2844 * deferred list work will drain the stale fault before free the prange. 2845 * 2. prange is on deferred list to add interval notifier after split, or 2846 * 3. prange is child range, it is split from parent prange, recover later 2847 * after interval notifier is added. 2848 * 2849 * Return: true to skip recover, false to recover 2850 */ 2851 static bool svm_range_skip_recover(struct svm_range *prange) 2852 { 2853 struct svm_range_list *svms = prange->svms; 2854 2855 spin_lock(&svms->deferred_list_lock); 2856 if (list_empty(&prange->deferred_list) && 2857 list_empty(&prange->child_list)) { 2858 spin_unlock(&svms->deferred_list_lock); 2859 return false; 2860 } 2861 spin_unlock(&svms->deferred_list_lock); 2862 2863 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2864 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2865 svms, prange, prange->start, prange->last); 2866 return true; 2867 } 2868 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2869 prange->work_item.op == SVM_OP_ADD_RANGE) { 2870 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2871 svms, prange, prange->start, prange->last); 2872 return true; 2873 } 2874 return false; 2875 } 2876 2877 static void 2878 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2879 int32_t gpuidx) 2880 { 2881 struct kfd_process_device *pdd; 2882 2883 /* fault is on different page of same range 2884 * or fault is skipped to recover later 2885 * or fault is on invalid virtual address 2886 */ 2887 if (gpuidx == MAX_GPU_INSTANCE) { 2888 uint32_t gpuid; 2889 int r; 2890 2891 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2892 if (r < 0) 2893 return; 2894 } 2895 2896 /* fault is recovered 2897 * or fault cannot recover because GPU no access on the range 2898 */ 2899 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2900 if (pdd) 2901 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2902 } 2903 2904 static bool 2905 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2906 { 2907 unsigned long requested = VM_READ; 2908 2909 if (write_fault) 2910 requested |= VM_WRITE; 2911 2912 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2913 vma->vm_flags); 2914 return (vma->vm_flags & requested) == requested; 2915 } 2916 2917 int 2918 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2919 uint32_t vmid, uint32_t node_id, 2920 uint64_t addr, uint64_t ts, bool write_fault) 2921 { 2922 unsigned long start, last, size; 2923 struct mm_struct *mm = NULL; 2924 struct svm_range_list *svms; 2925 struct svm_range *prange; 2926 struct kfd_process *p; 2927 ktime_t timestamp = ktime_get_boottime(); 2928 struct kfd_node *node; 2929 int32_t best_loc; 2930 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2931 bool write_locked = false; 2932 struct vm_area_struct *vma; 2933 bool migration = false; 2934 int r = 0; 2935 2936 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2937 pr_debug("device does not support SVM\n"); 2938 return -EFAULT; 2939 } 2940 2941 p = kfd_lookup_process_by_pasid(pasid); 2942 if (!p) { 2943 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2944 return 0; 2945 } 2946 svms = &p->svms; 2947 2948 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2949 2950 if (atomic_read(&svms->drain_pagefaults)) { 2951 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 2952 r = 0; 2953 goto out; 2954 } 2955 2956 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2957 if (!node) { 2958 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2959 vmid); 2960 r = -EFAULT; 2961 goto out; 2962 } 2963 2964 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2965 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 2966 r = -EFAULT; 2967 goto out; 2968 } 2969 2970 /* check if this page fault time stamp is before svms->checkpoint_ts */ 2971 if (svms->checkpoint_ts[gpuidx] != 0) { 2972 if (amdgpu_ih_ts_after(ts, svms->checkpoint_ts[gpuidx])) { 2973 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2974 r = 0; 2975 goto out; 2976 } else 2977 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 2978 * to zero to avoid following ts wrap around give wrong comparing 2979 */ 2980 svms->checkpoint_ts[gpuidx] = 0; 2981 } 2982 2983 if (!p->xnack_enabled) { 2984 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2985 r = -EFAULT; 2986 goto out; 2987 } 2988 2989 /* p->lead_thread is available as kfd_process_wq_release flush the work 2990 * before releasing task ref. 2991 */ 2992 mm = get_task_mm(p->lead_thread); 2993 if (!mm) { 2994 pr_debug("svms 0x%p failed to get mm\n", svms); 2995 r = 0; 2996 goto out; 2997 } 2998 2999 mmap_read_lock(mm); 3000 retry_write_locked: 3001 mutex_lock(&svms->lock); 3002 prange = svm_range_from_addr(svms, addr, NULL); 3003 if (!prange) { 3004 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3005 svms, addr); 3006 if (!write_locked) { 3007 /* Need the write lock to create new range with MMU notifier. 3008 * Also flush pending deferred work to make sure the interval 3009 * tree is up to date before we add a new range 3010 */ 3011 mutex_unlock(&svms->lock); 3012 mmap_read_unlock(mm); 3013 mmap_write_lock(mm); 3014 write_locked = true; 3015 goto retry_write_locked; 3016 } 3017 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3018 if (!prange) { 3019 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3020 svms, addr); 3021 mmap_write_downgrade(mm); 3022 r = -EFAULT; 3023 goto out_unlock_svms; 3024 } 3025 } 3026 if (write_locked) 3027 mmap_write_downgrade(mm); 3028 3029 mutex_lock(&prange->migrate_mutex); 3030 3031 if (svm_range_skip_recover(prange)) { 3032 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3033 r = 0; 3034 goto out_unlock_range; 3035 } 3036 3037 /* skip duplicate vm fault on different pages of same range */ 3038 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3039 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3040 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3041 svms, prange->start, prange->last); 3042 r = 0; 3043 goto out_unlock_range; 3044 } 3045 3046 /* __do_munmap removed VMA, return success as we are handling stale 3047 * retry fault. 3048 */ 3049 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3050 if (!vma) { 3051 pr_debug("address 0x%llx VMA is removed\n", addr); 3052 r = 0; 3053 goto out_unlock_range; 3054 } 3055 3056 if (!svm_fault_allowed(vma, write_fault)) { 3057 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3058 write_fault ? "write" : "read"); 3059 r = -EPERM; 3060 goto out_unlock_range; 3061 } 3062 3063 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3064 if (best_loc == -1) { 3065 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3066 svms, prange->start, prange->last); 3067 r = -EACCES; 3068 goto out_unlock_range; 3069 } 3070 3071 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3072 svms, prange->start, prange->last, best_loc, 3073 prange->actual_loc); 3074 3075 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3076 write_fault, timestamp); 3077 3078 /* Align migration range start and size to granularity size */ 3079 size = 1UL << prange->granularity; 3080 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3081 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3082 if (prange->actual_loc != 0 || best_loc != 0) { 3083 migration = true; 3084 3085 if (best_loc) { 3086 r = svm_migrate_to_vram(prange, best_loc, start, last, 3087 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3088 if (r) { 3089 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3090 r, addr); 3091 /* Fallback to system memory if migration to 3092 * VRAM failed 3093 */ 3094 if (prange->actual_loc && prange->actual_loc != best_loc) 3095 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3096 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3097 else 3098 r = 0; 3099 } 3100 } else { 3101 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3102 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3103 } 3104 if (r) { 3105 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3106 r, svms, start, last); 3107 goto out_unlock_range; 3108 } 3109 } 3110 3111 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3112 false, false); 3113 if (r) 3114 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3115 r, svms, start, last); 3116 3117 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3118 migration); 3119 3120 out_unlock_range: 3121 mutex_unlock(&prange->migrate_mutex); 3122 out_unlock_svms: 3123 mutex_unlock(&svms->lock); 3124 mmap_read_unlock(mm); 3125 3126 svm_range_count_fault(node, p, gpuidx); 3127 3128 mmput(mm); 3129 out: 3130 kfd_unref_process(p); 3131 3132 if (r == -EAGAIN) { 3133 pr_debug("recover vm fault later\n"); 3134 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3135 r = 0; 3136 } 3137 return r; 3138 } 3139 3140 int 3141 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3142 { 3143 struct svm_range *prange, *pchild; 3144 uint64_t reserved_size = 0; 3145 uint64_t size; 3146 int r = 0; 3147 3148 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3149 3150 mutex_lock(&p->svms.lock); 3151 3152 list_for_each_entry(prange, &p->svms.list, list) { 3153 svm_range_lock(prange); 3154 list_for_each_entry(pchild, &prange->child_list, child_list) { 3155 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3156 if (xnack_enabled) { 3157 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3158 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3159 } else { 3160 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3161 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3162 if (r) 3163 goto out_unlock; 3164 reserved_size += size; 3165 } 3166 } 3167 3168 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3169 if (xnack_enabled) { 3170 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3171 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3172 } else { 3173 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3174 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3175 if (r) 3176 goto out_unlock; 3177 reserved_size += size; 3178 } 3179 out_unlock: 3180 svm_range_unlock(prange); 3181 if (r) 3182 break; 3183 } 3184 3185 if (r) 3186 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3187 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3188 else 3189 /* Change xnack mode must be inside svms lock, to avoid race with 3190 * svm_range_deferred_list_work unreserve memory in parallel. 3191 */ 3192 p->xnack_enabled = xnack_enabled; 3193 3194 mutex_unlock(&p->svms.lock); 3195 return r; 3196 } 3197 3198 void svm_range_list_fini(struct kfd_process *p) 3199 { 3200 struct svm_range *prange; 3201 struct svm_range *next; 3202 3203 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3204 3205 cancel_delayed_work_sync(&p->svms.restore_work); 3206 3207 /* Ensure list work is finished before process is destroyed */ 3208 flush_work(&p->svms.deferred_list_work); 3209 3210 /* 3211 * Ensure no retry fault comes in afterwards, as page fault handler will 3212 * not find kfd process and take mm lock to recover fault. 3213 * stop kfd page fault handing, then wait pending page faults got drained 3214 */ 3215 atomic_set(&p->svms.drain_pagefaults, 1); 3216 svm_range_drain_retry_fault(&p->svms); 3217 3218 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3219 svm_range_unlink(prange); 3220 svm_range_remove_notifier(prange); 3221 svm_range_free(prange, true); 3222 } 3223 3224 mutex_destroy(&p->svms.lock); 3225 3226 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3227 } 3228 3229 int svm_range_list_init(struct kfd_process *p) 3230 { 3231 struct svm_range_list *svms = &p->svms; 3232 int i; 3233 3234 svms->objects = RB_ROOT_CACHED; 3235 mutex_init(&svms->lock); 3236 INIT_LIST_HEAD(&svms->list); 3237 atomic_set(&svms->evicted_ranges, 0); 3238 atomic_set(&svms->drain_pagefaults, 0); 3239 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3240 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3241 INIT_LIST_HEAD(&svms->deferred_range_list); 3242 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3243 spin_lock_init(&svms->deferred_list_lock); 3244 3245 for (i = 0; i < p->n_pdds; i++) 3246 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3247 bitmap_set(svms->bitmap_supported, i, 1); 3248 3249 return 0; 3250 } 3251 3252 /** 3253 * svm_range_check_vm - check if virtual address range mapped already 3254 * @p: current kfd_process 3255 * @start: range start address, in pages 3256 * @last: range last address, in pages 3257 * @bo_s: mapping start address in pages if address range already mapped 3258 * @bo_l: mapping last address in pages if address range already mapped 3259 * 3260 * The purpose is to avoid virtual address ranges already allocated by 3261 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3262 * It looks for each pdd in the kfd_process. 3263 * 3264 * Context: Process context 3265 * 3266 * Return 0 - OK, if the range is not mapped. 3267 * Otherwise error code: 3268 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3269 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3270 * a signal. Release all buffer reservations and return to user-space. 3271 */ 3272 static int 3273 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3274 uint64_t *bo_s, uint64_t *bo_l) 3275 { 3276 struct amdgpu_bo_va_mapping *mapping; 3277 struct interval_tree_node *node; 3278 uint32_t i; 3279 int r; 3280 3281 for (i = 0; i < p->n_pdds; i++) { 3282 struct amdgpu_vm *vm; 3283 3284 if (!p->pdds[i]->drm_priv) 3285 continue; 3286 3287 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3288 r = amdgpu_bo_reserve(vm->root.bo, false); 3289 if (r) 3290 return r; 3291 3292 node = interval_tree_iter_first(&vm->va, start, last); 3293 if (node) { 3294 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3295 start, last); 3296 mapping = container_of((struct rb_node *)node, 3297 struct amdgpu_bo_va_mapping, rb); 3298 if (bo_s && bo_l) { 3299 *bo_s = mapping->start; 3300 *bo_l = mapping->last; 3301 } 3302 amdgpu_bo_unreserve(vm->root.bo); 3303 return -EADDRINUSE; 3304 } 3305 amdgpu_bo_unreserve(vm->root.bo); 3306 } 3307 3308 return 0; 3309 } 3310 3311 /** 3312 * svm_range_is_valid - check if virtual address range is valid 3313 * @p: current kfd_process 3314 * @start: range start address, in pages 3315 * @size: range size, in pages 3316 * 3317 * Valid virtual address range means it belongs to one or more VMAs 3318 * 3319 * Context: Process context 3320 * 3321 * Return: 3322 * 0 - OK, otherwise error code 3323 */ 3324 static int 3325 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3326 { 3327 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3328 struct vm_area_struct *vma; 3329 unsigned long end; 3330 unsigned long start_unchg = start; 3331 3332 start <<= PAGE_SHIFT; 3333 end = start + (size << PAGE_SHIFT); 3334 do { 3335 vma = vma_lookup(p->mm, start); 3336 if (!vma || (vma->vm_flags & device_vma)) 3337 return -EFAULT; 3338 start = min(end, vma->vm_end); 3339 } while (start < end); 3340 3341 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3342 NULL); 3343 } 3344 3345 /** 3346 * svm_range_best_prefetch_location - decide the best prefetch location 3347 * @prange: svm range structure 3348 * 3349 * For xnack off: 3350 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3351 * can be CPU or GPU. 3352 * 3353 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3354 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3355 * the best prefetch location is always CPU, because GPU can not have coherent 3356 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3357 * 3358 * For xnack on: 3359 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3360 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3361 * 3362 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3363 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3364 * prefetch location is always CPU. 3365 * 3366 * Context: Process context 3367 * 3368 * Return: 3369 * 0 for CPU or GPU id 3370 */ 3371 static uint32_t 3372 svm_range_best_prefetch_location(struct svm_range *prange) 3373 { 3374 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3375 uint32_t best_loc = prange->prefetch_loc; 3376 struct kfd_process_device *pdd; 3377 struct kfd_node *bo_node; 3378 struct kfd_process *p; 3379 uint32_t gpuidx; 3380 3381 p = container_of(prange->svms, struct kfd_process, svms); 3382 3383 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3384 goto out; 3385 3386 bo_node = svm_range_get_node_by_id(prange, best_loc); 3387 if (!bo_node) { 3388 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3389 best_loc = 0; 3390 goto out; 3391 } 3392 3393 if (bo_node->adev->flags & AMD_IS_APU) { 3394 best_loc = 0; 3395 goto out; 3396 } 3397 3398 if (p->xnack_enabled) 3399 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3400 else 3401 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3402 MAX_GPU_INSTANCE); 3403 3404 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3405 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3406 if (!pdd) { 3407 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3408 continue; 3409 } 3410 3411 if (pdd->dev->adev == bo_node->adev) 3412 continue; 3413 3414 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3415 best_loc = 0; 3416 break; 3417 } 3418 } 3419 3420 out: 3421 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3422 p->xnack_enabled, &p->svms, prange->start, prange->last, 3423 best_loc); 3424 3425 return best_loc; 3426 } 3427 3428 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3429 * @mm: current process mm_struct 3430 * @prange: svm range structure 3431 * @migrated: output, true if migration is triggered 3432 * 3433 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3434 * from ram to vram. 3435 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3436 * from vram to ram. 3437 * 3438 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3439 * and restore work: 3440 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3441 * stops all queues, schedule restore work 3442 * 2. svm_range_restore_work wait for migration is done by 3443 * a. svm_range_validate_vram takes prange->migrate_mutex 3444 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3445 * 3. restore work update mappings of GPU, resume all queues. 3446 * 3447 * Context: Process context 3448 * 3449 * Return: 3450 * 0 - OK, otherwise - error code of migration 3451 */ 3452 static int 3453 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3454 bool *migrated) 3455 { 3456 uint32_t best_loc; 3457 int r = 0; 3458 3459 *migrated = false; 3460 best_loc = svm_range_best_prefetch_location(prange); 3461 3462 /* when best_loc is a gpu node and same as prange->actual_loc 3463 * we still need do migration as prange->actual_loc !=0 does 3464 * not mean all pages in prange are vram. hmm migrate will pick 3465 * up right pages during migration. 3466 */ 3467 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3468 (best_loc == 0 && prange->actual_loc == 0)) 3469 return 0; 3470 3471 if (!best_loc) { 3472 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3473 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3474 *migrated = !r; 3475 return r; 3476 } 3477 3478 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3479 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3480 *migrated = !r; 3481 3482 return 0; 3483 } 3484 3485 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3486 { 3487 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3488 * signaled yet and we're under the protection of the fence->lock. 3489 * After the fence is signaled in svm_range_bo_release, we cannot get 3490 * here any more. 3491 * 3492 * Reference is dropped in svm_range_evict_svm_bo_worker. 3493 */ 3494 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3495 WRITE_ONCE(fence->svm_bo->evicting, 1); 3496 schedule_work(&fence->svm_bo->eviction_work); 3497 } 3498 3499 return 0; 3500 } 3501 3502 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3503 { 3504 struct svm_range_bo *svm_bo; 3505 struct mm_struct *mm; 3506 int r = 0; 3507 3508 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3509 3510 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3511 mm = svm_bo->eviction_fence->mm; 3512 } else { 3513 svm_range_bo_unref(svm_bo); 3514 return; 3515 } 3516 3517 mmap_read_lock(mm); 3518 spin_lock(&svm_bo->list_lock); 3519 while (!list_empty(&svm_bo->range_list) && !r) { 3520 struct svm_range *prange = 3521 list_first_entry(&svm_bo->range_list, 3522 struct svm_range, svm_bo_list); 3523 int retries = 3; 3524 3525 list_del_init(&prange->svm_bo_list); 3526 spin_unlock(&svm_bo->list_lock); 3527 3528 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3529 prange->start, prange->last); 3530 3531 mutex_lock(&prange->migrate_mutex); 3532 do { 3533 /* migrate all vram pages in this prange to sys ram 3534 * after that prange->actual_loc should be zero 3535 */ 3536 r = svm_migrate_vram_to_ram(prange, mm, 3537 prange->start, prange->last, 3538 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3539 } while (!r && prange->actual_loc && --retries); 3540 3541 if (!r && prange->actual_loc) 3542 pr_info_once("Migration failed during eviction"); 3543 3544 if (!prange->actual_loc) { 3545 mutex_lock(&prange->lock); 3546 prange->svm_bo = NULL; 3547 mutex_unlock(&prange->lock); 3548 } 3549 mutex_unlock(&prange->migrate_mutex); 3550 3551 spin_lock(&svm_bo->list_lock); 3552 } 3553 spin_unlock(&svm_bo->list_lock); 3554 mmap_read_unlock(mm); 3555 mmput(mm); 3556 3557 dma_fence_signal(&svm_bo->eviction_fence->base); 3558 3559 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3560 * has been called in svm_migrate_vram_to_ram 3561 */ 3562 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3563 svm_range_bo_unref(svm_bo); 3564 } 3565 3566 static int 3567 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3568 uint64_t start, uint64_t size, uint32_t nattr, 3569 struct kfd_ioctl_svm_attribute *attrs) 3570 { 3571 struct amdkfd_process_info *process_info = p->kgd_process_info; 3572 struct list_head update_list; 3573 struct list_head insert_list; 3574 struct list_head remove_list; 3575 struct list_head remap_list; 3576 struct svm_range_list *svms; 3577 struct svm_range *prange; 3578 struct svm_range *next; 3579 bool update_mapping = false; 3580 bool flush_tlb; 3581 int r, ret = 0; 3582 3583 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3584 p->pasid, &p->svms, start, start + size - 1, size); 3585 3586 r = svm_range_check_attr(p, nattr, attrs); 3587 if (r) 3588 return r; 3589 3590 svms = &p->svms; 3591 3592 mutex_lock(&process_info->lock); 3593 3594 svm_range_list_lock_and_flush_work(svms, mm); 3595 3596 r = svm_range_is_valid(p, start, size); 3597 if (r) { 3598 pr_debug("invalid range r=%d\n", r); 3599 mmap_write_unlock(mm); 3600 goto out; 3601 } 3602 3603 mutex_lock(&svms->lock); 3604 3605 /* Add new range and split existing ranges as needed */ 3606 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3607 &insert_list, &remove_list, &remap_list); 3608 if (r) { 3609 mutex_unlock(&svms->lock); 3610 mmap_write_unlock(mm); 3611 goto out; 3612 } 3613 /* Apply changes as a transaction */ 3614 list_for_each_entry_safe(prange, next, &insert_list, list) { 3615 svm_range_add_to_svms(prange); 3616 svm_range_add_notifier_locked(mm, prange); 3617 } 3618 list_for_each_entry(prange, &update_list, update_list) { 3619 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3620 /* TODO: unmap ranges from GPU that lost access */ 3621 } 3622 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3623 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3624 prange->svms, prange, prange->start, 3625 prange->last); 3626 svm_range_unlink(prange); 3627 svm_range_remove_notifier(prange); 3628 svm_range_free(prange, false); 3629 } 3630 3631 mmap_write_downgrade(mm); 3632 /* Trigger migrations and revalidate and map to GPUs as needed. If 3633 * this fails we may be left with partially completed actions. There 3634 * is no clean way of rolling back to the previous state in such a 3635 * case because the rollback wouldn't be guaranteed to work either. 3636 */ 3637 list_for_each_entry(prange, &update_list, update_list) { 3638 bool migrated; 3639 3640 mutex_lock(&prange->migrate_mutex); 3641 3642 r = svm_range_trigger_migration(mm, prange, &migrated); 3643 if (r) 3644 goto out_unlock_range; 3645 3646 if (migrated && (!p->xnack_enabled || 3647 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3648 prange->mapped_to_gpu) { 3649 pr_debug("restore_work will update mappings of GPUs\n"); 3650 mutex_unlock(&prange->migrate_mutex); 3651 continue; 3652 } 3653 3654 if (!migrated && !update_mapping) { 3655 mutex_unlock(&prange->migrate_mutex); 3656 continue; 3657 } 3658 3659 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3660 3661 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3662 MAX_GPU_INSTANCE, true, true, flush_tlb); 3663 if (r) 3664 pr_debug("failed %d to map svm range\n", r); 3665 3666 out_unlock_range: 3667 mutex_unlock(&prange->migrate_mutex); 3668 if (r) 3669 ret = r; 3670 } 3671 3672 list_for_each_entry(prange, &remap_list, update_list) { 3673 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3674 prange, prange->start, prange->last); 3675 mutex_lock(&prange->migrate_mutex); 3676 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3677 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3678 if (r) 3679 pr_debug("failed %d on remap svm range\n", r); 3680 mutex_unlock(&prange->migrate_mutex); 3681 if (r) 3682 ret = r; 3683 } 3684 3685 dynamic_svm_range_dump(svms); 3686 3687 mutex_unlock(&svms->lock); 3688 mmap_read_unlock(mm); 3689 out: 3690 mutex_unlock(&process_info->lock); 3691 3692 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3693 &p->svms, start, start + size - 1, r); 3694 3695 return ret ? ret : r; 3696 } 3697 3698 static int 3699 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3700 uint64_t start, uint64_t size, uint32_t nattr, 3701 struct kfd_ioctl_svm_attribute *attrs) 3702 { 3703 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3704 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3705 bool get_preferred_loc = false; 3706 bool get_prefetch_loc = false; 3707 bool get_granularity = false; 3708 bool get_accessible = false; 3709 bool get_flags = false; 3710 uint64_t last = start + size - 1UL; 3711 uint8_t granularity = 0xff; 3712 struct interval_tree_node *node; 3713 struct svm_range_list *svms; 3714 struct svm_range *prange; 3715 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3716 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3717 uint32_t flags_and = 0xffffffff; 3718 uint32_t flags_or = 0; 3719 int gpuidx; 3720 uint32_t i; 3721 int r = 0; 3722 3723 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3724 start + size - 1, nattr); 3725 3726 /* Flush pending deferred work to avoid racing with deferred actions from 3727 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3728 * can still race with get_attr because we don't hold the mmap lock. But that 3729 * would be a race condition in the application anyway, and undefined 3730 * behaviour is acceptable in that case. 3731 */ 3732 flush_work(&p->svms.deferred_list_work); 3733 3734 mmap_read_lock(mm); 3735 r = svm_range_is_valid(p, start, size); 3736 mmap_read_unlock(mm); 3737 if (r) { 3738 pr_debug("invalid range r=%d\n", r); 3739 return r; 3740 } 3741 3742 for (i = 0; i < nattr; i++) { 3743 switch (attrs[i].type) { 3744 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3745 get_preferred_loc = true; 3746 break; 3747 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3748 get_prefetch_loc = true; 3749 break; 3750 case KFD_IOCTL_SVM_ATTR_ACCESS: 3751 get_accessible = true; 3752 break; 3753 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3754 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3755 get_flags = true; 3756 break; 3757 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3758 get_granularity = true; 3759 break; 3760 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3761 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3762 fallthrough; 3763 default: 3764 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3765 return -EINVAL; 3766 } 3767 } 3768 3769 svms = &p->svms; 3770 3771 mutex_lock(&svms->lock); 3772 3773 node = interval_tree_iter_first(&svms->objects, start, last); 3774 if (!node) { 3775 pr_debug("range attrs not found return default values\n"); 3776 svm_range_set_default_attributes(&location, &prefetch_loc, 3777 &granularity, &flags_and); 3778 flags_or = flags_and; 3779 if (p->xnack_enabled) 3780 bitmap_copy(bitmap_access, svms->bitmap_supported, 3781 MAX_GPU_INSTANCE); 3782 else 3783 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3784 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3785 goto fill_values; 3786 } 3787 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3788 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3789 3790 while (node) { 3791 struct interval_tree_node *next; 3792 3793 prange = container_of(node, struct svm_range, it_node); 3794 next = interval_tree_iter_next(node, start, last); 3795 3796 if (get_preferred_loc) { 3797 if (prange->preferred_loc == 3798 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3799 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3800 location != prange->preferred_loc)) { 3801 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3802 get_preferred_loc = false; 3803 } else { 3804 location = prange->preferred_loc; 3805 } 3806 } 3807 if (get_prefetch_loc) { 3808 if (prange->prefetch_loc == 3809 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3810 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3811 prefetch_loc != prange->prefetch_loc)) { 3812 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3813 get_prefetch_loc = false; 3814 } else { 3815 prefetch_loc = prange->prefetch_loc; 3816 } 3817 } 3818 if (get_accessible) { 3819 bitmap_and(bitmap_access, bitmap_access, 3820 prange->bitmap_access, MAX_GPU_INSTANCE); 3821 bitmap_and(bitmap_aip, bitmap_aip, 3822 prange->bitmap_aip, MAX_GPU_INSTANCE); 3823 } 3824 if (get_flags) { 3825 flags_and &= prange->flags; 3826 flags_or |= prange->flags; 3827 } 3828 3829 if (get_granularity && prange->granularity < granularity) 3830 granularity = prange->granularity; 3831 3832 node = next; 3833 } 3834 fill_values: 3835 mutex_unlock(&svms->lock); 3836 3837 for (i = 0; i < nattr; i++) { 3838 switch (attrs[i].type) { 3839 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3840 attrs[i].value = location; 3841 break; 3842 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3843 attrs[i].value = prefetch_loc; 3844 break; 3845 case KFD_IOCTL_SVM_ATTR_ACCESS: 3846 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3847 attrs[i].value); 3848 if (gpuidx < 0) { 3849 pr_debug("invalid gpuid %x\n", attrs[i].value); 3850 return -EINVAL; 3851 } 3852 if (test_bit(gpuidx, bitmap_access)) 3853 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3854 else if (test_bit(gpuidx, bitmap_aip)) 3855 attrs[i].type = 3856 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3857 else 3858 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3859 break; 3860 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3861 attrs[i].value = flags_and; 3862 break; 3863 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3864 attrs[i].value = ~flags_or; 3865 break; 3866 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3867 attrs[i].value = (uint32_t)granularity; 3868 break; 3869 } 3870 } 3871 3872 return 0; 3873 } 3874 3875 int kfd_criu_resume_svm(struct kfd_process *p) 3876 { 3877 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3878 int nattr_common = 4, nattr_accessibility = 1; 3879 struct criu_svm_metadata *criu_svm_md = NULL; 3880 struct svm_range_list *svms = &p->svms; 3881 struct criu_svm_metadata *next = NULL; 3882 uint32_t set_flags = 0xffffffff; 3883 int i, j, num_attrs, ret = 0; 3884 uint64_t set_attr_size; 3885 struct mm_struct *mm; 3886 3887 if (list_empty(&svms->criu_svm_metadata_list)) { 3888 pr_debug("No SVM data from CRIU restore stage 2\n"); 3889 return ret; 3890 } 3891 3892 mm = get_task_mm(p->lead_thread); 3893 if (!mm) { 3894 pr_err("failed to get mm for the target process\n"); 3895 return -ESRCH; 3896 } 3897 3898 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3899 3900 i = j = 0; 3901 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3902 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3903 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3904 3905 for (j = 0; j < num_attrs; j++) { 3906 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3907 i, j, criu_svm_md->data.attrs[j].type, 3908 i, j, criu_svm_md->data.attrs[j].value); 3909 switch (criu_svm_md->data.attrs[j].type) { 3910 /* During Checkpoint operation, the query for 3911 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3912 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3913 * not used by the range which was checkpointed. Care 3914 * must be taken to not restore with an invalid value 3915 * otherwise the gpuidx value will be invalid and 3916 * set_attr would eventually fail so just replace those 3917 * with another dummy attribute such as 3918 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3919 */ 3920 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3921 if (criu_svm_md->data.attrs[j].value == 3922 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3923 criu_svm_md->data.attrs[j].type = 3924 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3925 criu_svm_md->data.attrs[j].value = 0; 3926 } 3927 break; 3928 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3929 set_flags = criu_svm_md->data.attrs[j].value; 3930 break; 3931 default: 3932 break; 3933 } 3934 } 3935 3936 /* CLR_FLAGS is not available via get_attr during checkpoint but 3937 * it needs to be inserted before restoring the ranges so 3938 * allocate extra space for it before calling set_attr 3939 */ 3940 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3941 (num_attrs + 1); 3942 set_attr_new = krealloc(set_attr, set_attr_size, 3943 GFP_KERNEL); 3944 if (!set_attr_new) { 3945 ret = -ENOMEM; 3946 goto exit; 3947 } 3948 set_attr = set_attr_new; 3949 3950 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3951 sizeof(struct kfd_ioctl_svm_attribute)); 3952 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3953 set_attr[num_attrs].value = ~set_flags; 3954 3955 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3956 criu_svm_md->data.size, num_attrs + 1, 3957 set_attr); 3958 if (ret) { 3959 pr_err("CRIU: failed to set range attributes\n"); 3960 goto exit; 3961 } 3962 3963 i++; 3964 } 3965 exit: 3966 kfree(set_attr); 3967 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3968 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3969 criu_svm_md->data.start_addr); 3970 kfree(criu_svm_md); 3971 } 3972 3973 mmput(mm); 3974 return ret; 3975 3976 } 3977 3978 int kfd_criu_restore_svm(struct kfd_process *p, 3979 uint8_t __user *user_priv_ptr, 3980 uint64_t *priv_data_offset, 3981 uint64_t max_priv_data_size) 3982 { 3983 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3984 int nattr_common = 4, nattr_accessibility = 1; 3985 struct criu_svm_metadata *criu_svm_md = NULL; 3986 struct svm_range_list *svms = &p->svms; 3987 uint32_t num_devices; 3988 int ret = 0; 3989 3990 num_devices = p->n_pdds; 3991 /* Handle one SVM range object at a time, also the number of gpus are 3992 * assumed to be same on the restore node, checking must be done while 3993 * evaluating the topology earlier 3994 */ 3995 3996 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3997 (nattr_common + nattr_accessibility * num_devices); 3998 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3999 4000 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4001 svm_attrs_size; 4002 4003 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4004 if (!criu_svm_md) { 4005 pr_err("failed to allocate memory to store svm metadata\n"); 4006 return -ENOMEM; 4007 } 4008 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4009 ret = -EINVAL; 4010 goto exit; 4011 } 4012 4013 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4014 svm_priv_data_size); 4015 if (ret) { 4016 ret = -EFAULT; 4017 goto exit; 4018 } 4019 *priv_data_offset += svm_priv_data_size; 4020 4021 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4022 4023 return 0; 4024 4025 4026 exit: 4027 kfree(criu_svm_md); 4028 return ret; 4029 } 4030 4031 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4032 uint64_t *svm_priv_data_size) 4033 { 4034 uint64_t total_size, accessibility_size, common_attr_size; 4035 int nattr_common = 4, nattr_accessibility = 1; 4036 int num_devices = p->n_pdds; 4037 struct svm_range_list *svms; 4038 struct svm_range *prange; 4039 uint32_t count = 0; 4040 4041 *svm_priv_data_size = 0; 4042 4043 svms = &p->svms; 4044 if (!svms) 4045 return -EINVAL; 4046 4047 mutex_lock(&svms->lock); 4048 list_for_each_entry(prange, &svms->list, list) { 4049 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4050 prange, prange->start, prange->npages, 4051 prange->start + prange->npages - 1); 4052 count++; 4053 } 4054 mutex_unlock(&svms->lock); 4055 4056 *num_svm_ranges = count; 4057 /* Only the accessbility attributes need to be queried for all the gpus 4058 * individually, remaining ones are spanned across the entire process 4059 * regardless of the various gpu nodes. Of the remaining attributes, 4060 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4061 * 4062 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4063 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4064 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4065 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4066 * 4067 * ** ACCESSBILITY ATTRIBUTES ** 4068 * (Considered as one, type is altered during query, value is gpuid) 4069 * KFD_IOCTL_SVM_ATTR_ACCESS 4070 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4071 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4072 */ 4073 if (*num_svm_ranges > 0) { 4074 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4075 nattr_common; 4076 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4077 nattr_accessibility * num_devices; 4078 4079 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4080 common_attr_size + accessibility_size; 4081 4082 *svm_priv_data_size = *num_svm_ranges * total_size; 4083 } 4084 4085 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4086 *svm_priv_data_size); 4087 return 0; 4088 } 4089 4090 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4091 uint8_t __user *user_priv_data, 4092 uint64_t *priv_data_offset) 4093 { 4094 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4095 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4096 uint64_t svm_priv_data_size, query_attr_size = 0; 4097 int index, nattr_common = 4, ret = 0; 4098 struct svm_range_list *svms; 4099 int num_devices = p->n_pdds; 4100 struct svm_range *prange; 4101 struct mm_struct *mm; 4102 4103 svms = &p->svms; 4104 if (!svms) 4105 return -EINVAL; 4106 4107 mm = get_task_mm(p->lead_thread); 4108 if (!mm) { 4109 pr_err("failed to get mm for the target process\n"); 4110 return -ESRCH; 4111 } 4112 4113 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4114 (nattr_common + num_devices); 4115 4116 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4117 if (!query_attr) { 4118 ret = -ENOMEM; 4119 goto exit; 4120 } 4121 4122 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4123 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4124 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4125 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4126 4127 for (index = 0; index < num_devices; index++) { 4128 struct kfd_process_device *pdd = p->pdds[index]; 4129 4130 query_attr[index + nattr_common].type = 4131 KFD_IOCTL_SVM_ATTR_ACCESS; 4132 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4133 } 4134 4135 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4136 4137 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4138 if (!svm_priv) { 4139 ret = -ENOMEM; 4140 goto exit_query; 4141 } 4142 4143 index = 0; 4144 list_for_each_entry(prange, &svms->list, list) { 4145 4146 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4147 svm_priv->start_addr = prange->start; 4148 svm_priv->size = prange->npages; 4149 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4150 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4151 prange, prange->start, prange->npages, 4152 prange->start + prange->npages - 1, 4153 prange->npages * PAGE_SIZE); 4154 4155 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4156 svm_priv->size, 4157 (nattr_common + num_devices), 4158 svm_priv->attrs); 4159 if (ret) { 4160 pr_err("CRIU: failed to obtain range attributes\n"); 4161 goto exit_priv; 4162 } 4163 4164 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4165 svm_priv_data_size)) { 4166 pr_err("Failed to copy svm priv to user\n"); 4167 ret = -EFAULT; 4168 goto exit_priv; 4169 } 4170 4171 *priv_data_offset += svm_priv_data_size; 4172 4173 } 4174 4175 4176 exit_priv: 4177 kfree(svm_priv); 4178 exit_query: 4179 kfree(query_attr); 4180 exit: 4181 mmput(mm); 4182 return ret; 4183 } 4184 4185 int 4186 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4187 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4188 { 4189 struct mm_struct *mm = current->mm; 4190 int r; 4191 4192 start >>= PAGE_SHIFT; 4193 size >>= PAGE_SHIFT; 4194 4195 switch (op) { 4196 case KFD_IOCTL_SVM_OP_SET_ATTR: 4197 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4198 break; 4199 case KFD_IOCTL_SVM_OP_GET_ATTR: 4200 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4201 break; 4202 default: 4203 r = EINVAL; 4204 break; 4205 } 4206 4207 return r; 4208 } 4209