1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 410 struct kfd_process_device *pdd; 411 struct kfd_process *p; 412 struct mm_struct *mm; 413 414 mm = svm_bo->eviction_fence->mm; 415 /* 416 * The forked child process takes svm_bo device pages ref, svm_bo could be 417 * released after parent process is gone. 418 */ 419 p = kfd_lookup_process_by_mm(mm); 420 if (p) { 421 pdd = kfd_get_process_device_data(svm_bo->node, p); 422 if (pdd) 423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 424 kfd_unref_process(p); 425 } 426 mmput(mm); 427 } 428 429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 430 /* We're not in the eviction worker. Signal the fence. */ 431 dma_fence_signal(&svm_bo->eviction_fence->base); 432 dma_fence_put(&svm_bo->eviction_fence->base); 433 amdgpu_bo_unref(&svm_bo->bo); 434 kfree(svm_bo); 435 } 436 437 static void svm_range_bo_wq_release(struct work_struct *work) 438 { 439 struct svm_range_bo *svm_bo; 440 441 svm_bo = container_of(work, struct svm_range_bo, release_work); 442 svm_range_bo_release(&svm_bo->kref); 443 } 444 445 static void svm_range_bo_release_async(struct kref *kref) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(kref, struct svm_range_bo, kref); 450 pr_debug("svm_bo 0x%p\n", svm_bo); 451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 452 schedule_work(&svm_bo->release_work); 453 } 454 455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 456 { 457 kref_put(&svm_bo->kref, svm_range_bo_release_async); 458 } 459 460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 461 { 462 if (svm_bo) 463 kref_put(&svm_bo->kref, svm_range_bo_release); 464 } 465 466 static bool 467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 468 { 469 mutex_lock(&prange->lock); 470 if (!prange->svm_bo) { 471 mutex_unlock(&prange->lock); 472 return false; 473 } 474 if (prange->ttm_res) { 475 /* We still have a reference, all is well */ 476 mutex_unlock(&prange->lock); 477 return true; 478 } 479 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 480 /* 481 * Migrate from GPU to GPU, remove range from source svm_bo->node 482 * range list, and return false to allocate svm_bo from destination 483 * node. 484 */ 485 if (prange->svm_bo->node != node) { 486 mutex_unlock(&prange->lock); 487 488 spin_lock(&prange->svm_bo->list_lock); 489 list_del_init(&prange->svm_bo_list); 490 spin_unlock(&prange->svm_bo->list_lock); 491 492 svm_range_bo_unref(prange->svm_bo); 493 return false; 494 } 495 if (READ_ONCE(prange->svm_bo->evicting)) { 496 struct dma_fence *f; 497 struct svm_range_bo *svm_bo; 498 /* The BO is getting evicted, 499 * we need to get a new one 500 */ 501 mutex_unlock(&prange->lock); 502 svm_bo = prange->svm_bo; 503 f = dma_fence_get(&svm_bo->eviction_fence->base); 504 svm_range_bo_unref(prange->svm_bo); 505 /* wait for the fence to avoid long spin-loop 506 * at list_empty_careful 507 */ 508 dma_fence_wait(f, false); 509 dma_fence_put(f); 510 } else { 511 /* The BO was still around and we got 512 * a new reference to it 513 */ 514 mutex_unlock(&prange->lock); 515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 516 prange->svms, prange->start, prange->last); 517 518 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 519 return true; 520 } 521 522 } else { 523 mutex_unlock(&prange->lock); 524 } 525 526 /* We need a new svm_bo. Spin-loop to wait for concurrent 527 * svm_range_bo_release to finish removing this range from 528 * its range list and set prange->svm_bo to null. After this, 529 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 530 */ 531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 532 cond_resched(); 533 534 return false; 535 } 536 537 static struct svm_range_bo *svm_range_bo_new(void) 538 { 539 struct svm_range_bo *svm_bo; 540 541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 542 if (!svm_bo) 543 return NULL; 544 545 kref_init(&svm_bo->kref); 546 INIT_LIST_HEAD(&svm_bo->range_list); 547 spin_lock_init(&svm_bo->list_lock); 548 549 return svm_bo; 550 } 551 552 int 553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 554 bool clear) 555 { 556 struct kfd_process_device *pdd; 557 struct amdgpu_bo_param bp; 558 struct svm_range_bo *svm_bo; 559 struct amdgpu_bo_user *ubo; 560 struct amdgpu_bo *bo; 561 struct kfd_process *p; 562 struct mm_struct *mm; 563 int r; 564 565 p = container_of(prange->svms, struct kfd_process, svms); 566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 567 p->lead_thread->pid, prange->svms, 568 prange->start, prange->last); 569 570 if (svm_range_validate_svm_bo(node, prange)) 571 return 0; 572 573 svm_bo = svm_range_bo_new(); 574 if (!svm_bo) { 575 pr_debug("failed to alloc svm bo\n"); 576 return -ENOMEM; 577 } 578 mm = get_task_mm(p->lead_thread); 579 if (!mm) { 580 pr_debug("failed to get mm\n"); 581 kfree(svm_bo); 582 return -ESRCH; 583 } 584 svm_bo->node = node; 585 svm_bo->eviction_fence = 586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 587 mm, 588 svm_bo); 589 mmput(mm); 590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 591 svm_bo->evicting = 0; 592 memset(&bp, 0, sizeof(bp)); 593 bp.size = prange->npages * PAGE_SIZE; 594 bp.byte_align = PAGE_SIZE; 595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 599 bp.type = ttm_bo_type_device; 600 bp.resv = NULL; 601 if (node->xcp) 602 bp.xcp_id_plus1 = node->xcp->id + 1; 603 604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 605 if (r) { 606 pr_debug("failed %d to create bo\n", r); 607 goto create_bo_failed; 608 } 609 bo = &ubo->bo; 610 611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 612 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 613 bp.xcp_id_plus1 - 1); 614 615 r = amdgpu_bo_reserve(bo, true); 616 if (r) { 617 pr_debug("failed %d to reserve bo\n", r); 618 goto reserve_bo_failed; 619 } 620 621 if (clear) { 622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 623 if (r) { 624 pr_debug("failed %d to sync bo\n", r); 625 amdgpu_bo_unreserve(bo); 626 goto reserve_bo_failed; 627 } 628 } 629 630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 631 if (r) { 632 pr_debug("failed %d to reserve bo\n", r); 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 struct svm_range *tail = NULL; 1148 int r = svm_range_split(prange, prange->start, new_last, &tail); 1149 1150 if (!r) { 1151 list_add(&tail->list, insert_list); 1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1153 list_add(&tail->update_list, remap_list); 1154 } 1155 return r; 1156 } 1157 1158 static int 1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1160 struct list_head *insert_list, struct list_head *remap_list) 1161 { 1162 struct svm_range *head = NULL; 1163 int r = svm_range_split(prange, new_start, prange->last, &head); 1164 1165 if (!r) { 1166 list_add(&head->list, insert_list); 1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1168 list_add(&head->update_list, remap_list); 1169 } 1170 return r; 1171 } 1172 1173 static void 1174 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1175 { 1176 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1177 pchild, pchild->start, pchild->last, prange, op); 1178 1179 pchild->work_item.mm = NULL; 1180 pchild->work_item.op = op; 1181 list_add_tail(&pchild->child_list, &prange->child_list); 1182 } 1183 1184 static bool 1185 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1186 { 1187 return (node_a->adev == node_b->adev || 1188 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1189 } 1190 1191 static uint64_t 1192 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1193 struct svm_range *prange, int domain) 1194 { 1195 struct kfd_node *bo_node; 1196 uint32_t flags = prange->flags; 1197 uint32_t mapping_flags = 0; 1198 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1199 uint64_t pte_flags; 1200 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1201 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1202 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1203 unsigned int mtype_local; 1204 1205 if (domain == SVM_RANGE_VRAM_DOMAIN) 1206 bo_node = prange->svm_bo->node; 1207 1208 switch (gc_ip_version) { 1209 case IP_VERSION(9, 4, 1): 1210 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1211 if (bo_node == node) { 1212 mapping_flags |= coherent ? 1213 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1214 } else { 1215 mapping_flags |= coherent ? 1216 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1217 if (svm_nodes_in_same_hive(node, bo_node)) 1218 snoop = true; 1219 } 1220 } else { 1221 mapping_flags |= coherent ? 1222 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1223 } 1224 break; 1225 case IP_VERSION(9, 4, 2): 1226 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1227 if (bo_node == node) { 1228 mapping_flags |= coherent ? 1229 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1230 if (node->adev->gmc.xgmi.connected_to_cpu) 1231 snoop = true; 1232 } else { 1233 mapping_flags |= coherent ? 1234 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1235 if (svm_nodes_in_same_hive(node, bo_node)) 1236 snoop = true; 1237 } 1238 } else { 1239 mapping_flags |= coherent ? 1240 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1241 } 1242 break; 1243 case IP_VERSION(9, 4, 3): 1244 case IP_VERSION(9, 4, 4): 1245 case IP_VERSION(9, 5, 0): 1246 if (ext_coherent) 1247 mtype_local = AMDGPU_VM_MTYPE_CC; 1248 else 1249 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1250 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1251 snoop = true; 1252 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1253 /* local HBM region close to partition */ 1254 if (bo_node->adev == node->adev && 1255 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1256 mapping_flags |= mtype_local; 1257 /* local HBM region far from partition or remote XGMI GPU 1258 * with regular system scope coherence 1259 */ 1260 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1261 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1262 /* PCIe P2P on GPUs pre-9.5.0 */ 1263 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1264 !svm_nodes_in_same_hive(bo_node, node)) 1265 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1266 /* Other remote memory */ 1267 else 1268 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1269 /* system memory accessed by the APU */ 1270 } else if (node->adev->flags & AMD_IS_APU) { 1271 /* On NUMA systems, locality is determined per-page 1272 * in amdgpu_gmc_override_vm_pte_flags 1273 */ 1274 if (num_possible_nodes() <= 1) 1275 mapping_flags |= mtype_local; 1276 else 1277 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1278 /* system memory accessed by the dGPU */ 1279 } else { 1280 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1281 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1282 else 1283 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1284 } 1285 break; 1286 case IP_VERSION(12, 0, 0): 1287 case IP_VERSION(12, 0, 1): 1288 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1289 break; 1290 default: 1291 mapping_flags |= coherent ? 1292 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1293 } 1294 1295 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1296 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1297 1298 pte_flags = AMDGPU_PTE_VALID; 1299 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1300 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1301 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1302 pte_flags |= AMDGPU_PTE_IS_PTE; 1303 1304 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1305 pte_flags |= AMDGPU_PTE_READABLE; 1306 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1307 pte_flags |= AMDGPU_PTE_WRITEABLE; 1308 return pte_flags; 1309 } 1310 1311 static int 1312 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1313 uint64_t start, uint64_t last, 1314 struct dma_fence **fence) 1315 { 1316 uint64_t init_pte_value = 0; 1317 1318 pr_debug("[0x%llx 0x%llx]\n", start, last); 1319 1320 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1321 last, init_pte_value, 0, 0, NULL, NULL, 1322 fence); 1323 } 1324 1325 static int 1326 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1327 unsigned long last, uint32_t trigger) 1328 { 1329 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1330 struct kfd_process_device *pdd; 1331 struct dma_fence *fence = NULL; 1332 struct kfd_process *p; 1333 uint32_t gpuidx; 1334 int r = 0; 1335 1336 if (!prange->mapped_to_gpu) { 1337 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1338 prange, prange->start, prange->last); 1339 return 0; 1340 } 1341 1342 if (prange->start == start && prange->last == last) { 1343 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1344 prange->mapped_to_gpu = false; 1345 } 1346 1347 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1348 MAX_GPU_INSTANCE); 1349 p = container_of(prange->svms, struct kfd_process, svms); 1350 1351 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1352 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1353 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1354 if (!pdd) { 1355 pr_debug("failed to find device idx %d\n", gpuidx); 1356 return -EINVAL; 1357 } 1358 1359 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1360 start, last, trigger); 1361 1362 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1363 drm_priv_to_vm(pdd->drm_priv), 1364 start, last, &fence); 1365 if (r) 1366 break; 1367 1368 if (fence) { 1369 r = dma_fence_wait(fence, false); 1370 dma_fence_put(fence); 1371 fence = NULL; 1372 if (r) 1373 break; 1374 } 1375 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1376 } 1377 1378 return r; 1379 } 1380 1381 static int 1382 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1383 unsigned long offset, unsigned long npages, bool readonly, 1384 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1385 struct dma_fence **fence, bool flush_tlb) 1386 { 1387 struct amdgpu_device *adev = pdd->dev->adev; 1388 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1389 uint64_t pte_flags; 1390 unsigned long last_start; 1391 int last_domain; 1392 int r = 0; 1393 int64_t i, j; 1394 1395 last_start = prange->start + offset; 1396 1397 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1398 last_start, last_start + npages - 1, readonly); 1399 1400 for (i = offset; i < offset + npages; i++) { 1401 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1402 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1403 1404 /* Collect all pages in the same address range and memory domain 1405 * that can be mapped with a single call to update mapping. 1406 */ 1407 if (i < offset + npages - 1 && 1408 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1409 continue; 1410 1411 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1412 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1413 1414 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1415 if (readonly) 1416 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1417 1418 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1419 prange->svms, last_start, prange->start + i, 1420 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1421 pte_flags); 1422 1423 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1424 * different memory partition based on fpfn/lpfn, we should use 1425 * same vm_manager.vram_base_offset regardless memory partition. 1426 */ 1427 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1428 NULL, last_start, prange->start + i, 1429 pte_flags, 1430 (last_start - prange->start) << PAGE_SHIFT, 1431 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1432 NULL, dma_addr, &vm->last_update); 1433 1434 for (j = last_start - prange->start; j <= i; j++) 1435 dma_addr[j] |= last_domain; 1436 1437 if (r) { 1438 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1439 goto out; 1440 } 1441 last_start = prange->start + i + 1; 1442 } 1443 1444 r = amdgpu_vm_update_pdes(adev, vm, false); 1445 if (r) { 1446 pr_debug("failed %d to update directories 0x%lx\n", r, 1447 prange->start); 1448 goto out; 1449 } 1450 1451 if (fence) 1452 *fence = dma_fence_get(vm->last_update); 1453 1454 out: 1455 return r; 1456 } 1457 1458 static int 1459 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1460 unsigned long npages, bool readonly, 1461 unsigned long *bitmap, bool wait, bool flush_tlb) 1462 { 1463 struct kfd_process_device *pdd; 1464 struct amdgpu_device *bo_adev = NULL; 1465 struct kfd_process *p; 1466 struct dma_fence *fence = NULL; 1467 uint32_t gpuidx; 1468 int r = 0; 1469 1470 if (prange->svm_bo && prange->ttm_res) 1471 bo_adev = prange->svm_bo->node->adev; 1472 1473 p = container_of(prange->svms, struct kfd_process, svms); 1474 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1475 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1476 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1477 if (!pdd) { 1478 pr_debug("failed to find device idx %d\n", gpuidx); 1479 return -EINVAL; 1480 } 1481 1482 pdd = kfd_bind_process_to_device(pdd->dev, p); 1483 if (IS_ERR(pdd)) 1484 return -EINVAL; 1485 1486 if (bo_adev && pdd->dev->adev != bo_adev && 1487 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1488 pr_debug("cannot map to device idx %d\n", gpuidx); 1489 continue; 1490 } 1491 1492 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1493 prange->dma_addr[gpuidx], 1494 bo_adev, wait ? &fence : NULL, 1495 flush_tlb); 1496 if (r) 1497 break; 1498 1499 if (fence) { 1500 r = dma_fence_wait(fence, false); 1501 dma_fence_put(fence); 1502 fence = NULL; 1503 if (r) { 1504 pr_debug("failed %d to dma fence wait\n", r); 1505 break; 1506 } 1507 } 1508 1509 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1510 } 1511 1512 return r; 1513 } 1514 1515 struct svm_validate_context { 1516 struct kfd_process *process; 1517 struct svm_range *prange; 1518 bool intr; 1519 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1520 struct drm_exec exec; 1521 }; 1522 1523 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1524 { 1525 struct kfd_process_device *pdd; 1526 struct amdgpu_vm *vm; 1527 uint32_t gpuidx; 1528 int r; 1529 1530 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1531 drm_exec_until_all_locked(&ctx->exec) { 1532 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1533 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1534 if (!pdd) { 1535 pr_debug("failed to find device idx %d\n", gpuidx); 1536 r = -EINVAL; 1537 goto unreserve_out; 1538 } 1539 vm = drm_priv_to_vm(pdd->drm_priv); 1540 1541 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1542 drm_exec_retry_on_contention(&ctx->exec); 1543 if (unlikely(r)) { 1544 pr_debug("failed %d to reserve bo\n", r); 1545 goto unreserve_out; 1546 } 1547 } 1548 } 1549 1550 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1551 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1552 if (!pdd) { 1553 pr_debug("failed to find device idx %d\n", gpuidx); 1554 r = -EINVAL; 1555 goto unreserve_out; 1556 } 1557 1558 r = amdgpu_vm_validate(pdd->dev->adev, 1559 drm_priv_to_vm(pdd->drm_priv), NULL, 1560 svm_range_bo_validate, NULL); 1561 if (r) { 1562 pr_debug("failed %d validate pt bos\n", r); 1563 goto unreserve_out; 1564 } 1565 } 1566 1567 return 0; 1568 1569 unreserve_out: 1570 drm_exec_fini(&ctx->exec); 1571 return r; 1572 } 1573 1574 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1575 { 1576 drm_exec_fini(&ctx->exec); 1577 } 1578 1579 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1580 { 1581 struct kfd_process_device *pdd; 1582 1583 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1584 if (!pdd) 1585 return NULL; 1586 1587 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1588 } 1589 1590 /* 1591 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1592 * 1593 * To prevent concurrent destruction or change of range attributes, the 1594 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1595 * because that would block concurrent evictions and lead to deadlocks. To 1596 * serialize concurrent migrations or validations of the same range, the 1597 * prange->migrate_mutex must be held. 1598 * 1599 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1600 * eviction fence. 1601 * 1602 * The following sequence ensures race-free validation and GPU mapping: 1603 * 1604 * 1. Reserve page table (and SVM BO if range is in VRAM) 1605 * 2. hmm_range_fault to get page addresses (if system memory) 1606 * 3. DMA-map pages (if system memory) 1607 * 4-a. Take notifier lock 1608 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1609 * 4-c. Check that the range was not split or otherwise invalidated 1610 * 4-d. Update GPU page table 1611 * 4.e. Release notifier lock 1612 * 5. Release page table (and SVM BO) reservation 1613 */ 1614 static int svm_range_validate_and_map(struct mm_struct *mm, 1615 unsigned long map_start, unsigned long map_last, 1616 struct svm_range *prange, int32_t gpuidx, 1617 bool intr, bool wait, bool flush_tlb) 1618 { 1619 struct svm_validate_context *ctx; 1620 unsigned long start, end, addr; 1621 struct kfd_process *p; 1622 void *owner; 1623 int32_t idx; 1624 int r = 0; 1625 1626 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1627 if (!ctx) 1628 return -ENOMEM; 1629 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1630 ctx->prange = prange; 1631 ctx->intr = intr; 1632 1633 if (gpuidx < MAX_GPU_INSTANCE) { 1634 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1635 bitmap_set(ctx->bitmap, gpuidx, 1); 1636 } else if (ctx->process->xnack_enabled) { 1637 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1638 1639 /* If prefetch range to GPU, or GPU retry fault migrate range to 1640 * GPU, which has ACCESS attribute to the range, create mapping 1641 * on that GPU. 1642 */ 1643 if (prange->actual_loc) { 1644 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1645 prange->actual_loc); 1646 if (gpuidx < 0) { 1647 WARN_ONCE(1, "failed get device by id 0x%x\n", 1648 prange->actual_loc); 1649 r = -EINVAL; 1650 goto free_ctx; 1651 } 1652 if (test_bit(gpuidx, prange->bitmap_access)) 1653 bitmap_set(ctx->bitmap, gpuidx, 1); 1654 } 1655 1656 /* 1657 * If prange is already mapped or with always mapped flag, 1658 * update mapping on GPUs with ACCESS attribute 1659 */ 1660 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1661 if (prange->mapped_to_gpu || 1662 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1663 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1664 } 1665 } else { 1666 bitmap_or(ctx->bitmap, prange->bitmap_access, 1667 prange->bitmap_aip, MAX_GPU_INSTANCE); 1668 } 1669 1670 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1671 r = 0; 1672 goto free_ctx; 1673 } 1674 1675 if (prange->actual_loc && !prange->ttm_res) { 1676 /* This should never happen. actual_loc gets set by 1677 * svm_migrate_ram_to_vram after allocating a BO. 1678 */ 1679 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1680 r = -EINVAL; 1681 goto free_ctx; 1682 } 1683 1684 r = svm_range_reserve_bos(ctx, intr); 1685 if (r) 1686 goto free_ctx; 1687 1688 p = container_of(prange->svms, struct kfd_process, svms); 1689 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1690 MAX_GPU_INSTANCE)); 1691 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1692 if (kfd_svm_page_owner(p, idx) != owner) { 1693 owner = NULL; 1694 break; 1695 } 1696 } 1697 1698 start = map_start << PAGE_SHIFT; 1699 end = (map_last + 1) << PAGE_SHIFT; 1700 for (addr = start; !r && addr < end; ) { 1701 struct hmm_range *hmm_range = NULL; 1702 unsigned long map_start_vma; 1703 unsigned long map_last_vma; 1704 struct vm_area_struct *vma; 1705 unsigned long next = 0; 1706 unsigned long offset; 1707 unsigned long npages; 1708 bool readonly; 1709 1710 vma = vma_lookup(mm, addr); 1711 if (vma) { 1712 readonly = !(vma->vm_flags & VM_WRITE); 1713 1714 next = min(vma->vm_end, end); 1715 npages = (next - addr) >> PAGE_SHIFT; 1716 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1717 * unmap the memory. If it's not already mapped, this is a no-op 1718 * If PROT_WRITE is provided without READ, warn first then unmap 1719 */ 1720 if (!(vma->vm_flags & VM_READ)) { 1721 unsigned long e, s; 1722 1723 svm_range_lock(prange); 1724 if (vma->vm_flags & VM_WRITE) 1725 pr_debug("VM_WRITE without VM_READ is not supported"); 1726 s = max(start, prange->start); 1727 e = min(end, prange->last); 1728 if (e >= s) 1729 r = svm_range_unmap_from_gpus(prange, s, e, 1730 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1731 svm_range_unlock(prange); 1732 /* If unmap returns non-zero, we'll bail on the next for loop 1733 * iteration, so just leave r and continue 1734 */ 1735 addr = next; 1736 continue; 1737 } 1738 1739 WRITE_ONCE(p->svms.faulting_task, current); 1740 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1741 readonly, owner, NULL, 1742 &hmm_range); 1743 WRITE_ONCE(p->svms.faulting_task, NULL); 1744 if (r) 1745 pr_debug("failed %d to get svm range pages\n", r); 1746 } else { 1747 r = -EFAULT; 1748 } 1749 1750 if (!r) { 1751 offset = (addr >> PAGE_SHIFT) - prange->start; 1752 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1753 hmm_range->hmm_pfns); 1754 if (r) 1755 pr_debug("failed %d to dma map range\n", r); 1756 } 1757 1758 svm_range_lock(prange); 1759 1760 /* Free backing memory of hmm_range if it was initialized 1761 * Overrride return value to TRY AGAIN only if prior returns 1762 * were successful 1763 */ 1764 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1765 pr_debug("hmm update the range, need validate again\n"); 1766 r = -EAGAIN; 1767 } 1768 1769 if (!r && !list_empty(&prange->child_list)) { 1770 pr_debug("range split by unmap in parallel, validate again\n"); 1771 r = -EAGAIN; 1772 } 1773 1774 if (!r) { 1775 map_start_vma = max(map_start, prange->start + offset); 1776 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1777 if (map_start_vma <= map_last_vma) { 1778 offset = map_start_vma - prange->start; 1779 npages = map_last_vma - map_start_vma + 1; 1780 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1781 ctx->bitmap, wait, flush_tlb); 1782 } 1783 } 1784 1785 if (!r && next == end) 1786 prange->mapped_to_gpu = true; 1787 1788 svm_range_unlock(prange); 1789 1790 addr = next; 1791 } 1792 1793 svm_range_unreserve_bos(ctx); 1794 if (!r) 1795 prange->validate_timestamp = ktime_get_boottime(); 1796 1797 free_ctx: 1798 kfree(ctx); 1799 1800 return r; 1801 } 1802 1803 /** 1804 * svm_range_list_lock_and_flush_work - flush pending deferred work 1805 * 1806 * @svms: the svm range list 1807 * @mm: the mm structure 1808 * 1809 * Context: Returns with mmap write lock held, pending deferred work flushed 1810 * 1811 */ 1812 void 1813 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1814 struct mm_struct *mm) 1815 { 1816 retry_flush_work: 1817 flush_work(&svms->deferred_list_work); 1818 mmap_write_lock(mm); 1819 1820 if (list_empty(&svms->deferred_range_list)) 1821 return; 1822 mmap_write_unlock(mm); 1823 pr_debug("retry flush\n"); 1824 goto retry_flush_work; 1825 } 1826 1827 static void svm_range_restore_work(struct work_struct *work) 1828 { 1829 struct delayed_work *dwork = to_delayed_work(work); 1830 struct amdkfd_process_info *process_info; 1831 struct svm_range_list *svms; 1832 struct svm_range *prange; 1833 struct kfd_process *p; 1834 struct mm_struct *mm; 1835 int evicted_ranges; 1836 int invalid; 1837 int r; 1838 1839 svms = container_of(dwork, struct svm_range_list, restore_work); 1840 evicted_ranges = atomic_read(&svms->evicted_ranges); 1841 if (!evicted_ranges) 1842 return; 1843 1844 pr_debug("restore svm ranges\n"); 1845 1846 p = container_of(svms, struct kfd_process, svms); 1847 process_info = p->kgd_process_info; 1848 1849 /* Keep mm reference when svm_range_validate_and_map ranges */ 1850 mm = get_task_mm(p->lead_thread); 1851 if (!mm) { 1852 pr_debug("svms 0x%p process mm gone\n", svms); 1853 return; 1854 } 1855 1856 mutex_lock(&process_info->lock); 1857 svm_range_list_lock_and_flush_work(svms, mm); 1858 mutex_lock(&svms->lock); 1859 1860 evicted_ranges = atomic_read(&svms->evicted_ranges); 1861 1862 list_for_each_entry(prange, &svms->list, list) { 1863 invalid = atomic_read(&prange->invalid); 1864 if (!invalid) 1865 continue; 1866 1867 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1868 prange->svms, prange, prange->start, prange->last, 1869 invalid); 1870 1871 /* 1872 * If range is migrating, wait for migration is done. 1873 */ 1874 mutex_lock(&prange->migrate_mutex); 1875 1876 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1877 MAX_GPU_INSTANCE, false, true, false); 1878 if (r) 1879 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1880 prange->start); 1881 1882 mutex_unlock(&prange->migrate_mutex); 1883 if (r) 1884 goto out_reschedule; 1885 1886 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1887 goto out_reschedule; 1888 } 1889 1890 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1891 evicted_ranges) 1892 goto out_reschedule; 1893 1894 evicted_ranges = 0; 1895 1896 r = kgd2kfd_resume_mm(mm); 1897 if (r) { 1898 /* No recovery from this failure. Probably the CP is 1899 * hanging. No point trying again. 1900 */ 1901 pr_debug("failed %d to resume KFD\n", r); 1902 } 1903 1904 pr_debug("restore svm ranges successfully\n"); 1905 1906 out_reschedule: 1907 mutex_unlock(&svms->lock); 1908 mmap_write_unlock(mm); 1909 mutex_unlock(&process_info->lock); 1910 1911 /* If validation failed, reschedule another attempt */ 1912 if (evicted_ranges) { 1913 pr_debug("reschedule to restore svm range\n"); 1914 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1915 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1916 1917 kfd_smi_event_queue_restore_rescheduled(mm); 1918 } 1919 mmput(mm); 1920 } 1921 1922 /** 1923 * svm_range_evict - evict svm range 1924 * @prange: svm range structure 1925 * @mm: current process mm_struct 1926 * @start: starting process queue number 1927 * @last: last process queue number 1928 * @event: mmu notifier event when range is evicted or migrated 1929 * 1930 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1931 * return to let CPU evict the buffer and proceed CPU pagetable update. 1932 * 1933 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1934 * If invalidation happens while restore work is running, restore work will 1935 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1936 * the queues. 1937 */ 1938 static int 1939 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1940 unsigned long start, unsigned long last, 1941 enum mmu_notifier_event event) 1942 { 1943 struct svm_range_list *svms = prange->svms; 1944 struct svm_range *pchild; 1945 struct kfd_process *p; 1946 int r = 0; 1947 1948 p = container_of(svms, struct kfd_process, svms); 1949 1950 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1951 svms, prange->start, prange->last, start, last); 1952 1953 if (!p->xnack_enabled || 1954 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1955 int evicted_ranges; 1956 bool mapped = prange->mapped_to_gpu; 1957 1958 list_for_each_entry(pchild, &prange->child_list, child_list) { 1959 if (!pchild->mapped_to_gpu) 1960 continue; 1961 mapped = true; 1962 mutex_lock_nested(&pchild->lock, 1); 1963 if (pchild->start <= last && pchild->last >= start) { 1964 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1965 pchild->start, pchild->last); 1966 atomic_inc(&pchild->invalid); 1967 } 1968 mutex_unlock(&pchild->lock); 1969 } 1970 1971 if (!mapped) 1972 return r; 1973 1974 if (prange->start <= last && prange->last >= start) 1975 atomic_inc(&prange->invalid); 1976 1977 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1978 if (evicted_ranges != 1) 1979 return r; 1980 1981 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1982 prange->svms, prange->start, prange->last); 1983 1984 /* First eviction, stop the queues */ 1985 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1986 if (r) 1987 pr_debug("failed to quiesce KFD\n"); 1988 1989 pr_debug("schedule to restore svm %p ranges\n", svms); 1990 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1991 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1992 } else { 1993 unsigned long s, l; 1994 uint32_t trigger; 1995 1996 if (event == MMU_NOTIFY_MIGRATE) 1997 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1998 else 1999 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2000 2001 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2002 prange->svms, start, last); 2003 list_for_each_entry(pchild, &prange->child_list, child_list) { 2004 mutex_lock_nested(&pchild->lock, 1); 2005 s = max(start, pchild->start); 2006 l = min(last, pchild->last); 2007 if (l >= s) 2008 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2009 mutex_unlock(&pchild->lock); 2010 } 2011 s = max(start, prange->start); 2012 l = min(last, prange->last); 2013 if (l >= s) 2014 svm_range_unmap_from_gpus(prange, s, l, trigger); 2015 } 2016 2017 return r; 2018 } 2019 2020 static struct svm_range *svm_range_clone(struct svm_range *old) 2021 { 2022 struct svm_range *new; 2023 2024 new = svm_range_new(old->svms, old->start, old->last, false); 2025 if (!new) 2026 return NULL; 2027 if (svm_range_copy_dma_addrs(new, old)) { 2028 svm_range_free(new, false); 2029 return NULL; 2030 } 2031 if (old->svm_bo) { 2032 new->ttm_res = old->ttm_res; 2033 new->offset = old->offset; 2034 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2035 spin_lock(&new->svm_bo->list_lock); 2036 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2037 spin_unlock(&new->svm_bo->list_lock); 2038 } 2039 new->flags = old->flags; 2040 new->preferred_loc = old->preferred_loc; 2041 new->prefetch_loc = old->prefetch_loc; 2042 new->actual_loc = old->actual_loc; 2043 new->granularity = old->granularity; 2044 new->mapped_to_gpu = old->mapped_to_gpu; 2045 new->vram_pages = old->vram_pages; 2046 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2047 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2048 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2049 2050 return new; 2051 } 2052 2053 void svm_range_set_max_pages(struct amdgpu_device *adev) 2054 { 2055 uint64_t max_pages; 2056 uint64_t pages, _pages; 2057 uint64_t min_pages = 0; 2058 int i, id; 2059 2060 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2061 if (adev->kfd.dev->nodes[i]->xcp) 2062 id = adev->kfd.dev->nodes[i]->xcp->id; 2063 else 2064 id = -1; 2065 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2066 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2067 pages = rounddown_pow_of_two(pages); 2068 min_pages = min_not_zero(min_pages, pages); 2069 } 2070 2071 do { 2072 max_pages = READ_ONCE(max_svm_range_pages); 2073 _pages = min_not_zero(max_pages, min_pages); 2074 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2075 } 2076 2077 static int 2078 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2079 uint64_t max_pages, struct list_head *insert_list, 2080 struct list_head *update_list) 2081 { 2082 struct svm_range *prange; 2083 uint64_t l; 2084 2085 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2086 max_pages, start, last); 2087 2088 while (last >= start) { 2089 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2090 2091 prange = svm_range_new(svms, start, l, true); 2092 if (!prange) 2093 return -ENOMEM; 2094 list_add(&prange->list, insert_list); 2095 list_add(&prange->update_list, update_list); 2096 2097 start = l + 1; 2098 } 2099 return 0; 2100 } 2101 2102 /** 2103 * svm_range_add - add svm range and handle overlap 2104 * @p: the range add to this process svms 2105 * @start: page size aligned 2106 * @size: page size aligned 2107 * @nattr: number of attributes 2108 * @attrs: array of attributes 2109 * @update_list: output, the ranges need validate and update GPU mapping 2110 * @insert_list: output, the ranges need insert to svms 2111 * @remove_list: output, the ranges are replaced and need remove from svms 2112 * @remap_list: output, remap unaligned svm ranges 2113 * 2114 * Check if the virtual address range has overlap with any existing ranges, 2115 * split partly overlapping ranges and add new ranges in the gaps. All changes 2116 * should be applied to the range_list and interval tree transactionally. If 2117 * any range split or allocation fails, the entire update fails. Therefore any 2118 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2119 * unchanged. 2120 * 2121 * If the transaction succeeds, the caller can update and insert clones and 2122 * new ranges, then free the originals. 2123 * 2124 * Otherwise the caller can free the clones and new ranges, while the old 2125 * svm_ranges remain unchanged. 2126 * 2127 * Context: Process context, caller must hold svms->lock 2128 * 2129 * Return: 2130 * 0 - OK, otherwise error code 2131 */ 2132 static int 2133 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2134 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2135 struct list_head *update_list, struct list_head *insert_list, 2136 struct list_head *remove_list, struct list_head *remap_list) 2137 { 2138 unsigned long last = start + size - 1UL; 2139 struct svm_range_list *svms = &p->svms; 2140 struct interval_tree_node *node; 2141 struct svm_range *prange; 2142 struct svm_range *tmp; 2143 struct list_head new_list; 2144 int r = 0; 2145 2146 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2147 2148 INIT_LIST_HEAD(update_list); 2149 INIT_LIST_HEAD(insert_list); 2150 INIT_LIST_HEAD(remove_list); 2151 INIT_LIST_HEAD(&new_list); 2152 INIT_LIST_HEAD(remap_list); 2153 2154 node = interval_tree_iter_first(&svms->objects, start, last); 2155 while (node) { 2156 struct interval_tree_node *next; 2157 unsigned long next_start; 2158 2159 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2160 node->last); 2161 2162 prange = container_of(node, struct svm_range, it_node); 2163 next = interval_tree_iter_next(node, start, last); 2164 next_start = min(node->last, last) + 1; 2165 2166 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2167 prange->mapped_to_gpu) { 2168 /* nothing to do */ 2169 } else if (node->start < start || node->last > last) { 2170 /* node intersects the update range and its attributes 2171 * will change. Clone and split it, apply updates only 2172 * to the overlapping part 2173 */ 2174 struct svm_range *old = prange; 2175 2176 prange = svm_range_clone(old); 2177 if (!prange) { 2178 r = -ENOMEM; 2179 goto out; 2180 } 2181 2182 list_add(&old->update_list, remove_list); 2183 list_add(&prange->list, insert_list); 2184 list_add(&prange->update_list, update_list); 2185 2186 if (node->start < start) { 2187 pr_debug("change old range start\n"); 2188 r = svm_range_split_head(prange, start, 2189 insert_list, remap_list); 2190 if (r) 2191 goto out; 2192 } 2193 if (node->last > last) { 2194 pr_debug("change old range last\n"); 2195 r = svm_range_split_tail(prange, last, 2196 insert_list, remap_list); 2197 if (r) 2198 goto out; 2199 } 2200 } else { 2201 /* The node is contained within start..last, 2202 * just update it 2203 */ 2204 list_add(&prange->update_list, update_list); 2205 } 2206 2207 /* insert a new node if needed */ 2208 if (node->start > start) { 2209 r = svm_range_split_new(svms, start, node->start - 1, 2210 READ_ONCE(max_svm_range_pages), 2211 &new_list, update_list); 2212 if (r) 2213 goto out; 2214 } 2215 2216 node = next; 2217 start = next_start; 2218 } 2219 2220 /* add a final range at the end if needed */ 2221 if (start <= last) 2222 r = svm_range_split_new(svms, start, last, 2223 READ_ONCE(max_svm_range_pages), 2224 &new_list, update_list); 2225 2226 out: 2227 if (r) { 2228 list_for_each_entry_safe(prange, tmp, insert_list, list) 2229 svm_range_free(prange, false); 2230 list_for_each_entry_safe(prange, tmp, &new_list, list) 2231 svm_range_free(prange, true); 2232 } else { 2233 list_splice(&new_list, insert_list); 2234 } 2235 2236 return r; 2237 } 2238 2239 static void 2240 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2241 struct svm_range *prange) 2242 { 2243 unsigned long start; 2244 unsigned long last; 2245 2246 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2247 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2248 2249 if (prange->start == start && prange->last == last) 2250 return; 2251 2252 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2253 prange->svms, prange, start, last, prange->start, 2254 prange->last); 2255 2256 if (start != 0 && last != 0) { 2257 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2258 svm_range_remove_notifier(prange); 2259 } 2260 prange->it_node.start = prange->start; 2261 prange->it_node.last = prange->last; 2262 2263 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2264 svm_range_add_notifier_locked(mm, prange); 2265 } 2266 2267 static void 2268 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2269 struct mm_struct *mm) 2270 { 2271 switch (prange->work_item.op) { 2272 case SVM_OP_NULL: 2273 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2274 svms, prange, prange->start, prange->last); 2275 break; 2276 case SVM_OP_UNMAP_RANGE: 2277 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2278 svms, prange, prange->start, prange->last); 2279 svm_range_unlink(prange); 2280 svm_range_remove_notifier(prange); 2281 svm_range_free(prange, true); 2282 break; 2283 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2284 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2285 svms, prange, prange->start, prange->last); 2286 svm_range_update_notifier_and_interval_tree(mm, prange); 2287 break; 2288 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2289 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2290 svms, prange, prange->start, prange->last); 2291 svm_range_update_notifier_and_interval_tree(mm, prange); 2292 /* TODO: implement deferred validation and mapping */ 2293 break; 2294 case SVM_OP_ADD_RANGE: 2295 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2296 prange->start, prange->last); 2297 svm_range_add_to_svms(prange); 2298 svm_range_add_notifier_locked(mm, prange); 2299 break; 2300 case SVM_OP_ADD_RANGE_AND_MAP: 2301 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2302 prange, prange->start, prange->last); 2303 svm_range_add_to_svms(prange); 2304 svm_range_add_notifier_locked(mm, prange); 2305 /* TODO: implement deferred validation and mapping */ 2306 break; 2307 default: 2308 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2309 prange->work_item.op); 2310 } 2311 } 2312 2313 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2314 { 2315 struct kfd_process_device *pdd; 2316 struct kfd_process *p; 2317 uint32_t i; 2318 2319 p = container_of(svms, struct kfd_process, svms); 2320 2321 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2322 pdd = p->pdds[i]; 2323 if (!pdd) 2324 continue; 2325 2326 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2327 2328 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2329 pdd->dev->adev->irq.retry_cam_enabled ? 2330 &pdd->dev->adev->irq.ih : 2331 &pdd->dev->adev->irq.ih1); 2332 2333 if (pdd->dev->adev->irq.retry_cam_enabled) 2334 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2335 &pdd->dev->adev->irq.ih_soft); 2336 2337 2338 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2339 } 2340 } 2341 2342 static void svm_range_deferred_list_work(struct work_struct *work) 2343 { 2344 struct svm_range_list *svms; 2345 struct svm_range *prange; 2346 struct mm_struct *mm; 2347 2348 svms = container_of(work, struct svm_range_list, deferred_list_work); 2349 pr_debug("enter svms 0x%p\n", svms); 2350 2351 spin_lock(&svms->deferred_list_lock); 2352 while (!list_empty(&svms->deferred_range_list)) { 2353 prange = list_first_entry(&svms->deferred_range_list, 2354 struct svm_range, deferred_list); 2355 spin_unlock(&svms->deferred_list_lock); 2356 2357 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2358 prange->start, prange->last, prange->work_item.op); 2359 2360 mm = prange->work_item.mm; 2361 2362 mmap_write_lock(mm); 2363 2364 /* Remove from deferred_list must be inside mmap write lock, for 2365 * two race cases: 2366 * 1. unmap_from_cpu may change work_item.op and add the range 2367 * to deferred_list again, cause use after free bug. 2368 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2369 * lock and continue because deferred_list is empty, but 2370 * deferred_list work is actually waiting for mmap lock. 2371 */ 2372 spin_lock(&svms->deferred_list_lock); 2373 list_del_init(&prange->deferred_list); 2374 spin_unlock(&svms->deferred_list_lock); 2375 2376 mutex_lock(&svms->lock); 2377 mutex_lock(&prange->migrate_mutex); 2378 while (!list_empty(&prange->child_list)) { 2379 struct svm_range *pchild; 2380 2381 pchild = list_first_entry(&prange->child_list, 2382 struct svm_range, child_list); 2383 pr_debug("child prange 0x%p op %d\n", pchild, 2384 pchild->work_item.op); 2385 list_del_init(&pchild->child_list); 2386 svm_range_handle_list_op(svms, pchild, mm); 2387 } 2388 mutex_unlock(&prange->migrate_mutex); 2389 2390 svm_range_handle_list_op(svms, prange, mm); 2391 mutex_unlock(&svms->lock); 2392 mmap_write_unlock(mm); 2393 2394 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2395 * last mm refcount, schedule release work to avoid circular locking 2396 */ 2397 mmput_async(mm); 2398 2399 spin_lock(&svms->deferred_list_lock); 2400 } 2401 spin_unlock(&svms->deferred_list_lock); 2402 pr_debug("exit svms 0x%p\n", svms); 2403 } 2404 2405 void 2406 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2407 struct mm_struct *mm, enum svm_work_list_ops op) 2408 { 2409 spin_lock(&svms->deferred_list_lock); 2410 /* if prange is on the deferred list */ 2411 if (!list_empty(&prange->deferred_list)) { 2412 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2413 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2414 if (op != SVM_OP_NULL && 2415 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2416 prange->work_item.op = op; 2417 } else { 2418 /* Pairs with mmput in deferred_list_work. 2419 * If process is exiting and mm is gone, don't update mmu notifier. 2420 */ 2421 if (mmget_not_zero(mm)) { 2422 prange->work_item.mm = mm; 2423 prange->work_item.op = op; 2424 list_add_tail(&prange->deferred_list, 2425 &prange->svms->deferred_range_list); 2426 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2427 prange, prange->start, prange->last, op); 2428 } 2429 } 2430 spin_unlock(&svms->deferred_list_lock); 2431 } 2432 2433 void schedule_deferred_list_work(struct svm_range_list *svms) 2434 { 2435 spin_lock(&svms->deferred_list_lock); 2436 if (!list_empty(&svms->deferred_range_list)) 2437 schedule_work(&svms->deferred_list_work); 2438 spin_unlock(&svms->deferred_list_lock); 2439 } 2440 2441 static void 2442 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2443 unsigned long last) 2444 { 2445 struct svm_range *head; 2446 struct svm_range *tail; 2447 2448 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2449 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2450 prange->start, prange->last); 2451 return; 2452 } 2453 if (start > prange->last || last < prange->start) 2454 return; 2455 2456 head = tail = prange; 2457 if (start > prange->start) 2458 svm_range_split(prange, prange->start, start - 1, &tail); 2459 if (last < tail->last) 2460 svm_range_split(tail, last + 1, tail->last, &head); 2461 2462 if (head != prange && tail != prange) { 2463 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2464 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2465 } else if (tail != prange) { 2466 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2467 } else if (head != prange) { 2468 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2469 } else if (parent != prange) { 2470 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2471 } 2472 } 2473 2474 static void 2475 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2476 unsigned long start, unsigned long last) 2477 { 2478 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2479 struct svm_range_list *svms; 2480 struct svm_range *pchild; 2481 struct kfd_process *p; 2482 unsigned long s, l; 2483 bool unmap_parent; 2484 uint32_t i; 2485 2486 if (atomic_read(&prange->queue_refcount)) { 2487 int r; 2488 2489 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2490 prange->start << PAGE_SHIFT); 2491 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2492 if (r) 2493 pr_debug("failed %d to quiesce KFD queues\n", r); 2494 } 2495 2496 p = kfd_lookup_process_by_mm(mm); 2497 if (!p) 2498 return; 2499 svms = &p->svms; 2500 2501 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2502 prange, prange->start, prange->last, start, last); 2503 2504 /* calculate time stamps that are used to decide which page faults need be 2505 * dropped or handled before unmap pages from gpu vm 2506 */ 2507 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2508 struct kfd_process_device *pdd; 2509 struct amdgpu_device *adev; 2510 struct amdgpu_ih_ring *ih; 2511 uint32_t checkpoint_wptr; 2512 2513 pdd = p->pdds[i]; 2514 if (!pdd) 2515 continue; 2516 2517 adev = pdd->dev->adev; 2518 2519 /* Check and drain ih1 ring if cam not available */ 2520 if (adev->irq.ih1.ring_size) { 2521 ih = &adev->irq.ih1; 2522 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2523 if (ih->rptr != checkpoint_wptr) { 2524 svms->checkpoint_ts[i] = 2525 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2526 continue; 2527 } 2528 } 2529 2530 /* check if dev->irq.ih_soft is not empty */ 2531 ih = &adev->irq.ih_soft; 2532 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2533 if (ih->rptr != checkpoint_wptr) 2534 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2535 } 2536 2537 unmap_parent = start <= prange->start && last >= prange->last; 2538 2539 list_for_each_entry(pchild, &prange->child_list, child_list) { 2540 mutex_lock_nested(&pchild->lock, 1); 2541 s = max(start, pchild->start); 2542 l = min(last, pchild->last); 2543 if (l >= s) 2544 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2545 svm_range_unmap_split(prange, pchild, start, last); 2546 mutex_unlock(&pchild->lock); 2547 } 2548 s = max(start, prange->start); 2549 l = min(last, prange->last); 2550 if (l >= s) 2551 svm_range_unmap_from_gpus(prange, s, l, trigger); 2552 svm_range_unmap_split(prange, prange, start, last); 2553 2554 if (unmap_parent) 2555 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2556 else 2557 svm_range_add_list_work(svms, prange, mm, 2558 SVM_OP_UPDATE_RANGE_NOTIFIER); 2559 schedule_deferred_list_work(svms); 2560 2561 kfd_unref_process(p); 2562 } 2563 2564 /** 2565 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2566 * @mni: mmu_interval_notifier struct 2567 * @range: mmu_notifier_range struct 2568 * @cur_seq: value to pass to mmu_interval_set_seq() 2569 * 2570 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2571 * is from migration, or CPU page invalidation callback. 2572 * 2573 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2574 * work thread, and split prange if only part of prange is unmapped. 2575 * 2576 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2577 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2578 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2579 * update GPU mapping to recover. 2580 * 2581 * Context: mmap lock, notifier_invalidate_start lock are held 2582 * for invalidate event, prange lock is held if this is from migration 2583 */ 2584 static bool 2585 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2586 const struct mmu_notifier_range *range, 2587 unsigned long cur_seq) 2588 { 2589 struct svm_range *prange; 2590 unsigned long start; 2591 unsigned long last; 2592 2593 if (range->event == MMU_NOTIFY_RELEASE) 2594 return true; 2595 2596 start = mni->interval_tree.start; 2597 last = mni->interval_tree.last; 2598 start = max(start, range->start) >> PAGE_SHIFT; 2599 last = min(last, range->end - 1) >> PAGE_SHIFT; 2600 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2601 start, last, range->start >> PAGE_SHIFT, 2602 (range->end - 1) >> PAGE_SHIFT, 2603 mni->interval_tree.start >> PAGE_SHIFT, 2604 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2605 2606 prange = container_of(mni, struct svm_range, notifier); 2607 2608 svm_range_lock(prange); 2609 mmu_interval_set_seq(mni, cur_seq); 2610 2611 switch (range->event) { 2612 case MMU_NOTIFY_UNMAP: 2613 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2614 break; 2615 default: 2616 svm_range_evict(prange, mni->mm, start, last, range->event); 2617 break; 2618 } 2619 2620 svm_range_unlock(prange); 2621 2622 return true; 2623 } 2624 2625 /** 2626 * svm_range_from_addr - find svm range from fault address 2627 * @svms: svm range list header 2628 * @addr: address to search range interval tree, in pages 2629 * @parent: parent range if range is on child list 2630 * 2631 * Context: The caller must hold svms->lock 2632 * 2633 * Return: the svm_range found or NULL 2634 */ 2635 struct svm_range * 2636 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2637 struct svm_range **parent) 2638 { 2639 struct interval_tree_node *node; 2640 struct svm_range *prange; 2641 struct svm_range *pchild; 2642 2643 node = interval_tree_iter_first(&svms->objects, addr, addr); 2644 if (!node) 2645 return NULL; 2646 2647 prange = container_of(node, struct svm_range, it_node); 2648 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2649 addr, prange->start, prange->last, node->start, node->last); 2650 2651 if (addr >= prange->start && addr <= prange->last) { 2652 if (parent) 2653 *parent = prange; 2654 return prange; 2655 } 2656 list_for_each_entry(pchild, &prange->child_list, child_list) 2657 if (addr >= pchild->start && addr <= pchild->last) { 2658 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2659 addr, pchild->start, pchild->last); 2660 if (parent) 2661 *parent = prange; 2662 return pchild; 2663 } 2664 2665 return NULL; 2666 } 2667 2668 /* svm_range_best_restore_location - decide the best fault restore location 2669 * @prange: svm range structure 2670 * @adev: the GPU on which vm fault happened 2671 * 2672 * This is only called when xnack is on, to decide the best location to restore 2673 * the range mapping after GPU vm fault. Caller uses the best location to do 2674 * migration if actual loc is not best location, then update GPU page table 2675 * mapping to the best location. 2676 * 2677 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2678 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2679 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2680 * if range actual loc is cpu, best_loc is cpu 2681 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2682 * range actual loc. 2683 * Otherwise, GPU no access, best_loc is -1. 2684 * 2685 * Return: 2686 * -1 means vm fault GPU no access 2687 * 0 for CPU or GPU id 2688 */ 2689 static int32_t 2690 svm_range_best_restore_location(struct svm_range *prange, 2691 struct kfd_node *node, 2692 int32_t *gpuidx) 2693 { 2694 struct kfd_node *bo_node, *preferred_node; 2695 struct kfd_process *p; 2696 uint32_t gpuid; 2697 int r; 2698 2699 p = container_of(prange->svms, struct kfd_process, svms); 2700 2701 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2702 if (r < 0) { 2703 pr_debug("failed to get gpuid from kgd\n"); 2704 return -1; 2705 } 2706 2707 if (node->adev->apu_prefer_gtt) 2708 return 0; 2709 2710 if (prange->preferred_loc == gpuid || 2711 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2712 return prange->preferred_loc; 2713 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2714 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2715 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2716 return prange->preferred_loc; 2717 /* fall through */ 2718 } 2719 2720 if (test_bit(*gpuidx, prange->bitmap_access)) 2721 return gpuid; 2722 2723 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2724 if (!prange->actual_loc) 2725 return 0; 2726 2727 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2728 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2729 return prange->actual_loc; 2730 else 2731 return 0; 2732 } 2733 2734 return -1; 2735 } 2736 2737 static int 2738 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2739 unsigned long *start, unsigned long *last, 2740 bool *is_heap_stack) 2741 { 2742 struct vm_area_struct *vma; 2743 struct interval_tree_node *node; 2744 struct rb_node *rb_node; 2745 unsigned long start_limit, end_limit; 2746 2747 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2748 if (!vma) { 2749 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2750 return -EFAULT; 2751 } 2752 2753 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2754 2755 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2756 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2757 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2758 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2759 2760 /* First range that starts after the fault address */ 2761 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2762 if (node) { 2763 end_limit = min(end_limit, node->start); 2764 /* Last range that ends before the fault address */ 2765 rb_node = rb_prev(&node->rb); 2766 } else { 2767 /* Last range must end before addr because 2768 * there was no range after addr 2769 */ 2770 rb_node = rb_last(&p->svms.objects.rb_root); 2771 } 2772 if (rb_node) { 2773 node = container_of(rb_node, struct interval_tree_node, rb); 2774 if (node->last >= addr) { 2775 WARN(1, "Overlap with prev node and page fault addr\n"); 2776 return -EFAULT; 2777 } 2778 start_limit = max(start_limit, node->last + 1); 2779 } 2780 2781 *start = start_limit; 2782 *last = end_limit - 1; 2783 2784 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2785 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2786 *start, *last, *is_heap_stack); 2787 2788 return 0; 2789 } 2790 2791 static int 2792 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2793 uint64_t *bo_s, uint64_t *bo_l) 2794 { 2795 struct amdgpu_bo_va_mapping *mapping; 2796 struct interval_tree_node *node; 2797 struct amdgpu_bo *bo = NULL; 2798 unsigned long userptr; 2799 uint32_t i; 2800 int r; 2801 2802 for (i = 0; i < p->n_pdds; i++) { 2803 struct amdgpu_vm *vm; 2804 2805 if (!p->pdds[i]->drm_priv) 2806 continue; 2807 2808 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2809 r = amdgpu_bo_reserve(vm->root.bo, false); 2810 if (r) 2811 return r; 2812 2813 /* Check userptr by searching entire vm->va interval tree */ 2814 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2815 while (node) { 2816 mapping = container_of((struct rb_node *)node, 2817 struct amdgpu_bo_va_mapping, rb); 2818 bo = mapping->bo_va->base.bo; 2819 2820 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2821 start << PAGE_SHIFT, 2822 last << PAGE_SHIFT, 2823 &userptr)) { 2824 node = interval_tree_iter_next(node, 0, ~0ULL); 2825 continue; 2826 } 2827 2828 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2829 start, last); 2830 if (bo_s && bo_l) { 2831 *bo_s = userptr >> PAGE_SHIFT; 2832 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2833 } 2834 amdgpu_bo_unreserve(vm->root.bo); 2835 return -EADDRINUSE; 2836 } 2837 amdgpu_bo_unreserve(vm->root.bo); 2838 } 2839 return 0; 2840 } 2841 2842 static struct 2843 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2844 struct kfd_process *p, 2845 struct mm_struct *mm, 2846 int64_t addr) 2847 { 2848 struct svm_range *prange = NULL; 2849 unsigned long start, last; 2850 uint32_t gpuid, gpuidx; 2851 bool is_heap_stack; 2852 uint64_t bo_s = 0; 2853 uint64_t bo_l = 0; 2854 int r; 2855 2856 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2857 &is_heap_stack)) 2858 return NULL; 2859 2860 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2861 if (r != -EADDRINUSE) 2862 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2863 2864 if (r == -EADDRINUSE) { 2865 if (addr >= bo_s && addr <= bo_l) 2866 return NULL; 2867 2868 /* Create one page svm range if 2MB range overlapping */ 2869 start = addr; 2870 last = addr; 2871 } 2872 2873 prange = svm_range_new(&p->svms, start, last, true); 2874 if (!prange) { 2875 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2876 return NULL; 2877 } 2878 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2879 pr_debug("failed to get gpuid from kgd\n"); 2880 svm_range_free(prange, true); 2881 return NULL; 2882 } 2883 2884 if (is_heap_stack) 2885 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2886 2887 svm_range_add_to_svms(prange); 2888 svm_range_add_notifier_locked(mm, prange); 2889 2890 return prange; 2891 } 2892 2893 /* svm_range_skip_recover - decide if prange can be recovered 2894 * @prange: svm range structure 2895 * 2896 * GPU vm retry fault handle skip recover the range for cases: 2897 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2898 * deferred list work will drain the stale fault before free the prange. 2899 * 2. prange is on deferred list to add interval notifier after split, or 2900 * 3. prange is child range, it is split from parent prange, recover later 2901 * after interval notifier is added. 2902 * 2903 * Return: true to skip recover, false to recover 2904 */ 2905 static bool svm_range_skip_recover(struct svm_range *prange) 2906 { 2907 struct svm_range_list *svms = prange->svms; 2908 2909 spin_lock(&svms->deferred_list_lock); 2910 if (list_empty(&prange->deferred_list) && 2911 list_empty(&prange->child_list)) { 2912 spin_unlock(&svms->deferred_list_lock); 2913 return false; 2914 } 2915 spin_unlock(&svms->deferred_list_lock); 2916 2917 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2918 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2919 svms, prange, prange->start, prange->last); 2920 return true; 2921 } 2922 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2923 prange->work_item.op == SVM_OP_ADD_RANGE) { 2924 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2925 svms, prange, prange->start, prange->last); 2926 return true; 2927 } 2928 return false; 2929 } 2930 2931 static void 2932 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2933 int32_t gpuidx) 2934 { 2935 struct kfd_process_device *pdd; 2936 2937 /* fault is on different page of same range 2938 * or fault is skipped to recover later 2939 * or fault is on invalid virtual address 2940 */ 2941 if (gpuidx == MAX_GPU_INSTANCE) { 2942 uint32_t gpuid; 2943 int r; 2944 2945 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2946 if (r < 0) 2947 return; 2948 } 2949 2950 /* fault is recovered 2951 * or fault cannot recover because GPU no access on the range 2952 */ 2953 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2954 if (pdd) 2955 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2956 } 2957 2958 static bool 2959 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2960 { 2961 unsigned long requested = VM_READ; 2962 2963 if (write_fault) 2964 requested |= VM_WRITE; 2965 2966 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2967 vma->vm_flags); 2968 return (vma->vm_flags & requested) == requested; 2969 } 2970 2971 int 2972 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2973 uint32_t vmid, uint32_t node_id, 2974 uint64_t addr, uint64_t ts, bool write_fault) 2975 { 2976 unsigned long start, last, size; 2977 struct mm_struct *mm = NULL; 2978 struct svm_range_list *svms; 2979 struct svm_range *prange; 2980 struct kfd_process *p; 2981 ktime_t timestamp = ktime_get_boottime(); 2982 struct kfd_node *node; 2983 int32_t best_loc; 2984 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2985 bool write_locked = false; 2986 struct vm_area_struct *vma; 2987 bool migration = false; 2988 int r = 0; 2989 2990 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2991 pr_debug("device does not support SVM\n"); 2992 return -EFAULT; 2993 } 2994 2995 p = kfd_lookup_process_by_pasid(pasid, NULL); 2996 if (!p) { 2997 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2998 return 0; 2999 } 3000 svms = &p->svms; 3001 3002 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3003 3004 if (atomic_read(&svms->drain_pagefaults)) { 3005 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3006 r = 0; 3007 goto out; 3008 } 3009 3010 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3011 if (!node) { 3012 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3013 vmid); 3014 r = -EFAULT; 3015 goto out; 3016 } 3017 3018 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3019 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3020 r = -EFAULT; 3021 goto out; 3022 } 3023 3024 if (!p->xnack_enabled) { 3025 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3026 r = -EFAULT; 3027 goto out; 3028 } 3029 3030 /* p->lead_thread is available as kfd_process_wq_release flush the work 3031 * before releasing task ref. 3032 */ 3033 mm = get_task_mm(p->lead_thread); 3034 if (!mm) { 3035 pr_debug("svms 0x%p failed to get mm\n", svms); 3036 r = 0; 3037 goto out; 3038 } 3039 3040 mmap_read_lock(mm); 3041 retry_write_locked: 3042 mutex_lock(&svms->lock); 3043 3044 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3045 if (svms->checkpoint_ts[gpuidx] != 0) { 3046 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3047 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3048 r = -EAGAIN; 3049 goto out_unlock_svms; 3050 } else { 3051 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3052 * to zero to avoid following ts wrap around give wrong comparing 3053 */ 3054 svms->checkpoint_ts[gpuidx] = 0; 3055 } 3056 } 3057 3058 prange = svm_range_from_addr(svms, addr, NULL); 3059 if (!prange) { 3060 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3061 svms, addr); 3062 if (!write_locked) { 3063 /* Need the write lock to create new range with MMU notifier. 3064 * Also flush pending deferred work to make sure the interval 3065 * tree is up to date before we add a new range 3066 */ 3067 mutex_unlock(&svms->lock); 3068 mmap_read_unlock(mm); 3069 mmap_write_lock(mm); 3070 write_locked = true; 3071 goto retry_write_locked; 3072 } 3073 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3074 if (!prange) { 3075 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3076 svms, addr); 3077 mmap_write_downgrade(mm); 3078 r = -EFAULT; 3079 goto out_unlock_svms; 3080 } 3081 } 3082 if (write_locked) 3083 mmap_write_downgrade(mm); 3084 3085 mutex_lock(&prange->migrate_mutex); 3086 3087 if (svm_range_skip_recover(prange)) { 3088 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3089 r = 0; 3090 goto out_unlock_range; 3091 } 3092 3093 /* skip duplicate vm fault on different pages of same range */ 3094 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3095 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3096 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3097 svms, prange->start, prange->last); 3098 r = 0; 3099 goto out_unlock_range; 3100 } 3101 3102 /* __do_munmap removed VMA, return success as we are handling stale 3103 * retry fault. 3104 */ 3105 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3106 if (!vma) { 3107 pr_debug("address 0x%llx VMA is removed\n", addr); 3108 r = 0; 3109 goto out_unlock_range; 3110 } 3111 3112 if (!svm_fault_allowed(vma, write_fault)) { 3113 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3114 write_fault ? "write" : "read"); 3115 r = -EPERM; 3116 goto out_unlock_range; 3117 } 3118 3119 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3120 if (best_loc == -1) { 3121 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3122 svms, prange->start, prange->last); 3123 r = -EACCES; 3124 goto out_unlock_range; 3125 } 3126 3127 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3128 svms, prange->start, prange->last, best_loc, 3129 prange->actual_loc); 3130 3131 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3132 write_fault, timestamp); 3133 3134 /* Align migration range start and size to granularity size */ 3135 size = 1UL << prange->granularity; 3136 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3137 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3138 if (prange->actual_loc != 0 || best_loc != 0) { 3139 if (best_loc) { 3140 r = svm_migrate_to_vram(prange, best_loc, start, last, 3141 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3142 if (r) { 3143 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3144 r, addr); 3145 /* Fallback to system memory if migration to 3146 * VRAM failed 3147 */ 3148 if (prange->actual_loc && prange->actual_loc != best_loc) 3149 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3150 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3151 else 3152 r = 0; 3153 } 3154 } else { 3155 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3156 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3157 } 3158 if (r) { 3159 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3160 r, svms, start, last); 3161 goto out_migrate_fail; 3162 } else { 3163 migration = true; 3164 } 3165 } 3166 3167 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3168 false, false); 3169 if (r) 3170 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3171 r, svms, start, last); 3172 3173 out_migrate_fail: 3174 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3175 migration); 3176 3177 out_unlock_range: 3178 mutex_unlock(&prange->migrate_mutex); 3179 out_unlock_svms: 3180 mutex_unlock(&svms->lock); 3181 mmap_read_unlock(mm); 3182 3183 if (r != -EAGAIN) 3184 svm_range_count_fault(node, p, gpuidx); 3185 3186 mmput(mm); 3187 out: 3188 kfd_unref_process(p); 3189 3190 if (r == -EAGAIN) { 3191 pr_debug("recover vm fault later\n"); 3192 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3193 r = 0; 3194 } 3195 return r; 3196 } 3197 3198 int 3199 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3200 { 3201 struct svm_range *prange, *pchild; 3202 uint64_t reserved_size = 0; 3203 uint64_t size; 3204 int r = 0; 3205 3206 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3207 3208 mutex_lock(&p->svms.lock); 3209 3210 list_for_each_entry(prange, &p->svms.list, list) { 3211 svm_range_lock(prange); 3212 list_for_each_entry(pchild, &prange->child_list, child_list) { 3213 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3214 if (xnack_enabled) { 3215 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3216 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3217 } else { 3218 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3219 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3220 if (r) 3221 goto out_unlock; 3222 reserved_size += size; 3223 } 3224 } 3225 3226 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3227 if (xnack_enabled) { 3228 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3229 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3230 } else { 3231 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3232 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3233 if (r) 3234 goto out_unlock; 3235 reserved_size += size; 3236 } 3237 out_unlock: 3238 svm_range_unlock(prange); 3239 if (r) 3240 break; 3241 } 3242 3243 if (r) 3244 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3245 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3246 else 3247 /* Change xnack mode must be inside svms lock, to avoid race with 3248 * svm_range_deferred_list_work unreserve memory in parallel. 3249 */ 3250 p->xnack_enabled = xnack_enabled; 3251 3252 mutex_unlock(&p->svms.lock); 3253 return r; 3254 } 3255 3256 void svm_range_list_fini(struct kfd_process *p) 3257 { 3258 struct svm_range *prange; 3259 struct svm_range *next; 3260 3261 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3262 &p->svms); 3263 3264 cancel_delayed_work_sync(&p->svms.restore_work); 3265 3266 /* Ensure list work is finished before process is destroyed */ 3267 flush_work(&p->svms.deferred_list_work); 3268 3269 /* 3270 * Ensure no retry fault comes in afterwards, as page fault handler will 3271 * not find kfd process and take mm lock to recover fault. 3272 * stop kfd page fault handing, then wait pending page faults got drained 3273 */ 3274 atomic_set(&p->svms.drain_pagefaults, 1); 3275 svm_range_drain_retry_fault(&p->svms); 3276 3277 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3278 svm_range_unlink(prange); 3279 svm_range_remove_notifier(prange); 3280 svm_range_free(prange, true); 3281 } 3282 3283 mutex_destroy(&p->svms.lock); 3284 3285 pr_debug("process pid %d svms 0x%p done\n", 3286 p->lead_thread->pid, &p->svms); 3287 } 3288 3289 int svm_range_list_init(struct kfd_process *p) 3290 { 3291 struct svm_range_list *svms = &p->svms; 3292 int i; 3293 3294 svms->objects = RB_ROOT_CACHED; 3295 mutex_init(&svms->lock); 3296 INIT_LIST_HEAD(&svms->list); 3297 atomic_set(&svms->evicted_ranges, 0); 3298 atomic_set(&svms->drain_pagefaults, 0); 3299 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3300 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3301 INIT_LIST_HEAD(&svms->deferred_range_list); 3302 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3303 spin_lock_init(&svms->deferred_list_lock); 3304 3305 for (i = 0; i < p->n_pdds; i++) 3306 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3307 bitmap_set(svms->bitmap_supported, i, 1); 3308 3309 /* Value of default granularity cannot exceed 0x1B, the 3310 * number of pages supported by a 4-level paging table 3311 */ 3312 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3313 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3314 3315 return 0; 3316 } 3317 3318 /** 3319 * svm_range_check_vm - check if virtual address range mapped already 3320 * @p: current kfd_process 3321 * @start: range start address, in pages 3322 * @last: range last address, in pages 3323 * @bo_s: mapping start address in pages if address range already mapped 3324 * @bo_l: mapping last address in pages if address range already mapped 3325 * 3326 * The purpose is to avoid virtual address ranges already allocated by 3327 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3328 * It looks for each pdd in the kfd_process. 3329 * 3330 * Context: Process context 3331 * 3332 * Return 0 - OK, if the range is not mapped. 3333 * Otherwise error code: 3334 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3335 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3336 * a signal. Release all buffer reservations and return to user-space. 3337 */ 3338 static int 3339 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3340 uint64_t *bo_s, uint64_t *bo_l) 3341 { 3342 struct amdgpu_bo_va_mapping *mapping; 3343 struct interval_tree_node *node; 3344 uint32_t i; 3345 int r; 3346 3347 for (i = 0; i < p->n_pdds; i++) { 3348 struct amdgpu_vm *vm; 3349 3350 if (!p->pdds[i]->drm_priv) 3351 continue; 3352 3353 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3354 r = amdgpu_bo_reserve(vm->root.bo, false); 3355 if (r) 3356 return r; 3357 3358 node = interval_tree_iter_first(&vm->va, start, last); 3359 if (node) { 3360 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3361 start, last); 3362 mapping = container_of((struct rb_node *)node, 3363 struct amdgpu_bo_va_mapping, rb); 3364 if (bo_s && bo_l) { 3365 *bo_s = mapping->start; 3366 *bo_l = mapping->last; 3367 } 3368 amdgpu_bo_unreserve(vm->root.bo); 3369 return -EADDRINUSE; 3370 } 3371 amdgpu_bo_unreserve(vm->root.bo); 3372 } 3373 3374 return 0; 3375 } 3376 3377 /** 3378 * svm_range_is_valid - check if virtual address range is valid 3379 * @p: current kfd_process 3380 * @start: range start address, in pages 3381 * @size: range size, in pages 3382 * 3383 * Valid virtual address range means it belongs to one or more VMAs 3384 * 3385 * Context: Process context 3386 * 3387 * Return: 3388 * 0 - OK, otherwise error code 3389 */ 3390 static int 3391 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3392 { 3393 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3394 struct vm_area_struct *vma; 3395 unsigned long end; 3396 unsigned long start_unchg = start; 3397 3398 start <<= PAGE_SHIFT; 3399 end = start + (size << PAGE_SHIFT); 3400 do { 3401 vma = vma_lookup(p->mm, start); 3402 if (!vma || (vma->vm_flags & device_vma)) 3403 return -EFAULT; 3404 start = min(end, vma->vm_end); 3405 } while (start < end); 3406 3407 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3408 NULL); 3409 } 3410 3411 /** 3412 * svm_range_best_prefetch_location - decide the best prefetch location 3413 * @prange: svm range structure 3414 * 3415 * For xnack off: 3416 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3417 * can be CPU or GPU. 3418 * 3419 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3420 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3421 * the best prefetch location is always CPU, because GPU can not have coherent 3422 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3423 * 3424 * For xnack on: 3425 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3426 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3427 * 3428 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3429 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3430 * prefetch location is always CPU. 3431 * 3432 * Context: Process context 3433 * 3434 * Return: 3435 * 0 for CPU or GPU id 3436 */ 3437 static uint32_t 3438 svm_range_best_prefetch_location(struct svm_range *prange) 3439 { 3440 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3441 uint32_t best_loc = prange->prefetch_loc; 3442 struct kfd_process_device *pdd; 3443 struct kfd_node *bo_node; 3444 struct kfd_process *p; 3445 uint32_t gpuidx; 3446 3447 p = container_of(prange->svms, struct kfd_process, svms); 3448 3449 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3450 goto out; 3451 3452 bo_node = svm_range_get_node_by_id(prange, best_loc); 3453 if (!bo_node) { 3454 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3455 best_loc = 0; 3456 goto out; 3457 } 3458 3459 if (bo_node->adev->apu_prefer_gtt) { 3460 best_loc = 0; 3461 goto out; 3462 } 3463 3464 if (p->xnack_enabled) 3465 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3466 else 3467 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3468 MAX_GPU_INSTANCE); 3469 3470 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3471 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3472 if (!pdd) { 3473 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3474 continue; 3475 } 3476 3477 if (pdd->dev->adev == bo_node->adev) 3478 continue; 3479 3480 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3481 best_loc = 0; 3482 break; 3483 } 3484 } 3485 3486 out: 3487 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3488 p->xnack_enabled, &p->svms, prange->start, prange->last, 3489 best_loc); 3490 3491 return best_loc; 3492 } 3493 3494 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3495 * @mm: current process mm_struct 3496 * @prange: svm range structure 3497 * @migrated: output, true if migration is triggered 3498 * 3499 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3500 * from ram to vram. 3501 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3502 * from vram to ram. 3503 * 3504 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3505 * and restore work: 3506 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3507 * stops all queues, schedule restore work 3508 * 2. svm_range_restore_work wait for migration is done by 3509 * a. svm_range_validate_vram takes prange->migrate_mutex 3510 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3511 * 3. restore work update mappings of GPU, resume all queues. 3512 * 3513 * Context: Process context 3514 * 3515 * Return: 3516 * 0 - OK, otherwise - error code of migration 3517 */ 3518 static int 3519 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3520 bool *migrated) 3521 { 3522 uint32_t best_loc; 3523 int r = 0; 3524 3525 *migrated = false; 3526 best_loc = svm_range_best_prefetch_location(prange); 3527 3528 /* when best_loc is a gpu node and same as prange->actual_loc 3529 * we still need do migration as prange->actual_loc !=0 does 3530 * not mean all pages in prange are vram. hmm migrate will pick 3531 * up right pages during migration. 3532 */ 3533 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3534 (best_loc == 0 && prange->actual_loc == 0)) 3535 return 0; 3536 3537 if (!best_loc) { 3538 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3539 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3540 *migrated = !r; 3541 return r; 3542 } 3543 3544 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3545 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3546 *migrated = !r; 3547 3548 return 0; 3549 } 3550 3551 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3552 { 3553 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3554 * signaled yet and we're under the protection of the fence->lock. 3555 * After the fence is signaled in svm_range_bo_release, we cannot get 3556 * here any more. 3557 * 3558 * Reference is dropped in svm_range_evict_svm_bo_worker. 3559 */ 3560 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3561 WRITE_ONCE(fence->svm_bo->evicting, 1); 3562 schedule_work(&fence->svm_bo->eviction_work); 3563 } 3564 3565 return 0; 3566 } 3567 3568 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3569 { 3570 struct svm_range_bo *svm_bo; 3571 struct mm_struct *mm; 3572 int r = 0; 3573 3574 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3575 3576 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3577 mm = svm_bo->eviction_fence->mm; 3578 } else { 3579 svm_range_bo_unref(svm_bo); 3580 return; 3581 } 3582 3583 mmap_read_lock(mm); 3584 spin_lock(&svm_bo->list_lock); 3585 while (!list_empty(&svm_bo->range_list) && !r) { 3586 struct svm_range *prange = 3587 list_first_entry(&svm_bo->range_list, 3588 struct svm_range, svm_bo_list); 3589 int retries = 3; 3590 3591 list_del_init(&prange->svm_bo_list); 3592 spin_unlock(&svm_bo->list_lock); 3593 3594 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3595 prange->start, prange->last); 3596 3597 mutex_lock(&prange->migrate_mutex); 3598 do { 3599 /* migrate all vram pages in this prange to sys ram 3600 * after that prange->actual_loc should be zero 3601 */ 3602 r = svm_migrate_vram_to_ram(prange, mm, 3603 prange->start, prange->last, 3604 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3605 } while (!r && prange->actual_loc && --retries); 3606 3607 if (!r && prange->actual_loc) 3608 pr_info_once("Migration failed during eviction"); 3609 3610 if (!prange->actual_loc) { 3611 mutex_lock(&prange->lock); 3612 prange->svm_bo = NULL; 3613 mutex_unlock(&prange->lock); 3614 } 3615 mutex_unlock(&prange->migrate_mutex); 3616 3617 spin_lock(&svm_bo->list_lock); 3618 } 3619 spin_unlock(&svm_bo->list_lock); 3620 mmap_read_unlock(mm); 3621 mmput(mm); 3622 3623 dma_fence_signal(&svm_bo->eviction_fence->base); 3624 3625 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3626 * has been called in svm_migrate_vram_to_ram 3627 */ 3628 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3629 svm_range_bo_unref(svm_bo); 3630 } 3631 3632 static int 3633 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3634 uint64_t start, uint64_t size, uint32_t nattr, 3635 struct kfd_ioctl_svm_attribute *attrs) 3636 { 3637 struct amdkfd_process_info *process_info = p->kgd_process_info; 3638 struct list_head update_list; 3639 struct list_head insert_list; 3640 struct list_head remove_list; 3641 struct list_head remap_list; 3642 struct svm_range_list *svms; 3643 struct svm_range *prange; 3644 struct svm_range *next; 3645 bool update_mapping = false; 3646 bool flush_tlb; 3647 int r, ret = 0; 3648 3649 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3650 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3651 3652 r = svm_range_check_attr(p, nattr, attrs); 3653 if (r) 3654 return r; 3655 3656 svms = &p->svms; 3657 3658 mutex_lock(&process_info->lock); 3659 3660 svm_range_list_lock_and_flush_work(svms, mm); 3661 3662 r = svm_range_is_valid(p, start, size); 3663 if (r) { 3664 pr_debug("invalid range r=%d\n", r); 3665 mmap_write_unlock(mm); 3666 goto out; 3667 } 3668 3669 mutex_lock(&svms->lock); 3670 3671 /* Add new range and split existing ranges as needed */ 3672 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3673 &insert_list, &remove_list, &remap_list); 3674 if (r) { 3675 mutex_unlock(&svms->lock); 3676 mmap_write_unlock(mm); 3677 goto out; 3678 } 3679 /* Apply changes as a transaction */ 3680 list_for_each_entry_safe(prange, next, &insert_list, list) { 3681 svm_range_add_to_svms(prange); 3682 svm_range_add_notifier_locked(mm, prange); 3683 } 3684 list_for_each_entry(prange, &update_list, update_list) { 3685 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3686 /* TODO: unmap ranges from GPU that lost access */ 3687 } 3688 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3689 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3690 prange->svms, prange, prange->start, 3691 prange->last); 3692 svm_range_unlink(prange); 3693 svm_range_remove_notifier(prange); 3694 svm_range_free(prange, false); 3695 } 3696 3697 mmap_write_downgrade(mm); 3698 /* Trigger migrations and revalidate and map to GPUs as needed. If 3699 * this fails we may be left with partially completed actions. There 3700 * is no clean way of rolling back to the previous state in such a 3701 * case because the rollback wouldn't be guaranteed to work either. 3702 */ 3703 list_for_each_entry(prange, &update_list, update_list) { 3704 bool migrated; 3705 3706 mutex_lock(&prange->migrate_mutex); 3707 3708 r = svm_range_trigger_migration(mm, prange, &migrated); 3709 if (r) 3710 goto out_unlock_range; 3711 3712 if (migrated && (!p->xnack_enabled || 3713 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3714 prange->mapped_to_gpu) { 3715 pr_debug("restore_work will update mappings of GPUs\n"); 3716 mutex_unlock(&prange->migrate_mutex); 3717 continue; 3718 } 3719 3720 if (!migrated && !update_mapping) { 3721 mutex_unlock(&prange->migrate_mutex); 3722 continue; 3723 } 3724 3725 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3726 3727 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3728 MAX_GPU_INSTANCE, true, true, flush_tlb); 3729 if (r) 3730 pr_debug("failed %d to map svm range\n", r); 3731 3732 out_unlock_range: 3733 mutex_unlock(&prange->migrate_mutex); 3734 if (r) 3735 ret = r; 3736 } 3737 3738 list_for_each_entry(prange, &remap_list, update_list) { 3739 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3740 prange, prange->start, prange->last); 3741 mutex_lock(&prange->migrate_mutex); 3742 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3743 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3744 if (r) 3745 pr_debug("failed %d on remap svm range\n", r); 3746 mutex_unlock(&prange->migrate_mutex); 3747 if (r) 3748 ret = r; 3749 } 3750 3751 dynamic_svm_range_dump(svms); 3752 3753 mutex_unlock(&svms->lock); 3754 mmap_read_unlock(mm); 3755 out: 3756 mutex_unlock(&process_info->lock); 3757 3758 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3759 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3760 3761 return ret ? ret : r; 3762 } 3763 3764 static int 3765 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3766 uint64_t start, uint64_t size, uint32_t nattr, 3767 struct kfd_ioctl_svm_attribute *attrs) 3768 { 3769 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3770 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3771 bool get_preferred_loc = false; 3772 bool get_prefetch_loc = false; 3773 bool get_granularity = false; 3774 bool get_accessible = false; 3775 bool get_flags = false; 3776 uint64_t last = start + size - 1UL; 3777 uint8_t granularity = 0xff; 3778 struct interval_tree_node *node; 3779 struct svm_range_list *svms; 3780 struct svm_range *prange; 3781 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3782 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3783 uint32_t flags_and = 0xffffffff; 3784 uint32_t flags_or = 0; 3785 int gpuidx; 3786 uint32_t i; 3787 int r = 0; 3788 3789 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3790 start + size - 1, nattr); 3791 3792 /* Flush pending deferred work to avoid racing with deferred actions from 3793 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3794 * can still race with get_attr because we don't hold the mmap lock. But that 3795 * would be a race condition in the application anyway, and undefined 3796 * behaviour is acceptable in that case. 3797 */ 3798 flush_work(&p->svms.deferred_list_work); 3799 3800 mmap_read_lock(mm); 3801 r = svm_range_is_valid(p, start, size); 3802 mmap_read_unlock(mm); 3803 if (r) { 3804 pr_debug("invalid range r=%d\n", r); 3805 return r; 3806 } 3807 3808 for (i = 0; i < nattr; i++) { 3809 switch (attrs[i].type) { 3810 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3811 get_preferred_loc = true; 3812 break; 3813 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3814 get_prefetch_loc = true; 3815 break; 3816 case KFD_IOCTL_SVM_ATTR_ACCESS: 3817 get_accessible = true; 3818 break; 3819 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3820 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3821 get_flags = true; 3822 break; 3823 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3824 get_granularity = true; 3825 break; 3826 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3827 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3828 fallthrough; 3829 default: 3830 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3831 return -EINVAL; 3832 } 3833 } 3834 3835 svms = &p->svms; 3836 3837 mutex_lock(&svms->lock); 3838 3839 node = interval_tree_iter_first(&svms->objects, start, last); 3840 if (!node) { 3841 pr_debug("range attrs not found return default values\n"); 3842 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3843 &granularity, &flags_and); 3844 flags_or = flags_and; 3845 if (p->xnack_enabled) 3846 bitmap_copy(bitmap_access, svms->bitmap_supported, 3847 MAX_GPU_INSTANCE); 3848 else 3849 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3850 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3851 goto fill_values; 3852 } 3853 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3854 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3855 3856 while (node) { 3857 struct interval_tree_node *next; 3858 3859 prange = container_of(node, struct svm_range, it_node); 3860 next = interval_tree_iter_next(node, start, last); 3861 3862 if (get_preferred_loc) { 3863 if (prange->preferred_loc == 3864 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3865 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3866 location != prange->preferred_loc)) { 3867 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3868 get_preferred_loc = false; 3869 } else { 3870 location = prange->preferred_loc; 3871 } 3872 } 3873 if (get_prefetch_loc) { 3874 if (prange->prefetch_loc == 3875 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3876 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3877 prefetch_loc != prange->prefetch_loc)) { 3878 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3879 get_prefetch_loc = false; 3880 } else { 3881 prefetch_loc = prange->prefetch_loc; 3882 } 3883 } 3884 if (get_accessible) { 3885 bitmap_and(bitmap_access, bitmap_access, 3886 prange->bitmap_access, MAX_GPU_INSTANCE); 3887 bitmap_and(bitmap_aip, bitmap_aip, 3888 prange->bitmap_aip, MAX_GPU_INSTANCE); 3889 } 3890 if (get_flags) { 3891 flags_and &= prange->flags; 3892 flags_or |= prange->flags; 3893 } 3894 3895 if (get_granularity && prange->granularity < granularity) 3896 granularity = prange->granularity; 3897 3898 node = next; 3899 } 3900 fill_values: 3901 mutex_unlock(&svms->lock); 3902 3903 for (i = 0; i < nattr; i++) { 3904 switch (attrs[i].type) { 3905 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3906 attrs[i].value = location; 3907 break; 3908 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3909 attrs[i].value = prefetch_loc; 3910 break; 3911 case KFD_IOCTL_SVM_ATTR_ACCESS: 3912 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3913 attrs[i].value); 3914 if (gpuidx < 0) { 3915 pr_debug("invalid gpuid %x\n", attrs[i].value); 3916 return -EINVAL; 3917 } 3918 if (test_bit(gpuidx, bitmap_access)) 3919 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3920 else if (test_bit(gpuidx, bitmap_aip)) 3921 attrs[i].type = 3922 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3923 else 3924 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3925 break; 3926 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3927 attrs[i].value = flags_and; 3928 break; 3929 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3930 attrs[i].value = ~flags_or; 3931 break; 3932 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3933 attrs[i].value = (uint32_t)granularity; 3934 break; 3935 } 3936 } 3937 3938 return 0; 3939 } 3940 3941 int kfd_criu_resume_svm(struct kfd_process *p) 3942 { 3943 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3944 int nattr_common = 4, nattr_accessibility = 1; 3945 struct criu_svm_metadata *criu_svm_md = NULL; 3946 struct svm_range_list *svms = &p->svms; 3947 struct criu_svm_metadata *next = NULL; 3948 uint32_t set_flags = 0xffffffff; 3949 int i, j, num_attrs, ret = 0; 3950 uint64_t set_attr_size; 3951 struct mm_struct *mm; 3952 3953 if (list_empty(&svms->criu_svm_metadata_list)) { 3954 pr_debug("No SVM data from CRIU restore stage 2\n"); 3955 return ret; 3956 } 3957 3958 mm = get_task_mm(p->lead_thread); 3959 if (!mm) { 3960 pr_err("failed to get mm for the target process\n"); 3961 return -ESRCH; 3962 } 3963 3964 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3965 3966 i = j = 0; 3967 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3968 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3969 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3970 3971 for (j = 0; j < num_attrs; j++) { 3972 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3973 i, j, criu_svm_md->data.attrs[j].type, 3974 i, j, criu_svm_md->data.attrs[j].value); 3975 switch (criu_svm_md->data.attrs[j].type) { 3976 /* During Checkpoint operation, the query for 3977 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3978 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3979 * not used by the range which was checkpointed. Care 3980 * must be taken to not restore with an invalid value 3981 * otherwise the gpuidx value will be invalid and 3982 * set_attr would eventually fail so just replace those 3983 * with another dummy attribute such as 3984 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3985 */ 3986 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3987 if (criu_svm_md->data.attrs[j].value == 3988 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3989 criu_svm_md->data.attrs[j].type = 3990 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3991 criu_svm_md->data.attrs[j].value = 0; 3992 } 3993 break; 3994 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3995 set_flags = criu_svm_md->data.attrs[j].value; 3996 break; 3997 default: 3998 break; 3999 } 4000 } 4001 4002 /* CLR_FLAGS is not available via get_attr during checkpoint but 4003 * it needs to be inserted before restoring the ranges so 4004 * allocate extra space for it before calling set_attr 4005 */ 4006 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4007 (num_attrs + 1); 4008 set_attr_new = krealloc(set_attr, set_attr_size, 4009 GFP_KERNEL); 4010 if (!set_attr_new) { 4011 ret = -ENOMEM; 4012 goto exit; 4013 } 4014 set_attr = set_attr_new; 4015 4016 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4017 sizeof(struct kfd_ioctl_svm_attribute)); 4018 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4019 set_attr[num_attrs].value = ~set_flags; 4020 4021 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4022 criu_svm_md->data.size, num_attrs + 1, 4023 set_attr); 4024 if (ret) { 4025 pr_err("CRIU: failed to set range attributes\n"); 4026 goto exit; 4027 } 4028 4029 i++; 4030 } 4031 exit: 4032 kfree(set_attr); 4033 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4034 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4035 criu_svm_md->data.start_addr); 4036 kfree(criu_svm_md); 4037 } 4038 4039 mmput(mm); 4040 return ret; 4041 4042 } 4043 4044 int kfd_criu_restore_svm(struct kfd_process *p, 4045 uint8_t __user *user_priv_ptr, 4046 uint64_t *priv_data_offset, 4047 uint64_t max_priv_data_size) 4048 { 4049 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4050 int nattr_common = 4, nattr_accessibility = 1; 4051 struct criu_svm_metadata *criu_svm_md = NULL; 4052 struct svm_range_list *svms = &p->svms; 4053 uint32_t num_devices; 4054 int ret = 0; 4055 4056 num_devices = p->n_pdds; 4057 /* Handle one SVM range object at a time, also the number of gpus are 4058 * assumed to be same on the restore node, checking must be done while 4059 * evaluating the topology earlier 4060 */ 4061 4062 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4063 (nattr_common + nattr_accessibility * num_devices); 4064 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4065 4066 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4067 svm_attrs_size; 4068 4069 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4070 if (!criu_svm_md) { 4071 pr_err("failed to allocate memory to store svm metadata\n"); 4072 return -ENOMEM; 4073 } 4074 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4075 ret = -EINVAL; 4076 goto exit; 4077 } 4078 4079 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4080 svm_priv_data_size); 4081 if (ret) { 4082 ret = -EFAULT; 4083 goto exit; 4084 } 4085 *priv_data_offset += svm_priv_data_size; 4086 4087 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4088 4089 return 0; 4090 4091 4092 exit: 4093 kfree(criu_svm_md); 4094 return ret; 4095 } 4096 4097 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4098 uint64_t *svm_priv_data_size) 4099 { 4100 uint64_t total_size, accessibility_size, common_attr_size; 4101 int nattr_common = 4, nattr_accessibility = 1; 4102 int num_devices = p->n_pdds; 4103 struct svm_range_list *svms; 4104 struct svm_range *prange; 4105 uint32_t count = 0; 4106 4107 *svm_priv_data_size = 0; 4108 4109 svms = &p->svms; 4110 4111 mutex_lock(&svms->lock); 4112 list_for_each_entry(prange, &svms->list, list) { 4113 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4114 prange, prange->start, prange->npages, 4115 prange->start + prange->npages - 1); 4116 count++; 4117 } 4118 mutex_unlock(&svms->lock); 4119 4120 *num_svm_ranges = count; 4121 /* Only the accessbility attributes need to be queried for all the gpus 4122 * individually, remaining ones are spanned across the entire process 4123 * regardless of the various gpu nodes. Of the remaining attributes, 4124 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4125 * 4126 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4127 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4128 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4129 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4130 * 4131 * ** ACCESSBILITY ATTRIBUTES ** 4132 * (Considered as one, type is altered during query, value is gpuid) 4133 * KFD_IOCTL_SVM_ATTR_ACCESS 4134 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4135 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4136 */ 4137 if (*num_svm_ranges > 0) { 4138 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4139 nattr_common; 4140 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4141 nattr_accessibility * num_devices; 4142 4143 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4144 common_attr_size + accessibility_size; 4145 4146 *svm_priv_data_size = *num_svm_ranges * total_size; 4147 } 4148 4149 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4150 *svm_priv_data_size); 4151 } 4152 4153 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4154 uint8_t __user *user_priv_data, 4155 uint64_t *priv_data_offset) 4156 { 4157 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4158 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4159 uint64_t svm_priv_data_size, query_attr_size = 0; 4160 int index, nattr_common = 4, ret = 0; 4161 struct svm_range_list *svms; 4162 int num_devices = p->n_pdds; 4163 struct svm_range *prange; 4164 struct mm_struct *mm; 4165 4166 svms = &p->svms; 4167 4168 mm = get_task_mm(p->lead_thread); 4169 if (!mm) { 4170 pr_err("failed to get mm for the target process\n"); 4171 return -ESRCH; 4172 } 4173 4174 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4175 (nattr_common + num_devices); 4176 4177 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4178 if (!query_attr) { 4179 ret = -ENOMEM; 4180 goto exit; 4181 } 4182 4183 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4184 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4185 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4186 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4187 4188 for (index = 0; index < num_devices; index++) { 4189 struct kfd_process_device *pdd = p->pdds[index]; 4190 4191 query_attr[index + nattr_common].type = 4192 KFD_IOCTL_SVM_ATTR_ACCESS; 4193 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4194 } 4195 4196 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4197 4198 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4199 if (!svm_priv) { 4200 ret = -ENOMEM; 4201 goto exit_query; 4202 } 4203 4204 index = 0; 4205 list_for_each_entry(prange, &svms->list, list) { 4206 4207 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4208 svm_priv->start_addr = prange->start; 4209 svm_priv->size = prange->npages; 4210 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4211 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4212 prange, prange->start, prange->npages, 4213 prange->start + prange->npages - 1, 4214 prange->npages * PAGE_SIZE); 4215 4216 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4217 svm_priv->size, 4218 (nattr_common + num_devices), 4219 svm_priv->attrs); 4220 if (ret) { 4221 pr_err("CRIU: failed to obtain range attributes\n"); 4222 goto exit_priv; 4223 } 4224 4225 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4226 svm_priv_data_size)) { 4227 pr_err("Failed to copy svm priv to user\n"); 4228 ret = -EFAULT; 4229 goto exit_priv; 4230 } 4231 4232 *priv_data_offset += svm_priv_data_size; 4233 4234 } 4235 4236 4237 exit_priv: 4238 kfree(svm_priv); 4239 exit_query: 4240 kfree(query_attr); 4241 exit: 4242 mmput(mm); 4243 return ret; 4244 } 4245 4246 int 4247 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4248 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4249 { 4250 struct mm_struct *mm = current->mm; 4251 int r; 4252 4253 start >>= PAGE_SHIFT; 4254 size >>= PAGE_SHIFT; 4255 4256 switch (op) { 4257 case KFD_IOCTL_SVM_OP_SET_ATTR: 4258 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4259 break; 4260 case KFD_IOCTL_SVM_OP_GET_ATTR: 4261 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4262 break; 4263 default: 4264 r = -EINVAL; 4265 break; 4266 } 4267 4268 return r; 4269 } 4270