1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 return 0; 202 } 203 204 static int 205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 206 unsigned long offset, unsigned long npages, 207 unsigned long *hmm_pfns) 208 { 209 struct kfd_process *p; 210 uint32_t gpuidx; 211 int r; 212 213 p = container_of(prange->svms, struct kfd_process, svms); 214 215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 216 struct kfd_process_device *pdd; 217 218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 219 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 220 if (!pdd) { 221 pr_debug("failed to find device idx %d\n", gpuidx); 222 return -EINVAL; 223 } 224 225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 226 hmm_pfns, gpuidx); 227 if (r) 228 break; 229 } 230 231 return r; 232 } 233 234 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr, 235 unsigned long offset, unsigned long npages) 236 { 237 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 238 int i; 239 240 if (!dma_addr) 241 return; 242 243 for (i = offset; i < offset + npages; i++) { 244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 245 continue; 246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 248 dma_addr[i] = 0; 249 } 250 } 251 252 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma) 253 { 254 struct kfd_process_device *pdd; 255 dma_addr_t *dma_addr; 256 struct device *dev; 257 struct kfd_process *p; 258 uint32_t gpuidx; 259 260 p = container_of(prange->svms, struct kfd_process, svms); 261 262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 263 dma_addr = prange->dma_addr[gpuidx]; 264 if (!dma_addr) 265 continue; 266 267 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 268 if (!pdd) { 269 pr_debug("failed to find device idx %d\n", gpuidx); 270 continue; 271 } 272 dev = &pdd->dev->adev->pdev->dev; 273 if (unmap_dma) 274 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages); 275 kvfree(dma_addr); 276 prange->dma_addr[gpuidx] = NULL; 277 } 278 } 279 280 static void svm_range_free(struct svm_range *prange, bool do_unmap) 281 { 282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 svm_range_free_dma_mappings(prange, do_unmap); 290 291 if (do_unmap && !p->xnack_enabled) { 292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 295 } 296 mutex_destroy(&prange->lock); 297 mutex_destroy(&prange->migrate_mutex); 298 kfree(prange); 299 } 300 301 static void 302 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 303 uint8_t *granularity, uint32_t *flags) 304 { 305 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 306 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 307 *granularity = 9; 308 *flags = 309 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 310 } 311 312 static struct 313 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 314 uint64_t last, bool update_mem_usage) 315 { 316 uint64_t size = last - start + 1; 317 struct svm_range *prange; 318 struct kfd_process *p; 319 320 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 321 if (!prange) 322 return NULL; 323 324 p = container_of(svms, struct kfd_process, svms); 325 if (!p->xnack_enabled && update_mem_usage && 326 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 327 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 328 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 329 kfree(prange); 330 return NULL; 331 } 332 prange->npages = size; 333 prange->svms = svms; 334 prange->start = start; 335 prange->last = last; 336 INIT_LIST_HEAD(&prange->list); 337 INIT_LIST_HEAD(&prange->update_list); 338 INIT_LIST_HEAD(&prange->svm_bo_list); 339 INIT_LIST_HEAD(&prange->deferred_list); 340 INIT_LIST_HEAD(&prange->child_list); 341 atomic_set(&prange->invalid, 0); 342 prange->validate_timestamp = 0; 343 mutex_init(&prange->migrate_mutex); 344 mutex_init(&prange->lock); 345 346 if (p->xnack_enabled) 347 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 348 MAX_GPU_INSTANCE); 349 350 svm_range_set_default_attributes(&prange->preferred_loc, 351 &prange->prefetch_loc, 352 &prange->granularity, &prange->flags); 353 354 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 355 356 return prange; 357 } 358 359 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 360 { 361 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 362 return false; 363 364 return true; 365 } 366 367 static void svm_range_bo_release(struct kref *kref) 368 { 369 struct svm_range_bo *svm_bo; 370 371 svm_bo = container_of(kref, struct svm_range_bo, kref); 372 pr_debug("svm_bo 0x%p\n", svm_bo); 373 374 spin_lock(&svm_bo->list_lock); 375 while (!list_empty(&svm_bo->range_list)) { 376 struct svm_range *prange = 377 list_first_entry(&svm_bo->range_list, 378 struct svm_range, svm_bo_list); 379 /* list_del_init tells a concurrent svm_range_vram_node_new when 380 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 381 */ 382 list_del_init(&prange->svm_bo_list); 383 spin_unlock(&svm_bo->list_lock); 384 385 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 386 prange->start, prange->last); 387 mutex_lock(&prange->lock); 388 prange->svm_bo = NULL; 389 mutex_unlock(&prange->lock); 390 391 spin_lock(&svm_bo->list_lock); 392 } 393 spin_unlock(&svm_bo->list_lock); 394 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 395 /* We're not in the eviction worker. 396 * Signal the fence and synchronize with any 397 * pending eviction work. 398 */ 399 dma_fence_signal(&svm_bo->eviction_fence->base); 400 cancel_work_sync(&svm_bo->eviction_work); 401 } 402 dma_fence_put(&svm_bo->eviction_fence->base); 403 amdgpu_bo_unref(&svm_bo->bo); 404 kfree(svm_bo); 405 } 406 407 static void svm_range_bo_wq_release(struct work_struct *work) 408 { 409 struct svm_range_bo *svm_bo; 410 411 svm_bo = container_of(work, struct svm_range_bo, release_work); 412 svm_range_bo_release(&svm_bo->kref); 413 } 414 415 static void svm_range_bo_release_async(struct kref *kref) 416 { 417 struct svm_range_bo *svm_bo; 418 419 svm_bo = container_of(kref, struct svm_range_bo, kref); 420 pr_debug("svm_bo 0x%p\n", svm_bo); 421 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 422 schedule_work(&svm_bo->release_work); 423 } 424 425 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 426 { 427 kref_put(&svm_bo->kref, svm_range_bo_release_async); 428 } 429 430 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 431 { 432 if (svm_bo) 433 kref_put(&svm_bo->kref, svm_range_bo_release); 434 } 435 436 static bool 437 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 438 { 439 mutex_lock(&prange->lock); 440 if (!prange->svm_bo) { 441 mutex_unlock(&prange->lock); 442 return false; 443 } 444 if (prange->ttm_res) { 445 /* We still have a reference, all is well */ 446 mutex_unlock(&prange->lock); 447 return true; 448 } 449 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 450 /* 451 * Migrate from GPU to GPU, remove range from source svm_bo->node 452 * range list, and return false to allocate svm_bo from destination 453 * node. 454 */ 455 if (prange->svm_bo->node != node) { 456 mutex_unlock(&prange->lock); 457 458 spin_lock(&prange->svm_bo->list_lock); 459 list_del_init(&prange->svm_bo_list); 460 spin_unlock(&prange->svm_bo->list_lock); 461 462 svm_range_bo_unref(prange->svm_bo); 463 return false; 464 } 465 if (READ_ONCE(prange->svm_bo->evicting)) { 466 struct dma_fence *f; 467 struct svm_range_bo *svm_bo; 468 /* The BO is getting evicted, 469 * we need to get a new one 470 */ 471 mutex_unlock(&prange->lock); 472 svm_bo = prange->svm_bo; 473 f = dma_fence_get(&svm_bo->eviction_fence->base); 474 svm_range_bo_unref(prange->svm_bo); 475 /* wait for the fence to avoid long spin-loop 476 * at list_empty_careful 477 */ 478 dma_fence_wait(f, false); 479 dma_fence_put(f); 480 } else { 481 /* The BO was still around and we got 482 * a new reference to it 483 */ 484 mutex_unlock(&prange->lock); 485 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 486 prange->svms, prange->start, prange->last); 487 488 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 489 return true; 490 } 491 492 } else { 493 mutex_unlock(&prange->lock); 494 } 495 496 /* We need a new svm_bo. Spin-loop to wait for concurrent 497 * svm_range_bo_release to finish removing this range from 498 * its range list. After this, it is safe to reuse the 499 * svm_bo pointer and svm_bo_list head. 500 */ 501 while (!list_empty_careful(&prange->svm_bo_list)) 502 ; 503 504 return false; 505 } 506 507 static struct svm_range_bo *svm_range_bo_new(void) 508 { 509 struct svm_range_bo *svm_bo; 510 511 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 512 if (!svm_bo) 513 return NULL; 514 515 kref_init(&svm_bo->kref); 516 INIT_LIST_HEAD(&svm_bo->range_list); 517 spin_lock_init(&svm_bo->list_lock); 518 519 return svm_bo; 520 } 521 522 int 523 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 524 bool clear) 525 { 526 struct amdgpu_bo_param bp; 527 struct svm_range_bo *svm_bo; 528 struct amdgpu_bo_user *ubo; 529 struct amdgpu_bo *bo; 530 struct kfd_process *p; 531 struct mm_struct *mm; 532 int r; 533 534 p = container_of(prange->svms, struct kfd_process, svms); 535 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 536 prange->start, prange->last); 537 538 if (svm_range_validate_svm_bo(node, prange)) 539 return 0; 540 541 svm_bo = svm_range_bo_new(); 542 if (!svm_bo) { 543 pr_debug("failed to alloc svm bo\n"); 544 return -ENOMEM; 545 } 546 mm = get_task_mm(p->lead_thread); 547 if (!mm) { 548 pr_debug("failed to get mm\n"); 549 kfree(svm_bo); 550 return -ESRCH; 551 } 552 svm_bo->node = node; 553 svm_bo->eviction_fence = 554 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 555 mm, 556 svm_bo); 557 mmput(mm); 558 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 559 svm_bo->evicting = 0; 560 memset(&bp, 0, sizeof(bp)); 561 bp.size = prange->npages * PAGE_SIZE; 562 bp.byte_align = PAGE_SIZE; 563 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 564 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 565 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 566 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 567 bp.type = ttm_bo_type_device; 568 bp.resv = NULL; 569 if (node->xcp) 570 bp.xcp_id_plus1 = node->xcp->id + 1; 571 572 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 573 if (r) { 574 pr_debug("failed %d to create bo\n", r); 575 goto create_bo_failed; 576 } 577 bo = &ubo->bo; 578 579 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 580 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 581 bp.xcp_id_plus1 - 1); 582 583 r = amdgpu_bo_reserve(bo, true); 584 if (r) { 585 pr_debug("failed %d to reserve bo\n", r); 586 goto reserve_bo_failed; 587 } 588 589 if (clear) { 590 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 591 if (r) { 592 pr_debug("failed %d to sync bo\n", r); 593 amdgpu_bo_unreserve(bo); 594 goto reserve_bo_failed; 595 } 596 } 597 598 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 599 if (r) { 600 pr_debug("failed %d to reserve bo\n", r); 601 amdgpu_bo_unreserve(bo); 602 goto reserve_bo_failed; 603 } 604 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 605 606 amdgpu_bo_unreserve(bo); 607 608 svm_bo->bo = bo; 609 prange->svm_bo = svm_bo; 610 prange->ttm_res = bo->tbo.resource; 611 prange->offset = 0; 612 613 spin_lock(&svm_bo->list_lock); 614 list_add(&prange->svm_bo_list, &svm_bo->range_list); 615 spin_unlock(&svm_bo->list_lock); 616 617 return 0; 618 619 reserve_bo_failed: 620 amdgpu_bo_unref(&bo); 621 create_bo_failed: 622 dma_fence_put(&svm_bo->eviction_fence->base); 623 kfree(svm_bo); 624 prange->ttm_res = NULL; 625 626 return r; 627 } 628 629 void svm_range_vram_node_free(struct svm_range *prange) 630 { 631 svm_range_bo_unref(prange->svm_bo); 632 prange->ttm_res = NULL; 633 } 634 635 struct kfd_node * 636 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 637 { 638 struct kfd_process *p; 639 struct kfd_process_device *pdd; 640 641 p = container_of(prange->svms, struct kfd_process, svms); 642 pdd = kfd_process_device_data_by_id(p, gpu_id); 643 if (!pdd) { 644 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 645 return NULL; 646 } 647 648 return pdd->dev; 649 } 650 651 struct kfd_process_device * 652 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 653 { 654 struct kfd_process *p; 655 656 p = container_of(prange->svms, struct kfd_process, svms); 657 658 return kfd_get_process_device_data(node, p); 659 } 660 661 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 662 { 663 struct ttm_operation_ctx ctx = { false, false }; 664 665 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 666 667 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 668 } 669 670 static int 671 svm_range_check_attr(struct kfd_process *p, 672 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 673 { 674 uint32_t i; 675 676 for (i = 0; i < nattr; i++) { 677 uint32_t val = attrs[i].value; 678 int gpuidx = MAX_GPU_INSTANCE; 679 680 switch (attrs[i].type) { 681 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 682 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 683 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 684 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 685 break; 686 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 687 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 688 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 689 break; 690 case KFD_IOCTL_SVM_ATTR_ACCESS: 691 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 692 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 693 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 694 break; 695 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 696 break; 697 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 698 break; 699 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 700 break; 701 default: 702 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 703 return -EINVAL; 704 } 705 706 if (gpuidx < 0) { 707 pr_debug("no GPU 0x%x found\n", val); 708 return -EINVAL; 709 } else if (gpuidx < MAX_GPU_INSTANCE && 710 !test_bit(gpuidx, p->svms.bitmap_supported)) { 711 pr_debug("GPU 0x%x not supported\n", val); 712 return -EINVAL; 713 } 714 } 715 716 return 0; 717 } 718 719 static void 720 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 721 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 722 bool *update_mapping) 723 { 724 uint32_t i; 725 int gpuidx; 726 727 for (i = 0; i < nattr; i++) { 728 switch (attrs[i].type) { 729 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 730 prange->preferred_loc = attrs[i].value; 731 break; 732 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 733 prange->prefetch_loc = attrs[i].value; 734 break; 735 case KFD_IOCTL_SVM_ATTR_ACCESS: 736 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 737 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 738 if (!p->xnack_enabled) 739 *update_mapping = true; 740 741 gpuidx = kfd_process_gpuidx_from_gpuid(p, 742 attrs[i].value); 743 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 744 bitmap_clear(prange->bitmap_access, gpuidx, 1); 745 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 746 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 747 bitmap_set(prange->bitmap_access, gpuidx, 1); 748 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 749 } else { 750 bitmap_clear(prange->bitmap_access, gpuidx, 1); 751 bitmap_set(prange->bitmap_aip, gpuidx, 1); 752 } 753 break; 754 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 755 *update_mapping = true; 756 prange->flags |= attrs[i].value; 757 break; 758 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 759 *update_mapping = true; 760 prange->flags &= ~attrs[i].value; 761 break; 762 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 763 prange->granularity = attrs[i].value; 764 break; 765 default: 766 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 767 } 768 } 769 } 770 771 static bool 772 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 773 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 774 { 775 uint32_t i; 776 int gpuidx; 777 778 for (i = 0; i < nattr; i++) { 779 switch (attrs[i].type) { 780 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 781 if (prange->preferred_loc != attrs[i].value) 782 return false; 783 break; 784 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 785 /* Prefetch should always trigger a migration even 786 * if the value of the attribute didn't change. 787 */ 788 return false; 789 case KFD_IOCTL_SVM_ATTR_ACCESS: 790 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 791 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 792 gpuidx = kfd_process_gpuidx_from_gpuid(p, 793 attrs[i].value); 794 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 795 if (test_bit(gpuidx, prange->bitmap_access) || 796 test_bit(gpuidx, prange->bitmap_aip)) 797 return false; 798 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 799 if (!test_bit(gpuidx, prange->bitmap_access)) 800 return false; 801 } else { 802 if (!test_bit(gpuidx, prange->bitmap_aip)) 803 return false; 804 } 805 break; 806 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 807 if ((prange->flags & attrs[i].value) != attrs[i].value) 808 return false; 809 break; 810 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 811 if ((prange->flags & attrs[i].value) != 0) 812 return false; 813 break; 814 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 815 if (prange->granularity != attrs[i].value) 816 return false; 817 break; 818 default: 819 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 820 } 821 } 822 823 return !prange->is_error_flag; 824 } 825 826 /** 827 * svm_range_debug_dump - print all range information from svms 828 * @svms: svm range list header 829 * 830 * debug output svm range start, end, prefetch location from svms 831 * interval tree and link list 832 * 833 * Context: The caller must hold svms->lock 834 */ 835 static void svm_range_debug_dump(struct svm_range_list *svms) 836 { 837 struct interval_tree_node *node; 838 struct svm_range *prange; 839 840 pr_debug("dump svms 0x%p list\n", svms); 841 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 842 843 list_for_each_entry(prange, &svms->list, list) { 844 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 845 prange, prange->start, prange->npages, 846 prange->start + prange->npages - 1, 847 prange->actual_loc); 848 } 849 850 pr_debug("dump svms 0x%p interval tree\n", svms); 851 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 852 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 853 while (node) { 854 prange = container_of(node, struct svm_range, it_node); 855 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 856 prange, prange->start, prange->npages, 857 prange->start + prange->npages - 1, 858 prange->actual_loc); 859 node = interval_tree_iter_next(node, 0, ~0ULL); 860 } 861 } 862 863 static void * 864 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 865 uint64_t offset) 866 { 867 unsigned char *dst; 868 869 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 870 if (!dst) 871 return NULL; 872 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 873 874 return (void *)dst; 875 } 876 877 static int 878 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 879 { 880 int i; 881 882 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 883 if (!src->dma_addr[i]) 884 continue; 885 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 886 sizeof(*src->dma_addr[i]), src->npages, 0); 887 if (!dst->dma_addr[i]) 888 return -ENOMEM; 889 } 890 891 return 0; 892 } 893 894 static int 895 svm_range_split_array(void *ppnew, void *ppold, size_t size, 896 uint64_t old_start, uint64_t old_n, 897 uint64_t new_start, uint64_t new_n) 898 { 899 unsigned char *new, *old, *pold; 900 uint64_t d; 901 902 if (!ppold) 903 return 0; 904 pold = *(unsigned char **)ppold; 905 if (!pold) 906 return 0; 907 908 d = (new_start - old_start) * size; 909 new = svm_range_copy_array(pold, size, new_n, d); 910 if (!new) 911 return -ENOMEM; 912 d = (new_start == old_start) ? new_n * size : 0; 913 old = svm_range_copy_array(pold, size, old_n, d); 914 if (!old) { 915 kvfree(new); 916 return -ENOMEM; 917 } 918 kvfree(pold); 919 *(void **)ppold = old; 920 *(void **)ppnew = new; 921 922 return 0; 923 } 924 925 static int 926 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 927 uint64_t start, uint64_t last) 928 { 929 uint64_t npages = last - start + 1; 930 int i, r; 931 932 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 933 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 934 sizeof(*old->dma_addr[i]), old->start, 935 npages, new->start, new->npages); 936 if (r) 937 return r; 938 } 939 940 return 0; 941 } 942 943 static int 944 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 945 uint64_t start, uint64_t last) 946 { 947 uint64_t npages = last - start + 1; 948 949 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 950 new->svms, new, new->start, start, last); 951 952 if (new->start == old->start) { 953 new->offset = old->offset; 954 old->offset += new->npages; 955 } else { 956 new->offset = old->offset + npages; 957 } 958 959 new->svm_bo = svm_range_bo_ref(old->svm_bo); 960 new->ttm_res = old->ttm_res; 961 962 spin_lock(&new->svm_bo->list_lock); 963 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 964 spin_unlock(&new->svm_bo->list_lock); 965 966 return 0; 967 } 968 969 /** 970 * svm_range_split_adjust - split range and adjust 971 * 972 * @new: new range 973 * @old: the old range 974 * @start: the old range adjust to start address in pages 975 * @last: the old range adjust to last address in pages 976 * 977 * Copy system memory dma_addr or vram ttm_res in old range to new 978 * range from new_start up to size new->npages, the remaining old range is from 979 * start to last 980 * 981 * Return: 982 * 0 - OK, -ENOMEM - out of memory 983 */ 984 static int 985 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 int r; 989 990 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 991 new->svms, new->start, old->start, old->last, start, last); 992 993 if (new->start < old->start || 994 new->last > old->last) { 995 WARN_ONCE(1, "invalid new range start or last\n"); 996 return -EINVAL; 997 } 998 999 r = svm_range_split_pages(new, old, start, last); 1000 if (r) 1001 return r; 1002 1003 if (old->actual_loc && old->ttm_res) { 1004 r = svm_range_split_nodes(new, old, start, last); 1005 if (r) 1006 return r; 1007 } 1008 1009 old->npages = last - start + 1; 1010 old->start = start; 1011 old->last = last; 1012 new->flags = old->flags; 1013 new->preferred_loc = old->preferred_loc; 1014 new->prefetch_loc = old->prefetch_loc; 1015 new->actual_loc = old->actual_loc; 1016 new->granularity = old->granularity; 1017 new->mapped_to_gpu = old->mapped_to_gpu; 1018 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1019 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1020 1021 return 0; 1022 } 1023 1024 /** 1025 * svm_range_split - split a range in 2 ranges 1026 * 1027 * @prange: the svm range to split 1028 * @start: the remaining range start address in pages 1029 * @last: the remaining range last address in pages 1030 * @new: the result new range generated 1031 * 1032 * Two cases only: 1033 * case 1: if start == prange->start 1034 * prange ==> prange[start, last] 1035 * new range [last + 1, prange->last] 1036 * 1037 * case 2: if last == prange->last 1038 * prange ==> prange[start, last] 1039 * new range [prange->start, start - 1] 1040 * 1041 * Return: 1042 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1043 */ 1044 static int 1045 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1046 struct svm_range **new) 1047 { 1048 uint64_t old_start = prange->start; 1049 uint64_t old_last = prange->last; 1050 struct svm_range_list *svms; 1051 int r = 0; 1052 1053 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1054 old_start, old_last, start, last); 1055 1056 if (old_start != start && old_last != last) 1057 return -EINVAL; 1058 if (start < old_start || last > old_last) 1059 return -EINVAL; 1060 1061 svms = prange->svms; 1062 if (old_start == start) 1063 *new = svm_range_new(svms, last + 1, old_last, false); 1064 else 1065 *new = svm_range_new(svms, old_start, start - 1, false); 1066 if (!*new) 1067 return -ENOMEM; 1068 1069 r = svm_range_split_adjust(*new, prange, start, last); 1070 if (r) { 1071 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1072 r, old_start, old_last, start, last); 1073 svm_range_free(*new, false); 1074 *new = NULL; 1075 } 1076 1077 return r; 1078 } 1079 1080 static int 1081 svm_range_split_tail(struct svm_range *prange, 1082 uint64_t new_last, struct list_head *insert_list) 1083 { 1084 struct svm_range *tail; 1085 int r = svm_range_split(prange, prange->start, new_last, &tail); 1086 1087 if (!r) 1088 list_add(&tail->list, insert_list); 1089 return r; 1090 } 1091 1092 static int 1093 svm_range_split_head(struct svm_range *prange, 1094 uint64_t new_start, struct list_head *insert_list) 1095 { 1096 struct svm_range *head; 1097 int r = svm_range_split(prange, new_start, prange->last, &head); 1098 1099 if (!r) 1100 list_add(&head->list, insert_list); 1101 return r; 1102 } 1103 1104 static void 1105 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1106 struct svm_range *pchild, enum svm_work_list_ops op) 1107 { 1108 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1109 pchild, pchild->start, pchild->last, prange, op); 1110 1111 pchild->work_item.mm = mm; 1112 pchild->work_item.op = op; 1113 list_add_tail(&pchild->child_list, &prange->child_list); 1114 } 1115 1116 /** 1117 * svm_range_split_by_granularity - collect ranges within granularity boundary 1118 * 1119 * @p: the process with svms list 1120 * @mm: mm structure 1121 * @addr: the vm fault address in pages, to split the prange 1122 * @parent: parent range if prange is from child list 1123 * @prange: prange to split 1124 * 1125 * Trims @prange to be a single aligned block of prange->granularity if 1126 * possible. The head and tail are added to the child_list in @parent. 1127 * 1128 * Context: caller must hold mmap_read_lock and prange->lock 1129 * 1130 * Return: 1131 * 0 - OK, otherwise error code 1132 */ 1133 int 1134 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1135 unsigned long addr, struct svm_range *parent, 1136 struct svm_range *prange) 1137 { 1138 struct svm_range *head, *tail; 1139 unsigned long start, last, size; 1140 int r; 1141 1142 /* Align splited range start and size to granularity size, then a single 1143 * PTE will be used for whole range, this reduces the number of PTE 1144 * updated and the L1 TLB space used for translation. 1145 */ 1146 size = 1UL << prange->granularity; 1147 start = ALIGN_DOWN(addr, size); 1148 last = ALIGN(addr + 1, size) - 1; 1149 1150 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1151 prange->svms, prange->start, prange->last, start, last, size); 1152 1153 if (start > prange->start) { 1154 r = svm_range_split(prange, start, prange->last, &head); 1155 if (r) 1156 return r; 1157 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1158 } 1159 1160 if (last < prange->last) { 1161 r = svm_range_split(prange, prange->start, last, &tail); 1162 if (r) 1163 return r; 1164 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1165 } 1166 1167 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1168 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1169 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1170 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1171 prange, prange->start, prange->last, 1172 SVM_OP_ADD_RANGE_AND_MAP); 1173 } 1174 return 0; 1175 } 1176 static bool 1177 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1178 { 1179 return (node_a->adev == node_b->adev || 1180 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1181 } 1182 1183 static uint64_t 1184 svm_range_get_pte_flags(struct kfd_node *node, 1185 struct svm_range *prange, int domain) 1186 { 1187 struct kfd_node *bo_node; 1188 uint32_t flags = prange->flags; 1189 uint32_t mapping_flags = 0; 1190 uint64_t pte_flags; 1191 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1192 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1193 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1194 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1195 unsigned int mtype_local; 1196 1197 if (domain == SVM_RANGE_VRAM_DOMAIN) 1198 bo_node = prange->svm_bo->node; 1199 1200 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1201 case IP_VERSION(9, 4, 1): 1202 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1203 if (bo_node == node) { 1204 mapping_flags |= coherent ? 1205 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1206 } else { 1207 mapping_flags |= coherent ? 1208 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1209 if (svm_nodes_in_same_hive(node, bo_node)) 1210 snoop = true; 1211 } 1212 } else { 1213 mapping_flags |= coherent ? 1214 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1215 } 1216 break; 1217 case IP_VERSION(9, 4, 2): 1218 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1219 if (bo_node == node) { 1220 mapping_flags |= coherent ? 1221 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1222 if (node->adev->gmc.xgmi.connected_to_cpu) 1223 snoop = true; 1224 } else { 1225 mapping_flags |= coherent ? 1226 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1227 if (svm_nodes_in_same_hive(node, bo_node)) 1228 snoop = true; 1229 } 1230 } else { 1231 mapping_flags |= coherent ? 1232 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1233 } 1234 break; 1235 case IP_VERSION(9, 4, 3): 1236 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1237 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW); 1238 snoop = true; 1239 if (uncached) { 1240 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1241 } else if (ext_coherent) { 1242 /* local HBM region close to partition */ 1243 if (bo_node->adev == node->adev && 1244 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1245 mapping_flags |= AMDGPU_VM_MTYPE_CC; 1246 else 1247 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1248 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1249 /* local HBM region close to partition */ 1250 if (bo_node->adev == node->adev && 1251 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1252 mapping_flags |= mtype_local; 1253 /* local HBM region far from partition or remote XGMI GPU */ 1254 else if (svm_nodes_in_same_hive(bo_node, node)) 1255 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1256 /* PCIe P2P */ 1257 else 1258 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1259 /* system memory accessed by the APU */ 1260 } else if (node->adev->flags & AMD_IS_APU) { 1261 /* On NUMA systems, locality is determined per-page 1262 * in amdgpu_gmc_override_vm_pte_flags 1263 */ 1264 if (num_possible_nodes() <= 1) 1265 mapping_flags |= mtype_local; 1266 else 1267 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1268 /* system memory accessed by the dGPU */ 1269 } else { 1270 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1271 } 1272 break; 1273 default: 1274 mapping_flags |= coherent ? 1275 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1276 } 1277 1278 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1279 1280 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1281 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1282 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1283 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1284 1285 pte_flags = AMDGPU_PTE_VALID; 1286 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1287 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1288 1289 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1290 return pte_flags; 1291 } 1292 1293 static int 1294 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1295 uint64_t start, uint64_t last, 1296 struct dma_fence **fence) 1297 { 1298 uint64_t init_pte_value = 0; 1299 1300 pr_debug("[0x%llx 0x%llx]\n", start, last); 1301 1302 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start, 1303 last, init_pte_value, 0, 0, NULL, NULL, 1304 fence); 1305 } 1306 1307 static int 1308 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1309 unsigned long last, uint32_t trigger) 1310 { 1311 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1312 struct kfd_process_device *pdd; 1313 struct dma_fence *fence = NULL; 1314 struct kfd_process *p; 1315 uint32_t gpuidx; 1316 int r = 0; 1317 1318 if (!prange->mapped_to_gpu) { 1319 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1320 prange, prange->start, prange->last); 1321 return 0; 1322 } 1323 1324 if (prange->start == start && prange->last == last) { 1325 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1326 prange->mapped_to_gpu = false; 1327 } 1328 1329 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1330 MAX_GPU_INSTANCE); 1331 p = container_of(prange->svms, struct kfd_process, svms); 1332 1333 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1334 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1335 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1336 if (!pdd) { 1337 pr_debug("failed to find device idx %d\n", gpuidx); 1338 return -EINVAL; 1339 } 1340 1341 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1342 start, last, trigger); 1343 1344 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1345 drm_priv_to_vm(pdd->drm_priv), 1346 start, last, &fence); 1347 if (r) 1348 break; 1349 1350 if (fence) { 1351 r = dma_fence_wait(fence, false); 1352 dma_fence_put(fence); 1353 fence = NULL; 1354 if (r) 1355 break; 1356 } 1357 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1358 } 1359 1360 return r; 1361 } 1362 1363 static int 1364 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1365 unsigned long offset, unsigned long npages, bool readonly, 1366 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1367 struct dma_fence **fence, bool flush_tlb) 1368 { 1369 struct amdgpu_device *adev = pdd->dev->adev; 1370 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1371 uint64_t pte_flags; 1372 unsigned long last_start; 1373 int last_domain; 1374 int r = 0; 1375 int64_t i, j; 1376 1377 last_start = prange->start + offset; 1378 1379 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1380 last_start, last_start + npages - 1, readonly); 1381 1382 for (i = offset; i < offset + npages; i++) { 1383 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1384 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1385 1386 /* Collect all pages in the same address range and memory domain 1387 * that can be mapped with a single call to update mapping. 1388 */ 1389 if (i < offset + npages - 1 && 1390 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1391 continue; 1392 1393 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1394 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1395 1396 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1397 if (readonly) 1398 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1399 1400 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1401 prange->svms, last_start, prange->start + i, 1402 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1403 pte_flags); 1404 1405 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1406 * different memory partition based on fpfn/lpfn, we should use 1407 * same vm_manager.vram_base_offset regardless memory partition. 1408 */ 1409 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL, 1410 last_start, prange->start + i, 1411 pte_flags, 1412 (last_start - prange->start) << PAGE_SHIFT, 1413 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1414 NULL, dma_addr, &vm->last_update); 1415 1416 for (j = last_start - prange->start; j <= i; j++) 1417 dma_addr[j] |= last_domain; 1418 1419 if (r) { 1420 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1421 goto out; 1422 } 1423 last_start = prange->start + i + 1; 1424 } 1425 1426 r = amdgpu_vm_update_pdes(adev, vm, false); 1427 if (r) { 1428 pr_debug("failed %d to update directories 0x%lx\n", r, 1429 prange->start); 1430 goto out; 1431 } 1432 1433 if (fence) 1434 *fence = dma_fence_get(vm->last_update); 1435 1436 out: 1437 return r; 1438 } 1439 1440 static int 1441 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1442 unsigned long npages, bool readonly, 1443 unsigned long *bitmap, bool wait, bool flush_tlb) 1444 { 1445 struct kfd_process_device *pdd; 1446 struct amdgpu_device *bo_adev = NULL; 1447 struct kfd_process *p; 1448 struct dma_fence *fence = NULL; 1449 uint32_t gpuidx; 1450 int r = 0; 1451 1452 if (prange->svm_bo && prange->ttm_res) 1453 bo_adev = prange->svm_bo->node->adev; 1454 1455 p = container_of(prange->svms, struct kfd_process, svms); 1456 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1457 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1458 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1459 if (!pdd) { 1460 pr_debug("failed to find device idx %d\n", gpuidx); 1461 return -EINVAL; 1462 } 1463 1464 pdd = kfd_bind_process_to_device(pdd->dev, p); 1465 if (IS_ERR(pdd)) 1466 return -EINVAL; 1467 1468 if (bo_adev && pdd->dev->adev != bo_adev && 1469 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1470 pr_debug("cannot map to device idx %d\n", gpuidx); 1471 continue; 1472 } 1473 1474 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1475 prange->dma_addr[gpuidx], 1476 bo_adev, wait ? &fence : NULL, 1477 flush_tlb); 1478 if (r) 1479 break; 1480 1481 if (fence) { 1482 r = dma_fence_wait(fence, false); 1483 dma_fence_put(fence); 1484 fence = NULL; 1485 if (r) { 1486 pr_debug("failed %d to dma fence wait\n", r); 1487 break; 1488 } 1489 } 1490 1491 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1492 } 1493 1494 return r; 1495 } 1496 1497 struct svm_validate_context { 1498 struct kfd_process *process; 1499 struct svm_range *prange; 1500 bool intr; 1501 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1502 struct drm_exec exec; 1503 }; 1504 1505 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1506 { 1507 struct kfd_process_device *pdd; 1508 struct amdgpu_vm *vm; 1509 uint32_t gpuidx; 1510 int r; 1511 1512 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1513 drm_exec_until_all_locked(&ctx->exec) { 1514 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1515 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1516 if (!pdd) { 1517 pr_debug("failed to find device idx %d\n", gpuidx); 1518 r = -EINVAL; 1519 goto unreserve_out; 1520 } 1521 vm = drm_priv_to_vm(pdd->drm_priv); 1522 1523 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1524 drm_exec_retry_on_contention(&ctx->exec); 1525 if (unlikely(r)) { 1526 pr_debug("failed %d to reserve bo\n", r); 1527 goto unreserve_out; 1528 } 1529 } 1530 } 1531 1532 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1533 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1534 if (!pdd) { 1535 pr_debug("failed to find device idx %d\n", gpuidx); 1536 r = -EINVAL; 1537 goto unreserve_out; 1538 } 1539 1540 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1541 drm_priv_to_vm(pdd->drm_priv), 1542 svm_range_bo_validate, NULL); 1543 if (r) { 1544 pr_debug("failed %d validate pt bos\n", r); 1545 goto unreserve_out; 1546 } 1547 } 1548 1549 return 0; 1550 1551 unreserve_out: 1552 drm_exec_fini(&ctx->exec); 1553 return r; 1554 } 1555 1556 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1557 { 1558 drm_exec_fini(&ctx->exec); 1559 } 1560 1561 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1562 { 1563 struct kfd_process_device *pdd; 1564 1565 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1566 if (!pdd) 1567 return NULL; 1568 1569 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1570 } 1571 1572 /* 1573 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1574 * 1575 * To prevent concurrent destruction or change of range attributes, the 1576 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1577 * because that would block concurrent evictions and lead to deadlocks. To 1578 * serialize concurrent migrations or validations of the same range, the 1579 * prange->migrate_mutex must be held. 1580 * 1581 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1582 * eviction fence. 1583 * 1584 * The following sequence ensures race-free validation and GPU mapping: 1585 * 1586 * 1. Reserve page table (and SVM BO if range is in VRAM) 1587 * 2. hmm_range_fault to get page addresses (if system memory) 1588 * 3. DMA-map pages (if system memory) 1589 * 4-a. Take notifier lock 1590 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1591 * 4-c. Check that the range was not split or otherwise invalidated 1592 * 4-d. Update GPU page table 1593 * 4.e. Release notifier lock 1594 * 5. Release page table (and SVM BO) reservation 1595 */ 1596 static int svm_range_validate_and_map(struct mm_struct *mm, 1597 struct svm_range *prange, int32_t gpuidx, 1598 bool intr, bool wait, bool flush_tlb) 1599 { 1600 struct svm_validate_context *ctx; 1601 unsigned long start, end, addr; 1602 struct kfd_process *p; 1603 void *owner; 1604 int32_t idx; 1605 int r = 0; 1606 1607 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1608 if (!ctx) 1609 return -ENOMEM; 1610 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1611 ctx->prange = prange; 1612 ctx->intr = intr; 1613 1614 if (gpuidx < MAX_GPU_INSTANCE) { 1615 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1616 bitmap_set(ctx->bitmap, gpuidx, 1); 1617 } else if (ctx->process->xnack_enabled) { 1618 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1619 1620 /* If prefetch range to GPU, or GPU retry fault migrate range to 1621 * GPU, which has ACCESS attribute to the range, create mapping 1622 * on that GPU. 1623 */ 1624 if (prange->actual_loc) { 1625 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1626 prange->actual_loc); 1627 if (gpuidx < 0) { 1628 WARN_ONCE(1, "failed get device by id 0x%x\n", 1629 prange->actual_loc); 1630 r = -EINVAL; 1631 goto free_ctx; 1632 } 1633 if (test_bit(gpuidx, prange->bitmap_access)) 1634 bitmap_set(ctx->bitmap, gpuidx, 1); 1635 } 1636 } else { 1637 bitmap_or(ctx->bitmap, prange->bitmap_access, 1638 prange->bitmap_aip, MAX_GPU_INSTANCE); 1639 } 1640 1641 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1642 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1643 if (!prange->mapped_to_gpu || 1644 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1645 r = 0; 1646 goto free_ctx; 1647 } 1648 } 1649 1650 if (prange->actual_loc && !prange->ttm_res) { 1651 /* This should never happen. actual_loc gets set by 1652 * svm_migrate_ram_to_vram after allocating a BO. 1653 */ 1654 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1655 r = -EINVAL; 1656 goto free_ctx; 1657 } 1658 1659 svm_range_reserve_bos(ctx, intr); 1660 1661 p = container_of(prange->svms, struct kfd_process, svms); 1662 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1663 MAX_GPU_INSTANCE)); 1664 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1665 if (kfd_svm_page_owner(p, idx) != owner) { 1666 owner = NULL; 1667 break; 1668 } 1669 } 1670 1671 start = prange->start << PAGE_SHIFT; 1672 end = (prange->last + 1) << PAGE_SHIFT; 1673 for (addr = start; addr < end && !r; ) { 1674 struct hmm_range *hmm_range; 1675 struct vm_area_struct *vma; 1676 unsigned long next; 1677 unsigned long offset; 1678 unsigned long npages; 1679 bool readonly; 1680 1681 vma = vma_lookup(mm, addr); 1682 if (!vma) { 1683 r = -EFAULT; 1684 goto unreserve_out; 1685 } 1686 readonly = !(vma->vm_flags & VM_WRITE); 1687 1688 next = min(vma->vm_end, end); 1689 npages = (next - addr) >> PAGE_SHIFT; 1690 WRITE_ONCE(p->svms.faulting_task, current); 1691 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1692 readonly, owner, NULL, 1693 &hmm_range); 1694 WRITE_ONCE(p->svms.faulting_task, NULL); 1695 if (r) { 1696 pr_debug("failed %d to get svm range pages\n", r); 1697 if (r == -EBUSY) 1698 r = -EAGAIN; 1699 goto unreserve_out; 1700 } 1701 1702 offset = (addr - start) >> PAGE_SHIFT; 1703 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1704 hmm_range->hmm_pfns); 1705 if (r) { 1706 pr_debug("failed %d to dma map range\n", r); 1707 goto unreserve_out; 1708 } 1709 1710 svm_range_lock(prange); 1711 if (amdgpu_hmm_range_get_pages_done(hmm_range)) { 1712 pr_debug("hmm update the range, need validate again\n"); 1713 r = -EAGAIN; 1714 goto unlock_out; 1715 } 1716 if (!list_empty(&prange->child_list)) { 1717 pr_debug("range split by unmap in parallel, validate again\n"); 1718 r = -EAGAIN; 1719 goto unlock_out; 1720 } 1721 1722 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1723 ctx->bitmap, wait, flush_tlb); 1724 1725 unlock_out: 1726 svm_range_unlock(prange); 1727 1728 addr = next; 1729 } 1730 1731 if (addr == end) { 1732 prange->validated_once = true; 1733 prange->mapped_to_gpu = true; 1734 } 1735 1736 unreserve_out: 1737 svm_range_unreserve_bos(ctx); 1738 1739 prange->is_error_flag = !!r; 1740 if (!r) 1741 prange->validate_timestamp = ktime_get_boottime(); 1742 1743 free_ctx: 1744 kfree(ctx); 1745 1746 return r; 1747 } 1748 1749 /** 1750 * svm_range_list_lock_and_flush_work - flush pending deferred work 1751 * 1752 * @svms: the svm range list 1753 * @mm: the mm structure 1754 * 1755 * Context: Returns with mmap write lock held, pending deferred work flushed 1756 * 1757 */ 1758 void 1759 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1760 struct mm_struct *mm) 1761 { 1762 retry_flush_work: 1763 flush_work(&svms->deferred_list_work); 1764 mmap_write_lock(mm); 1765 1766 if (list_empty(&svms->deferred_range_list)) 1767 return; 1768 mmap_write_unlock(mm); 1769 pr_debug("retry flush\n"); 1770 goto retry_flush_work; 1771 } 1772 1773 static void svm_range_restore_work(struct work_struct *work) 1774 { 1775 struct delayed_work *dwork = to_delayed_work(work); 1776 struct amdkfd_process_info *process_info; 1777 struct svm_range_list *svms; 1778 struct svm_range *prange; 1779 struct kfd_process *p; 1780 struct mm_struct *mm; 1781 int evicted_ranges; 1782 int invalid; 1783 int r; 1784 1785 svms = container_of(dwork, struct svm_range_list, restore_work); 1786 evicted_ranges = atomic_read(&svms->evicted_ranges); 1787 if (!evicted_ranges) 1788 return; 1789 1790 pr_debug("restore svm ranges\n"); 1791 1792 p = container_of(svms, struct kfd_process, svms); 1793 process_info = p->kgd_process_info; 1794 1795 /* Keep mm reference when svm_range_validate_and_map ranges */ 1796 mm = get_task_mm(p->lead_thread); 1797 if (!mm) { 1798 pr_debug("svms 0x%p process mm gone\n", svms); 1799 return; 1800 } 1801 1802 mutex_lock(&process_info->lock); 1803 svm_range_list_lock_and_flush_work(svms, mm); 1804 mutex_lock(&svms->lock); 1805 1806 evicted_ranges = atomic_read(&svms->evicted_ranges); 1807 1808 list_for_each_entry(prange, &svms->list, list) { 1809 invalid = atomic_read(&prange->invalid); 1810 if (!invalid) 1811 continue; 1812 1813 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1814 prange->svms, prange, prange->start, prange->last, 1815 invalid); 1816 1817 /* 1818 * If range is migrating, wait for migration is done. 1819 */ 1820 mutex_lock(&prange->migrate_mutex); 1821 1822 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1823 false, true, false); 1824 if (r) 1825 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1826 prange->start); 1827 1828 mutex_unlock(&prange->migrate_mutex); 1829 if (r) 1830 goto out_reschedule; 1831 1832 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1833 goto out_reschedule; 1834 } 1835 1836 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1837 evicted_ranges) 1838 goto out_reschedule; 1839 1840 evicted_ranges = 0; 1841 1842 r = kgd2kfd_resume_mm(mm); 1843 if (r) { 1844 /* No recovery from this failure. Probably the CP is 1845 * hanging. No point trying again. 1846 */ 1847 pr_debug("failed %d to resume KFD\n", r); 1848 } 1849 1850 pr_debug("restore svm ranges successfully\n"); 1851 1852 out_reschedule: 1853 mutex_unlock(&svms->lock); 1854 mmap_write_unlock(mm); 1855 mutex_unlock(&process_info->lock); 1856 1857 /* If validation failed, reschedule another attempt */ 1858 if (evicted_ranges) { 1859 pr_debug("reschedule to restore svm range\n"); 1860 schedule_delayed_work(&svms->restore_work, 1861 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1862 1863 kfd_smi_event_queue_restore_rescheduled(mm); 1864 } 1865 mmput(mm); 1866 } 1867 1868 /** 1869 * svm_range_evict - evict svm range 1870 * @prange: svm range structure 1871 * @mm: current process mm_struct 1872 * @start: starting process queue number 1873 * @last: last process queue number 1874 * @event: mmu notifier event when range is evicted or migrated 1875 * 1876 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1877 * return to let CPU evict the buffer and proceed CPU pagetable update. 1878 * 1879 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1880 * If invalidation happens while restore work is running, restore work will 1881 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1882 * the queues. 1883 */ 1884 static int 1885 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1886 unsigned long start, unsigned long last, 1887 enum mmu_notifier_event event) 1888 { 1889 struct svm_range_list *svms = prange->svms; 1890 struct svm_range *pchild; 1891 struct kfd_process *p; 1892 int r = 0; 1893 1894 p = container_of(svms, struct kfd_process, svms); 1895 1896 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1897 svms, prange->start, prange->last, start, last); 1898 1899 if (!p->xnack_enabled || 1900 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1901 int evicted_ranges; 1902 bool mapped = prange->mapped_to_gpu; 1903 1904 list_for_each_entry(pchild, &prange->child_list, child_list) { 1905 if (!pchild->mapped_to_gpu) 1906 continue; 1907 mapped = true; 1908 mutex_lock_nested(&pchild->lock, 1); 1909 if (pchild->start <= last && pchild->last >= start) { 1910 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1911 pchild->start, pchild->last); 1912 atomic_inc(&pchild->invalid); 1913 } 1914 mutex_unlock(&pchild->lock); 1915 } 1916 1917 if (!mapped) 1918 return r; 1919 1920 if (prange->start <= last && prange->last >= start) 1921 atomic_inc(&prange->invalid); 1922 1923 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1924 if (evicted_ranges != 1) 1925 return r; 1926 1927 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1928 prange->svms, prange->start, prange->last); 1929 1930 /* First eviction, stop the queues */ 1931 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1932 if (r) 1933 pr_debug("failed to quiesce KFD\n"); 1934 1935 pr_debug("schedule to restore svm %p ranges\n", svms); 1936 schedule_delayed_work(&svms->restore_work, 1937 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1938 } else { 1939 unsigned long s, l; 1940 uint32_t trigger; 1941 1942 if (event == MMU_NOTIFY_MIGRATE) 1943 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1944 else 1945 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1946 1947 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1948 prange->svms, start, last); 1949 list_for_each_entry(pchild, &prange->child_list, child_list) { 1950 mutex_lock_nested(&pchild->lock, 1); 1951 s = max(start, pchild->start); 1952 l = min(last, pchild->last); 1953 if (l >= s) 1954 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1955 mutex_unlock(&pchild->lock); 1956 } 1957 s = max(start, prange->start); 1958 l = min(last, prange->last); 1959 if (l >= s) 1960 svm_range_unmap_from_gpus(prange, s, l, trigger); 1961 } 1962 1963 return r; 1964 } 1965 1966 static struct svm_range *svm_range_clone(struct svm_range *old) 1967 { 1968 struct svm_range *new; 1969 1970 new = svm_range_new(old->svms, old->start, old->last, false); 1971 if (!new) 1972 return NULL; 1973 if (svm_range_copy_dma_addrs(new, old)) { 1974 svm_range_free(new, false); 1975 return NULL; 1976 } 1977 if (old->svm_bo) { 1978 new->ttm_res = old->ttm_res; 1979 new->offset = old->offset; 1980 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1981 spin_lock(&new->svm_bo->list_lock); 1982 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1983 spin_unlock(&new->svm_bo->list_lock); 1984 } 1985 new->flags = old->flags; 1986 new->preferred_loc = old->preferred_loc; 1987 new->prefetch_loc = old->prefetch_loc; 1988 new->actual_loc = old->actual_loc; 1989 new->granularity = old->granularity; 1990 new->mapped_to_gpu = old->mapped_to_gpu; 1991 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1992 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1993 1994 return new; 1995 } 1996 1997 void svm_range_set_max_pages(struct amdgpu_device *adev) 1998 { 1999 uint64_t max_pages; 2000 uint64_t pages, _pages; 2001 uint64_t min_pages = 0; 2002 int i, id; 2003 2004 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2005 if (adev->kfd.dev->nodes[i]->xcp) 2006 id = adev->kfd.dev->nodes[i]->xcp->id; 2007 else 2008 id = -1; 2009 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2010 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2011 pages = rounddown_pow_of_two(pages); 2012 min_pages = min_not_zero(min_pages, pages); 2013 } 2014 2015 do { 2016 max_pages = READ_ONCE(max_svm_range_pages); 2017 _pages = min_not_zero(max_pages, min_pages); 2018 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2019 } 2020 2021 static int 2022 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2023 uint64_t max_pages, struct list_head *insert_list, 2024 struct list_head *update_list) 2025 { 2026 struct svm_range *prange; 2027 uint64_t l; 2028 2029 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2030 max_pages, start, last); 2031 2032 while (last >= start) { 2033 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2034 2035 prange = svm_range_new(svms, start, l, true); 2036 if (!prange) 2037 return -ENOMEM; 2038 list_add(&prange->list, insert_list); 2039 list_add(&prange->update_list, update_list); 2040 2041 start = l + 1; 2042 } 2043 return 0; 2044 } 2045 2046 /** 2047 * svm_range_add - add svm range and handle overlap 2048 * @p: the range add to this process svms 2049 * @start: page size aligned 2050 * @size: page size aligned 2051 * @nattr: number of attributes 2052 * @attrs: array of attributes 2053 * @update_list: output, the ranges need validate and update GPU mapping 2054 * @insert_list: output, the ranges need insert to svms 2055 * @remove_list: output, the ranges are replaced and need remove from svms 2056 * 2057 * Check if the virtual address range has overlap with any existing ranges, 2058 * split partly overlapping ranges and add new ranges in the gaps. All changes 2059 * should be applied to the range_list and interval tree transactionally. If 2060 * any range split or allocation fails, the entire update fails. Therefore any 2061 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2062 * unchanged. 2063 * 2064 * If the transaction succeeds, the caller can update and insert clones and 2065 * new ranges, then free the originals. 2066 * 2067 * Otherwise the caller can free the clones and new ranges, while the old 2068 * svm_ranges remain unchanged. 2069 * 2070 * Context: Process context, caller must hold svms->lock 2071 * 2072 * Return: 2073 * 0 - OK, otherwise error code 2074 */ 2075 static int 2076 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2077 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2078 struct list_head *update_list, struct list_head *insert_list, 2079 struct list_head *remove_list) 2080 { 2081 unsigned long last = start + size - 1UL; 2082 struct svm_range_list *svms = &p->svms; 2083 struct interval_tree_node *node; 2084 struct svm_range *prange; 2085 struct svm_range *tmp; 2086 struct list_head new_list; 2087 int r = 0; 2088 2089 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2090 2091 INIT_LIST_HEAD(update_list); 2092 INIT_LIST_HEAD(insert_list); 2093 INIT_LIST_HEAD(remove_list); 2094 INIT_LIST_HEAD(&new_list); 2095 2096 node = interval_tree_iter_first(&svms->objects, start, last); 2097 while (node) { 2098 struct interval_tree_node *next; 2099 unsigned long next_start; 2100 2101 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2102 node->last); 2103 2104 prange = container_of(node, struct svm_range, it_node); 2105 next = interval_tree_iter_next(node, start, last); 2106 next_start = min(node->last, last) + 1; 2107 2108 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) { 2109 /* nothing to do */ 2110 } else if (node->start < start || node->last > last) { 2111 /* node intersects the update range and its attributes 2112 * will change. Clone and split it, apply updates only 2113 * to the overlapping part 2114 */ 2115 struct svm_range *old = prange; 2116 2117 prange = svm_range_clone(old); 2118 if (!prange) { 2119 r = -ENOMEM; 2120 goto out; 2121 } 2122 2123 list_add(&old->update_list, remove_list); 2124 list_add(&prange->list, insert_list); 2125 list_add(&prange->update_list, update_list); 2126 2127 if (node->start < start) { 2128 pr_debug("change old range start\n"); 2129 r = svm_range_split_head(prange, start, 2130 insert_list); 2131 if (r) 2132 goto out; 2133 } 2134 if (node->last > last) { 2135 pr_debug("change old range last\n"); 2136 r = svm_range_split_tail(prange, last, 2137 insert_list); 2138 if (r) 2139 goto out; 2140 } 2141 } else { 2142 /* The node is contained within start..last, 2143 * just update it 2144 */ 2145 list_add(&prange->update_list, update_list); 2146 } 2147 2148 /* insert a new node if needed */ 2149 if (node->start > start) { 2150 r = svm_range_split_new(svms, start, node->start - 1, 2151 READ_ONCE(max_svm_range_pages), 2152 &new_list, update_list); 2153 if (r) 2154 goto out; 2155 } 2156 2157 node = next; 2158 start = next_start; 2159 } 2160 2161 /* add a final range at the end if needed */ 2162 if (start <= last) 2163 r = svm_range_split_new(svms, start, last, 2164 READ_ONCE(max_svm_range_pages), 2165 &new_list, update_list); 2166 2167 out: 2168 if (r) { 2169 list_for_each_entry_safe(prange, tmp, insert_list, list) 2170 svm_range_free(prange, false); 2171 list_for_each_entry_safe(prange, tmp, &new_list, list) 2172 svm_range_free(prange, true); 2173 } else { 2174 list_splice(&new_list, insert_list); 2175 } 2176 2177 return r; 2178 } 2179 2180 static void 2181 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2182 struct svm_range *prange) 2183 { 2184 unsigned long start; 2185 unsigned long last; 2186 2187 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2188 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2189 2190 if (prange->start == start && prange->last == last) 2191 return; 2192 2193 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2194 prange->svms, prange, start, last, prange->start, 2195 prange->last); 2196 2197 if (start != 0 && last != 0) { 2198 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2199 svm_range_remove_notifier(prange); 2200 } 2201 prange->it_node.start = prange->start; 2202 prange->it_node.last = prange->last; 2203 2204 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2205 svm_range_add_notifier_locked(mm, prange); 2206 } 2207 2208 static void 2209 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2210 struct mm_struct *mm) 2211 { 2212 switch (prange->work_item.op) { 2213 case SVM_OP_NULL: 2214 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2215 svms, prange, prange->start, prange->last); 2216 break; 2217 case SVM_OP_UNMAP_RANGE: 2218 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2219 svms, prange, prange->start, prange->last); 2220 svm_range_unlink(prange); 2221 svm_range_remove_notifier(prange); 2222 svm_range_free(prange, true); 2223 break; 2224 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2225 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2226 svms, prange, prange->start, prange->last); 2227 svm_range_update_notifier_and_interval_tree(mm, prange); 2228 break; 2229 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2230 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2231 svms, prange, prange->start, prange->last); 2232 svm_range_update_notifier_and_interval_tree(mm, prange); 2233 /* TODO: implement deferred validation and mapping */ 2234 break; 2235 case SVM_OP_ADD_RANGE: 2236 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2237 prange->start, prange->last); 2238 svm_range_add_to_svms(prange); 2239 svm_range_add_notifier_locked(mm, prange); 2240 break; 2241 case SVM_OP_ADD_RANGE_AND_MAP: 2242 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2243 prange, prange->start, prange->last); 2244 svm_range_add_to_svms(prange); 2245 svm_range_add_notifier_locked(mm, prange); 2246 /* TODO: implement deferred validation and mapping */ 2247 break; 2248 default: 2249 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2250 prange->work_item.op); 2251 } 2252 } 2253 2254 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2255 { 2256 struct kfd_process_device *pdd; 2257 struct kfd_process *p; 2258 int drain; 2259 uint32_t i; 2260 2261 p = container_of(svms, struct kfd_process, svms); 2262 2263 restart: 2264 drain = atomic_read(&svms->drain_pagefaults); 2265 if (!drain) 2266 return; 2267 2268 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2269 pdd = p->pdds[i]; 2270 if (!pdd) 2271 continue; 2272 2273 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2274 2275 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2276 pdd->dev->adev->irq.retry_cam_enabled ? 2277 &pdd->dev->adev->irq.ih : 2278 &pdd->dev->adev->irq.ih1); 2279 2280 if (pdd->dev->adev->irq.retry_cam_enabled) 2281 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2282 &pdd->dev->adev->irq.ih_soft); 2283 2284 2285 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2286 } 2287 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2288 goto restart; 2289 } 2290 2291 static void svm_range_deferred_list_work(struct work_struct *work) 2292 { 2293 struct svm_range_list *svms; 2294 struct svm_range *prange; 2295 struct mm_struct *mm; 2296 2297 svms = container_of(work, struct svm_range_list, deferred_list_work); 2298 pr_debug("enter svms 0x%p\n", svms); 2299 2300 spin_lock(&svms->deferred_list_lock); 2301 while (!list_empty(&svms->deferred_range_list)) { 2302 prange = list_first_entry(&svms->deferred_range_list, 2303 struct svm_range, deferred_list); 2304 spin_unlock(&svms->deferred_list_lock); 2305 2306 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2307 prange->start, prange->last, prange->work_item.op); 2308 2309 mm = prange->work_item.mm; 2310 retry: 2311 mmap_write_lock(mm); 2312 2313 /* Checking for the need to drain retry faults must be inside 2314 * mmap write lock to serialize with munmap notifiers. 2315 */ 2316 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2317 mmap_write_unlock(mm); 2318 svm_range_drain_retry_fault(svms); 2319 goto retry; 2320 } 2321 2322 /* Remove from deferred_list must be inside mmap write lock, for 2323 * two race cases: 2324 * 1. unmap_from_cpu may change work_item.op and add the range 2325 * to deferred_list again, cause use after free bug. 2326 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2327 * lock and continue because deferred_list is empty, but 2328 * deferred_list work is actually waiting for mmap lock. 2329 */ 2330 spin_lock(&svms->deferred_list_lock); 2331 list_del_init(&prange->deferred_list); 2332 spin_unlock(&svms->deferred_list_lock); 2333 2334 mutex_lock(&svms->lock); 2335 mutex_lock(&prange->migrate_mutex); 2336 while (!list_empty(&prange->child_list)) { 2337 struct svm_range *pchild; 2338 2339 pchild = list_first_entry(&prange->child_list, 2340 struct svm_range, child_list); 2341 pr_debug("child prange 0x%p op %d\n", pchild, 2342 pchild->work_item.op); 2343 list_del_init(&pchild->child_list); 2344 svm_range_handle_list_op(svms, pchild, mm); 2345 } 2346 mutex_unlock(&prange->migrate_mutex); 2347 2348 svm_range_handle_list_op(svms, prange, mm); 2349 mutex_unlock(&svms->lock); 2350 mmap_write_unlock(mm); 2351 2352 /* Pairs with mmget in svm_range_add_list_work */ 2353 mmput(mm); 2354 2355 spin_lock(&svms->deferred_list_lock); 2356 } 2357 spin_unlock(&svms->deferred_list_lock); 2358 pr_debug("exit svms 0x%p\n", svms); 2359 } 2360 2361 void 2362 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2363 struct mm_struct *mm, enum svm_work_list_ops op) 2364 { 2365 spin_lock(&svms->deferred_list_lock); 2366 /* if prange is on the deferred list */ 2367 if (!list_empty(&prange->deferred_list)) { 2368 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2369 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2370 if (op != SVM_OP_NULL && 2371 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2372 prange->work_item.op = op; 2373 } else { 2374 prange->work_item.op = op; 2375 2376 /* Pairs with mmput in deferred_list_work */ 2377 mmget(mm); 2378 prange->work_item.mm = mm; 2379 list_add_tail(&prange->deferred_list, 2380 &prange->svms->deferred_range_list); 2381 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2382 prange, prange->start, prange->last, op); 2383 } 2384 spin_unlock(&svms->deferred_list_lock); 2385 } 2386 2387 void schedule_deferred_list_work(struct svm_range_list *svms) 2388 { 2389 spin_lock(&svms->deferred_list_lock); 2390 if (!list_empty(&svms->deferred_range_list)) 2391 schedule_work(&svms->deferred_list_work); 2392 spin_unlock(&svms->deferred_list_lock); 2393 } 2394 2395 static void 2396 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2397 struct svm_range *prange, unsigned long start, 2398 unsigned long last) 2399 { 2400 struct svm_range *head; 2401 struct svm_range *tail; 2402 2403 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2404 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2405 prange->start, prange->last); 2406 return; 2407 } 2408 if (start > prange->last || last < prange->start) 2409 return; 2410 2411 head = tail = prange; 2412 if (start > prange->start) 2413 svm_range_split(prange, prange->start, start - 1, &tail); 2414 if (last < tail->last) 2415 svm_range_split(tail, last + 1, tail->last, &head); 2416 2417 if (head != prange && tail != prange) { 2418 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2419 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2420 } else if (tail != prange) { 2421 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2422 } else if (head != prange) { 2423 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2424 } else if (parent != prange) { 2425 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2426 } 2427 } 2428 2429 static void 2430 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2431 unsigned long start, unsigned long last) 2432 { 2433 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2434 struct svm_range_list *svms; 2435 struct svm_range *pchild; 2436 struct kfd_process *p; 2437 unsigned long s, l; 2438 bool unmap_parent; 2439 2440 p = kfd_lookup_process_by_mm(mm); 2441 if (!p) 2442 return; 2443 svms = &p->svms; 2444 2445 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2446 prange, prange->start, prange->last, start, last); 2447 2448 /* Make sure pending page faults are drained in the deferred worker 2449 * before the range is freed to avoid straggler interrupts on 2450 * unmapped memory causing "phantom faults". 2451 */ 2452 atomic_inc(&svms->drain_pagefaults); 2453 2454 unmap_parent = start <= prange->start && last >= prange->last; 2455 2456 list_for_each_entry(pchild, &prange->child_list, child_list) { 2457 mutex_lock_nested(&pchild->lock, 1); 2458 s = max(start, pchild->start); 2459 l = min(last, pchild->last); 2460 if (l >= s) 2461 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2462 svm_range_unmap_split(mm, prange, pchild, start, last); 2463 mutex_unlock(&pchild->lock); 2464 } 2465 s = max(start, prange->start); 2466 l = min(last, prange->last); 2467 if (l >= s) 2468 svm_range_unmap_from_gpus(prange, s, l, trigger); 2469 svm_range_unmap_split(mm, prange, prange, start, last); 2470 2471 if (unmap_parent) 2472 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2473 else 2474 svm_range_add_list_work(svms, prange, mm, 2475 SVM_OP_UPDATE_RANGE_NOTIFIER); 2476 schedule_deferred_list_work(svms); 2477 2478 kfd_unref_process(p); 2479 } 2480 2481 /** 2482 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2483 * @mni: mmu_interval_notifier struct 2484 * @range: mmu_notifier_range struct 2485 * @cur_seq: value to pass to mmu_interval_set_seq() 2486 * 2487 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2488 * is from migration, or CPU page invalidation callback. 2489 * 2490 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2491 * work thread, and split prange if only part of prange is unmapped. 2492 * 2493 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2494 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2495 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2496 * update GPU mapping to recover. 2497 * 2498 * Context: mmap lock, notifier_invalidate_start lock are held 2499 * for invalidate event, prange lock is held if this is from migration 2500 */ 2501 static bool 2502 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2503 const struct mmu_notifier_range *range, 2504 unsigned long cur_seq) 2505 { 2506 struct svm_range *prange; 2507 unsigned long start; 2508 unsigned long last; 2509 2510 if (range->event == MMU_NOTIFY_RELEASE) 2511 return true; 2512 if (!mmget_not_zero(mni->mm)) 2513 return true; 2514 2515 start = mni->interval_tree.start; 2516 last = mni->interval_tree.last; 2517 start = max(start, range->start) >> PAGE_SHIFT; 2518 last = min(last, range->end - 1) >> PAGE_SHIFT; 2519 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2520 start, last, range->start >> PAGE_SHIFT, 2521 (range->end - 1) >> PAGE_SHIFT, 2522 mni->interval_tree.start >> PAGE_SHIFT, 2523 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2524 2525 prange = container_of(mni, struct svm_range, notifier); 2526 2527 svm_range_lock(prange); 2528 mmu_interval_set_seq(mni, cur_seq); 2529 2530 switch (range->event) { 2531 case MMU_NOTIFY_UNMAP: 2532 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2533 break; 2534 default: 2535 svm_range_evict(prange, mni->mm, start, last, range->event); 2536 break; 2537 } 2538 2539 svm_range_unlock(prange); 2540 mmput(mni->mm); 2541 2542 return true; 2543 } 2544 2545 /** 2546 * svm_range_from_addr - find svm range from fault address 2547 * @svms: svm range list header 2548 * @addr: address to search range interval tree, in pages 2549 * @parent: parent range if range is on child list 2550 * 2551 * Context: The caller must hold svms->lock 2552 * 2553 * Return: the svm_range found or NULL 2554 */ 2555 struct svm_range * 2556 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2557 struct svm_range **parent) 2558 { 2559 struct interval_tree_node *node; 2560 struct svm_range *prange; 2561 struct svm_range *pchild; 2562 2563 node = interval_tree_iter_first(&svms->objects, addr, addr); 2564 if (!node) 2565 return NULL; 2566 2567 prange = container_of(node, struct svm_range, it_node); 2568 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2569 addr, prange->start, prange->last, node->start, node->last); 2570 2571 if (addr >= prange->start && addr <= prange->last) { 2572 if (parent) 2573 *parent = prange; 2574 return prange; 2575 } 2576 list_for_each_entry(pchild, &prange->child_list, child_list) 2577 if (addr >= pchild->start && addr <= pchild->last) { 2578 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2579 addr, pchild->start, pchild->last); 2580 if (parent) 2581 *parent = prange; 2582 return pchild; 2583 } 2584 2585 return NULL; 2586 } 2587 2588 /* svm_range_best_restore_location - decide the best fault restore location 2589 * @prange: svm range structure 2590 * @adev: the GPU on which vm fault happened 2591 * 2592 * This is only called when xnack is on, to decide the best location to restore 2593 * the range mapping after GPU vm fault. Caller uses the best location to do 2594 * migration if actual loc is not best location, then update GPU page table 2595 * mapping to the best location. 2596 * 2597 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2598 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2599 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2600 * if range actual loc is cpu, best_loc is cpu 2601 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2602 * range actual loc. 2603 * Otherwise, GPU no access, best_loc is -1. 2604 * 2605 * Return: 2606 * -1 means vm fault GPU no access 2607 * 0 for CPU or GPU id 2608 */ 2609 static int32_t 2610 svm_range_best_restore_location(struct svm_range *prange, 2611 struct kfd_node *node, 2612 int32_t *gpuidx) 2613 { 2614 struct kfd_node *bo_node, *preferred_node; 2615 struct kfd_process *p; 2616 uint32_t gpuid; 2617 int r; 2618 2619 p = container_of(prange->svms, struct kfd_process, svms); 2620 2621 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2622 if (r < 0) { 2623 pr_debug("failed to get gpuid from kgd\n"); 2624 return -1; 2625 } 2626 2627 if (node->adev->gmc.is_app_apu) 2628 return 0; 2629 2630 if (prange->preferred_loc == gpuid || 2631 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2632 return prange->preferred_loc; 2633 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2634 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2635 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2636 return prange->preferred_loc; 2637 /* fall through */ 2638 } 2639 2640 if (test_bit(*gpuidx, prange->bitmap_access)) 2641 return gpuid; 2642 2643 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2644 if (!prange->actual_loc) 2645 return 0; 2646 2647 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2648 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2649 return prange->actual_loc; 2650 else 2651 return 0; 2652 } 2653 2654 return -1; 2655 } 2656 2657 static int 2658 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2659 unsigned long *start, unsigned long *last, 2660 bool *is_heap_stack) 2661 { 2662 struct vm_area_struct *vma; 2663 struct interval_tree_node *node; 2664 unsigned long start_limit, end_limit; 2665 2666 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2667 if (!vma) { 2668 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2669 return -EFAULT; 2670 } 2671 2672 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk && 2673 vma->vm_end >= vma->vm_mm->start_brk) || 2674 (vma->vm_start <= vma->vm_mm->start_stack && 2675 vma->vm_end >= vma->vm_mm->start_stack); 2676 2677 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2678 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2679 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2680 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2681 /* First range that starts after the fault address */ 2682 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2683 if (node) { 2684 end_limit = min(end_limit, node->start); 2685 /* Last range that ends before the fault address */ 2686 node = container_of(rb_prev(&node->rb), 2687 struct interval_tree_node, rb); 2688 } else { 2689 /* Last range must end before addr because 2690 * there was no range after addr 2691 */ 2692 node = container_of(rb_last(&p->svms.objects.rb_root), 2693 struct interval_tree_node, rb); 2694 } 2695 if (node) { 2696 if (node->last >= addr) { 2697 WARN(1, "Overlap with prev node and page fault addr\n"); 2698 return -EFAULT; 2699 } 2700 start_limit = max(start_limit, node->last + 1); 2701 } 2702 2703 *start = start_limit; 2704 *last = end_limit - 1; 2705 2706 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2707 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2708 *start, *last, *is_heap_stack); 2709 2710 return 0; 2711 } 2712 2713 static int 2714 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2715 uint64_t *bo_s, uint64_t *bo_l) 2716 { 2717 struct amdgpu_bo_va_mapping *mapping; 2718 struct interval_tree_node *node; 2719 struct amdgpu_bo *bo = NULL; 2720 unsigned long userptr; 2721 uint32_t i; 2722 int r; 2723 2724 for (i = 0; i < p->n_pdds; i++) { 2725 struct amdgpu_vm *vm; 2726 2727 if (!p->pdds[i]->drm_priv) 2728 continue; 2729 2730 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2731 r = amdgpu_bo_reserve(vm->root.bo, false); 2732 if (r) 2733 return r; 2734 2735 /* Check userptr by searching entire vm->va interval tree */ 2736 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2737 while (node) { 2738 mapping = container_of((struct rb_node *)node, 2739 struct amdgpu_bo_va_mapping, rb); 2740 bo = mapping->bo_va->base.bo; 2741 2742 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2743 start << PAGE_SHIFT, 2744 last << PAGE_SHIFT, 2745 &userptr)) { 2746 node = interval_tree_iter_next(node, 0, ~0ULL); 2747 continue; 2748 } 2749 2750 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2751 start, last); 2752 if (bo_s && bo_l) { 2753 *bo_s = userptr >> PAGE_SHIFT; 2754 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2755 } 2756 amdgpu_bo_unreserve(vm->root.bo); 2757 return -EADDRINUSE; 2758 } 2759 amdgpu_bo_unreserve(vm->root.bo); 2760 } 2761 return 0; 2762 } 2763 2764 static struct 2765 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2766 struct kfd_process *p, 2767 struct mm_struct *mm, 2768 int64_t addr) 2769 { 2770 struct svm_range *prange = NULL; 2771 unsigned long start, last; 2772 uint32_t gpuid, gpuidx; 2773 bool is_heap_stack; 2774 uint64_t bo_s = 0; 2775 uint64_t bo_l = 0; 2776 int r; 2777 2778 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2779 &is_heap_stack)) 2780 return NULL; 2781 2782 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2783 if (r != -EADDRINUSE) 2784 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2785 2786 if (r == -EADDRINUSE) { 2787 if (addr >= bo_s && addr <= bo_l) 2788 return NULL; 2789 2790 /* Create one page svm range if 2MB range overlapping */ 2791 start = addr; 2792 last = addr; 2793 } 2794 2795 prange = svm_range_new(&p->svms, start, last, true); 2796 if (!prange) { 2797 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2798 return NULL; 2799 } 2800 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2801 pr_debug("failed to get gpuid from kgd\n"); 2802 svm_range_free(prange, true); 2803 return NULL; 2804 } 2805 2806 if (is_heap_stack) 2807 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2808 2809 svm_range_add_to_svms(prange); 2810 svm_range_add_notifier_locked(mm, prange); 2811 2812 return prange; 2813 } 2814 2815 /* svm_range_skip_recover - decide if prange can be recovered 2816 * @prange: svm range structure 2817 * 2818 * GPU vm retry fault handle skip recover the range for cases: 2819 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2820 * deferred list work will drain the stale fault before free the prange. 2821 * 2. prange is on deferred list to add interval notifier after split, or 2822 * 3. prange is child range, it is split from parent prange, recover later 2823 * after interval notifier is added. 2824 * 2825 * Return: true to skip recover, false to recover 2826 */ 2827 static bool svm_range_skip_recover(struct svm_range *prange) 2828 { 2829 struct svm_range_list *svms = prange->svms; 2830 2831 spin_lock(&svms->deferred_list_lock); 2832 if (list_empty(&prange->deferred_list) && 2833 list_empty(&prange->child_list)) { 2834 spin_unlock(&svms->deferred_list_lock); 2835 return false; 2836 } 2837 spin_unlock(&svms->deferred_list_lock); 2838 2839 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2840 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2841 svms, prange, prange->start, prange->last); 2842 return true; 2843 } 2844 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2845 prange->work_item.op == SVM_OP_ADD_RANGE) { 2846 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2847 svms, prange, prange->start, prange->last); 2848 return true; 2849 } 2850 return false; 2851 } 2852 2853 static void 2854 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2855 int32_t gpuidx) 2856 { 2857 struct kfd_process_device *pdd; 2858 2859 /* fault is on different page of same range 2860 * or fault is skipped to recover later 2861 * or fault is on invalid virtual address 2862 */ 2863 if (gpuidx == MAX_GPU_INSTANCE) { 2864 uint32_t gpuid; 2865 int r; 2866 2867 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2868 if (r < 0) 2869 return; 2870 } 2871 2872 /* fault is recovered 2873 * or fault cannot recover because GPU no access on the range 2874 */ 2875 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2876 if (pdd) 2877 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2878 } 2879 2880 static bool 2881 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2882 { 2883 unsigned long requested = VM_READ; 2884 2885 if (write_fault) 2886 requested |= VM_WRITE; 2887 2888 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2889 vma->vm_flags); 2890 return (vma->vm_flags & requested) == requested; 2891 } 2892 2893 int 2894 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2895 uint32_t vmid, uint32_t node_id, 2896 uint64_t addr, bool write_fault) 2897 { 2898 struct mm_struct *mm = NULL; 2899 struct svm_range_list *svms; 2900 struct svm_range *prange; 2901 struct kfd_process *p; 2902 ktime_t timestamp = ktime_get_boottime(); 2903 struct kfd_node *node; 2904 int32_t best_loc; 2905 int32_t gpuidx = MAX_GPU_INSTANCE; 2906 bool write_locked = false; 2907 struct vm_area_struct *vma; 2908 bool migration = false; 2909 int r = 0; 2910 2911 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2912 pr_debug("device does not support SVM\n"); 2913 return -EFAULT; 2914 } 2915 2916 p = kfd_lookup_process_by_pasid(pasid); 2917 if (!p) { 2918 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2919 return 0; 2920 } 2921 svms = &p->svms; 2922 2923 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2924 2925 if (atomic_read(&svms->drain_pagefaults)) { 2926 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2927 r = 0; 2928 goto out; 2929 } 2930 2931 if (!p->xnack_enabled) { 2932 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2933 r = -EFAULT; 2934 goto out; 2935 } 2936 2937 /* p->lead_thread is available as kfd_process_wq_release flush the work 2938 * before releasing task ref. 2939 */ 2940 mm = get_task_mm(p->lead_thread); 2941 if (!mm) { 2942 pr_debug("svms 0x%p failed to get mm\n", svms); 2943 r = 0; 2944 goto out; 2945 } 2946 2947 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2948 if (!node) { 2949 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2950 vmid); 2951 r = -EFAULT; 2952 goto out; 2953 } 2954 mmap_read_lock(mm); 2955 retry_write_locked: 2956 mutex_lock(&svms->lock); 2957 prange = svm_range_from_addr(svms, addr, NULL); 2958 if (!prange) { 2959 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2960 svms, addr); 2961 if (!write_locked) { 2962 /* Need the write lock to create new range with MMU notifier. 2963 * Also flush pending deferred work to make sure the interval 2964 * tree is up to date before we add a new range 2965 */ 2966 mutex_unlock(&svms->lock); 2967 mmap_read_unlock(mm); 2968 mmap_write_lock(mm); 2969 write_locked = true; 2970 goto retry_write_locked; 2971 } 2972 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2973 if (!prange) { 2974 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2975 svms, addr); 2976 mmap_write_downgrade(mm); 2977 r = -EFAULT; 2978 goto out_unlock_svms; 2979 } 2980 } 2981 if (write_locked) 2982 mmap_write_downgrade(mm); 2983 2984 mutex_lock(&prange->migrate_mutex); 2985 2986 if (svm_range_skip_recover(prange)) { 2987 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2988 r = 0; 2989 goto out_unlock_range; 2990 } 2991 2992 /* skip duplicate vm fault on different pages of same range */ 2993 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2994 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2995 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2996 svms, prange->start, prange->last); 2997 r = 0; 2998 goto out_unlock_range; 2999 } 3000 3001 /* __do_munmap removed VMA, return success as we are handling stale 3002 * retry fault. 3003 */ 3004 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3005 if (!vma) { 3006 pr_debug("address 0x%llx VMA is removed\n", addr); 3007 r = 0; 3008 goto out_unlock_range; 3009 } 3010 3011 if (!svm_fault_allowed(vma, write_fault)) { 3012 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3013 write_fault ? "write" : "read"); 3014 r = -EPERM; 3015 goto out_unlock_range; 3016 } 3017 3018 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3019 if (best_loc == -1) { 3020 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3021 svms, prange->start, prange->last); 3022 r = -EACCES; 3023 goto out_unlock_range; 3024 } 3025 3026 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3027 svms, prange->start, prange->last, best_loc, 3028 prange->actual_loc); 3029 3030 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3031 write_fault, timestamp); 3032 3033 if (prange->actual_loc != best_loc) { 3034 migration = true; 3035 if (best_loc) { 3036 r = svm_migrate_to_vram(prange, best_loc, mm, 3037 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3038 if (r) { 3039 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3040 r, addr); 3041 /* Fallback to system memory if migration to 3042 * VRAM failed 3043 */ 3044 if (prange->actual_loc) 3045 r = svm_migrate_vram_to_ram(prange, mm, 3046 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3047 NULL); 3048 else 3049 r = 0; 3050 } 3051 } else { 3052 r = svm_migrate_vram_to_ram(prange, mm, 3053 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3054 NULL); 3055 } 3056 if (r) { 3057 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3058 r, svms, prange->start, prange->last); 3059 goto out_unlock_range; 3060 } 3061 } 3062 3063 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3064 if (r) 3065 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3066 r, svms, prange->start, prange->last); 3067 3068 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3069 migration); 3070 3071 out_unlock_range: 3072 mutex_unlock(&prange->migrate_mutex); 3073 out_unlock_svms: 3074 mutex_unlock(&svms->lock); 3075 mmap_read_unlock(mm); 3076 3077 svm_range_count_fault(node, p, gpuidx); 3078 3079 mmput(mm); 3080 out: 3081 kfd_unref_process(p); 3082 3083 if (r == -EAGAIN) { 3084 pr_debug("recover vm fault later\n"); 3085 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3086 r = 0; 3087 } 3088 return r; 3089 } 3090 3091 int 3092 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3093 { 3094 struct svm_range *prange, *pchild; 3095 uint64_t reserved_size = 0; 3096 uint64_t size; 3097 int r = 0; 3098 3099 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3100 3101 mutex_lock(&p->svms.lock); 3102 3103 list_for_each_entry(prange, &p->svms.list, list) { 3104 svm_range_lock(prange); 3105 list_for_each_entry(pchild, &prange->child_list, child_list) { 3106 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3107 if (xnack_enabled) { 3108 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3109 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3110 } else { 3111 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3112 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3113 if (r) 3114 goto out_unlock; 3115 reserved_size += size; 3116 } 3117 } 3118 3119 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3120 if (xnack_enabled) { 3121 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3122 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3123 } else { 3124 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3125 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3126 if (r) 3127 goto out_unlock; 3128 reserved_size += size; 3129 } 3130 out_unlock: 3131 svm_range_unlock(prange); 3132 if (r) 3133 break; 3134 } 3135 3136 if (r) 3137 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3138 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3139 else 3140 /* Change xnack mode must be inside svms lock, to avoid race with 3141 * svm_range_deferred_list_work unreserve memory in parallel. 3142 */ 3143 p->xnack_enabled = xnack_enabled; 3144 3145 mutex_unlock(&p->svms.lock); 3146 return r; 3147 } 3148 3149 void svm_range_list_fini(struct kfd_process *p) 3150 { 3151 struct svm_range *prange; 3152 struct svm_range *next; 3153 3154 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3155 3156 cancel_delayed_work_sync(&p->svms.restore_work); 3157 3158 /* Ensure list work is finished before process is destroyed */ 3159 flush_work(&p->svms.deferred_list_work); 3160 3161 /* 3162 * Ensure no retry fault comes in afterwards, as page fault handler will 3163 * not find kfd process and take mm lock to recover fault. 3164 */ 3165 atomic_inc(&p->svms.drain_pagefaults); 3166 svm_range_drain_retry_fault(&p->svms); 3167 3168 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3169 svm_range_unlink(prange); 3170 svm_range_remove_notifier(prange); 3171 svm_range_free(prange, true); 3172 } 3173 3174 mutex_destroy(&p->svms.lock); 3175 3176 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3177 } 3178 3179 int svm_range_list_init(struct kfd_process *p) 3180 { 3181 struct svm_range_list *svms = &p->svms; 3182 int i; 3183 3184 svms->objects = RB_ROOT_CACHED; 3185 mutex_init(&svms->lock); 3186 INIT_LIST_HEAD(&svms->list); 3187 atomic_set(&svms->evicted_ranges, 0); 3188 atomic_set(&svms->drain_pagefaults, 0); 3189 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3190 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3191 INIT_LIST_HEAD(&svms->deferred_range_list); 3192 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3193 spin_lock_init(&svms->deferred_list_lock); 3194 3195 for (i = 0; i < p->n_pdds; i++) 3196 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3197 bitmap_set(svms->bitmap_supported, i, 1); 3198 3199 return 0; 3200 } 3201 3202 /** 3203 * svm_range_check_vm - check if virtual address range mapped already 3204 * @p: current kfd_process 3205 * @start: range start address, in pages 3206 * @last: range last address, in pages 3207 * @bo_s: mapping start address in pages if address range already mapped 3208 * @bo_l: mapping last address in pages if address range already mapped 3209 * 3210 * The purpose is to avoid virtual address ranges already allocated by 3211 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3212 * It looks for each pdd in the kfd_process. 3213 * 3214 * Context: Process context 3215 * 3216 * Return 0 - OK, if the range is not mapped. 3217 * Otherwise error code: 3218 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3219 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3220 * a signal. Release all buffer reservations and return to user-space. 3221 */ 3222 static int 3223 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3224 uint64_t *bo_s, uint64_t *bo_l) 3225 { 3226 struct amdgpu_bo_va_mapping *mapping; 3227 struct interval_tree_node *node; 3228 uint32_t i; 3229 int r; 3230 3231 for (i = 0; i < p->n_pdds; i++) { 3232 struct amdgpu_vm *vm; 3233 3234 if (!p->pdds[i]->drm_priv) 3235 continue; 3236 3237 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3238 r = amdgpu_bo_reserve(vm->root.bo, false); 3239 if (r) 3240 return r; 3241 3242 node = interval_tree_iter_first(&vm->va, start, last); 3243 if (node) { 3244 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3245 start, last); 3246 mapping = container_of((struct rb_node *)node, 3247 struct amdgpu_bo_va_mapping, rb); 3248 if (bo_s && bo_l) { 3249 *bo_s = mapping->start; 3250 *bo_l = mapping->last; 3251 } 3252 amdgpu_bo_unreserve(vm->root.bo); 3253 return -EADDRINUSE; 3254 } 3255 amdgpu_bo_unreserve(vm->root.bo); 3256 } 3257 3258 return 0; 3259 } 3260 3261 /** 3262 * svm_range_is_valid - check if virtual address range is valid 3263 * @p: current kfd_process 3264 * @start: range start address, in pages 3265 * @size: range size, in pages 3266 * 3267 * Valid virtual address range means it belongs to one or more VMAs 3268 * 3269 * Context: Process context 3270 * 3271 * Return: 3272 * 0 - OK, otherwise error code 3273 */ 3274 static int 3275 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3276 { 3277 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3278 struct vm_area_struct *vma; 3279 unsigned long end; 3280 unsigned long start_unchg = start; 3281 3282 start <<= PAGE_SHIFT; 3283 end = start + (size << PAGE_SHIFT); 3284 do { 3285 vma = vma_lookup(p->mm, start); 3286 if (!vma || (vma->vm_flags & device_vma)) 3287 return -EFAULT; 3288 start = min(end, vma->vm_end); 3289 } while (start < end); 3290 3291 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3292 NULL); 3293 } 3294 3295 /** 3296 * svm_range_best_prefetch_location - decide the best prefetch location 3297 * @prange: svm range structure 3298 * 3299 * For xnack off: 3300 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3301 * can be CPU or GPU. 3302 * 3303 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3304 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3305 * the best prefetch location is always CPU, because GPU can not have coherent 3306 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3307 * 3308 * For xnack on: 3309 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3310 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3311 * 3312 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3313 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3314 * prefetch location is always CPU. 3315 * 3316 * Context: Process context 3317 * 3318 * Return: 3319 * 0 for CPU or GPU id 3320 */ 3321 static uint32_t 3322 svm_range_best_prefetch_location(struct svm_range *prange) 3323 { 3324 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3325 uint32_t best_loc = prange->prefetch_loc; 3326 struct kfd_process_device *pdd; 3327 struct kfd_node *bo_node; 3328 struct kfd_process *p; 3329 uint32_t gpuidx; 3330 3331 p = container_of(prange->svms, struct kfd_process, svms); 3332 3333 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3334 goto out; 3335 3336 bo_node = svm_range_get_node_by_id(prange, best_loc); 3337 if (!bo_node) { 3338 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3339 best_loc = 0; 3340 goto out; 3341 } 3342 3343 if (bo_node->adev->gmc.is_app_apu) { 3344 best_loc = 0; 3345 goto out; 3346 } 3347 3348 if (p->xnack_enabled) 3349 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3350 else 3351 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3352 MAX_GPU_INSTANCE); 3353 3354 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3355 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3356 if (!pdd) { 3357 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3358 continue; 3359 } 3360 3361 if (pdd->dev->adev == bo_node->adev) 3362 continue; 3363 3364 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3365 best_loc = 0; 3366 break; 3367 } 3368 } 3369 3370 out: 3371 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3372 p->xnack_enabled, &p->svms, prange->start, prange->last, 3373 best_loc); 3374 3375 return best_loc; 3376 } 3377 3378 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3379 * @mm: current process mm_struct 3380 * @prange: svm range structure 3381 * @migrated: output, true if migration is triggered 3382 * 3383 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3384 * from ram to vram. 3385 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3386 * from vram to ram. 3387 * 3388 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3389 * and restore work: 3390 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3391 * stops all queues, schedule restore work 3392 * 2. svm_range_restore_work wait for migration is done by 3393 * a. svm_range_validate_vram takes prange->migrate_mutex 3394 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3395 * 3. restore work update mappings of GPU, resume all queues. 3396 * 3397 * Context: Process context 3398 * 3399 * Return: 3400 * 0 - OK, otherwise - error code of migration 3401 */ 3402 static int 3403 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3404 bool *migrated) 3405 { 3406 uint32_t best_loc; 3407 int r = 0; 3408 3409 *migrated = false; 3410 best_loc = svm_range_best_prefetch_location(prange); 3411 3412 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3413 best_loc == prange->actual_loc) 3414 return 0; 3415 3416 if (!best_loc) { 3417 r = svm_migrate_vram_to_ram(prange, mm, 3418 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3419 *migrated = !r; 3420 return r; 3421 } 3422 3423 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3424 *migrated = !r; 3425 3426 return r; 3427 } 3428 3429 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3430 { 3431 if (!fence) 3432 return -EINVAL; 3433 3434 if (dma_fence_is_signaled(&fence->base)) 3435 return 0; 3436 3437 if (fence->svm_bo) { 3438 WRITE_ONCE(fence->svm_bo->evicting, 1); 3439 schedule_work(&fence->svm_bo->eviction_work); 3440 } 3441 3442 return 0; 3443 } 3444 3445 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3446 { 3447 struct svm_range_bo *svm_bo; 3448 struct mm_struct *mm; 3449 int r = 0; 3450 3451 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3452 if (!svm_bo_ref_unless_zero(svm_bo)) 3453 return; /* svm_bo was freed while eviction was pending */ 3454 3455 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3456 mm = svm_bo->eviction_fence->mm; 3457 } else { 3458 svm_range_bo_unref(svm_bo); 3459 return; 3460 } 3461 3462 mmap_read_lock(mm); 3463 spin_lock(&svm_bo->list_lock); 3464 while (!list_empty(&svm_bo->range_list) && !r) { 3465 struct svm_range *prange = 3466 list_first_entry(&svm_bo->range_list, 3467 struct svm_range, svm_bo_list); 3468 int retries = 3; 3469 3470 list_del_init(&prange->svm_bo_list); 3471 spin_unlock(&svm_bo->list_lock); 3472 3473 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3474 prange->start, prange->last); 3475 3476 mutex_lock(&prange->migrate_mutex); 3477 do { 3478 r = svm_migrate_vram_to_ram(prange, mm, 3479 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3480 } while (!r && prange->actual_loc && --retries); 3481 3482 if (!r && prange->actual_loc) 3483 pr_info_once("Migration failed during eviction"); 3484 3485 if (!prange->actual_loc) { 3486 mutex_lock(&prange->lock); 3487 prange->svm_bo = NULL; 3488 mutex_unlock(&prange->lock); 3489 } 3490 mutex_unlock(&prange->migrate_mutex); 3491 3492 spin_lock(&svm_bo->list_lock); 3493 } 3494 spin_unlock(&svm_bo->list_lock); 3495 mmap_read_unlock(mm); 3496 mmput(mm); 3497 3498 dma_fence_signal(&svm_bo->eviction_fence->base); 3499 3500 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3501 * has been called in svm_migrate_vram_to_ram 3502 */ 3503 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3504 svm_range_bo_unref(svm_bo); 3505 } 3506 3507 static int 3508 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3509 uint64_t start, uint64_t size, uint32_t nattr, 3510 struct kfd_ioctl_svm_attribute *attrs) 3511 { 3512 struct amdkfd_process_info *process_info = p->kgd_process_info; 3513 struct list_head update_list; 3514 struct list_head insert_list; 3515 struct list_head remove_list; 3516 struct svm_range_list *svms; 3517 struct svm_range *prange; 3518 struct svm_range *next; 3519 bool update_mapping = false; 3520 bool flush_tlb; 3521 int r = 0; 3522 3523 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3524 p->pasid, &p->svms, start, start + size - 1, size); 3525 3526 r = svm_range_check_attr(p, nattr, attrs); 3527 if (r) 3528 return r; 3529 3530 svms = &p->svms; 3531 3532 mutex_lock(&process_info->lock); 3533 3534 svm_range_list_lock_and_flush_work(svms, mm); 3535 3536 r = svm_range_is_valid(p, start, size); 3537 if (r) { 3538 pr_debug("invalid range r=%d\n", r); 3539 mmap_write_unlock(mm); 3540 goto out; 3541 } 3542 3543 mutex_lock(&svms->lock); 3544 3545 /* Add new range and split existing ranges as needed */ 3546 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3547 &insert_list, &remove_list); 3548 if (r) { 3549 mutex_unlock(&svms->lock); 3550 mmap_write_unlock(mm); 3551 goto out; 3552 } 3553 /* Apply changes as a transaction */ 3554 list_for_each_entry_safe(prange, next, &insert_list, list) { 3555 svm_range_add_to_svms(prange); 3556 svm_range_add_notifier_locked(mm, prange); 3557 } 3558 list_for_each_entry(prange, &update_list, update_list) { 3559 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3560 /* TODO: unmap ranges from GPU that lost access */ 3561 } 3562 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3563 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3564 prange->svms, prange, prange->start, 3565 prange->last); 3566 svm_range_unlink(prange); 3567 svm_range_remove_notifier(prange); 3568 svm_range_free(prange, false); 3569 } 3570 3571 mmap_write_downgrade(mm); 3572 /* Trigger migrations and revalidate and map to GPUs as needed. If 3573 * this fails we may be left with partially completed actions. There 3574 * is no clean way of rolling back to the previous state in such a 3575 * case because the rollback wouldn't be guaranteed to work either. 3576 */ 3577 list_for_each_entry(prange, &update_list, update_list) { 3578 bool migrated; 3579 3580 mutex_lock(&prange->migrate_mutex); 3581 3582 r = svm_range_trigger_migration(mm, prange, &migrated); 3583 if (r) 3584 goto out_unlock_range; 3585 3586 if (migrated && (!p->xnack_enabled || 3587 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3588 prange->mapped_to_gpu) { 3589 pr_debug("restore_work will update mappings of GPUs\n"); 3590 mutex_unlock(&prange->migrate_mutex); 3591 continue; 3592 } 3593 3594 if (!migrated && !update_mapping) { 3595 mutex_unlock(&prange->migrate_mutex); 3596 continue; 3597 } 3598 3599 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3600 3601 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3602 true, true, flush_tlb); 3603 if (r) 3604 pr_debug("failed %d to map svm range\n", r); 3605 3606 out_unlock_range: 3607 mutex_unlock(&prange->migrate_mutex); 3608 if (r) 3609 break; 3610 } 3611 3612 dynamic_svm_range_dump(svms); 3613 3614 mutex_unlock(&svms->lock); 3615 mmap_read_unlock(mm); 3616 out: 3617 mutex_unlock(&process_info->lock); 3618 3619 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3620 &p->svms, start, start + size - 1, r); 3621 3622 return r; 3623 } 3624 3625 static int 3626 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3627 uint64_t start, uint64_t size, uint32_t nattr, 3628 struct kfd_ioctl_svm_attribute *attrs) 3629 { 3630 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3631 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3632 bool get_preferred_loc = false; 3633 bool get_prefetch_loc = false; 3634 bool get_granularity = false; 3635 bool get_accessible = false; 3636 bool get_flags = false; 3637 uint64_t last = start + size - 1UL; 3638 uint8_t granularity = 0xff; 3639 struct interval_tree_node *node; 3640 struct svm_range_list *svms; 3641 struct svm_range *prange; 3642 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3643 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3644 uint32_t flags_and = 0xffffffff; 3645 uint32_t flags_or = 0; 3646 int gpuidx; 3647 uint32_t i; 3648 int r = 0; 3649 3650 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3651 start + size - 1, nattr); 3652 3653 /* Flush pending deferred work to avoid racing with deferred actions from 3654 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3655 * can still race with get_attr because we don't hold the mmap lock. But that 3656 * would be a race condition in the application anyway, and undefined 3657 * behaviour is acceptable in that case. 3658 */ 3659 flush_work(&p->svms.deferred_list_work); 3660 3661 mmap_read_lock(mm); 3662 r = svm_range_is_valid(p, start, size); 3663 mmap_read_unlock(mm); 3664 if (r) { 3665 pr_debug("invalid range r=%d\n", r); 3666 return r; 3667 } 3668 3669 for (i = 0; i < nattr; i++) { 3670 switch (attrs[i].type) { 3671 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3672 get_preferred_loc = true; 3673 break; 3674 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3675 get_prefetch_loc = true; 3676 break; 3677 case KFD_IOCTL_SVM_ATTR_ACCESS: 3678 get_accessible = true; 3679 break; 3680 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3681 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3682 get_flags = true; 3683 break; 3684 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3685 get_granularity = true; 3686 break; 3687 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3688 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3689 fallthrough; 3690 default: 3691 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3692 return -EINVAL; 3693 } 3694 } 3695 3696 svms = &p->svms; 3697 3698 mutex_lock(&svms->lock); 3699 3700 node = interval_tree_iter_first(&svms->objects, start, last); 3701 if (!node) { 3702 pr_debug("range attrs not found return default values\n"); 3703 svm_range_set_default_attributes(&location, &prefetch_loc, 3704 &granularity, &flags_and); 3705 flags_or = flags_and; 3706 if (p->xnack_enabled) 3707 bitmap_copy(bitmap_access, svms->bitmap_supported, 3708 MAX_GPU_INSTANCE); 3709 else 3710 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3711 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3712 goto fill_values; 3713 } 3714 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3715 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3716 3717 while (node) { 3718 struct interval_tree_node *next; 3719 3720 prange = container_of(node, struct svm_range, it_node); 3721 next = interval_tree_iter_next(node, start, last); 3722 3723 if (get_preferred_loc) { 3724 if (prange->preferred_loc == 3725 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3726 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3727 location != prange->preferred_loc)) { 3728 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3729 get_preferred_loc = false; 3730 } else { 3731 location = prange->preferred_loc; 3732 } 3733 } 3734 if (get_prefetch_loc) { 3735 if (prange->prefetch_loc == 3736 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3737 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3738 prefetch_loc != prange->prefetch_loc)) { 3739 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3740 get_prefetch_loc = false; 3741 } else { 3742 prefetch_loc = prange->prefetch_loc; 3743 } 3744 } 3745 if (get_accessible) { 3746 bitmap_and(bitmap_access, bitmap_access, 3747 prange->bitmap_access, MAX_GPU_INSTANCE); 3748 bitmap_and(bitmap_aip, bitmap_aip, 3749 prange->bitmap_aip, MAX_GPU_INSTANCE); 3750 } 3751 if (get_flags) { 3752 flags_and &= prange->flags; 3753 flags_or |= prange->flags; 3754 } 3755 3756 if (get_granularity && prange->granularity < granularity) 3757 granularity = prange->granularity; 3758 3759 node = next; 3760 } 3761 fill_values: 3762 mutex_unlock(&svms->lock); 3763 3764 for (i = 0; i < nattr; i++) { 3765 switch (attrs[i].type) { 3766 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3767 attrs[i].value = location; 3768 break; 3769 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3770 attrs[i].value = prefetch_loc; 3771 break; 3772 case KFD_IOCTL_SVM_ATTR_ACCESS: 3773 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3774 attrs[i].value); 3775 if (gpuidx < 0) { 3776 pr_debug("invalid gpuid %x\n", attrs[i].value); 3777 return -EINVAL; 3778 } 3779 if (test_bit(gpuidx, bitmap_access)) 3780 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3781 else if (test_bit(gpuidx, bitmap_aip)) 3782 attrs[i].type = 3783 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3784 else 3785 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3786 break; 3787 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3788 attrs[i].value = flags_and; 3789 break; 3790 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3791 attrs[i].value = ~flags_or; 3792 break; 3793 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3794 attrs[i].value = (uint32_t)granularity; 3795 break; 3796 } 3797 } 3798 3799 return 0; 3800 } 3801 3802 int kfd_criu_resume_svm(struct kfd_process *p) 3803 { 3804 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3805 int nattr_common = 4, nattr_accessibility = 1; 3806 struct criu_svm_metadata *criu_svm_md = NULL; 3807 struct svm_range_list *svms = &p->svms; 3808 struct criu_svm_metadata *next = NULL; 3809 uint32_t set_flags = 0xffffffff; 3810 int i, j, num_attrs, ret = 0; 3811 uint64_t set_attr_size; 3812 struct mm_struct *mm; 3813 3814 if (list_empty(&svms->criu_svm_metadata_list)) { 3815 pr_debug("No SVM data from CRIU restore stage 2\n"); 3816 return ret; 3817 } 3818 3819 mm = get_task_mm(p->lead_thread); 3820 if (!mm) { 3821 pr_err("failed to get mm for the target process\n"); 3822 return -ESRCH; 3823 } 3824 3825 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3826 3827 i = j = 0; 3828 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3829 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3830 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3831 3832 for (j = 0; j < num_attrs; j++) { 3833 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3834 i, j, criu_svm_md->data.attrs[j].type, 3835 i, j, criu_svm_md->data.attrs[j].value); 3836 switch (criu_svm_md->data.attrs[j].type) { 3837 /* During Checkpoint operation, the query for 3838 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3839 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3840 * not used by the range which was checkpointed. Care 3841 * must be taken to not restore with an invalid value 3842 * otherwise the gpuidx value will be invalid and 3843 * set_attr would eventually fail so just replace those 3844 * with another dummy attribute such as 3845 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3846 */ 3847 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3848 if (criu_svm_md->data.attrs[j].value == 3849 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3850 criu_svm_md->data.attrs[j].type = 3851 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3852 criu_svm_md->data.attrs[j].value = 0; 3853 } 3854 break; 3855 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3856 set_flags = criu_svm_md->data.attrs[j].value; 3857 break; 3858 default: 3859 break; 3860 } 3861 } 3862 3863 /* CLR_FLAGS is not available via get_attr during checkpoint but 3864 * it needs to be inserted before restoring the ranges so 3865 * allocate extra space for it before calling set_attr 3866 */ 3867 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3868 (num_attrs + 1); 3869 set_attr_new = krealloc(set_attr, set_attr_size, 3870 GFP_KERNEL); 3871 if (!set_attr_new) { 3872 ret = -ENOMEM; 3873 goto exit; 3874 } 3875 set_attr = set_attr_new; 3876 3877 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3878 sizeof(struct kfd_ioctl_svm_attribute)); 3879 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3880 set_attr[num_attrs].value = ~set_flags; 3881 3882 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3883 criu_svm_md->data.size, num_attrs + 1, 3884 set_attr); 3885 if (ret) { 3886 pr_err("CRIU: failed to set range attributes\n"); 3887 goto exit; 3888 } 3889 3890 i++; 3891 } 3892 exit: 3893 kfree(set_attr); 3894 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3895 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3896 criu_svm_md->data.start_addr); 3897 kfree(criu_svm_md); 3898 } 3899 3900 mmput(mm); 3901 return ret; 3902 3903 } 3904 3905 int kfd_criu_restore_svm(struct kfd_process *p, 3906 uint8_t __user *user_priv_ptr, 3907 uint64_t *priv_data_offset, 3908 uint64_t max_priv_data_size) 3909 { 3910 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3911 int nattr_common = 4, nattr_accessibility = 1; 3912 struct criu_svm_metadata *criu_svm_md = NULL; 3913 struct svm_range_list *svms = &p->svms; 3914 uint32_t num_devices; 3915 int ret = 0; 3916 3917 num_devices = p->n_pdds; 3918 /* Handle one SVM range object at a time, also the number of gpus are 3919 * assumed to be same on the restore node, checking must be done while 3920 * evaluating the topology earlier 3921 */ 3922 3923 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3924 (nattr_common + nattr_accessibility * num_devices); 3925 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3926 3927 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3928 svm_attrs_size; 3929 3930 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3931 if (!criu_svm_md) { 3932 pr_err("failed to allocate memory to store svm metadata\n"); 3933 return -ENOMEM; 3934 } 3935 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3936 ret = -EINVAL; 3937 goto exit; 3938 } 3939 3940 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3941 svm_priv_data_size); 3942 if (ret) { 3943 ret = -EFAULT; 3944 goto exit; 3945 } 3946 *priv_data_offset += svm_priv_data_size; 3947 3948 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3949 3950 return 0; 3951 3952 3953 exit: 3954 kfree(criu_svm_md); 3955 return ret; 3956 } 3957 3958 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3959 uint64_t *svm_priv_data_size) 3960 { 3961 uint64_t total_size, accessibility_size, common_attr_size; 3962 int nattr_common = 4, nattr_accessibility = 1; 3963 int num_devices = p->n_pdds; 3964 struct svm_range_list *svms; 3965 struct svm_range *prange; 3966 uint32_t count = 0; 3967 3968 *svm_priv_data_size = 0; 3969 3970 svms = &p->svms; 3971 if (!svms) 3972 return -EINVAL; 3973 3974 mutex_lock(&svms->lock); 3975 list_for_each_entry(prange, &svms->list, list) { 3976 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3977 prange, prange->start, prange->npages, 3978 prange->start + prange->npages - 1); 3979 count++; 3980 } 3981 mutex_unlock(&svms->lock); 3982 3983 *num_svm_ranges = count; 3984 /* Only the accessbility attributes need to be queried for all the gpus 3985 * individually, remaining ones are spanned across the entire process 3986 * regardless of the various gpu nodes. Of the remaining attributes, 3987 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 3988 * 3989 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 3990 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 3991 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 3992 * KFD_IOCTL_SVM_ATTR_GRANULARITY 3993 * 3994 * ** ACCESSBILITY ATTRIBUTES ** 3995 * (Considered as one, type is altered during query, value is gpuid) 3996 * KFD_IOCTL_SVM_ATTR_ACCESS 3997 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 3998 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 3999 */ 4000 if (*num_svm_ranges > 0) { 4001 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4002 nattr_common; 4003 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4004 nattr_accessibility * num_devices; 4005 4006 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4007 common_attr_size + accessibility_size; 4008 4009 *svm_priv_data_size = *num_svm_ranges * total_size; 4010 } 4011 4012 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4013 *svm_priv_data_size); 4014 return 0; 4015 } 4016 4017 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4018 uint8_t __user *user_priv_data, 4019 uint64_t *priv_data_offset) 4020 { 4021 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4022 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4023 uint64_t svm_priv_data_size, query_attr_size = 0; 4024 int index, nattr_common = 4, ret = 0; 4025 struct svm_range_list *svms; 4026 int num_devices = p->n_pdds; 4027 struct svm_range *prange; 4028 struct mm_struct *mm; 4029 4030 svms = &p->svms; 4031 if (!svms) 4032 return -EINVAL; 4033 4034 mm = get_task_mm(p->lead_thread); 4035 if (!mm) { 4036 pr_err("failed to get mm for the target process\n"); 4037 return -ESRCH; 4038 } 4039 4040 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4041 (nattr_common + num_devices); 4042 4043 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4044 if (!query_attr) { 4045 ret = -ENOMEM; 4046 goto exit; 4047 } 4048 4049 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4050 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4051 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4052 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4053 4054 for (index = 0; index < num_devices; index++) { 4055 struct kfd_process_device *pdd = p->pdds[index]; 4056 4057 query_attr[index + nattr_common].type = 4058 KFD_IOCTL_SVM_ATTR_ACCESS; 4059 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4060 } 4061 4062 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4063 4064 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4065 if (!svm_priv) { 4066 ret = -ENOMEM; 4067 goto exit_query; 4068 } 4069 4070 index = 0; 4071 list_for_each_entry(prange, &svms->list, list) { 4072 4073 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4074 svm_priv->start_addr = prange->start; 4075 svm_priv->size = prange->npages; 4076 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4077 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4078 prange, prange->start, prange->npages, 4079 prange->start + prange->npages - 1, 4080 prange->npages * PAGE_SIZE); 4081 4082 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4083 svm_priv->size, 4084 (nattr_common + num_devices), 4085 svm_priv->attrs); 4086 if (ret) { 4087 pr_err("CRIU: failed to obtain range attributes\n"); 4088 goto exit_priv; 4089 } 4090 4091 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4092 svm_priv_data_size)) { 4093 pr_err("Failed to copy svm priv to user\n"); 4094 ret = -EFAULT; 4095 goto exit_priv; 4096 } 4097 4098 *priv_data_offset += svm_priv_data_size; 4099 4100 } 4101 4102 4103 exit_priv: 4104 kfree(svm_priv); 4105 exit_query: 4106 kfree(query_attr); 4107 exit: 4108 mmput(mm); 4109 return ret; 4110 } 4111 4112 int 4113 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4114 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4115 { 4116 struct mm_struct *mm = current->mm; 4117 int r; 4118 4119 start >>= PAGE_SHIFT; 4120 size >>= PAGE_SHIFT; 4121 4122 switch (op) { 4123 case KFD_IOCTL_SVM_OP_SET_ATTR: 4124 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4125 break; 4126 case KFD_IOCTL_SVM_OP_GET_ATTR: 4127 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4128 break; 4129 default: 4130 r = EINVAL; 4131 break; 4132 } 4133 4134 return r; 4135 } 4136