1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 313 uint8_t *granularity, uint32_t *flags) 314 { 315 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 316 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *granularity = 9; 318 *flags = 319 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 320 } 321 322 static struct 323 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 324 uint64_t last, bool update_mem_usage) 325 { 326 uint64_t size = last - start + 1; 327 struct svm_range *prange; 328 struct kfd_process *p; 329 330 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 331 if (!prange) 332 return NULL; 333 334 p = container_of(svms, struct kfd_process, svms); 335 if (!p->xnack_enabled && update_mem_usage && 336 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 337 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 338 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 339 kfree(prange); 340 return NULL; 341 } 342 prange->npages = size; 343 prange->svms = svms; 344 prange->start = start; 345 prange->last = last; 346 INIT_LIST_HEAD(&prange->list); 347 INIT_LIST_HEAD(&prange->update_list); 348 INIT_LIST_HEAD(&prange->svm_bo_list); 349 INIT_LIST_HEAD(&prange->deferred_list); 350 INIT_LIST_HEAD(&prange->child_list); 351 atomic_set(&prange->invalid, 0); 352 prange->validate_timestamp = 0; 353 prange->vram_pages = 0; 354 mutex_init(&prange->migrate_mutex); 355 mutex_init(&prange->lock); 356 357 if (p->xnack_enabled) 358 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 359 MAX_GPU_INSTANCE); 360 361 svm_range_set_default_attributes(&prange->preferred_loc, 362 &prange->prefetch_loc, 363 &prange->granularity, &prange->flags); 364 365 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 366 367 return prange; 368 } 369 370 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 371 { 372 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 373 return false; 374 375 return true; 376 } 377 378 static void svm_range_bo_release(struct kref *kref) 379 { 380 struct svm_range_bo *svm_bo; 381 382 svm_bo = container_of(kref, struct svm_range_bo, kref); 383 pr_debug("svm_bo 0x%p\n", svm_bo); 384 385 spin_lock(&svm_bo->list_lock); 386 while (!list_empty(&svm_bo->range_list)) { 387 struct svm_range *prange = 388 list_first_entry(&svm_bo->range_list, 389 struct svm_range, svm_bo_list); 390 /* list_del_init tells a concurrent svm_range_vram_node_new when 391 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 392 */ 393 list_del_init(&prange->svm_bo_list); 394 spin_unlock(&svm_bo->list_lock); 395 396 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 397 prange->start, prange->last); 398 mutex_lock(&prange->lock); 399 prange->svm_bo = NULL; 400 /* prange should not hold vram page now */ 401 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 402 mutex_unlock(&prange->lock); 403 404 spin_lock(&svm_bo->list_lock); 405 } 406 spin_unlock(&svm_bo->list_lock); 407 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 408 /* We're not in the eviction worker. Signal the fence. */ 409 dma_fence_signal(&svm_bo->eviction_fence->base); 410 dma_fence_put(&svm_bo->eviction_fence->base); 411 amdgpu_bo_unref(&svm_bo->bo); 412 kfree(svm_bo); 413 } 414 415 static void svm_range_bo_wq_release(struct work_struct *work) 416 { 417 struct svm_range_bo *svm_bo; 418 419 svm_bo = container_of(work, struct svm_range_bo, release_work); 420 svm_range_bo_release(&svm_bo->kref); 421 } 422 423 static void svm_range_bo_release_async(struct kref *kref) 424 { 425 struct svm_range_bo *svm_bo; 426 427 svm_bo = container_of(kref, struct svm_range_bo, kref); 428 pr_debug("svm_bo 0x%p\n", svm_bo); 429 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 430 schedule_work(&svm_bo->release_work); 431 } 432 433 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 434 { 435 kref_put(&svm_bo->kref, svm_range_bo_release_async); 436 } 437 438 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 439 { 440 if (svm_bo) 441 kref_put(&svm_bo->kref, svm_range_bo_release); 442 } 443 444 static bool 445 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 446 { 447 mutex_lock(&prange->lock); 448 if (!prange->svm_bo) { 449 mutex_unlock(&prange->lock); 450 return false; 451 } 452 if (prange->ttm_res) { 453 /* We still have a reference, all is well */ 454 mutex_unlock(&prange->lock); 455 return true; 456 } 457 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 458 /* 459 * Migrate from GPU to GPU, remove range from source svm_bo->node 460 * range list, and return false to allocate svm_bo from destination 461 * node. 462 */ 463 if (prange->svm_bo->node != node) { 464 mutex_unlock(&prange->lock); 465 466 spin_lock(&prange->svm_bo->list_lock); 467 list_del_init(&prange->svm_bo_list); 468 spin_unlock(&prange->svm_bo->list_lock); 469 470 svm_range_bo_unref(prange->svm_bo); 471 return false; 472 } 473 if (READ_ONCE(prange->svm_bo->evicting)) { 474 struct dma_fence *f; 475 struct svm_range_bo *svm_bo; 476 /* The BO is getting evicted, 477 * we need to get a new one 478 */ 479 mutex_unlock(&prange->lock); 480 svm_bo = prange->svm_bo; 481 f = dma_fence_get(&svm_bo->eviction_fence->base); 482 svm_range_bo_unref(prange->svm_bo); 483 /* wait for the fence to avoid long spin-loop 484 * at list_empty_careful 485 */ 486 dma_fence_wait(f, false); 487 dma_fence_put(f); 488 } else { 489 /* The BO was still around and we got 490 * a new reference to it 491 */ 492 mutex_unlock(&prange->lock); 493 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 494 prange->svms, prange->start, prange->last); 495 496 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 497 return true; 498 } 499 500 } else { 501 mutex_unlock(&prange->lock); 502 } 503 504 /* We need a new svm_bo. Spin-loop to wait for concurrent 505 * svm_range_bo_release to finish removing this range from 506 * its range list and set prange->svm_bo to null. After this, 507 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 508 */ 509 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 510 cond_resched(); 511 512 return false; 513 } 514 515 static struct svm_range_bo *svm_range_bo_new(void) 516 { 517 struct svm_range_bo *svm_bo; 518 519 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 520 if (!svm_bo) 521 return NULL; 522 523 kref_init(&svm_bo->kref); 524 INIT_LIST_HEAD(&svm_bo->range_list); 525 spin_lock_init(&svm_bo->list_lock); 526 527 return svm_bo; 528 } 529 530 int 531 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 532 bool clear) 533 { 534 struct amdgpu_bo_param bp; 535 struct svm_range_bo *svm_bo; 536 struct amdgpu_bo_user *ubo; 537 struct amdgpu_bo *bo; 538 struct kfd_process *p; 539 struct mm_struct *mm; 540 int r; 541 542 p = container_of(prange->svms, struct kfd_process, svms); 543 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 544 prange->start, prange->last); 545 546 if (svm_range_validate_svm_bo(node, prange)) 547 return 0; 548 549 svm_bo = svm_range_bo_new(); 550 if (!svm_bo) { 551 pr_debug("failed to alloc svm bo\n"); 552 return -ENOMEM; 553 } 554 mm = get_task_mm(p->lead_thread); 555 if (!mm) { 556 pr_debug("failed to get mm\n"); 557 kfree(svm_bo); 558 return -ESRCH; 559 } 560 svm_bo->node = node; 561 svm_bo->eviction_fence = 562 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 563 mm, 564 svm_bo); 565 mmput(mm); 566 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 567 svm_bo->evicting = 0; 568 memset(&bp, 0, sizeof(bp)); 569 bp.size = prange->npages * PAGE_SIZE; 570 bp.byte_align = PAGE_SIZE; 571 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 572 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 573 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 574 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 575 bp.type = ttm_bo_type_device; 576 bp.resv = NULL; 577 if (node->xcp) 578 bp.xcp_id_plus1 = node->xcp->id + 1; 579 580 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 581 if (r) { 582 pr_debug("failed %d to create bo\n", r); 583 goto create_bo_failed; 584 } 585 bo = &ubo->bo; 586 587 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 588 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 589 bp.xcp_id_plus1 - 1); 590 591 r = amdgpu_bo_reserve(bo, true); 592 if (r) { 593 pr_debug("failed %d to reserve bo\n", r); 594 goto reserve_bo_failed; 595 } 596 597 if (clear) { 598 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 599 if (r) { 600 pr_debug("failed %d to sync bo\n", r); 601 amdgpu_bo_unreserve(bo); 602 goto reserve_bo_failed; 603 } 604 } 605 606 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 607 if (r) { 608 pr_debug("failed %d to reserve bo\n", r); 609 amdgpu_bo_unreserve(bo); 610 goto reserve_bo_failed; 611 } 612 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 613 614 amdgpu_bo_unreserve(bo); 615 616 svm_bo->bo = bo; 617 prange->svm_bo = svm_bo; 618 prange->ttm_res = bo->tbo.resource; 619 prange->offset = 0; 620 621 spin_lock(&svm_bo->list_lock); 622 list_add(&prange->svm_bo_list, &svm_bo->range_list); 623 spin_unlock(&svm_bo->list_lock); 624 625 return 0; 626 627 reserve_bo_failed: 628 amdgpu_bo_unref(&bo); 629 create_bo_failed: 630 dma_fence_put(&svm_bo->eviction_fence->base); 631 kfree(svm_bo); 632 prange->ttm_res = NULL; 633 634 return r; 635 } 636 637 void svm_range_vram_node_free(struct svm_range *prange) 638 { 639 /* serialize prange->svm_bo unref */ 640 mutex_lock(&prange->lock); 641 /* prange->svm_bo has not been unref */ 642 if (prange->ttm_res) { 643 prange->ttm_res = NULL; 644 mutex_unlock(&prange->lock); 645 svm_range_bo_unref(prange->svm_bo); 646 } else 647 mutex_unlock(&prange->lock); 648 } 649 650 struct kfd_node * 651 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 652 { 653 struct kfd_process *p; 654 struct kfd_process_device *pdd; 655 656 p = container_of(prange->svms, struct kfd_process, svms); 657 pdd = kfd_process_device_data_by_id(p, gpu_id); 658 if (!pdd) { 659 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 660 return NULL; 661 } 662 663 return pdd->dev; 664 } 665 666 struct kfd_process_device * 667 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 668 { 669 struct kfd_process *p; 670 671 p = container_of(prange->svms, struct kfd_process, svms); 672 673 return kfd_get_process_device_data(node, p); 674 } 675 676 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 677 { 678 struct ttm_operation_ctx ctx = { false, false }; 679 680 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 681 682 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 683 } 684 685 static int 686 svm_range_check_attr(struct kfd_process *p, 687 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 688 { 689 uint32_t i; 690 691 for (i = 0; i < nattr; i++) { 692 uint32_t val = attrs[i].value; 693 int gpuidx = MAX_GPU_INSTANCE; 694 695 switch (attrs[i].type) { 696 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 697 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 698 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 699 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 700 break; 701 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 702 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 703 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 704 break; 705 case KFD_IOCTL_SVM_ATTR_ACCESS: 706 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 707 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 708 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 709 break; 710 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 711 break; 712 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 713 break; 714 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 715 break; 716 default: 717 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 718 return -EINVAL; 719 } 720 721 if (gpuidx < 0) { 722 pr_debug("no GPU 0x%x found\n", val); 723 return -EINVAL; 724 } else if (gpuidx < MAX_GPU_INSTANCE && 725 !test_bit(gpuidx, p->svms.bitmap_supported)) { 726 pr_debug("GPU 0x%x not supported\n", val); 727 return -EINVAL; 728 } 729 } 730 731 return 0; 732 } 733 734 static void 735 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 736 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 737 bool *update_mapping) 738 { 739 uint32_t i; 740 int gpuidx; 741 742 for (i = 0; i < nattr; i++) { 743 switch (attrs[i].type) { 744 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 745 prange->preferred_loc = attrs[i].value; 746 break; 747 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 748 prange->prefetch_loc = attrs[i].value; 749 break; 750 case KFD_IOCTL_SVM_ATTR_ACCESS: 751 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 752 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 753 if (!p->xnack_enabled) 754 *update_mapping = true; 755 756 gpuidx = kfd_process_gpuidx_from_gpuid(p, 757 attrs[i].value); 758 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 759 bitmap_clear(prange->bitmap_access, gpuidx, 1); 760 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 761 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 762 bitmap_set(prange->bitmap_access, gpuidx, 1); 763 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 764 } else { 765 bitmap_clear(prange->bitmap_access, gpuidx, 1); 766 bitmap_set(prange->bitmap_aip, gpuidx, 1); 767 } 768 break; 769 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 770 *update_mapping = true; 771 prange->flags |= attrs[i].value; 772 break; 773 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 774 *update_mapping = true; 775 prange->flags &= ~attrs[i].value; 776 break; 777 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 778 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 779 break; 780 default: 781 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 782 } 783 } 784 } 785 786 static bool 787 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 788 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 789 { 790 uint32_t i; 791 int gpuidx; 792 793 for (i = 0; i < nattr; i++) { 794 switch (attrs[i].type) { 795 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 796 if (prange->preferred_loc != attrs[i].value) 797 return false; 798 break; 799 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 800 /* Prefetch should always trigger a migration even 801 * if the value of the attribute didn't change. 802 */ 803 return false; 804 case KFD_IOCTL_SVM_ATTR_ACCESS: 805 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 806 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 807 gpuidx = kfd_process_gpuidx_from_gpuid(p, 808 attrs[i].value); 809 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 810 if (test_bit(gpuidx, prange->bitmap_access) || 811 test_bit(gpuidx, prange->bitmap_aip)) 812 return false; 813 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 814 if (!test_bit(gpuidx, prange->bitmap_access)) 815 return false; 816 } else { 817 if (!test_bit(gpuidx, prange->bitmap_aip)) 818 return false; 819 } 820 break; 821 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 822 if ((prange->flags & attrs[i].value) != attrs[i].value) 823 return false; 824 break; 825 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 826 if ((prange->flags & attrs[i].value) != 0) 827 return false; 828 break; 829 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 830 if (prange->granularity != attrs[i].value) 831 return false; 832 break; 833 default: 834 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 835 } 836 } 837 838 return true; 839 } 840 841 /** 842 * svm_range_debug_dump - print all range information from svms 843 * @svms: svm range list header 844 * 845 * debug output svm range start, end, prefetch location from svms 846 * interval tree and link list 847 * 848 * Context: The caller must hold svms->lock 849 */ 850 static void svm_range_debug_dump(struct svm_range_list *svms) 851 { 852 struct interval_tree_node *node; 853 struct svm_range *prange; 854 855 pr_debug("dump svms 0x%p list\n", svms); 856 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 857 858 list_for_each_entry(prange, &svms->list, list) { 859 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 860 prange, prange->start, prange->npages, 861 prange->start + prange->npages - 1, 862 prange->actual_loc); 863 } 864 865 pr_debug("dump svms 0x%p interval tree\n", svms); 866 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 867 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 868 while (node) { 869 prange = container_of(node, struct svm_range, it_node); 870 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 871 prange, prange->start, prange->npages, 872 prange->start + prange->npages - 1, 873 prange->actual_loc); 874 node = interval_tree_iter_next(node, 0, ~0ULL); 875 } 876 } 877 878 static void * 879 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 880 uint64_t offset, uint64_t *vram_pages) 881 { 882 unsigned char *src = (unsigned char *)psrc + offset; 883 unsigned char *dst; 884 uint64_t i; 885 886 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 887 if (!dst) 888 return NULL; 889 890 if (!vram_pages) { 891 memcpy(dst, src, num_elements * size); 892 return (void *)dst; 893 } 894 895 *vram_pages = 0; 896 for (i = 0; i < num_elements; i++) { 897 dma_addr_t *temp; 898 temp = (dma_addr_t *)dst + i; 899 *temp = *((dma_addr_t *)src + i); 900 if (*temp&SVM_RANGE_VRAM_DOMAIN) 901 (*vram_pages)++; 902 } 903 904 return (void *)dst; 905 } 906 907 static int 908 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 909 { 910 int i; 911 912 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 913 if (!src->dma_addr[i]) 914 continue; 915 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 916 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 917 if (!dst->dma_addr[i]) 918 return -ENOMEM; 919 } 920 921 return 0; 922 } 923 924 static int 925 svm_range_split_array(void *ppnew, void *ppold, size_t size, 926 uint64_t old_start, uint64_t old_n, 927 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 928 { 929 unsigned char *new, *old, *pold; 930 uint64_t d; 931 932 if (!ppold) 933 return 0; 934 pold = *(unsigned char **)ppold; 935 if (!pold) 936 return 0; 937 938 d = (new_start - old_start) * size; 939 /* get dma addr array for new range and calculte its vram page number */ 940 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 941 if (!new) 942 return -ENOMEM; 943 d = (new_start == old_start) ? new_n * size : 0; 944 old = svm_range_copy_array(pold, size, old_n, d, NULL); 945 if (!old) { 946 kvfree(new); 947 return -ENOMEM; 948 } 949 kvfree(pold); 950 *(void **)ppold = old; 951 *(void **)ppnew = new; 952 953 return 0; 954 } 955 956 static int 957 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 958 uint64_t start, uint64_t last) 959 { 960 uint64_t npages = last - start + 1; 961 int i, r; 962 963 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 964 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 965 sizeof(*old->dma_addr[i]), old->start, 966 npages, new->start, new->npages, 967 old->actual_loc ? &new->vram_pages : NULL); 968 if (r) 969 return r; 970 } 971 if (old->actual_loc) 972 old->vram_pages -= new->vram_pages; 973 974 return 0; 975 } 976 977 static int 978 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 979 uint64_t start, uint64_t last) 980 { 981 uint64_t npages = last - start + 1; 982 983 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 984 new->svms, new, new->start, start, last); 985 986 if (new->start == old->start) { 987 new->offset = old->offset; 988 old->offset += new->npages; 989 } else { 990 new->offset = old->offset + npages; 991 } 992 993 new->svm_bo = svm_range_bo_ref(old->svm_bo); 994 new->ttm_res = old->ttm_res; 995 996 spin_lock(&new->svm_bo->list_lock); 997 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 998 spin_unlock(&new->svm_bo->list_lock); 999 1000 return 0; 1001 } 1002 1003 /** 1004 * svm_range_split_adjust - split range and adjust 1005 * 1006 * @new: new range 1007 * @old: the old range 1008 * @start: the old range adjust to start address in pages 1009 * @last: the old range adjust to last address in pages 1010 * 1011 * Copy system memory dma_addr or vram ttm_res in old range to new 1012 * range from new_start up to size new->npages, the remaining old range is from 1013 * start to last 1014 * 1015 * Return: 1016 * 0 - OK, -ENOMEM - out of memory 1017 */ 1018 static int 1019 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1020 uint64_t start, uint64_t last) 1021 { 1022 int r; 1023 1024 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1025 new->svms, new->start, old->start, old->last, start, last); 1026 1027 if (new->start < old->start || 1028 new->last > old->last) { 1029 WARN_ONCE(1, "invalid new range start or last\n"); 1030 return -EINVAL; 1031 } 1032 1033 r = svm_range_split_pages(new, old, start, last); 1034 if (r) 1035 return r; 1036 1037 if (old->actual_loc && old->ttm_res) { 1038 r = svm_range_split_nodes(new, old, start, last); 1039 if (r) 1040 return r; 1041 } 1042 1043 old->npages = last - start + 1; 1044 old->start = start; 1045 old->last = last; 1046 new->flags = old->flags; 1047 new->preferred_loc = old->preferred_loc; 1048 new->prefetch_loc = old->prefetch_loc; 1049 new->actual_loc = old->actual_loc; 1050 new->granularity = old->granularity; 1051 new->mapped_to_gpu = old->mapped_to_gpu; 1052 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1053 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1054 1055 return 0; 1056 } 1057 1058 /** 1059 * svm_range_split - split a range in 2 ranges 1060 * 1061 * @prange: the svm range to split 1062 * @start: the remaining range start address in pages 1063 * @last: the remaining range last address in pages 1064 * @new: the result new range generated 1065 * 1066 * Two cases only: 1067 * case 1: if start == prange->start 1068 * prange ==> prange[start, last] 1069 * new range [last + 1, prange->last] 1070 * 1071 * case 2: if last == prange->last 1072 * prange ==> prange[start, last] 1073 * new range [prange->start, start - 1] 1074 * 1075 * Return: 1076 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1077 */ 1078 static int 1079 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1080 struct svm_range **new) 1081 { 1082 uint64_t old_start = prange->start; 1083 uint64_t old_last = prange->last; 1084 struct svm_range_list *svms; 1085 int r = 0; 1086 1087 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1088 old_start, old_last, start, last); 1089 1090 if (old_start != start && old_last != last) 1091 return -EINVAL; 1092 if (start < old_start || last > old_last) 1093 return -EINVAL; 1094 1095 svms = prange->svms; 1096 if (old_start == start) 1097 *new = svm_range_new(svms, last + 1, old_last, false); 1098 else 1099 *new = svm_range_new(svms, old_start, start - 1, false); 1100 if (!*new) 1101 return -ENOMEM; 1102 1103 r = svm_range_split_adjust(*new, prange, start, last); 1104 if (r) { 1105 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1106 r, old_start, old_last, start, last); 1107 svm_range_free(*new, false); 1108 *new = NULL; 1109 } 1110 1111 return r; 1112 } 1113 1114 static int 1115 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1116 struct list_head *insert_list, struct list_head *remap_list) 1117 { 1118 struct svm_range *tail = NULL; 1119 int r = svm_range_split(prange, prange->start, new_last, &tail); 1120 1121 if (!r) { 1122 list_add(&tail->list, insert_list); 1123 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1124 list_add(&tail->update_list, remap_list); 1125 } 1126 return r; 1127 } 1128 1129 static int 1130 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1131 struct list_head *insert_list, struct list_head *remap_list) 1132 { 1133 struct svm_range *head = NULL; 1134 int r = svm_range_split(prange, new_start, prange->last, &head); 1135 1136 if (!r) { 1137 list_add(&head->list, insert_list); 1138 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1139 list_add(&head->update_list, remap_list); 1140 } 1141 return r; 1142 } 1143 1144 static void 1145 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1146 struct svm_range *pchild, enum svm_work_list_ops op) 1147 { 1148 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1149 pchild, pchild->start, pchild->last, prange, op); 1150 1151 pchild->work_item.mm = mm; 1152 pchild->work_item.op = op; 1153 list_add_tail(&pchild->child_list, &prange->child_list); 1154 } 1155 1156 static bool 1157 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1158 { 1159 return (node_a->adev == node_b->adev || 1160 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1161 } 1162 1163 static uint64_t 1164 svm_range_get_pte_flags(struct kfd_node *node, 1165 struct svm_range *prange, int domain) 1166 { 1167 struct kfd_node *bo_node; 1168 uint32_t flags = prange->flags; 1169 uint32_t mapping_flags = 0; 1170 uint64_t pte_flags; 1171 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1172 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1173 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1174 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1175 unsigned int mtype_local; 1176 1177 if (domain == SVM_RANGE_VRAM_DOMAIN) 1178 bo_node = prange->svm_bo->node; 1179 1180 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1181 case IP_VERSION(9, 4, 1): 1182 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1183 if (bo_node == node) { 1184 mapping_flags |= coherent ? 1185 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1186 } else { 1187 mapping_flags |= coherent ? 1188 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1189 if (svm_nodes_in_same_hive(node, bo_node)) 1190 snoop = true; 1191 } 1192 } else { 1193 mapping_flags |= coherent ? 1194 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1195 } 1196 break; 1197 case IP_VERSION(9, 4, 2): 1198 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1199 if (bo_node == node) { 1200 mapping_flags |= coherent ? 1201 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1202 if (node->adev->gmc.xgmi.connected_to_cpu) 1203 snoop = true; 1204 } else { 1205 mapping_flags |= coherent ? 1206 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1207 if (svm_nodes_in_same_hive(node, bo_node)) 1208 snoop = true; 1209 } 1210 } else { 1211 mapping_flags |= coherent ? 1212 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1213 } 1214 break; 1215 case IP_VERSION(9, 4, 3): 1216 if (ext_coherent) 1217 mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC; 1218 else 1219 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1220 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1221 snoop = true; 1222 if (uncached) { 1223 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1224 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1225 /* local HBM region close to partition */ 1226 if (bo_node->adev == node->adev && 1227 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1228 mapping_flags |= mtype_local; 1229 /* local HBM region far from partition or remote XGMI GPU 1230 * with regular system scope coherence 1231 */ 1232 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1233 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1234 /* PCIe P2P or extended system scope coherence */ 1235 else 1236 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1237 /* system memory accessed by the APU */ 1238 } else if (node->adev->flags & AMD_IS_APU) { 1239 /* On NUMA systems, locality is determined per-page 1240 * in amdgpu_gmc_override_vm_pte_flags 1241 */ 1242 if (num_possible_nodes() <= 1) 1243 mapping_flags |= mtype_local; 1244 else 1245 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1246 /* system memory accessed by the dGPU */ 1247 } else { 1248 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1249 } 1250 break; 1251 default: 1252 mapping_flags |= coherent ? 1253 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1254 } 1255 1256 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1257 1258 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1259 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1260 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1261 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1262 1263 pte_flags = AMDGPU_PTE_VALID; 1264 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1265 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1266 1267 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1268 return pte_flags; 1269 } 1270 1271 static int 1272 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1273 uint64_t start, uint64_t last, 1274 struct dma_fence **fence) 1275 { 1276 uint64_t init_pte_value = 0; 1277 1278 pr_debug("[0x%llx 0x%llx]\n", start, last); 1279 1280 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1281 last, init_pte_value, 0, 0, NULL, NULL, 1282 fence); 1283 } 1284 1285 static int 1286 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1287 unsigned long last, uint32_t trigger) 1288 { 1289 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1290 struct kfd_process_device *pdd; 1291 struct dma_fence *fence = NULL; 1292 struct kfd_process *p; 1293 uint32_t gpuidx; 1294 int r = 0; 1295 1296 if (!prange->mapped_to_gpu) { 1297 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1298 prange, prange->start, prange->last); 1299 return 0; 1300 } 1301 1302 if (prange->start == start && prange->last == last) { 1303 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1304 prange->mapped_to_gpu = false; 1305 } 1306 1307 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1308 MAX_GPU_INSTANCE); 1309 p = container_of(prange->svms, struct kfd_process, svms); 1310 1311 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1312 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1313 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1314 if (!pdd) { 1315 pr_debug("failed to find device idx %d\n", gpuidx); 1316 return -EINVAL; 1317 } 1318 1319 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1320 start, last, trigger); 1321 1322 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1323 drm_priv_to_vm(pdd->drm_priv), 1324 start, last, &fence); 1325 if (r) 1326 break; 1327 1328 if (fence) { 1329 r = dma_fence_wait(fence, false); 1330 dma_fence_put(fence); 1331 fence = NULL; 1332 if (r) 1333 break; 1334 } 1335 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1336 } 1337 1338 return r; 1339 } 1340 1341 static int 1342 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1343 unsigned long offset, unsigned long npages, bool readonly, 1344 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1345 struct dma_fence **fence, bool flush_tlb) 1346 { 1347 struct amdgpu_device *adev = pdd->dev->adev; 1348 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1349 uint64_t pte_flags; 1350 unsigned long last_start; 1351 int last_domain; 1352 int r = 0; 1353 int64_t i, j; 1354 1355 last_start = prange->start + offset; 1356 1357 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1358 last_start, last_start + npages - 1, readonly); 1359 1360 for (i = offset; i < offset + npages; i++) { 1361 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1362 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1363 1364 /* Collect all pages in the same address range and memory domain 1365 * that can be mapped with a single call to update mapping. 1366 */ 1367 if (i < offset + npages - 1 && 1368 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1369 continue; 1370 1371 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1372 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1373 1374 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1375 if (readonly) 1376 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1377 1378 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1379 prange->svms, last_start, prange->start + i, 1380 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1381 pte_flags); 1382 1383 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1384 * different memory partition based on fpfn/lpfn, we should use 1385 * same vm_manager.vram_base_offset regardless memory partition. 1386 */ 1387 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1388 NULL, last_start, prange->start + i, 1389 pte_flags, 1390 (last_start - prange->start) << PAGE_SHIFT, 1391 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1392 NULL, dma_addr, &vm->last_update); 1393 1394 for (j = last_start - prange->start; j <= i; j++) 1395 dma_addr[j] |= last_domain; 1396 1397 if (r) { 1398 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1399 goto out; 1400 } 1401 last_start = prange->start + i + 1; 1402 } 1403 1404 r = amdgpu_vm_update_pdes(adev, vm, false); 1405 if (r) { 1406 pr_debug("failed %d to update directories 0x%lx\n", r, 1407 prange->start); 1408 goto out; 1409 } 1410 1411 if (fence) 1412 *fence = dma_fence_get(vm->last_update); 1413 1414 out: 1415 return r; 1416 } 1417 1418 static int 1419 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1420 unsigned long npages, bool readonly, 1421 unsigned long *bitmap, bool wait, bool flush_tlb) 1422 { 1423 struct kfd_process_device *pdd; 1424 struct amdgpu_device *bo_adev = NULL; 1425 struct kfd_process *p; 1426 struct dma_fence *fence = NULL; 1427 uint32_t gpuidx; 1428 int r = 0; 1429 1430 if (prange->svm_bo && prange->ttm_res) 1431 bo_adev = prange->svm_bo->node->adev; 1432 1433 p = container_of(prange->svms, struct kfd_process, svms); 1434 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1435 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1436 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1437 if (!pdd) { 1438 pr_debug("failed to find device idx %d\n", gpuidx); 1439 return -EINVAL; 1440 } 1441 1442 pdd = kfd_bind_process_to_device(pdd->dev, p); 1443 if (IS_ERR(pdd)) 1444 return -EINVAL; 1445 1446 if (bo_adev && pdd->dev->adev != bo_adev && 1447 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1448 pr_debug("cannot map to device idx %d\n", gpuidx); 1449 continue; 1450 } 1451 1452 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1453 prange->dma_addr[gpuidx], 1454 bo_adev, wait ? &fence : NULL, 1455 flush_tlb); 1456 if (r) 1457 break; 1458 1459 if (fence) { 1460 r = dma_fence_wait(fence, false); 1461 dma_fence_put(fence); 1462 fence = NULL; 1463 if (r) { 1464 pr_debug("failed %d to dma fence wait\n", r); 1465 break; 1466 } 1467 } 1468 1469 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1470 } 1471 1472 return r; 1473 } 1474 1475 struct svm_validate_context { 1476 struct kfd_process *process; 1477 struct svm_range *prange; 1478 bool intr; 1479 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1480 struct drm_exec exec; 1481 }; 1482 1483 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1484 { 1485 struct kfd_process_device *pdd; 1486 struct amdgpu_vm *vm; 1487 uint32_t gpuidx; 1488 int r; 1489 1490 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1491 drm_exec_until_all_locked(&ctx->exec) { 1492 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1493 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1494 if (!pdd) { 1495 pr_debug("failed to find device idx %d\n", gpuidx); 1496 r = -EINVAL; 1497 goto unreserve_out; 1498 } 1499 vm = drm_priv_to_vm(pdd->drm_priv); 1500 1501 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1502 drm_exec_retry_on_contention(&ctx->exec); 1503 if (unlikely(r)) { 1504 pr_debug("failed %d to reserve bo\n", r); 1505 goto unreserve_out; 1506 } 1507 } 1508 } 1509 1510 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1511 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1512 if (!pdd) { 1513 pr_debug("failed to find device idx %d\n", gpuidx); 1514 r = -EINVAL; 1515 goto unreserve_out; 1516 } 1517 1518 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1519 drm_priv_to_vm(pdd->drm_priv), 1520 svm_range_bo_validate, NULL); 1521 if (r) { 1522 pr_debug("failed %d validate pt bos\n", r); 1523 goto unreserve_out; 1524 } 1525 } 1526 1527 return 0; 1528 1529 unreserve_out: 1530 drm_exec_fini(&ctx->exec); 1531 return r; 1532 } 1533 1534 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1535 { 1536 drm_exec_fini(&ctx->exec); 1537 } 1538 1539 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1540 { 1541 struct kfd_process_device *pdd; 1542 1543 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1544 if (!pdd) 1545 return NULL; 1546 1547 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1548 } 1549 1550 /* 1551 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1552 * 1553 * To prevent concurrent destruction or change of range attributes, the 1554 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1555 * because that would block concurrent evictions and lead to deadlocks. To 1556 * serialize concurrent migrations or validations of the same range, the 1557 * prange->migrate_mutex must be held. 1558 * 1559 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1560 * eviction fence. 1561 * 1562 * The following sequence ensures race-free validation and GPU mapping: 1563 * 1564 * 1. Reserve page table (and SVM BO if range is in VRAM) 1565 * 2. hmm_range_fault to get page addresses (if system memory) 1566 * 3. DMA-map pages (if system memory) 1567 * 4-a. Take notifier lock 1568 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1569 * 4-c. Check that the range was not split or otherwise invalidated 1570 * 4-d. Update GPU page table 1571 * 4.e. Release notifier lock 1572 * 5. Release page table (and SVM BO) reservation 1573 */ 1574 static int svm_range_validate_and_map(struct mm_struct *mm, 1575 unsigned long map_start, unsigned long map_last, 1576 struct svm_range *prange, int32_t gpuidx, 1577 bool intr, bool wait, bool flush_tlb) 1578 { 1579 struct svm_validate_context *ctx; 1580 unsigned long start, end, addr; 1581 struct kfd_process *p; 1582 void *owner; 1583 int32_t idx; 1584 int r = 0; 1585 1586 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1587 if (!ctx) 1588 return -ENOMEM; 1589 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1590 ctx->prange = prange; 1591 ctx->intr = intr; 1592 1593 if (gpuidx < MAX_GPU_INSTANCE) { 1594 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1595 bitmap_set(ctx->bitmap, gpuidx, 1); 1596 } else if (ctx->process->xnack_enabled) { 1597 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1598 1599 /* If prefetch range to GPU, or GPU retry fault migrate range to 1600 * GPU, which has ACCESS attribute to the range, create mapping 1601 * on that GPU. 1602 */ 1603 if (prange->actual_loc) { 1604 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1605 prange->actual_loc); 1606 if (gpuidx < 0) { 1607 WARN_ONCE(1, "failed get device by id 0x%x\n", 1608 prange->actual_loc); 1609 r = -EINVAL; 1610 goto free_ctx; 1611 } 1612 if (test_bit(gpuidx, prange->bitmap_access)) 1613 bitmap_set(ctx->bitmap, gpuidx, 1); 1614 } 1615 1616 /* 1617 * If prange is already mapped or with always mapped flag, 1618 * update mapping on GPUs with ACCESS attribute 1619 */ 1620 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1621 if (prange->mapped_to_gpu || 1622 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1623 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1624 } 1625 } else { 1626 bitmap_or(ctx->bitmap, prange->bitmap_access, 1627 prange->bitmap_aip, MAX_GPU_INSTANCE); 1628 } 1629 1630 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1631 r = 0; 1632 goto free_ctx; 1633 } 1634 1635 if (prange->actual_loc && !prange->ttm_res) { 1636 /* This should never happen. actual_loc gets set by 1637 * svm_migrate_ram_to_vram after allocating a BO. 1638 */ 1639 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1640 r = -EINVAL; 1641 goto free_ctx; 1642 } 1643 1644 svm_range_reserve_bos(ctx, intr); 1645 1646 p = container_of(prange->svms, struct kfd_process, svms); 1647 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1648 MAX_GPU_INSTANCE)); 1649 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1650 if (kfd_svm_page_owner(p, idx) != owner) { 1651 owner = NULL; 1652 break; 1653 } 1654 } 1655 1656 start = map_start << PAGE_SHIFT; 1657 end = (map_last + 1) << PAGE_SHIFT; 1658 for (addr = start; !r && addr < end; ) { 1659 struct hmm_range *hmm_range; 1660 unsigned long map_start_vma; 1661 unsigned long map_last_vma; 1662 struct vm_area_struct *vma; 1663 unsigned long next = 0; 1664 unsigned long offset; 1665 unsigned long npages; 1666 bool readonly; 1667 1668 vma = vma_lookup(mm, addr); 1669 if (vma) { 1670 readonly = !(vma->vm_flags & VM_WRITE); 1671 1672 next = min(vma->vm_end, end); 1673 npages = (next - addr) >> PAGE_SHIFT; 1674 WRITE_ONCE(p->svms.faulting_task, current); 1675 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1676 readonly, owner, NULL, 1677 &hmm_range); 1678 WRITE_ONCE(p->svms.faulting_task, NULL); 1679 if (r) { 1680 pr_debug("failed %d to get svm range pages\n", r); 1681 if (r == -EBUSY) 1682 r = -EAGAIN; 1683 } 1684 } else { 1685 r = -EFAULT; 1686 } 1687 1688 if (!r) { 1689 offset = (addr >> PAGE_SHIFT) - prange->start; 1690 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1691 hmm_range->hmm_pfns); 1692 if (r) 1693 pr_debug("failed %d to dma map range\n", r); 1694 } 1695 1696 svm_range_lock(prange); 1697 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { 1698 pr_debug("hmm update the range, need validate again\n"); 1699 r = -EAGAIN; 1700 } 1701 1702 if (!r && !list_empty(&prange->child_list)) { 1703 pr_debug("range split by unmap in parallel, validate again\n"); 1704 r = -EAGAIN; 1705 } 1706 1707 if (!r) { 1708 map_start_vma = max(map_start, prange->start + offset); 1709 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1710 if (map_start_vma <= map_last_vma) { 1711 offset = map_start_vma - prange->start; 1712 npages = map_last_vma - map_start_vma + 1; 1713 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1714 ctx->bitmap, wait, flush_tlb); 1715 } 1716 } 1717 1718 if (!r && next == end) 1719 prange->mapped_to_gpu = true; 1720 1721 svm_range_unlock(prange); 1722 1723 addr = next; 1724 } 1725 1726 svm_range_unreserve_bos(ctx); 1727 if (!r) 1728 prange->validate_timestamp = ktime_get_boottime(); 1729 1730 free_ctx: 1731 kfree(ctx); 1732 1733 return r; 1734 } 1735 1736 /** 1737 * svm_range_list_lock_and_flush_work - flush pending deferred work 1738 * 1739 * @svms: the svm range list 1740 * @mm: the mm structure 1741 * 1742 * Context: Returns with mmap write lock held, pending deferred work flushed 1743 * 1744 */ 1745 void 1746 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1747 struct mm_struct *mm) 1748 { 1749 retry_flush_work: 1750 flush_work(&svms->deferred_list_work); 1751 mmap_write_lock(mm); 1752 1753 if (list_empty(&svms->deferred_range_list)) 1754 return; 1755 mmap_write_unlock(mm); 1756 pr_debug("retry flush\n"); 1757 goto retry_flush_work; 1758 } 1759 1760 static void svm_range_restore_work(struct work_struct *work) 1761 { 1762 struct delayed_work *dwork = to_delayed_work(work); 1763 struct amdkfd_process_info *process_info; 1764 struct svm_range_list *svms; 1765 struct svm_range *prange; 1766 struct kfd_process *p; 1767 struct mm_struct *mm; 1768 int evicted_ranges; 1769 int invalid; 1770 int r; 1771 1772 svms = container_of(dwork, struct svm_range_list, restore_work); 1773 evicted_ranges = atomic_read(&svms->evicted_ranges); 1774 if (!evicted_ranges) 1775 return; 1776 1777 pr_debug("restore svm ranges\n"); 1778 1779 p = container_of(svms, struct kfd_process, svms); 1780 process_info = p->kgd_process_info; 1781 1782 /* Keep mm reference when svm_range_validate_and_map ranges */ 1783 mm = get_task_mm(p->lead_thread); 1784 if (!mm) { 1785 pr_debug("svms 0x%p process mm gone\n", svms); 1786 return; 1787 } 1788 1789 mutex_lock(&process_info->lock); 1790 svm_range_list_lock_and_flush_work(svms, mm); 1791 mutex_lock(&svms->lock); 1792 1793 evicted_ranges = atomic_read(&svms->evicted_ranges); 1794 1795 list_for_each_entry(prange, &svms->list, list) { 1796 invalid = atomic_read(&prange->invalid); 1797 if (!invalid) 1798 continue; 1799 1800 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1801 prange->svms, prange, prange->start, prange->last, 1802 invalid); 1803 1804 /* 1805 * If range is migrating, wait for migration is done. 1806 */ 1807 mutex_lock(&prange->migrate_mutex); 1808 1809 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1810 MAX_GPU_INSTANCE, false, true, false); 1811 if (r) 1812 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1813 prange->start); 1814 1815 mutex_unlock(&prange->migrate_mutex); 1816 if (r) 1817 goto out_reschedule; 1818 1819 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1820 goto out_reschedule; 1821 } 1822 1823 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1824 evicted_ranges) 1825 goto out_reschedule; 1826 1827 evicted_ranges = 0; 1828 1829 r = kgd2kfd_resume_mm(mm); 1830 if (r) { 1831 /* No recovery from this failure. Probably the CP is 1832 * hanging. No point trying again. 1833 */ 1834 pr_debug("failed %d to resume KFD\n", r); 1835 } 1836 1837 pr_debug("restore svm ranges successfully\n"); 1838 1839 out_reschedule: 1840 mutex_unlock(&svms->lock); 1841 mmap_write_unlock(mm); 1842 mutex_unlock(&process_info->lock); 1843 1844 /* If validation failed, reschedule another attempt */ 1845 if (evicted_ranges) { 1846 pr_debug("reschedule to restore svm range\n"); 1847 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1848 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1849 1850 kfd_smi_event_queue_restore_rescheduled(mm); 1851 } 1852 mmput(mm); 1853 } 1854 1855 /** 1856 * svm_range_evict - evict svm range 1857 * @prange: svm range structure 1858 * @mm: current process mm_struct 1859 * @start: starting process queue number 1860 * @last: last process queue number 1861 * @event: mmu notifier event when range is evicted or migrated 1862 * 1863 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1864 * return to let CPU evict the buffer and proceed CPU pagetable update. 1865 * 1866 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1867 * If invalidation happens while restore work is running, restore work will 1868 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1869 * the queues. 1870 */ 1871 static int 1872 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1873 unsigned long start, unsigned long last, 1874 enum mmu_notifier_event event) 1875 { 1876 struct svm_range_list *svms = prange->svms; 1877 struct svm_range *pchild; 1878 struct kfd_process *p; 1879 int r = 0; 1880 1881 p = container_of(svms, struct kfd_process, svms); 1882 1883 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1884 svms, prange->start, prange->last, start, last); 1885 1886 if (!p->xnack_enabled || 1887 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1888 int evicted_ranges; 1889 bool mapped = prange->mapped_to_gpu; 1890 1891 list_for_each_entry(pchild, &prange->child_list, child_list) { 1892 if (!pchild->mapped_to_gpu) 1893 continue; 1894 mapped = true; 1895 mutex_lock_nested(&pchild->lock, 1); 1896 if (pchild->start <= last && pchild->last >= start) { 1897 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1898 pchild->start, pchild->last); 1899 atomic_inc(&pchild->invalid); 1900 } 1901 mutex_unlock(&pchild->lock); 1902 } 1903 1904 if (!mapped) 1905 return r; 1906 1907 if (prange->start <= last && prange->last >= start) 1908 atomic_inc(&prange->invalid); 1909 1910 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1911 if (evicted_ranges != 1) 1912 return r; 1913 1914 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1915 prange->svms, prange->start, prange->last); 1916 1917 /* First eviction, stop the queues */ 1918 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1919 if (r) 1920 pr_debug("failed to quiesce KFD\n"); 1921 1922 pr_debug("schedule to restore svm %p ranges\n", svms); 1923 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1924 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1925 } else { 1926 unsigned long s, l; 1927 uint32_t trigger; 1928 1929 if (event == MMU_NOTIFY_MIGRATE) 1930 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1931 else 1932 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1933 1934 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1935 prange->svms, start, last); 1936 list_for_each_entry(pchild, &prange->child_list, child_list) { 1937 mutex_lock_nested(&pchild->lock, 1); 1938 s = max(start, pchild->start); 1939 l = min(last, pchild->last); 1940 if (l >= s) 1941 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1942 mutex_unlock(&pchild->lock); 1943 } 1944 s = max(start, prange->start); 1945 l = min(last, prange->last); 1946 if (l >= s) 1947 svm_range_unmap_from_gpus(prange, s, l, trigger); 1948 } 1949 1950 return r; 1951 } 1952 1953 static struct svm_range *svm_range_clone(struct svm_range *old) 1954 { 1955 struct svm_range *new; 1956 1957 new = svm_range_new(old->svms, old->start, old->last, false); 1958 if (!new) 1959 return NULL; 1960 if (svm_range_copy_dma_addrs(new, old)) { 1961 svm_range_free(new, false); 1962 return NULL; 1963 } 1964 if (old->svm_bo) { 1965 new->ttm_res = old->ttm_res; 1966 new->offset = old->offset; 1967 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1968 spin_lock(&new->svm_bo->list_lock); 1969 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1970 spin_unlock(&new->svm_bo->list_lock); 1971 } 1972 new->flags = old->flags; 1973 new->preferred_loc = old->preferred_loc; 1974 new->prefetch_loc = old->prefetch_loc; 1975 new->actual_loc = old->actual_loc; 1976 new->granularity = old->granularity; 1977 new->mapped_to_gpu = old->mapped_to_gpu; 1978 new->vram_pages = old->vram_pages; 1979 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1980 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1981 1982 return new; 1983 } 1984 1985 void svm_range_set_max_pages(struct amdgpu_device *adev) 1986 { 1987 uint64_t max_pages; 1988 uint64_t pages, _pages; 1989 uint64_t min_pages = 0; 1990 int i, id; 1991 1992 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 1993 if (adev->kfd.dev->nodes[i]->xcp) 1994 id = adev->kfd.dev->nodes[i]->xcp->id; 1995 else 1996 id = -1; 1997 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 1998 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 1999 pages = rounddown_pow_of_two(pages); 2000 min_pages = min_not_zero(min_pages, pages); 2001 } 2002 2003 do { 2004 max_pages = READ_ONCE(max_svm_range_pages); 2005 _pages = min_not_zero(max_pages, min_pages); 2006 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2007 } 2008 2009 static int 2010 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2011 uint64_t max_pages, struct list_head *insert_list, 2012 struct list_head *update_list) 2013 { 2014 struct svm_range *prange; 2015 uint64_t l; 2016 2017 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2018 max_pages, start, last); 2019 2020 while (last >= start) { 2021 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2022 2023 prange = svm_range_new(svms, start, l, true); 2024 if (!prange) 2025 return -ENOMEM; 2026 list_add(&prange->list, insert_list); 2027 list_add(&prange->update_list, update_list); 2028 2029 start = l + 1; 2030 } 2031 return 0; 2032 } 2033 2034 /** 2035 * svm_range_add - add svm range and handle overlap 2036 * @p: the range add to this process svms 2037 * @start: page size aligned 2038 * @size: page size aligned 2039 * @nattr: number of attributes 2040 * @attrs: array of attributes 2041 * @update_list: output, the ranges need validate and update GPU mapping 2042 * @insert_list: output, the ranges need insert to svms 2043 * @remove_list: output, the ranges are replaced and need remove from svms 2044 * @remap_list: output, remap unaligned svm ranges 2045 * 2046 * Check if the virtual address range has overlap with any existing ranges, 2047 * split partly overlapping ranges and add new ranges in the gaps. All changes 2048 * should be applied to the range_list and interval tree transactionally. If 2049 * any range split or allocation fails, the entire update fails. Therefore any 2050 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2051 * unchanged. 2052 * 2053 * If the transaction succeeds, the caller can update and insert clones and 2054 * new ranges, then free the originals. 2055 * 2056 * Otherwise the caller can free the clones and new ranges, while the old 2057 * svm_ranges remain unchanged. 2058 * 2059 * Context: Process context, caller must hold svms->lock 2060 * 2061 * Return: 2062 * 0 - OK, otherwise error code 2063 */ 2064 static int 2065 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2066 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2067 struct list_head *update_list, struct list_head *insert_list, 2068 struct list_head *remove_list, struct list_head *remap_list) 2069 { 2070 unsigned long last = start + size - 1UL; 2071 struct svm_range_list *svms = &p->svms; 2072 struct interval_tree_node *node; 2073 struct svm_range *prange; 2074 struct svm_range *tmp; 2075 struct list_head new_list; 2076 int r = 0; 2077 2078 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2079 2080 INIT_LIST_HEAD(update_list); 2081 INIT_LIST_HEAD(insert_list); 2082 INIT_LIST_HEAD(remove_list); 2083 INIT_LIST_HEAD(&new_list); 2084 INIT_LIST_HEAD(remap_list); 2085 2086 node = interval_tree_iter_first(&svms->objects, start, last); 2087 while (node) { 2088 struct interval_tree_node *next; 2089 unsigned long next_start; 2090 2091 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2092 node->last); 2093 2094 prange = container_of(node, struct svm_range, it_node); 2095 next = interval_tree_iter_next(node, start, last); 2096 next_start = min(node->last, last) + 1; 2097 2098 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2099 prange->mapped_to_gpu) { 2100 /* nothing to do */ 2101 } else if (node->start < start || node->last > last) { 2102 /* node intersects the update range and its attributes 2103 * will change. Clone and split it, apply updates only 2104 * to the overlapping part 2105 */ 2106 struct svm_range *old = prange; 2107 2108 prange = svm_range_clone(old); 2109 if (!prange) { 2110 r = -ENOMEM; 2111 goto out; 2112 } 2113 2114 list_add(&old->update_list, remove_list); 2115 list_add(&prange->list, insert_list); 2116 list_add(&prange->update_list, update_list); 2117 2118 if (node->start < start) { 2119 pr_debug("change old range start\n"); 2120 r = svm_range_split_head(prange, start, 2121 insert_list, remap_list); 2122 if (r) 2123 goto out; 2124 } 2125 if (node->last > last) { 2126 pr_debug("change old range last\n"); 2127 r = svm_range_split_tail(prange, last, 2128 insert_list, remap_list); 2129 if (r) 2130 goto out; 2131 } 2132 } else { 2133 /* The node is contained within start..last, 2134 * just update it 2135 */ 2136 list_add(&prange->update_list, update_list); 2137 } 2138 2139 /* insert a new node if needed */ 2140 if (node->start > start) { 2141 r = svm_range_split_new(svms, start, node->start - 1, 2142 READ_ONCE(max_svm_range_pages), 2143 &new_list, update_list); 2144 if (r) 2145 goto out; 2146 } 2147 2148 node = next; 2149 start = next_start; 2150 } 2151 2152 /* add a final range at the end if needed */ 2153 if (start <= last) 2154 r = svm_range_split_new(svms, start, last, 2155 READ_ONCE(max_svm_range_pages), 2156 &new_list, update_list); 2157 2158 out: 2159 if (r) { 2160 list_for_each_entry_safe(prange, tmp, insert_list, list) 2161 svm_range_free(prange, false); 2162 list_for_each_entry_safe(prange, tmp, &new_list, list) 2163 svm_range_free(prange, true); 2164 } else { 2165 list_splice(&new_list, insert_list); 2166 } 2167 2168 return r; 2169 } 2170 2171 static void 2172 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2173 struct svm_range *prange) 2174 { 2175 unsigned long start; 2176 unsigned long last; 2177 2178 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2179 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2180 2181 if (prange->start == start && prange->last == last) 2182 return; 2183 2184 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2185 prange->svms, prange, start, last, prange->start, 2186 prange->last); 2187 2188 if (start != 0 && last != 0) { 2189 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2190 svm_range_remove_notifier(prange); 2191 } 2192 prange->it_node.start = prange->start; 2193 prange->it_node.last = prange->last; 2194 2195 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2196 svm_range_add_notifier_locked(mm, prange); 2197 } 2198 2199 static void 2200 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2201 struct mm_struct *mm) 2202 { 2203 switch (prange->work_item.op) { 2204 case SVM_OP_NULL: 2205 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2206 svms, prange, prange->start, prange->last); 2207 break; 2208 case SVM_OP_UNMAP_RANGE: 2209 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2210 svms, prange, prange->start, prange->last); 2211 svm_range_unlink(prange); 2212 svm_range_remove_notifier(prange); 2213 svm_range_free(prange, true); 2214 break; 2215 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2216 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2217 svms, prange, prange->start, prange->last); 2218 svm_range_update_notifier_and_interval_tree(mm, prange); 2219 break; 2220 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2221 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2222 svms, prange, prange->start, prange->last); 2223 svm_range_update_notifier_and_interval_tree(mm, prange); 2224 /* TODO: implement deferred validation and mapping */ 2225 break; 2226 case SVM_OP_ADD_RANGE: 2227 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2228 prange->start, prange->last); 2229 svm_range_add_to_svms(prange); 2230 svm_range_add_notifier_locked(mm, prange); 2231 break; 2232 case SVM_OP_ADD_RANGE_AND_MAP: 2233 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2234 prange, prange->start, prange->last); 2235 svm_range_add_to_svms(prange); 2236 svm_range_add_notifier_locked(mm, prange); 2237 /* TODO: implement deferred validation and mapping */ 2238 break; 2239 default: 2240 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2241 prange->work_item.op); 2242 } 2243 } 2244 2245 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2246 { 2247 struct kfd_process_device *pdd; 2248 struct kfd_process *p; 2249 int drain; 2250 uint32_t i; 2251 2252 p = container_of(svms, struct kfd_process, svms); 2253 2254 restart: 2255 drain = atomic_read(&svms->drain_pagefaults); 2256 if (!drain) 2257 return; 2258 2259 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2260 pdd = p->pdds[i]; 2261 if (!pdd) 2262 continue; 2263 2264 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2265 2266 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2267 pdd->dev->adev->irq.retry_cam_enabled ? 2268 &pdd->dev->adev->irq.ih : 2269 &pdd->dev->adev->irq.ih1); 2270 2271 if (pdd->dev->adev->irq.retry_cam_enabled) 2272 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2273 &pdd->dev->adev->irq.ih_soft); 2274 2275 2276 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2277 } 2278 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2279 goto restart; 2280 } 2281 2282 static void svm_range_deferred_list_work(struct work_struct *work) 2283 { 2284 struct svm_range_list *svms; 2285 struct svm_range *prange; 2286 struct mm_struct *mm; 2287 2288 svms = container_of(work, struct svm_range_list, deferred_list_work); 2289 pr_debug("enter svms 0x%p\n", svms); 2290 2291 spin_lock(&svms->deferred_list_lock); 2292 while (!list_empty(&svms->deferred_range_list)) { 2293 prange = list_first_entry(&svms->deferred_range_list, 2294 struct svm_range, deferred_list); 2295 spin_unlock(&svms->deferred_list_lock); 2296 2297 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2298 prange->start, prange->last, prange->work_item.op); 2299 2300 mm = prange->work_item.mm; 2301 retry: 2302 mmap_write_lock(mm); 2303 2304 /* Checking for the need to drain retry faults must be inside 2305 * mmap write lock to serialize with munmap notifiers. 2306 */ 2307 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2308 mmap_write_unlock(mm); 2309 svm_range_drain_retry_fault(svms); 2310 goto retry; 2311 } 2312 2313 /* Remove from deferred_list must be inside mmap write lock, for 2314 * two race cases: 2315 * 1. unmap_from_cpu may change work_item.op and add the range 2316 * to deferred_list again, cause use after free bug. 2317 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2318 * lock and continue because deferred_list is empty, but 2319 * deferred_list work is actually waiting for mmap lock. 2320 */ 2321 spin_lock(&svms->deferred_list_lock); 2322 list_del_init(&prange->deferred_list); 2323 spin_unlock(&svms->deferred_list_lock); 2324 2325 mutex_lock(&svms->lock); 2326 mutex_lock(&prange->migrate_mutex); 2327 while (!list_empty(&prange->child_list)) { 2328 struct svm_range *pchild; 2329 2330 pchild = list_first_entry(&prange->child_list, 2331 struct svm_range, child_list); 2332 pr_debug("child prange 0x%p op %d\n", pchild, 2333 pchild->work_item.op); 2334 list_del_init(&pchild->child_list); 2335 svm_range_handle_list_op(svms, pchild, mm); 2336 } 2337 mutex_unlock(&prange->migrate_mutex); 2338 2339 svm_range_handle_list_op(svms, prange, mm); 2340 mutex_unlock(&svms->lock); 2341 mmap_write_unlock(mm); 2342 2343 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2344 * last mm refcount, schedule release work to avoid circular locking 2345 */ 2346 mmput_async(mm); 2347 2348 spin_lock(&svms->deferred_list_lock); 2349 } 2350 spin_unlock(&svms->deferred_list_lock); 2351 pr_debug("exit svms 0x%p\n", svms); 2352 } 2353 2354 void 2355 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2356 struct mm_struct *mm, enum svm_work_list_ops op) 2357 { 2358 spin_lock(&svms->deferred_list_lock); 2359 /* if prange is on the deferred list */ 2360 if (!list_empty(&prange->deferred_list)) { 2361 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2362 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2363 if (op != SVM_OP_NULL && 2364 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2365 prange->work_item.op = op; 2366 } else { 2367 prange->work_item.op = op; 2368 2369 /* Pairs with mmput in deferred_list_work */ 2370 mmget(mm); 2371 prange->work_item.mm = mm; 2372 list_add_tail(&prange->deferred_list, 2373 &prange->svms->deferred_range_list); 2374 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2375 prange, prange->start, prange->last, op); 2376 } 2377 spin_unlock(&svms->deferred_list_lock); 2378 } 2379 2380 void schedule_deferred_list_work(struct svm_range_list *svms) 2381 { 2382 spin_lock(&svms->deferred_list_lock); 2383 if (!list_empty(&svms->deferred_range_list)) 2384 schedule_work(&svms->deferred_list_work); 2385 spin_unlock(&svms->deferred_list_lock); 2386 } 2387 2388 static void 2389 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2390 struct svm_range *prange, unsigned long start, 2391 unsigned long last) 2392 { 2393 struct svm_range *head; 2394 struct svm_range *tail; 2395 2396 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2397 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2398 prange->start, prange->last); 2399 return; 2400 } 2401 if (start > prange->last || last < prange->start) 2402 return; 2403 2404 head = tail = prange; 2405 if (start > prange->start) 2406 svm_range_split(prange, prange->start, start - 1, &tail); 2407 if (last < tail->last) 2408 svm_range_split(tail, last + 1, tail->last, &head); 2409 2410 if (head != prange && tail != prange) { 2411 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2412 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2413 } else if (tail != prange) { 2414 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2415 } else if (head != prange) { 2416 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2417 } else if (parent != prange) { 2418 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2419 } 2420 } 2421 2422 static void 2423 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2424 unsigned long start, unsigned long last) 2425 { 2426 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2427 struct svm_range_list *svms; 2428 struct svm_range *pchild; 2429 struct kfd_process *p; 2430 unsigned long s, l; 2431 bool unmap_parent; 2432 2433 p = kfd_lookup_process_by_mm(mm); 2434 if (!p) 2435 return; 2436 svms = &p->svms; 2437 2438 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2439 prange, prange->start, prange->last, start, last); 2440 2441 /* Make sure pending page faults are drained in the deferred worker 2442 * before the range is freed to avoid straggler interrupts on 2443 * unmapped memory causing "phantom faults". 2444 */ 2445 atomic_inc(&svms->drain_pagefaults); 2446 2447 unmap_parent = start <= prange->start && last >= prange->last; 2448 2449 list_for_each_entry(pchild, &prange->child_list, child_list) { 2450 mutex_lock_nested(&pchild->lock, 1); 2451 s = max(start, pchild->start); 2452 l = min(last, pchild->last); 2453 if (l >= s) 2454 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2455 svm_range_unmap_split(mm, prange, pchild, start, last); 2456 mutex_unlock(&pchild->lock); 2457 } 2458 s = max(start, prange->start); 2459 l = min(last, prange->last); 2460 if (l >= s) 2461 svm_range_unmap_from_gpus(prange, s, l, trigger); 2462 svm_range_unmap_split(mm, prange, prange, start, last); 2463 2464 if (unmap_parent) 2465 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2466 else 2467 svm_range_add_list_work(svms, prange, mm, 2468 SVM_OP_UPDATE_RANGE_NOTIFIER); 2469 schedule_deferred_list_work(svms); 2470 2471 kfd_unref_process(p); 2472 } 2473 2474 /** 2475 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2476 * @mni: mmu_interval_notifier struct 2477 * @range: mmu_notifier_range struct 2478 * @cur_seq: value to pass to mmu_interval_set_seq() 2479 * 2480 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2481 * is from migration, or CPU page invalidation callback. 2482 * 2483 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2484 * work thread, and split prange if only part of prange is unmapped. 2485 * 2486 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2487 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2488 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2489 * update GPU mapping to recover. 2490 * 2491 * Context: mmap lock, notifier_invalidate_start lock are held 2492 * for invalidate event, prange lock is held if this is from migration 2493 */ 2494 static bool 2495 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2496 const struct mmu_notifier_range *range, 2497 unsigned long cur_seq) 2498 { 2499 struct svm_range *prange; 2500 unsigned long start; 2501 unsigned long last; 2502 2503 if (range->event == MMU_NOTIFY_RELEASE) 2504 return true; 2505 if (!mmget_not_zero(mni->mm)) 2506 return true; 2507 2508 start = mni->interval_tree.start; 2509 last = mni->interval_tree.last; 2510 start = max(start, range->start) >> PAGE_SHIFT; 2511 last = min(last, range->end - 1) >> PAGE_SHIFT; 2512 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2513 start, last, range->start >> PAGE_SHIFT, 2514 (range->end - 1) >> PAGE_SHIFT, 2515 mni->interval_tree.start >> PAGE_SHIFT, 2516 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2517 2518 prange = container_of(mni, struct svm_range, notifier); 2519 2520 svm_range_lock(prange); 2521 mmu_interval_set_seq(mni, cur_seq); 2522 2523 switch (range->event) { 2524 case MMU_NOTIFY_UNMAP: 2525 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2526 break; 2527 default: 2528 svm_range_evict(prange, mni->mm, start, last, range->event); 2529 break; 2530 } 2531 2532 svm_range_unlock(prange); 2533 mmput(mni->mm); 2534 2535 return true; 2536 } 2537 2538 /** 2539 * svm_range_from_addr - find svm range from fault address 2540 * @svms: svm range list header 2541 * @addr: address to search range interval tree, in pages 2542 * @parent: parent range if range is on child list 2543 * 2544 * Context: The caller must hold svms->lock 2545 * 2546 * Return: the svm_range found or NULL 2547 */ 2548 struct svm_range * 2549 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2550 struct svm_range **parent) 2551 { 2552 struct interval_tree_node *node; 2553 struct svm_range *prange; 2554 struct svm_range *pchild; 2555 2556 node = interval_tree_iter_first(&svms->objects, addr, addr); 2557 if (!node) 2558 return NULL; 2559 2560 prange = container_of(node, struct svm_range, it_node); 2561 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2562 addr, prange->start, prange->last, node->start, node->last); 2563 2564 if (addr >= prange->start && addr <= prange->last) { 2565 if (parent) 2566 *parent = prange; 2567 return prange; 2568 } 2569 list_for_each_entry(pchild, &prange->child_list, child_list) 2570 if (addr >= pchild->start && addr <= pchild->last) { 2571 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2572 addr, pchild->start, pchild->last); 2573 if (parent) 2574 *parent = prange; 2575 return pchild; 2576 } 2577 2578 return NULL; 2579 } 2580 2581 /* svm_range_best_restore_location - decide the best fault restore location 2582 * @prange: svm range structure 2583 * @adev: the GPU on which vm fault happened 2584 * 2585 * This is only called when xnack is on, to decide the best location to restore 2586 * the range mapping after GPU vm fault. Caller uses the best location to do 2587 * migration if actual loc is not best location, then update GPU page table 2588 * mapping to the best location. 2589 * 2590 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2591 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2592 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2593 * if range actual loc is cpu, best_loc is cpu 2594 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2595 * range actual loc. 2596 * Otherwise, GPU no access, best_loc is -1. 2597 * 2598 * Return: 2599 * -1 means vm fault GPU no access 2600 * 0 for CPU or GPU id 2601 */ 2602 static int32_t 2603 svm_range_best_restore_location(struct svm_range *prange, 2604 struct kfd_node *node, 2605 int32_t *gpuidx) 2606 { 2607 struct kfd_node *bo_node, *preferred_node; 2608 struct kfd_process *p; 2609 uint32_t gpuid; 2610 int r; 2611 2612 p = container_of(prange->svms, struct kfd_process, svms); 2613 2614 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2615 if (r < 0) { 2616 pr_debug("failed to get gpuid from kgd\n"); 2617 return -1; 2618 } 2619 2620 if (node->adev->gmc.is_app_apu) 2621 return 0; 2622 2623 if (prange->preferred_loc == gpuid || 2624 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2625 return prange->preferred_loc; 2626 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2627 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2628 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2629 return prange->preferred_loc; 2630 /* fall through */ 2631 } 2632 2633 if (test_bit(*gpuidx, prange->bitmap_access)) 2634 return gpuid; 2635 2636 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2637 if (!prange->actual_loc) 2638 return 0; 2639 2640 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2641 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2642 return prange->actual_loc; 2643 else 2644 return 0; 2645 } 2646 2647 return -1; 2648 } 2649 2650 static int 2651 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2652 unsigned long *start, unsigned long *last, 2653 bool *is_heap_stack) 2654 { 2655 struct vm_area_struct *vma; 2656 struct interval_tree_node *node; 2657 struct rb_node *rb_node; 2658 unsigned long start_limit, end_limit; 2659 2660 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2661 if (!vma) { 2662 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2663 return -EFAULT; 2664 } 2665 2666 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2667 2668 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2669 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2670 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2671 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2672 /* First range that starts after the fault address */ 2673 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2674 if (node) { 2675 end_limit = min(end_limit, node->start); 2676 /* Last range that ends before the fault address */ 2677 rb_node = rb_prev(&node->rb); 2678 } else { 2679 /* Last range must end before addr because 2680 * there was no range after addr 2681 */ 2682 rb_node = rb_last(&p->svms.objects.rb_root); 2683 } 2684 if (rb_node) { 2685 node = container_of(rb_node, struct interval_tree_node, rb); 2686 if (node->last >= addr) { 2687 WARN(1, "Overlap with prev node and page fault addr\n"); 2688 return -EFAULT; 2689 } 2690 start_limit = max(start_limit, node->last + 1); 2691 } 2692 2693 *start = start_limit; 2694 *last = end_limit - 1; 2695 2696 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2697 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2698 *start, *last, *is_heap_stack); 2699 2700 return 0; 2701 } 2702 2703 static int 2704 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2705 uint64_t *bo_s, uint64_t *bo_l) 2706 { 2707 struct amdgpu_bo_va_mapping *mapping; 2708 struct interval_tree_node *node; 2709 struct amdgpu_bo *bo = NULL; 2710 unsigned long userptr; 2711 uint32_t i; 2712 int r; 2713 2714 for (i = 0; i < p->n_pdds; i++) { 2715 struct amdgpu_vm *vm; 2716 2717 if (!p->pdds[i]->drm_priv) 2718 continue; 2719 2720 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2721 r = amdgpu_bo_reserve(vm->root.bo, false); 2722 if (r) 2723 return r; 2724 2725 /* Check userptr by searching entire vm->va interval tree */ 2726 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2727 while (node) { 2728 mapping = container_of((struct rb_node *)node, 2729 struct amdgpu_bo_va_mapping, rb); 2730 bo = mapping->bo_va->base.bo; 2731 2732 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2733 start << PAGE_SHIFT, 2734 last << PAGE_SHIFT, 2735 &userptr)) { 2736 node = interval_tree_iter_next(node, 0, ~0ULL); 2737 continue; 2738 } 2739 2740 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2741 start, last); 2742 if (bo_s && bo_l) { 2743 *bo_s = userptr >> PAGE_SHIFT; 2744 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2745 } 2746 amdgpu_bo_unreserve(vm->root.bo); 2747 return -EADDRINUSE; 2748 } 2749 amdgpu_bo_unreserve(vm->root.bo); 2750 } 2751 return 0; 2752 } 2753 2754 static struct 2755 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2756 struct kfd_process *p, 2757 struct mm_struct *mm, 2758 int64_t addr) 2759 { 2760 struct svm_range *prange = NULL; 2761 unsigned long start, last; 2762 uint32_t gpuid, gpuidx; 2763 bool is_heap_stack; 2764 uint64_t bo_s = 0; 2765 uint64_t bo_l = 0; 2766 int r; 2767 2768 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2769 &is_heap_stack)) 2770 return NULL; 2771 2772 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2773 if (r != -EADDRINUSE) 2774 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2775 2776 if (r == -EADDRINUSE) { 2777 if (addr >= bo_s && addr <= bo_l) 2778 return NULL; 2779 2780 /* Create one page svm range if 2MB range overlapping */ 2781 start = addr; 2782 last = addr; 2783 } 2784 2785 prange = svm_range_new(&p->svms, start, last, true); 2786 if (!prange) { 2787 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2788 return NULL; 2789 } 2790 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2791 pr_debug("failed to get gpuid from kgd\n"); 2792 svm_range_free(prange, true); 2793 return NULL; 2794 } 2795 2796 if (is_heap_stack) 2797 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2798 2799 svm_range_add_to_svms(prange); 2800 svm_range_add_notifier_locked(mm, prange); 2801 2802 return prange; 2803 } 2804 2805 /* svm_range_skip_recover - decide if prange can be recovered 2806 * @prange: svm range structure 2807 * 2808 * GPU vm retry fault handle skip recover the range for cases: 2809 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2810 * deferred list work will drain the stale fault before free the prange. 2811 * 2. prange is on deferred list to add interval notifier after split, or 2812 * 3. prange is child range, it is split from parent prange, recover later 2813 * after interval notifier is added. 2814 * 2815 * Return: true to skip recover, false to recover 2816 */ 2817 static bool svm_range_skip_recover(struct svm_range *prange) 2818 { 2819 struct svm_range_list *svms = prange->svms; 2820 2821 spin_lock(&svms->deferred_list_lock); 2822 if (list_empty(&prange->deferred_list) && 2823 list_empty(&prange->child_list)) { 2824 spin_unlock(&svms->deferred_list_lock); 2825 return false; 2826 } 2827 spin_unlock(&svms->deferred_list_lock); 2828 2829 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2830 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2831 svms, prange, prange->start, prange->last); 2832 return true; 2833 } 2834 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2835 prange->work_item.op == SVM_OP_ADD_RANGE) { 2836 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2837 svms, prange, prange->start, prange->last); 2838 return true; 2839 } 2840 return false; 2841 } 2842 2843 static void 2844 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2845 int32_t gpuidx) 2846 { 2847 struct kfd_process_device *pdd; 2848 2849 /* fault is on different page of same range 2850 * or fault is skipped to recover later 2851 * or fault is on invalid virtual address 2852 */ 2853 if (gpuidx == MAX_GPU_INSTANCE) { 2854 uint32_t gpuid; 2855 int r; 2856 2857 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2858 if (r < 0) 2859 return; 2860 } 2861 2862 /* fault is recovered 2863 * or fault cannot recover because GPU no access on the range 2864 */ 2865 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2866 if (pdd) 2867 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2868 } 2869 2870 static bool 2871 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2872 { 2873 unsigned long requested = VM_READ; 2874 2875 if (write_fault) 2876 requested |= VM_WRITE; 2877 2878 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2879 vma->vm_flags); 2880 return (vma->vm_flags & requested) == requested; 2881 } 2882 2883 int 2884 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2885 uint32_t vmid, uint32_t node_id, 2886 uint64_t addr, bool write_fault) 2887 { 2888 unsigned long start, last, size; 2889 struct mm_struct *mm = NULL; 2890 struct svm_range_list *svms; 2891 struct svm_range *prange; 2892 struct kfd_process *p; 2893 ktime_t timestamp = ktime_get_boottime(); 2894 struct kfd_node *node; 2895 int32_t best_loc; 2896 int32_t gpuidx = MAX_GPU_INSTANCE; 2897 bool write_locked = false; 2898 struct vm_area_struct *vma; 2899 bool migration = false; 2900 int r = 0; 2901 2902 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2903 pr_debug("device does not support SVM\n"); 2904 return -EFAULT; 2905 } 2906 2907 p = kfd_lookup_process_by_pasid(pasid); 2908 if (!p) { 2909 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2910 return 0; 2911 } 2912 svms = &p->svms; 2913 2914 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2915 2916 if (atomic_read(&svms->drain_pagefaults)) { 2917 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2918 r = 0; 2919 goto out; 2920 } 2921 2922 if (!p->xnack_enabled) { 2923 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2924 r = -EFAULT; 2925 goto out; 2926 } 2927 2928 /* p->lead_thread is available as kfd_process_wq_release flush the work 2929 * before releasing task ref. 2930 */ 2931 mm = get_task_mm(p->lead_thread); 2932 if (!mm) { 2933 pr_debug("svms 0x%p failed to get mm\n", svms); 2934 r = 0; 2935 goto out; 2936 } 2937 2938 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2939 if (!node) { 2940 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2941 vmid); 2942 r = -EFAULT; 2943 goto out; 2944 } 2945 mmap_read_lock(mm); 2946 retry_write_locked: 2947 mutex_lock(&svms->lock); 2948 prange = svm_range_from_addr(svms, addr, NULL); 2949 if (!prange) { 2950 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2951 svms, addr); 2952 if (!write_locked) { 2953 /* Need the write lock to create new range with MMU notifier. 2954 * Also flush pending deferred work to make sure the interval 2955 * tree is up to date before we add a new range 2956 */ 2957 mutex_unlock(&svms->lock); 2958 mmap_read_unlock(mm); 2959 mmap_write_lock(mm); 2960 write_locked = true; 2961 goto retry_write_locked; 2962 } 2963 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2964 if (!prange) { 2965 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2966 svms, addr); 2967 mmap_write_downgrade(mm); 2968 r = -EFAULT; 2969 goto out_unlock_svms; 2970 } 2971 } 2972 if (write_locked) 2973 mmap_write_downgrade(mm); 2974 2975 mutex_lock(&prange->migrate_mutex); 2976 2977 if (svm_range_skip_recover(prange)) { 2978 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2979 r = 0; 2980 goto out_unlock_range; 2981 } 2982 2983 /* skip duplicate vm fault on different pages of same range */ 2984 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 2985 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 2986 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 2987 svms, prange->start, prange->last); 2988 r = 0; 2989 goto out_unlock_range; 2990 } 2991 2992 /* __do_munmap removed VMA, return success as we are handling stale 2993 * retry fault. 2994 */ 2995 vma = vma_lookup(mm, addr << PAGE_SHIFT); 2996 if (!vma) { 2997 pr_debug("address 0x%llx VMA is removed\n", addr); 2998 r = 0; 2999 goto out_unlock_range; 3000 } 3001 3002 if (!svm_fault_allowed(vma, write_fault)) { 3003 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3004 write_fault ? "write" : "read"); 3005 r = -EPERM; 3006 goto out_unlock_range; 3007 } 3008 3009 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3010 if (best_loc == -1) { 3011 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3012 svms, prange->start, prange->last); 3013 r = -EACCES; 3014 goto out_unlock_range; 3015 } 3016 3017 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3018 svms, prange->start, prange->last, best_loc, 3019 prange->actual_loc); 3020 3021 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3022 write_fault, timestamp); 3023 3024 /* Align migration range start and size to granularity size */ 3025 size = 1UL << prange->granularity; 3026 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3027 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3028 if (prange->actual_loc != 0 || best_loc != 0) { 3029 migration = true; 3030 3031 if (best_loc) { 3032 r = svm_migrate_to_vram(prange, best_loc, start, last, 3033 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3034 if (r) { 3035 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3036 r, addr); 3037 /* Fallback to system memory if migration to 3038 * VRAM failed 3039 */ 3040 if (prange->actual_loc && prange->actual_loc != best_loc) 3041 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3042 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3043 else 3044 r = 0; 3045 } 3046 } else { 3047 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3048 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3049 } 3050 if (r) { 3051 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3052 r, svms, start, last); 3053 goto out_unlock_range; 3054 } 3055 } 3056 3057 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3058 false, false); 3059 if (r) 3060 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3061 r, svms, start, last); 3062 3063 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3064 migration); 3065 3066 out_unlock_range: 3067 mutex_unlock(&prange->migrate_mutex); 3068 out_unlock_svms: 3069 mutex_unlock(&svms->lock); 3070 mmap_read_unlock(mm); 3071 3072 svm_range_count_fault(node, p, gpuidx); 3073 3074 mmput(mm); 3075 out: 3076 kfd_unref_process(p); 3077 3078 if (r == -EAGAIN) { 3079 pr_debug("recover vm fault later\n"); 3080 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3081 r = 0; 3082 } 3083 return r; 3084 } 3085 3086 int 3087 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3088 { 3089 struct svm_range *prange, *pchild; 3090 uint64_t reserved_size = 0; 3091 uint64_t size; 3092 int r = 0; 3093 3094 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3095 3096 mutex_lock(&p->svms.lock); 3097 3098 list_for_each_entry(prange, &p->svms.list, list) { 3099 svm_range_lock(prange); 3100 list_for_each_entry(pchild, &prange->child_list, child_list) { 3101 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3102 if (xnack_enabled) { 3103 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3104 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3105 } else { 3106 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3107 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3108 if (r) 3109 goto out_unlock; 3110 reserved_size += size; 3111 } 3112 } 3113 3114 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3115 if (xnack_enabled) { 3116 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3117 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3118 } else { 3119 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3120 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3121 if (r) 3122 goto out_unlock; 3123 reserved_size += size; 3124 } 3125 out_unlock: 3126 svm_range_unlock(prange); 3127 if (r) 3128 break; 3129 } 3130 3131 if (r) 3132 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3133 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3134 else 3135 /* Change xnack mode must be inside svms lock, to avoid race with 3136 * svm_range_deferred_list_work unreserve memory in parallel. 3137 */ 3138 p->xnack_enabled = xnack_enabled; 3139 3140 mutex_unlock(&p->svms.lock); 3141 return r; 3142 } 3143 3144 void svm_range_list_fini(struct kfd_process *p) 3145 { 3146 struct svm_range *prange; 3147 struct svm_range *next; 3148 3149 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3150 3151 cancel_delayed_work_sync(&p->svms.restore_work); 3152 3153 /* Ensure list work is finished before process is destroyed */ 3154 flush_work(&p->svms.deferred_list_work); 3155 3156 /* 3157 * Ensure no retry fault comes in afterwards, as page fault handler will 3158 * not find kfd process and take mm lock to recover fault. 3159 */ 3160 atomic_inc(&p->svms.drain_pagefaults); 3161 svm_range_drain_retry_fault(&p->svms); 3162 3163 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3164 svm_range_unlink(prange); 3165 svm_range_remove_notifier(prange); 3166 svm_range_free(prange, true); 3167 } 3168 3169 mutex_destroy(&p->svms.lock); 3170 3171 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3172 } 3173 3174 int svm_range_list_init(struct kfd_process *p) 3175 { 3176 struct svm_range_list *svms = &p->svms; 3177 int i; 3178 3179 svms->objects = RB_ROOT_CACHED; 3180 mutex_init(&svms->lock); 3181 INIT_LIST_HEAD(&svms->list); 3182 atomic_set(&svms->evicted_ranges, 0); 3183 atomic_set(&svms->drain_pagefaults, 0); 3184 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3185 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3186 INIT_LIST_HEAD(&svms->deferred_range_list); 3187 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3188 spin_lock_init(&svms->deferred_list_lock); 3189 3190 for (i = 0; i < p->n_pdds; i++) 3191 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3192 bitmap_set(svms->bitmap_supported, i, 1); 3193 3194 return 0; 3195 } 3196 3197 /** 3198 * svm_range_check_vm - check if virtual address range mapped already 3199 * @p: current kfd_process 3200 * @start: range start address, in pages 3201 * @last: range last address, in pages 3202 * @bo_s: mapping start address in pages if address range already mapped 3203 * @bo_l: mapping last address in pages if address range already mapped 3204 * 3205 * The purpose is to avoid virtual address ranges already allocated by 3206 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3207 * It looks for each pdd in the kfd_process. 3208 * 3209 * Context: Process context 3210 * 3211 * Return 0 - OK, if the range is not mapped. 3212 * Otherwise error code: 3213 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3214 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3215 * a signal. Release all buffer reservations and return to user-space. 3216 */ 3217 static int 3218 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3219 uint64_t *bo_s, uint64_t *bo_l) 3220 { 3221 struct amdgpu_bo_va_mapping *mapping; 3222 struct interval_tree_node *node; 3223 uint32_t i; 3224 int r; 3225 3226 for (i = 0; i < p->n_pdds; i++) { 3227 struct amdgpu_vm *vm; 3228 3229 if (!p->pdds[i]->drm_priv) 3230 continue; 3231 3232 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3233 r = amdgpu_bo_reserve(vm->root.bo, false); 3234 if (r) 3235 return r; 3236 3237 node = interval_tree_iter_first(&vm->va, start, last); 3238 if (node) { 3239 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3240 start, last); 3241 mapping = container_of((struct rb_node *)node, 3242 struct amdgpu_bo_va_mapping, rb); 3243 if (bo_s && bo_l) { 3244 *bo_s = mapping->start; 3245 *bo_l = mapping->last; 3246 } 3247 amdgpu_bo_unreserve(vm->root.bo); 3248 return -EADDRINUSE; 3249 } 3250 amdgpu_bo_unreserve(vm->root.bo); 3251 } 3252 3253 return 0; 3254 } 3255 3256 /** 3257 * svm_range_is_valid - check if virtual address range is valid 3258 * @p: current kfd_process 3259 * @start: range start address, in pages 3260 * @size: range size, in pages 3261 * 3262 * Valid virtual address range means it belongs to one or more VMAs 3263 * 3264 * Context: Process context 3265 * 3266 * Return: 3267 * 0 - OK, otherwise error code 3268 */ 3269 static int 3270 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3271 { 3272 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3273 struct vm_area_struct *vma; 3274 unsigned long end; 3275 unsigned long start_unchg = start; 3276 3277 start <<= PAGE_SHIFT; 3278 end = start + (size << PAGE_SHIFT); 3279 do { 3280 vma = vma_lookup(p->mm, start); 3281 if (!vma || (vma->vm_flags & device_vma)) 3282 return -EFAULT; 3283 start = min(end, vma->vm_end); 3284 } while (start < end); 3285 3286 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3287 NULL); 3288 } 3289 3290 /** 3291 * svm_range_best_prefetch_location - decide the best prefetch location 3292 * @prange: svm range structure 3293 * 3294 * For xnack off: 3295 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3296 * can be CPU or GPU. 3297 * 3298 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3299 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3300 * the best prefetch location is always CPU, because GPU can not have coherent 3301 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3302 * 3303 * For xnack on: 3304 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3305 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3306 * 3307 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3308 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3309 * prefetch location is always CPU. 3310 * 3311 * Context: Process context 3312 * 3313 * Return: 3314 * 0 for CPU or GPU id 3315 */ 3316 static uint32_t 3317 svm_range_best_prefetch_location(struct svm_range *prange) 3318 { 3319 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3320 uint32_t best_loc = prange->prefetch_loc; 3321 struct kfd_process_device *pdd; 3322 struct kfd_node *bo_node; 3323 struct kfd_process *p; 3324 uint32_t gpuidx; 3325 3326 p = container_of(prange->svms, struct kfd_process, svms); 3327 3328 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3329 goto out; 3330 3331 bo_node = svm_range_get_node_by_id(prange, best_loc); 3332 if (!bo_node) { 3333 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3334 best_loc = 0; 3335 goto out; 3336 } 3337 3338 if (bo_node->adev->gmc.is_app_apu) { 3339 best_loc = 0; 3340 goto out; 3341 } 3342 3343 if (p->xnack_enabled) 3344 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3345 else 3346 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3347 MAX_GPU_INSTANCE); 3348 3349 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3350 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3351 if (!pdd) { 3352 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3353 continue; 3354 } 3355 3356 if (pdd->dev->adev == bo_node->adev) 3357 continue; 3358 3359 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3360 best_loc = 0; 3361 break; 3362 } 3363 } 3364 3365 out: 3366 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3367 p->xnack_enabled, &p->svms, prange->start, prange->last, 3368 best_loc); 3369 3370 return best_loc; 3371 } 3372 3373 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3374 * @mm: current process mm_struct 3375 * @prange: svm range structure 3376 * @migrated: output, true if migration is triggered 3377 * 3378 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3379 * from ram to vram. 3380 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3381 * from vram to ram. 3382 * 3383 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3384 * and restore work: 3385 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3386 * stops all queues, schedule restore work 3387 * 2. svm_range_restore_work wait for migration is done by 3388 * a. svm_range_validate_vram takes prange->migrate_mutex 3389 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3390 * 3. restore work update mappings of GPU, resume all queues. 3391 * 3392 * Context: Process context 3393 * 3394 * Return: 3395 * 0 - OK, otherwise - error code of migration 3396 */ 3397 static int 3398 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3399 bool *migrated) 3400 { 3401 uint32_t best_loc; 3402 int r = 0; 3403 3404 *migrated = false; 3405 best_loc = svm_range_best_prefetch_location(prange); 3406 3407 /* when best_loc is a gpu node and same as prange->actual_loc 3408 * we still need do migration as prange->actual_loc !=0 does 3409 * not mean all pages in prange are vram. hmm migrate will pick 3410 * up right pages during migration. 3411 */ 3412 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3413 (best_loc == 0 && prange->actual_loc == 0)) 3414 return 0; 3415 3416 if (!best_loc) { 3417 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3418 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3419 *migrated = !r; 3420 return r; 3421 } 3422 3423 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3424 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3425 *migrated = !r; 3426 3427 return r; 3428 } 3429 3430 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3431 { 3432 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3433 * signaled yet and we're under the protection of the fence->lock. 3434 * After the fence is signaled in svm_range_bo_release, we cannot get 3435 * here any more. 3436 * 3437 * Reference is dropped in svm_range_evict_svm_bo_worker. 3438 */ 3439 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3440 WRITE_ONCE(fence->svm_bo->evicting, 1); 3441 schedule_work(&fence->svm_bo->eviction_work); 3442 } 3443 3444 return 0; 3445 } 3446 3447 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3448 { 3449 struct svm_range_bo *svm_bo; 3450 struct mm_struct *mm; 3451 int r = 0; 3452 3453 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3454 3455 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3456 mm = svm_bo->eviction_fence->mm; 3457 } else { 3458 svm_range_bo_unref(svm_bo); 3459 return; 3460 } 3461 3462 mmap_read_lock(mm); 3463 spin_lock(&svm_bo->list_lock); 3464 while (!list_empty(&svm_bo->range_list) && !r) { 3465 struct svm_range *prange = 3466 list_first_entry(&svm_bo->range_list, 3467 struct svm_range, svm_bo_list); 3468 int retries = 3; 3469 3470 list_del_init(&prange->svm_bo_list); 3471 spin_unlock(&svm_bo->list_lock); 3472 3473 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3474 prange->start, prange->last); 3475 3476 mutex_lock(&prange->migrate_mutex); 3477 do { 3478 /* migrate all vram pages in this prange to sys ram 3479 * after that prange->actual_loc should be zero 3480 */ 3481 r = svm_migrate_vram_to_ram(prange, mm, 3482 prange->start, prange->last, 3483 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3484 } while (!r && prange->actual_loc && --retries); 3485 3486 if (!r && prange->actual_loc) 3487 pr_info_once("Migration failed during eviction"); 3488 3489 if (!prange->actual_loc) { 3490 mutex_lock(&prange->lock); 3491 prange->svm_bo = NULL; 3492 mutex_unlock(&prange->lock); 3493 } 3494 mutex_unlock(&prange->migrate_mutex); 3495 3496 spin_lock(&svm_bo->list_lock); 3497 } 3498 spin_unlock(&svm_bo->list_lock); 3499 mmap_read_unlock(mm); 3500 mmput(mm); 3501 3502 dma_fence_signal(&svm_bo->eviction_fence->base); 3503 3504 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3505 * has been called in svm_migrate_vram_to_ram 3506 */ 3507 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3508 svm_range_bo_unref(svm_bo); 3509 } 3510 3511 static int 3512 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3513 uint64_t start, uint64_t size, uint32_t nattr, 3514 struct kfd_ioctl_svm_attribute *attrs) 3515 { 3516 struct amdkfd_process_info *process_info = p->kgd_process_info; 3517 struct list_head update_list; 3518 struct list_head insert_list; 3519 struct list_head remove_list; 3520 struct list_head remap_list; 3521 struct svm_range_list *svms; 3522 struct svm_range *prange; 3523 struct svm_range *next; 3524 bool update_mapping = false; 3525 bool flush_tlb; 3526 int r, ret = 0; 3527 3528 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3529 p->pasid, &p->svms, start, start + size - 1, size); 3530 3531 r = svm_range_check_attr(p, nattr, attrs); 3532 if (r) 3533 return r; 3534 3535 svms = &p->svms; 3536 3537 mutex_lock(&process_info->lock); 3538 3539 svm_range_list_lock_and_flush_work(svms, mm); 3540 3541 r = svm_range_is_valid(p, start, size); 3542 if (r) { 3543 pr_debug("invalid range r=%d\n", r); 3544 mmap_write_unlock(mm); 3545 goto out; 3546 } 3547 3548 mutex_lock(&svms->lock); 3549 3550 /* Add new range and split existing ranges as needed */ 3551 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3552 &insert_list, &remove_list, &remap_list); 3553 if (r) { 3554 mutex_unlock(&svms->lock); 3555 mmap_write_unlock(mm); 3556 goto out; 3557 } 3558 /* Apply changes as a transaction */ 3559 list_for_each_entry_safe(prange, next, &insert_list, list) { 3560 svm_range_add_to_svms(prange); 3561 svm_range_add_notifier_locked(mm, prange); 3562 } 3563 list_for_each_entry(prange, &update_list, update_list) { 3564 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3565 /* TODO: unmap ranges from GPU that lost access */ 3566 } 3567 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3568 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3569 prange->svms, prange, prange->start, 3570 prange->last); 3571 svm_range_unlink(prange); 3572 svm_range_remove_notifier(prange); 3573 svm_range_free(prange, false); 3574 } 3575 3576 mmap_write_downgrade(mm); 3577 /* Trigger migrations and revalidate and map to GPUs as needed. If 3578 * this fails we may be left with partially completed actions. There 3579 * is no clean way of rolling back to the previous state in such a 3580 * case because the rollback wouldn't be guaranteed to work either. 3581 */ 3582 list_for_each_entry(prange, &update_list, update_list) { 3583 bool migrated; 3584 3585 mutex_lock(&prange->migrate_mutex); 3586 3587 r = svm_range_trigger_migration(mm, prange, &migrated); 3588 if (r) 3589 goto out_unlock_range; 3590 3591 if (migrated && (!p->xnack_enabled || 3592 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3593 prange->mapped_to_gpu) { 3594 pr_debug("restore_work will update mappings of GPUs\n"); 3595 mutex_unlock(&prange->migrate_mutex); 3596 continue; 3597 } 3598 3599 if (!migrated && !update_mapping) { 3600 mutex_unlock(&prange->migrate_mutex); 3601 continue; 3602 } 3603 3604 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3605 3606 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3607 MAX_GPU_INSTANCE, true, true, flush_tlb); 3608 if (r) 3609 pr_debug("failed %d to map svm range\n", r); 3610 3611 out_unlock_range: 3612 mutex_unlock(&prange->migrate_mutex); 3613 if (r) 3614 ret = r; 3615 } 3616 3617 list_for_each_entry(prange, &remap_list, update_list) { 3618 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3619 prange, prange->start, prange->last); 3620 mutex_lock(&prange->migrate_mutex); 3621 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3622 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3623 if (r) 3624 pr_debug("failed %d on remap svm range\n", r); 3625 mutex_unlock(&prange->migrate_mutex); 3626 if (r) 3627 ret = r; 3628 } 3629 3630 dynamic_svm_range_dump(svms); 3631 3632 mutex_unlock(&svms->lock); 3633 mmap_read_unlock(mm); 3634 out: 3635 mutex_unlock(&process_info->lock); 3636 3637 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3638 &p->svms, start, start + size - 1, r); 3639 3640 return ret ? ret : r; 3641 } 3642 3643 static int 3644 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3645 uint64_t start, uint64_t size, uint32_t nattr, 3646 struct kfd_ioctl_svm_attribute *attrs) 3647 { 3648 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3649 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3650 bool get_preferred_loc = false; 3651 bool get_prefetch_loc = false; 3652 bool get_granularity = false; 3653 bool get_accessible = false; 3654 bool get_flags = false; 3655 uint64_t last = start + size - 1UL; 3656 uint8_t granularity = 0xff; 3657 struct interval_tree_node *node; 3658 struct svm_range_list *svms; 3659 struct svm_range *prange; 3660 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3661 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3662 uint32_t flags_and = 0xffffffff; 3663 uint32_t flags_or = 0; 3664 int gpuidx; 3665 uint32_t i; 3666 int r = 0; 3667 3668 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3669 start + size - 1, nattr); 3670 3671 /* Flush pending deferred work to avoid racing with deferred actions from 3672 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3673 * can still race with get_attr because we don't hold the mmap lock. But that 3674 * would be a race condition in the application anyway, and undefined 3675 * behaviour is acceptable in that case. 3676 */ 3677 flush_work(&p->svms.deferred_list_work); 3678 3679 mmap_read_lock(mm); 3680 r = svm_range_is_valid(p, start, size); 3681 mmap_read_unlock(mm); 3682 if (r) { 3683 pr_debug("invalid range r=%d\n", r); 3684 return r; 3685 } 3686 3687 for (i = 0; i < nattr; i++) { 3688 switch (attrs[i].type) { 3689 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3690 get_preferred_loc = true; 3691 break; 3692 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3693 get_prefetch_loc = true; 3694 break; 3695 case KFD_IOCTL_SVM_ATTR_ACCESS: 3696 get_accessible = true; 3697 break; 3698 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3699 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3700 get_flags = true; 3701 break; 3702 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3703 get_granularity = true; 3704 break; 3705 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3706 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3707 fallthrough; 3708 default: 3709 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3710 return -EINVAL; 3711 } 3712 } 3713 3714 svms = &p->svms; 3715 3716 mutex_lock(&svms->lock); 3717 3718 node = interval_tree_iter_first(&svms->objects, start, last); 3719 if (!node) { 3720 pr_debug("range attrs not found return default values\n"); 3721 svm_range_set_default_attributes(&location, &prefetch_loc, 3722 &granularity, &flags_and); 3723 flags_or = flags_and; 3724 if (p->xnack_enabled) 3725 bitmap_copy(bitmap_access, svms->bitmap_supported, 3726 MAX_GPU_INSTANCE); 3727 else 3728 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3729 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3730 goto fill_values; 3731 } 3732 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3733 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3734 3735 while (node) { 3736 struct interval_tree_node *next; 3737 3738 prange = container_of(node, struct svm_range, it_node); 3739 next = interval_tree_iter_next(node, start, last); 3740 3741 if (get_preferred_loc) { 3742 if (prange->preferred_loc == 3743 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3744 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3745 location != prange->preferred_loc)) { 3746 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3747 get_preferred_loc = false; 3748 } else { 3749 location = prange->preferred_loc; 3750 } 3751 } 3752 if (get_prefetch_loc) { 3753 if (prange->prefetch_loc == 3754 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3755 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3756 prefetch_loc != prange->prefetch_loc)) { 3757 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3758 get_prefetch_loc = false; 3759 } else { 3760 prefetch_loc = prange->prefetch_loc; 3761 } 3762 } 3763 if (get_accessible) { 3764 bitmap_and(bitmap_access, bitmap_access, 3765 prange->bitmap_access, MAX_GPU_INSTANCE); 3766 bitmap_and(bitmap_aip, bitmap_aip, 3767 prange->bitmap_aip, MAX_GPU_INSTANCE); 3768 } 3769 if (get_flags) { 3770 flags_and &= prange->flags; 3771 flags_or |= prange->flags; 3772 } 3773 3774 if (get_granularity && prange->granularity < granularity) 3775 granularity = prange->granularity; 3776 3777 node = next; 3778 } 3779 fill_values: 3780 mutex_unlock(&svms->lock); 3781 3782 for (i = 0; i < nattr; i++) { 3783 switch (attrs[i].type) { 3784 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3785 attrs[i].value = location; 3786 break; 3787 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3788 attrs[i].value = prefetch_loc; 3789 break; 3790 case KFD_IOCTL_SVM_ATTR_ACCESS: 3791 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3792 attrs[i].value); 3793 if (gpuidx < 0) { 3794 pr_debug("invalid gpuid %x\n", attrs[i].value); 3795 return -EINVAL; 3796 } 3797 if (test_bit(gpuidx, bitmap_access)) 3798 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3799 else if (test_bit(gpuidx, bitmap_aip)) 3800 attrs[i].type = 3801 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3802 else 3803 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3804 break; 3805 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3806 attrs[i].value = flags_and; 3807 break; 3808 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3809 attrs[i].value = ~flags_or; 3810 break; 3811 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3812 attrs[i].value = (uint32_t)granularity; 3813 break; 3814 } 3815 } 3816 3817 return 0; 3818 } 3819 3820 int kfd_criu_resume_svm(struct kfd_process *p) 3821 { 3822 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3823 int nattr_common = 4, nattr_accessibility = 1; 3824 struct criu_svm_metadata *criu_svm_md = NULL; 3825 struct svm_range_list *svms = &p->svms; 3826 struct criu_svm_metadata *next = NULL; 3827 uint32_t set_flags = 0xffffffff; 3828 int i, j, num_attrs, ret = 0; 3829 uint64_t set_attr_size; 3830 struct mm_struct *mm; 3831 3832 if (list_empty(&svms->criu_svm_metadata_list)) { 3833 pr_debug("No SVM data from CRIU restore stage 2\n"); 3834 return ret; 3835 } 3836 3837 mm = get_task_mm(p->lead_thread); 3838 if (!mm) { 3839 pr_err("failed to get mm for the target process\n"); 3840 return -ESRCH; 3841 } 3842 3843 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3844 3845 i = j = 0; 3846 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3847 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3848 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3849 3850 for (j = 0; j < num_attrs; j++) { 3851 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3852 i, j, criu_svm_md->data.attrs[j].type, 3853 i, j, criu_svm_md->data.attrs[j].value); 3854 switch (criu_svm_md->data.attrs[j].type) { 3855 /* During Checkpoint operation, the query for 3856 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3857 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3858 * not used by the range which was checkpointed. Care 3859 * must be taken to not restore with an invalid value 3860 * otherwise the gpuidx value will be invalid and 3861 * set_attr would eventually fail so just replace those 3862 * with another dummy attribute such as 3863 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3864 */ 3865 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3866 if (criu_svm_md->data.attrs[j].value == 3867 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3868 criu_svm_md->data.attrs[j].type = 3869 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3870 criu_svm_md->data.attrs[j].value = 0; 3871 } 3872 break; 3873 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3874 set_flags = criu_svm_md->data.attrs[j].value; 3875 break; 3876 default: 3877 break; 3878 } 3879 } 3880 3881 /* CLR_FLAGS is not available via get_attr during checkpoint but 3882 * it needs to be inserted before restoring the ranges so 3883 * allocate extra space for it before calling set_attr 3884 */ 3885 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3886 (num_attrs + 1); 3887 set_attr_new = krealloc(set_attr, set_attr_size, 3888 GFP_KERNEL); 3889 if (!set_attr_new) { 3890 ret = -ENOMEM; 3891 goto exit; 3892 } 3893 set_attr = set_attr_new; 3894 3895 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3896 sizeof(struct kfd_ioctl_svm_attribute)); 3897 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3898 set_attr[num_attrs].value = ~set_flags; 3899 3900 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3901 criu_svm_md->data.size, num_attrs + 1, 3902 set_attr); 3903 if (ret) { 3904 pr_err("CRIU: failed to set range attributes\n"); 3905 goto exit; 3906 } 3907 3908 i++; 3909 } 3910 exit: 3911 kfree(set_attr); 3912 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3913 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3914 criu_svm_md->data.start_addr); 3915 kfree(criu_svm_md); 3916 } 3917 3918 mmput(mm); 3919 return ret; 3920 3921 } 3922 3923 int kfd_criu_restore_svm(struct kfd_process *p, 3924 uint8_t __user *user_priv_ptr, 3925 uint64_t *priv_data_offset, 3926 uint64_t max_priv_data_size) 3927 { 3928 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3929 int nattr_common = 4, nattr_accessibility = 1; 3930 struct criu_svm_metadata *criu_svm_md = NULL; 3931 struct svm_range_list *svms = &p->svms; 3932 uint32_t num_devices; 3933 int ret = 0; 3934 3935 num_devices = p->n_pdds; 3936 /* Handle one SVM range object at a time, also the number of gpus are 3937 * assumed to be same on the restore node, checking must be done while 3938 * evaluating the topology earlier 3939 */ 3940 3941 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3942 (nattr_common + nattr_accessibility * num_devices); 3943 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3944 3945 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3946 svm_attrs_size; 3947 3948 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3949 if (!criu_svm_md) { 3950 pr_err("failed to allocate memory to store svm metadata\n"); 3951 return -ENOMEM; 3952 } 3953 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3954 ret = -EINVAL; 3955 goto exit; 3956 } 3957 3958 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3959 svm_priv_data_size); 3960 if (ret) { 3961 ret = -EFAULT; 3962 goto exit; 3963 } 3964 *priv_data_offset += svm_priv_data_size; 3965 3966 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3967 3968 return 0; 3969 3970 3971 exit: 3972 kfree(criu_svm_md); 3973 return ret; 3974 } 3975 3976 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3977 uint64_t *svm_priv_data_size) 3978 { 3979 uint64_t total_size, accessibility_size, common_attr_size; 3980 int nattr_common = 4, nattr_accessibility = 1; 3981 int num_devices = p->n_pdds; 3982 struct svm_range_list *svms; 3983 struct svm_range *prange; 3984 uint32_t count = 0; 3985 3986 *svm_priv_data_size = 0; 3987 3988 svms = &p->svms; 3989 if (!svms) 3990 return -EINVAL; 3991 3992 mutex_lock(&svms->lock); 3993 list_for_each_entry(prange, &svms->list, list) { 3994 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 3995 prange, prange->start, prange->npages, 3996 prange->start + prange->npages - 1); 3997 count++; 3998 } 3999 mutex_unlock(&svms->lock); 4000 4001 *num_svm_ranges = count; 4002 /* Only the accessbility attributes need to be queried for all the gpus 4003 * individually, remaining ones are spanned across the entire process 4004 * regardless of the various gpu nodes. Of the remaining attributes, 4005 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4006 * 4007 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4008 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4009 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4010 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4011 * 4012 * ** ACCESSBILITY ATTRIBUTES ** 4013 * (Considered as one, type is altered during query, value is gpuid) 4014 * KFD_IOCTL_SVM_ATTR_ACCESS 4015 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4016 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4017 */ 4018 if (*num_svm_ranges > 0) { 4019 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4020 nattr_common; 4021 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4022 nattr_accessibility * num_devices; 4023 4024 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4025 common_attr_size + accessibility_size; 4026 4027 *svm_priv_data_size = *num_svm_ranges * total_size; 4028 } 4029 4030 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4031 *svm_priv_data_size); 4032 return 0; 4033 } 4034 4035 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4036 uint8_t __user *user_priv_data, 4037 uint64_t *priv_data_offset) 4038 { 4039 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4040 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4041 uint64_t svm_priv_data_size, query_attr_size = 0; 4042 int index, nattr_common = 4, ret = 0; 4043 struct svm_range_list *svms; 4044 int num_devices = p->n_pdds; 4045 struct svm_range *prange; 4046 struct mm_struct *mm; 4047 4048 svms = &p->svms; 4049 if (!svms) 4050 return -EINVAL; 4051 4052 mm = get_task_mm(p->lead_thread); 4053 if (!mm) { 4054 pr_err("failed to get mm for the target process\n"); 4055 return -ESRCH; 4056 } 4057 4058 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4059 (nattr_common + num_devices); 4060 4061 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4062 if (!query_attr) { 4063 ret = -ENOMEM; 4064 goto exit; 4065 } 4066 4067 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4068 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4069 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4070 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4071 4072 for (index = 0; index < num_devices; index++) { 4073 struct kfd_process_device *pdd = p->pdds[index]; 4074 4075 query_attr[index + nattr_common].type = 4076 KFD_IOCTL_SVM_ATTR_ACCESS; 4077 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4078 } 4079 4080 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4081 4082 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4083 if (!svm_priv) { 4084 ret = -ENOMEM; 4085 goto exit_query; 4086 } 4087 4088 index = 0; 4089 list_for_each_entry(prange, &svms->list, list) { 4090 4091 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4092 svm_priv->start_addr = prange->start; 4093 svm_priv->size = prange->npages; 4094 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4095 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4096 prange, prange->start, prange->npages, 4097 prange->start + prange->npages - 1, 4098 prange->npages * PAGE_SIZE); 4099 4100 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4101 svm_priv->size, 4102 (nattr_common + num_devices), 4103 svm_priv->attrs); 4104 if (ret) { 4105 pr_err("CRIU: failed to obtain range attributes\n"); 4106 goto exit_priv; 4107 } 4108 4109 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4110 svm_priv_data_size)) { 4111 pr_err("Failed to copy svm priv to user\n"); 4112 ret = -EFAULT; 4113 goto exit_priv; 4114 } 4115 4116 *priv_data_offset += svm_priv_data_size; 4117 4118 } 4119 4120 4121 exit_priv: 4122 kfree(svm_priv); 4123 exit_query: 4124 kfree(query_attr); 4125 exit: 4126 mmput(mm); 4127 return ret; 4128 } 4129 4130 int 4131 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4132 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4133 { 4134 struct mm_struct *mm = current->mm; 4135 int r; 4136 4137 start >>= PAGE_SHIFT; 4138 size >>= PAGE_SHIFT; 4139 4140 switch (op) { 4141 case KFD_IOCTL_SVM_OP_SET_ATTR: 4142 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4143 break; 4144 case KFD_IOCTL_SVM_OP_GET_ATTR: 4145 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4146 break; 4147 default: 4148 r = EINVAL; 4149 break; 4150 } 4151 4152 return r; 4153 } 4154