1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 return 0; 202 } 203 204 static int 205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 206 unsigned long offset, unsigned long npages, 207 unsigned long *hmm_pfns) 208 { 209 struct kfd_process *p; 210 uint32_t gpuidx; 211 int r; 212 213 p = container_of(prange->svms, struct kfd_process, svms); 214 215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 216 struct kfd_process_device *pdd; 217 218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 219 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 220 if (!pdd) { 221 pr_debug("failed to find device idx %d\n", gpuidx); 222 return -EINVAL; 223 } 224 225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 226 hmm_pfns, gpuidx); 227 if (r) 228 break; 229 } 230 231 return r; 232 } 233 234 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 235 unsigned long offset, unsigned long npages) 236 { 237 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 238 int i; 239 240 if (!dma_addr) 241 return; 242 243 for (i = offset; i < offset + npages; i++) { 244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 245 continue; 246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 248 dma_addr[i] = 0; 249 } 250 } 251 252 void svm_range_dma_unmap(struct svm_range *prange) 253 { 254 struct kfd_process_device *pdd; 255 dma_addr_t *dma_addr; 256 struct device *dev; 257 struct kfd_process *p; 258 uint32_t gpuidx; 259 260 p = container_of(prange->svms, struct kfd_process, svms); 261 262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 263 dma_addr = prange->dma_addr[gpuidx]; 264 if (!dma_addr) 265 continue; 266 267 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 268 if (!pdd) { 269 pr_debug("failed to find device idx %d\n", gpuidx); 270 continue; 271 } 272 dev = &pdd->dev->adev->pdev->dev; 273 274 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 275 } 276 } 277 278 static void svm_range_free(struct svm_range *prange, bool do_unmap) 279 { 280 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 281 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 282 uint32_t gpuidx; 283 284 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 285 prange->start, prange->last); 286 287 svm_range_vram_node_free(prange); 288 if (do_unmap) 289 svm_range_dma_unmap(prange); 290 291 if (do_unmap && !p->xnack_enabled) { 292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 295 } 296 297 /* free dma_addr array for each gpu */ 298 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 299 if (prange->dma_addr[gpuidx]) { 300 kvfree(prange->dma_addr[gpuidx]); 301 prange->dma_addr[gpuidx] = NULL; 302 } 303 } 304 305 mutex_destroy(&prange->lock); 306 mutex_destroy(&prange->migrate_mutex); 307 kfree(prange); 308 } 309 310 static void 311 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc, 312 uint8_t *granularity, uint32_t *flags) 313 { 314 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 315 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 316 *granularity = 9; 317 *flags = 318 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 319 } 320 321 static struct 322 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 323 uint64_t last, bool update_mem_usage) 324 { 325 uint64_t size = last - start + 1; 326 struct svm_range *prange; 327 struct kfd_process *p; 328 329 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 330 if (!prange) 331 return NULL; 332 333 p = container_of(svms, struct kfd_process, svms); 334 if (!p->xnack_enabled && update_mem_usage && 335 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 336 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 337 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 338 kfree(prange); 339 return NULL; 340 } 341 prange->npages = size; 342 prange->svms = svms; 343 prange->start = start; 344 prange->last = last; 345 INIT_LIST_HEAD(&prange->list); 346 INIT_LIST_HEAD(&prange->update_list); 347 INIT_LIST_HEAD(&prange->svm_bo_list); 348 INIT_LIST_HEAD(&prange->deferred_list); 349 INIT_LIST_HEAD(&prange->child_list); 350 atomic_set(&prange->invalid, 0); 351 prange->validate_timestamp = 0; 352 mutex_init(&prange->migrate_mutex); 353 mutex_init(&prange->lock); 354 355 if (p->xnack_enabled) 356 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 357 MAX_GPU_INSTANCE); 358 359 svm_range_set_default_attributes(&prange->preferred_loc, 360 &prange->prefetch_loc, 361 &prange->granularity, &prange->flags); 362 363 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 364 365 return prange; 366 } 367 368 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 369 { 370 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 371 return false; 372 373 return true; 374 } 375 376 static void svm_range_bo_release(struct kref *kref) 377 { 378 struct svm_range_bo *svm_bo; 379 380 svm_bo = container_of(kref, struct svm_range_bo, kref); 381 pr_debug("svm_bo 0x%p\n", svm_bo); 382 383 spin_lock(&svm_bo->list_lock); 384 while (!list_empty(&svm_bo->range_list)) { 385 struct svm_range *prange = 386 list_first_entry(&svm_bo->range_list, 387 struct svm_range, svm_bo_list); 388 /* list_del_init tells a concurrent svm_range_vram_node_new when 389 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 390 */ 391 list_del_init(&prange->svm_bo_list); 392 spin_unlock(&svm_bo->list_lock); 393 394 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 395 prange->start, prange->last); 396 mutex_lock(&prange->lock); 397 prange->svm_bo = NULL; 398 mutex_unlock(&prange->lock); 399 400 spin_lock(&svm_bo->list_lock); 401 } 402 spin_unlock(&svm_bo->list_lock); 403 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) { 404 /* We're not in the eviction worker. 405 * Signal the fence and synchronize with any 406 * pending eviction work. 407 */ 408 dma_fence_signal(&svm_bo->eviction_fence->base); 409 cancel_work_sync(&svm_bo->eviction_work); 410 } 411 dma_fence_put(&svm_bo->eviction_fence->base); 412 amdgpu_bo_unref(&svm_bo->bo); 413 kfree(svm_bo); 414 } 415 416 static void svm_range_bo_wq_release(struct work_struct *work) 417 { 418 struct svm_range_bo *svm_bo; 419 420 svm_bo = container_of(work, struct svm_range_bo, release_work); 421 svm_range_bo_release(&svm_bo->kref); 422 } 423 424 static void svm_range_bo_release_async(struct kref *kref) 425 { 426 struct svm_range_bo *svm_bo; 427 428 svm_bo = container_of(kref, struct svm_range_bo, kref); 429 pr_debug("svm_bo 0x%p\n", svm_bo); 430 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 431 schedule_work(&svm_bo->release_work); 432 } 433 434 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 435 { 436 kref_put(&svm_bo->kref, svm_range_bo_release_async); 437 } 438 439 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 440 { 441 if (svm_bo) 442 kref_put(&svm_bo->kref, svm_range_bo_release); 443 } 444 445 static bool 446 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 447 { 448 mutex_lock(&prange->lock); 449 if (!prange->svm_bo) { 450 mutex_unlock(&prange->lock); 451 return false; 452 } 453 if (prange->ttm_res) { 454 /* We still have a reference, all is well */ 455 mutex_unlock(&prange->lock); 456 return true; 457 } 458 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 459 /* 460 * Migrate from GPU to GPU, remove range from source svm_bo->node 461 * range list, and return false to allocate svm_bo from destination 462 * node. 463 */ 464 if (prange->svm_bo->node != node) { 465 mutex_unlock(&prange->lock); 466 467 spin_lock(&prange->svm_bo->list_lock); 468 list_del_init(&prange->svm_bo_list); 469 spin_unlock(&prange->svm_bo->list_lock); 470 471 svm_range_bo_unref(prange->svm_bo); 472 return false; 473 } 474 if (READ_ONCE(prange->svm_bo->evicting)) { 475 struct dma_fence *f; 476 struct svm_range_bo *svm_bo; 477 /* The BO is getting evicted, 478 * we need to get a new one 479 */ 480 mutex_unlock(&prange->lock); 481 svm_bo = prange->svm_bo; 482 f = dma_fence_get(&svm_bo->eviction_fence->base); 483 svm_range_bo_unref(prange->svm_bo); 484 /* wait for the fence to avoid long spin-loop 485 * at list_empty_careful 486 */ 487 dma_fence_wait(f, false); 488 dma_fence_put(f); 489 } else { 490 /* The BO was still around and we got 491 * a new reference to it 492 */ 493 mutex_unlock(&prange->lock); 494 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 495 prange->svms, prange->start, prange->last); 496 497 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 498 return true; 499 } 500 501 } else { 502 mutex_unlock(&prange->lock); 503 } 504 505 /* We need a new svm_bo. Spin-loop to wait for concurrent 506 * svm_range_bo_release to finish removing this range from 507 * its range list and set prange->svm_bo to null. After this, 508 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 509 */ 510 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 511 cond_resched(); 512 513 return false; 514 } 515 516 static struct svm_range_bo *svm_range_bo_new(void) 517 { 518 struct svm_range_bo *svm_bo; 519 520 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 521 if (!svm_bo) 522 return NULL; 523 524 kref_init(&svm_bo->kref); 525 INIT_LIST_HEAD(&svm_bo->range_list); 526 spin_lock_init(&svm_bo->list_lock); 527 528 return svm_bo; 529 } 530 531 int 532 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 533 bool clear) 534 { 535 struct amdgpu_bo_param bp; 536 struct svm_range_bo *svm_bo; 537 struct amdgpu_bo_user *ubo; 538 struct amdgpu_bo *bo; 539 struct kfd_process *p; 540 struct mm_struct *mm; 541 int r; 542 543 p = container_of(prange->svms, struct kfd_process, svms); 544 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms, 545 prange->start, prange->last); 546 547 if (svm_range_validate_svm_bo(node, prange)) 548 return 0; 549 550 svm_bo = svm_range_bo_new(); 551 if (!svm_bo) { 552 pr_debug("failed to alloc svm bo\n"); 553 return -ENOMEM; 554 } 555 mm = get_task_mm(p->lead_thread); 556 if (!mm) { 557 pr_debug("failed to get mm\n"); 558 kfree(svm_bo); 559 return -ESRCH; 560 } 561 svm_bo->node = node; 562 svm_bo->eviction_fence = 563 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 564 mm, 565 svm_bo); 566 mmput(mm); 567 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 568 svm_bo->evicting = 0; 569 memset(&bp, 0, sizeof(bp)); 570 bp.size = prange->npages * PAGE_SIZE; 571 bp.byte_align = PAGE_SIZE; 572 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 573 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 574 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 575 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 576 bp.type = ttm_bo_type_device; 577 bp.resv = NULL; 578 if (node->xcp) 579 bp.xcp_id_plus1 = node->xcp->id + 1; 580 581 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 582 if (r) { 583 pr_debug("failed %d to create bo\n", r); 584 goto create_bo_failed; 585 } 586 bo = &ubo->bo; 587 588 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 589 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 590 bp.xcp_id_plus1 - 1); 591 592 r = amdgpu_bo_reserve(bo, true); 593 if (r) { 594 pr_debug("failed %d to reserve bo\n", r); 595 goto reserve_bo_failed; 596 } 597 598 if (clear) { 599 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 600 if (r) { 601 pr_debug("failed %d to sync bo\n", r); 602 amdgpu_bo_unreserve(bo); 603 goto reserve_bo_failed; 604 } 605 } 606 607 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 608 if (r) { 609 pr_debug("failed %d to reserve bo\n", r); 610 amdgpu_bo_unreserve(bo); 611 goto reserve_bo_failed; 612 } 613 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 614 615 amdgpu_bo_unreserve(bo); 616 617 svm_bo->bo = bo; 618 prange->svm_bo = svm_bo; 619 prange->ttm_res = bo->tbo.resource; 620 prange->offset = 0; 621 622 spin_lock(&svm_bo->list_lock); 623 list_add(&prange->svm_bo_list, &svm_bo->range_list); 624 spin_unlock(&svm_bo->list_lock); 625 626 return 0; 627 628 reserve_bo_failed: 629 amdgpu_bo_unref(&bo); 630 create_bo_failed: 631 dma_fence_put(&svm_bo->eviction_fence->base); 632 kfree(svm_bo); 633 prange->ttm_res = NULL; 634 635 return r; 636 } 637 638 void svm_range_vram_node_free(struct svm_range *prange) 639 { 640 /* serialize prange->svm_bo unref */ 641 mutex_lock(&prange->lock); 642 /* prange->svm_bo has not been unref */ 643 if (prange->ttm_res) { 644 prange->ttm_res = NULL; 645 mutex_unlock(&prange->lock); 646 svm_range_bo_unref(prange->svm_bo); 647 } else 648 mutex_unlock(&prange->lock); 649 } 650 651 struct kfd_node * 652 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 653 { 654 struct kfd_process *p; 655 struct kfd_process_device *pdd; 656 657 p = container_of(prange->svms, struct kfd_process, svms); 658 pdd = kfd_process_device_data_by_id(p, gpu_id); 659 if (!pdd) { 660 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 661 return NULL; 662 } 663 664 return pdd->dev; 665 } 666 667 struct kfd_process_device * 668 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 669 { 670 struct kfd_process *p; 671 672 p = container_of(prange->svms, struct kfd_process, svms); 673 674 return kfd_get_process_device_data(node, p); 675 } 676 677 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 678 { 679 struct ttm_operation_ctx ctx = { false, false }; 680 681 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 682 683 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 684 } 685 686 static int 687 svm_range_check_attr(struct kfd_process *p, 688 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 689 { 690 uint32_t i; 691 692 for (i = 0; i < nattr; i++) { 693 uint32_t val = attrs[i].value; 694 int gpuidx = MAX_GPU_INSTANCE; 695 696 switch (attrs[i].type) { 697 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 698 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 699 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 700 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 701 break; 702 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 703 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 704 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 705 break; 706 case KFD_IOCTL_SVM_ATTR_ACCESS: 707 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 708 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 709 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 710 break; 711 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 712 break; 713 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 714 break; 715 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 716 break; 717 default: 718 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 719 return -EINVAL; 720 } 721 722 if (gpuidx < 0) { 723 pr_debug("no GPU 0x%x found\n", val); 724 return -EINVAL; 725 } else if (gpuidx < MAX_GPU_INSTANCE && 726 !test_bit(gpuidx, p->svms.bitmap_supported)) { 727 pr_debug("GPU 0x%x not supported\n", val); 728 return -EINVAL; 729 } 730 } 731 732 return 0; 733 } 734 735 static void 736 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 737 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 738 bool *update_mapping) 739 { 740 uint32_t i; 741 int gpuidx; 742 743 for (i = 0; i < nattr; i++) { 744 switch (attrs[i].type) { 745 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 746 prange->preferred_loc = attrs[i].value; 747 break; 748 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 749 prange->prefetch_loc = attrs[i].value; 750 break; 751 case KFD_IOCTL_SVM_ATTR_ACCESS: 752 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 753 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 754 if (!p->xnack_enabled) 755 *update_mapping = true; 756 757 gpuidx = kfd_process_gpuidx_from_gpuid(p, 758 attrs[i].value); 759 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 760 bitmap_clear(prange->bitmap_access, gpuidx, 1); 761 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 762 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 763 bitmap_set(prange->bitmap_access, gpuidx, 1); 764 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 765 } else { 766 bitmap_clear(prange->bitmap_access, gpuidx, 1); 767 bitmap_set(prange->bitmap_aip, gpuidx, 1); 768 } 769 break; 770 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 771 *update_mapping = true; 772 prange->flags |= attrs[i].value; 773 break; 774 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 775 *update_mapping = true; 776 prange->flags &= ~attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 779 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 780 break; 781 default: 782 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 783 } 784 } 785 } 786 787 static bool 788 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 789 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 790 { 791 uint32_t i; 792 int gpuidx; 793 794 for (i = 0; i < nattr; i++) { 795 switch (attrs[i].type) { 796 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 797 if (prange->preferred_loc != attrs[i].value) 798 return false; 799 break; 800 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 801 /* Prefetch should always trigger a migration even 802 * if the value of the attribute didn't change. 803 */ 804 return false; 805 case KFD_IOCTL_SVM_ATTR_ACCESS: 806 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 807 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 808 gpuidx = kfd_process_gpuidx_from_gpuid(p, 809 attrs[i].value); 810 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 811 if (test_bit(gpuidx, prange->bitmap_access) || 812 test_bit(gpuidx, prange->bitmap_aip)) 813 return false; 814 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 815 if (!test_bit(gpuidx, prange->bitmap_access)) 816 return false; 817 } else { 818 if (!test_bit(gpuidx, prange->bitmap_aip)) 819 return false; 820 } 821 break; 822 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 823 if ((prange->flags & attrs[i].value) != attrs[i].value) 824 return false; 825 break; 826 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 827 if ((prange->flags & attrs[i].value) != 0) 828 return false; 829 break; 830 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 831 if (prange->granularity != attrs[i].value) 832 return false; 833 break; 834 default: 835 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 836 } 837 } 838 839 return true; 840 } 841 842 /** 843 * svm_range_debug_dump - print all range information from svms 844 * @svms: svm range list header 845 * 846 * debug output svm range start, end, prefetch location from svms 847 * interval tree and link list 848 * 849 * Context: The caller must hold svms->lock 850 */ 851 static void svm_range_debug_dump(struct svm_range_list *svms) 852 { 853 struct interval_tree_node *node; 854 struct svm_range *prange; 855 856 pr_debug("dump svms 0x%p list\n", svms); 857 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 858 859 list_for_each_entry(prange, &svms->list, list) { 860 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 861 prange, prange->start, prange->npages, 862 prange->start + prange->npages - 1, 863 prange->actual_loc); 864 } 865 866 pr_debug("dump svms 0x%p interval tree\n", svms); 867 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 868 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 869 while (node) { 870 prange = container_of(node, struct svm_range, it_node); 871 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 872 prange, prange->start, prange->npages, 873 prange->start + prange->npages - 1, 874 prange->actual_loc); 875 node = interval_tree_iter_next(node, 0, ~0ULL); 876 } 877 } 878 879 static void * 880 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 881 uint64_t offset) 882 { 883 unsigned char *dst; 884 885 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 886 if (!dst) 887 return NULL; 888 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size); 889 890 return (void *)dst; 891 } 892 893 static int 894 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 895 { 896 int i; 897 898 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 899 if (!src->dma_addr[i]) 900 continue; 901 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 902 sizeof(*src->dma_addr[i]), src->npages, 0); 903 if (!dst->dma_addr[i]) 904 return -ENOMEM; 905 } 906 907 return 0; 908 } 909 910 static int 911 svm_range_split_array(void *ppnew, void *ppold, size_t size, 912 uint64_t old_start, uint64_t old_n, 913 uint64_t new_start, uint64_t new_n) 914 { 915 unsigned char *new, *old, *pold; 916 uint64_t d; 917 918 if (!ppold) 919 return 0; 920 pold = *(unsigned char **)ppold; 921 if (!pold) 922 return 0; 923 924 d = (new_start - old_start) * size; 925 new = svm_range_copy_array(pold, size, new_n, d); 926 if (!new) 927 return -ENOMEM; 928 d = (new_start == old_start) ? new_n * size : 0; 929 old = svm_range_copy_array(pold, size, old_n, d); 930 if (!old) { 931 kvfree(new); 932 return -ENOMEM; 933 } 934 kvfree(pold); 935 *(void **)ppold = old; 936 *(void **)ppnew = new; 937 938 return 0; 939 } 940 941 static int 942 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 943 uint64_t start, uint64_t last) 944 { 945 uint64_t npages = last - start + 1; 946 int i, r; 947 948 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 949 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 950 sizeof(*old->dma_addr[i]), old->start, 951 npages, new->start, new->npages); 952 if (r) 953 return r; 954 } 955 956 return 0; 957 } 958 959 static int 960 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 961 uint64_t start, uint64_t last) 962 { 963 uint64_t npages = last - start + 1; 964 965 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 966 new->svms, new, new->start, start, last); 967 968 if (new->start == old->start) { 969 new->offset = old->offset; 970 old->offset += new->npages; 971 } else { 972 new->offset = old->offset + npages; 973 } 974 975 new->svm_bo = svm_range_bo_ref(old->svm_bo); 976 new->ttm_res = old->ttm_res; 977 978 spin_lock(&new->svm_bo->list_lock); 979 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 980 spin_unlock(&new->svm_bo->list_lock); 981 982 return 0; 983 } 984 985 /** 986 * svm_range_split_adjust - split range and adjust 987 * 988 * @new: new range 989 * @old: the old range 990 * @start: the old range adjust to start address in pages 991 * @last: the old range adjust to last address in pages 992 * 993 * Copy system memory dma_addr or vram ttm_res in old range to new 994 * range from new_start up to size new->npages, the remaining old range is from 995 * start to last 996 * 997 * Return: 998 * 0 - OK, -ENOMEM - out of memory 999 */ 1000 static int 1001 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1002 uint64_t start, uint64_t last) 1003 { 1004 int r; 1005 1006 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1007 new->svms, new->start, old->start, old->last, start, last); 1008 1009 if (new->start < old->start || 1010 new->last > old->last) { 1011 WARN_ONCE(1, "invalid new range start or last\n"); 1012 return -EINVAL; 1013 } 1014 1015 r = svm_range_split_pages(new, old, start, last); 1016 if (r) 1017 return r; 1018 1019 if (old->actual_loc && old->ttm_res) { 1020 r = svm_range_split_nodes(new, old, start, last); 1021 if (r) 1022 return r; 1023 } 1024 1025 old->npages = last - start + 1; 1026 old->start = start; 1027 old->last = last; 1028 new->flags = old->flags; 1029 new->preferred_loc = old->preferred_loc; 1030 new->prefetch_loc = old->prefetch_loc; 1031 new->actual_loc = old->actual_loc; 1032 new->granularity = old->granularity; 1033 new->mapped_to_gpu = old->mapped_to_gpu; 1034 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1035 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1036 1037 return 0; 1038 } 1039 1040 /** 1041 * svm_range_split - split a range in 2 ranges 1042 * 1043 * @prange: the svm range to split 1044 * @start: the remaining range start address in pages 1045 * @last: the remaining range last address in pages 1046 * @new: the result new range generated 1047 * 1048 * Two cases only: 1049 * case 1: if start == prange->start 1050 * prange ==> prange[start, last] 1051 * new range [last + 1, prange->last] 1052 * 1053 * case 2: if last == prange->last 1054 * prange ==> prange[start, last] 1055 * new range [prange->start, start - 1] 1056 * 1057 * Return: 1058 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1059 */ 1060 static int 1061 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1062 struct svm_range **new) 1063 { 1064 uint64_t old_start = prange->start; 1065 uint64_t old_last = prange->last; 1066 struct svm_range_list *svms; 1067 int r = 0; 1068 1069 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1070 old_start, old_last, start, last); 1071 1072 if (old_start != start && old_last != last) 1073 return -EINVAL; 1074 if (start < old_start || last > old_last) 1075 return -EINVAL; 1076 1077 svms = prange->svms; 1078 if (old_start == start) 1079 *new = svm_range_new(svms, last + 1, old_last, false); 1080 else 1081 *new = svm_range_new(svms, old_start, start - 1, false); 1082 if (!*new) 1083 return -ENOMEM; 1084 1085 r = svm_range_split_adjust(*new, prange, start, last); 1086 if (r) { 1087 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1088 r, old_start, old_last, start, last); 1089 svm_range_free(*new, false); 1090 *new = NULL; 1091 } 1092 1093 return r; 1094 } 1095 1096 static int 1097 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1098 struct list_head *insert_list, struct list_head *remap_list) 1099 { 1100 struct svm_range *tail; 1101 int r = svm_range_split(prange, prange->start, new_last, &tail); 1102 1103 if (!r) { 1104 list_add(&tail->list, insert_list); 1105 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1106 list_add(&tail->update_list, remap_list); 1107 } 1108 return r; 1109 } 1110 1111 static int 1112 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1113 struct list_head *insert_list, struct list_head *remap_list) 1114 { 1115 struct svm_range *head; 1116 int r = svm_range_split(prange, new_start, prange->last, &head); 1117 1118 if (!r) { 1119 list_add(&head->list, insert_list); 1120 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1121 list_add(&head->update_list, remap_list); 1122 } 1123 return r; 1124 } 1125 1126 static void 1127 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm, 1128 struct svm_range *pchild, enum svm_work_list_ops op) 1129 { 1130 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1131 pchild, pchild->start, pchild->last, prange, op); 1132 1133 pchild->work_item.mm = mm; 1134 pchild->work_item.op = op; 1135 list_add_tail(&pchild->child_list, &prange->child_list); 1136 } 1137 1138 /** 1139 * svm_range_split_by_granularity - collect ranges within granularity boundary 1140 * 1141 * @p: the process with svms list 1142 * @mm: mm structure 1143 * @addr: the vm fault address in pages, to split the prange 1144 * @parent: parent range if prange is from child list 1145 * @prange: prange to split 1146 * 1147 * Trims @prange to be a single aligned block of prange->granularity if 1148 * possible. The head and tail are added to the child_list in @parent. 1149 * 1150 * Context: caller must hold mmap_read_lock and prange->lock 1151 * 1152 * Return: 1153 * 0 - OK, otherwise error code 1154 */ 1155 int 1156 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm, 1157 unsigned long addr, struct svm_range *parent, 1158 struct svm_range *prange) 1159 { 1160 struct svm_range *head, *tail; 1161 unsigned long start, last, size; 1162 int r; 1163 1164 /* Align splited range start and size to granularity size, then a single 1165 * PTE will be used for whole range, this reduces the number of PTE 1166 * updated and the L1 TLB space used for translation. 1167 */ 1168 size = 1UL << prange->granularity; 1169 start = ALIGN_DOWN(addr, size); 1170 last = ALIGN(addr + 1, size) - 1; 1171 1172 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n", 1173 prange->svms, prange->start, prange->last, start, last, size); 1174 1175 if (start > prange->start) { 1176 r = svm_range_split(prange, start, prange->last, &head); 1177 if (r) 1178 return r; 1179 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE); 1180 } 1181 1182 if (last < prange->last) { 1183 r = svm_range_split(prange, prange->start, last, &tail); 1184 if (r) 1185 return r; 1186 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 1187 } 1188 1189 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */ 1190 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) { 1191 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP; 1192 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n", 1193 prange, prange->start, prange->last, 1194 SVM_OP_ADD_RANGE_AND_MAP); 1195 } 1196 return 0; 1197 } 1198 static bool 1199 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1200 { 1201 return (node_a->adev == node_b->adev || 1202 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1203 } 1204 1205 static uint64_t 1206 svm_range_get_pte_flags(struct kfd_node *node, 1207 struct svm_range *prange, int domain) 1208 { 1209 struct kfd_node *bo_node; 1210 uint32_t flags = prange->flags; 1211 uint32_t mapping_flags = 0; 1212 uint64_t pte_flags; 1213 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1214 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1215 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1216 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/ 1217 unsigned int mtype_local; 1218 1219 if (domain == SVM_RANGE_VRAM_DOMAIN) 1220 bo_node = prange->svm_bo->node; 1221 1222 switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) { 1223 case IP_VERSION(9, 4, 1): 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1225 if (bo_node == node) { 1226 mapping_flags |= coherent ? 1227 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1228 } else { 1229 mapping_flags |= coherent ? 1230 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1231 if (svm_nodes_in_same_hive(node, bo_node)) 1232 snoop = true; 1233 } 1234 } else { 1235 mapping_flags |= coherent ? 1236 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1237 } 1238 break; 1239 case IP_VERSION(9, 4, 2): 1240 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1241 if (bo_node == node) { 1242 mapping_flags |= coherent ? 1243 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1244 if (node->adev->gmc.xgmi.connected_to_cpu) 1245 snoop = true; 1246 } else { 1247 mapping_flags |= coherent ? 1248 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1249 if (svm_nodes_in_same_hive(node, bo_node)) 1250 snoop = true; 1251 } 1252 } else { 1253 mapping_flags |= coherent ? 1254 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1255 } 1256 break; 1257 case IP_VERSION(9, 4, 3): 1258 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1259 (amdgpu_mtype_local == 2 || ext_coherent ? 1260 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW); 1261 snoop = true; 1262 if (uncached) { 1263 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1264 } else if (domain == SVM_RANGE_VRAM_DOMAIN) { 1265 /* local HBM region close to partition */ 1266 if (bo_node->adev == node->adev && 1267 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1268 mapping_flags |= mtype_local; 1269 /* local HBM region far from partition or remote XGMI GPU 1270 * with regular system scope coherence 1271 */ 1272 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1273 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1274 /* PCIe P2P or extended system scope coherence */ 1275 else 1276 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1277 /* system memory accessed by the APU */ 1278 } else if (node->adev->flags & AMD_IS_APU) { 1279 /* On NUMA systems, locality is determined per-page 1280 * in amdgpu_gmc_override_vm_pte_flags 1281 */ 1282 if (num_possible_nodes() <= 1) 1283 mapping_flags |= mtype_local; 1284 else 1285 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1286 /* system memory accessed by the dGPU */ 1287 } else { 1288 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1289 } 1290 break; 1291 default: 1292 mapping_flags |= coherent ? 1293 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1294 } 1295 1296 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE; 1297 1298 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO) 1299 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE; 1300 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1301 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1302 1303 pte_flags = AMDGPU_PTE_VALID; 1304 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1305 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1306 1307 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags); 1308 return pte_flags; 1309 } 1310 1311 static int 1312 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1313 uint64_t start, uint64_t last, 1314 struct dma_fence **fence) 1315 { 1316 uint64_t init_pte_value = 0; 1317 1318 pr_debug("[0x%llx 0x%llx]\n", start, last); 1319 1320 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1321 last, init_pte_value, 0, 0, NULL, NULL, 1322 fence); 1323 } 1324 1325 static int 1326 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1327 unsigned long last, uint32_t trigger) 1328 { 1329 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1330 struct kfd_process_device *pdd; 1331 struct dma_fence *fence = NULL; 1332 struct kfd_process *p; 1333 uint32_t gpuidx; 1334 int r = 0; 1335 1336 if (!prange->mapped_to_gpu) { 1337 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1338 prange, prange->start, prange->last); 1339 return 0; 1340 } 1341 1342 if (prange->start == start && prange->last == last) { 1343 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1344 prange->mapped_to_gpu = false; 1345 } 1346 1347 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1348 MAX_GPU_INSTANCE); 1349 p = container_of(prange->svms, struct kfd_process, svms); 1350 1351 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1352 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1353 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1354 if (!pdd) { 1355 pr_debug("failed to find device idx %d\n", gpuidx); 1356 return -EINVAL; 1357 } 1358 1359 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1360 start, last, trigger); 1361 1362 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1363 drm_priv_to_vm(pdd->drm_priv), 1364 start, last, &fence); 1365 if (r) 1366 break; 1367 1368 if (fence) { 1369 r = dma_fence_wait(fence, false); 1370 dma_fence_put(fence); 1371 fence = NULL; 1372 if (r) 1373 break; 1374 } 1375 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1376 } 1377 1378 return r; 1379 } 1380 1381 static int 1382 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1383 unsigned long offset, unsigned long npages, bool readonly, 1384 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1385 struct dma_fence **fence, bool flush_tlb) 1386 { 1387 struct amdgpu_device *adev = pdd->dev->adev; 1388 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1389 uint64_t pte_flags; 1390 unsigned long last_start; 1391 int last_domain; 1392 int r = 0; 1393 int64_t i, j; 1394 1395 last_start = prange->start + offset; 1396 1397 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1398 last_start, last_start + npages - 1, readonly); 1399 1400 for (i = offset; i < offset + npages; i++) { 1401 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1402 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1403 1404 /* Collect all pages in the same address range and memory domain 1405 * that can be mapped with a single call to update mapping. 1406 */ 1407 if (i < offset + npages - 1 && 1408 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1409 continue; 1410 1411 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1412 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1413 1414 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain); 1415 if (readonly) 1416 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1417 1418 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1419 prange->svms, last_start, prange->start + i, 1420 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1421 pte_flags); 1422 1423 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1424 * different memory partition based on fpfn/lpfn, we should use 1425 * same vm_manager.vram_base_offset regardless memory partition. 1426 */ 1427 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1428 NULL, last_start, prange->start + i, 1429 pte_flags, 1430 (last_start - prange->start) << PAGE_SHIFT, 1431 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1432 NULL, dma_addr, &vm->last_update); 1433 1434 for (j = last_start - prange->start; j <= i; j++) 1435 dma_addr[j] |= last_domain; 1436 1437 if (r) { 1438 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1439 goto out; 1440 } 1441 last_start = prange->start + i + 1; 1442 } 1443 1444 r = amdgpu_vm_update_pdes(adev, vm, false); 1445 if (r) { 1446 pr_debug("failed %d to update directories 0x%lx\n", r, 1447 prange->start); 1448 goto out; 1449 } 1450 1451 if (fence) 1452 *fence = dma_fence_get(vm->last_update); 1453 1454 out: 1455 return r; 1456 } 1457 1458 static int 1459 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1460 unsigned long npages, bool readonly, 1461 unsigned long *bitmap, bool wait, bool flush_tlb) 1462 { 1463 struct kfd_process_device *pdd; 1464 struct amdgpu_device *bo_adev = NULL; 1465 struct kfd_process *p; 1466 struct dma_fence *fence = NULL; 1467 uint32_t gpuidx; 1468 int r = 0; 1469 1470 if (prange->svm_bo && prange->ttm_res) 1471 bo_adev = prange->svm_bo->node->adev; 1472 1473 p = container_of(prange->svms, struct kfd_process, svms); 1474 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1475 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1476 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1477 if (!pdd) { 1478 pr_debug("failed to find device idx %d\n", gpuidx); 1479 return -EINVAL; 1480 } 1481 1482 pdd = kfd_bind_process_to_device(pdd->dev, p); 1483 if (IS_ERR(pdd)) 1484 return -EINVAL; 1485 1486 if (bo_adev && pdd->dev->adev != bo_adev && 1487 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1488 pr_debug("cannot map to device idx %d\n", gpuidx); 1489 continue; 1490 } 1491 1492 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1493 prange->dma_addr[gpuidx], 1494 bo_adev, wait ? &fence : NULL, 1495 flush_tlb); 1496 if (r) 1497 break; 1498 1499 if (fence) { 1500 r = dma_fence_wait(fence, false); 1501 dma_fence_put(fence); 1502 fence = NULL; 1503 if (r) { 1504 pr_debug("failed %d to dma fence wait\n", r); 1505 break; 1506 } 1507 } 1508 1509 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1510 } 1511 1512 return r; 1513 } 1514 1515 struct svm_validate_context { 1516 struct kfd_process *process; 1517 struct svm_range *prange; 1518 bool intr; 1519 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1520 struct drm_exec exec; 1521 }; 1522 1523 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1524 { 1525 struct kfd_process_device *pdd; 1526 struct amdgpu_vm *vm; 1527 uint32_t gpuidx; 1528 int r; 1529 1530 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0); 1531 drm_exec_until_all_locked(&ctx->exec) { 1532 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1533 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1534 if (!pdd) { 1535 pr_debug("failed to find device idx %d\n", gpuidx); 1536 r = -EINVAL; 1537 goto unreserve_out; 1538 } 1539 vm = drm_priv_to_vm(pdd->drm_priv); 1540 1541 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1542 drm_exec_retry_on_contention(&ctx->exec); 1543 if (unlikely(r)) { 1544 pr_debug("failed %d to reserve bo\n", r); 1545 goto unreserve_out; 1546 } 1547 } 1548 } 1549 1550 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1551 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1552 if (!pdd) { 1553 pr_debug("failed to find device idx %d\n", gpuidx); 1554 r = -EINVAL; 1555 goto unreserve_out; 1556 } 1557 1558 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev, 1559 drm_priv_to_vm(pdd->drm_priv), 1560 svm_range_bo_validate, NULL); 1561 if (r) { 1562 pr_debug("failed %d validate pt bos\n", r); 1563 goto unreserve_out; 1564 } 1565 } 1566 1567 return 0; 1568 1569 unreserve_out: 1570 drm_exec_fini(&ctx->exec); 1571 return r; 1572 } 1573 1574 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1575 { 1576 drm_exec_fini(&ctx->exec); 1577 } 1578 1579 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1580 { 1581 struct kfd_process_device *pdd; 1582 1583 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1584 if (!pdd) 1585 return NULL; 1586 1587 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1588 } 1589 1590 /* 1591 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1592 * 1593 * To prevent concurrent destruction or change of range attributes, the 1594 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1595 * because that would block concurrent evictions and lead to deadlocks. To 1596 * serialize concurrent migrations or validations of the same range, the 1597 * prange->migrate_mutex must be held. 1598 * 1599 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1600 * eviction fence. 1601 * 1602 * The following sequence ensures race-free validation and GPU mapping: 1603 * 1604 * 1. Reserve page table (and SVM BO if range is in VRAM) 1605 * 2. hmm_range_fault to get page addresses (if system memory) 1606 * 3. DMA-map pages (if system memory) 1607 * 4-a. Take notifier lock 1608 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1609 * 4-c. Check that the range was not split or otherwise invalidated 1610 * 4-d. Update GPU page table 1611 * 4.e. Release notifier lock 1612 * 5. Release page table (and SVM BO) reservation 1613 */ 1614 static int svm_range_validate_and_map(struct mm_struct *mm, 1615 struct svm_range *prange, int32_t gpuidx, 1616 bool intr, bool wait, bool flush_tlb) 1617 { 1618 struct svm_validate_context *ctx; 1619 unsigned long start, end, addr; 1620 struct kfd_process *p; 1621 void *owner; 1622 int32_t idx; 1623 int r = 0; 1624 1625 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1626 if (!ctx) 1627 return -ENOMEM; 1628 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1629 ctx->prange = prange; 1630 ctx->intr = intr; 1631 1632 if (gpuidx < MAX_GPU_INSTANCE) { 1633 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1634 bitmap_set(ctx->bitmap, gpuidx, 1); 1635 } else if (ctx->process->xnack_enabled) { 1636 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1637 1638 /* If prefetch range to GPU, or GPU retry fault migrate range to 1639 * GPU, which has ACCESS attribute to the range, create mapping 1640 * on that GPU. 1641 */ 1642 if (prange->actual_loc) { 1643 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1644 prange->actual_loc); 1645 if (gpuidx < 0) { 1646 WARN_ONCE(1, "failed get device by id 0x%x\n", 1647 prange->actual_loc); 1648 r = -EINVAL; 1649 goto free_ctx; 1650 } 1651 if (test_bit(gpuidx, prange->bitmap_access)) 1652 bitmap_set(ctx->bitmap, gpuidx, 1); 1653 } 1654 } else { 1655 bitmap_or(ctx->bitmap, prange->bitmap_access, 1656 prange->bitmap_aip, MAX_GPU_INSTANCE); 1657 } 1658 1659 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1660 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1661 if (!prange->mapped_to_gpu || 1662 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1663 r = 0; 1664 goto free_ctx; 1665 } 1666 } 1667 1668 if (prange->actual_loc && !prange->ttm_res) { 1669 /* This should never happen. actual_loc gets set by 1670 * svm_migrate_ram_to_vram after allocating a BO. 1671 */ 1672 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1673 r = -EINVAL; 1674 goto free_ctx; 1675 } 1676 1677 svm_range_reserve_bos(ctx, intr); 1678 1679 p = container_of(prange->svms, struct kfd_process, svms); 1680 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1681 MAX_GPU_INSTANCE)); 1682 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1683 if (kfd_svm_page_owner(p, idx) != owner) { 1684 owner = NULL; 1685 break; 1686 } 1687 } 1688 1689 start = prange->start << PAGE_SHIFT; 1690 end = (prange->last + 1) << PAGE_SHIFT; 1691 for (addr = start; !r && addr < end; ) { 1692 struct hmm_range *hmm_range; 1693 struct vm_area_struct *vma; 1694 unsigned long next = 0; 1695 unsigned long offset; 1696 unsigned long npages; 1697 bool readonly; 1698 1699 vma = vma_lookup(mm, addr); 1700 if (vma) { 1701 readonly = !(vma->vm_flags & VM_WRITE); 1702 1703 next = min(vma->vm_end, end); 1704 npages = (next - addr) >> PAGE_SHIFT; 1705 WRITE_ONCE(p->svms.faulting_task, current); 1706 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1707 readonly, owner, NULL, 1708 &hmm_range); 1709 WRITE_ONCE(p->svms.faulting_task, NULL); 1710 if (r) { 1711 pr_debug("failed %d to get svm range pages\n", r); 1712 if (r == -EBUSY) 1713 r = -EAGAIN; 1714 } 1715 } else { 1716 r = -EFAULT; 1717 } 1718 1719 if (!r) { 1720 offset = (addr - start) >> PAGE_SHIFT; 1721 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1722 hmm_range->hmm_pfns); 1723 if (r) 1724 pr_debug("failed %d to dma map range\n", r); 1725 } 1726 1727 svm_range_lock(prange); 1728 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { 1729 pr_debug("hmm update the range, need validate again\n"); 1730 r = -EAGAIN; 1731 } 1732 1733 if (!r && !list_empty(&prange->child_list)) { 1734 pr_debug("range split by unmap in parallel, validate again\n"); 1735 r = -EAGAIN; 1736 } 1737 1738 if (!r) 1739 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1740 ctx->bitmap, wait, flush_tlb); 1741 1742 if (!r && next == end) 1743 prange->mapped_to_gpu = true; 1744 1745 svm_range_unlock(prange); 1746 1747 addr = next; 1748 } 1749 1750 svm_range_unreserve_bos(ctx); 1751 if (!r) 1752 prange->validate_timestamp = ktime_get_boottime(); 1753 1754 free_ctx: 1755 kfree(ctx); 1756 1757 return r; 1758 } 1759 1760 /** 1761 * svm_range_list_lock_and_flush_work - flush pending deferred work 1762 * 1763 * @svms: the svm range list 1764 * @mm: the mm structure 1765 * 1766 * Context: Returns with mmap write lock held, pending deferred work flushed 1767 * 1768 */ 1769 void 1770 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1771 struct mm_struct *mm) 1772 { 1773 retry_flush_work: 1774 flush_work(&svms->deferred_list_work); 1775 mmap_write_lock(mm); 1776 1777 if (list_empty(&svms->deferred_range_list)) 1778 return; 1779 mmap_write_unlock(mm); 1780 pr_debug("retry flush\n"); 1781 goto retry_flush_work; 1782 } 1783 1784 static void svm_range_restore_work(struct work_struct *work) 1785 { 1786 struct delayed_work *dwork = to_delayed_work(work); 1787 struct amdkfd_process_info *process_info; 1788 struct svm_range_list *svms; 1789 struct svm_range *prange; 1790 struct kfd_process *p; 1791 struct mm_struct *mm; 1792 int evicted_ranges; 1793 int invalid; 1794 int r; 1795 1796 svms = container_of(dwork, struct svm_range_list, restore_work); 1797 evicted_ranges = atomic_read(&svms->evicted_ranges); 1798 if (!evicted_ranges) 1799 return; 1800 1801 pr_debug("restore svm ranges\n"); 1802 1803 p = container_of(svms, struct kfd_process, svms); 1804 process_info = p->kgd_process_info; 1805 1806 /* Keep mm reference when svm_range_validate_and_map ranges */ 1807 mm = get_task_mm(p->lead_thread); 1808 if (!mm) { 1809 pr_debug("svms 0x%p process mm gone\n", svms); 1810 return; 1811 } 1812 1813 mutex_lock(&process_info->lock); 1814 svm_range_list_lock_and_flush_work(svms, mm); 1815 mutex_lock(&svms->lock); 1816 1817 evicted_ranges = atomic_read(&svms->evicted_ranges); 1818 1819 list_for_each_entry(prange, &svms->list, list) { 1820 invalid = atomic_read(&prange->invalid); 1821 if (!invalid) 1822 continue; 1823 1824 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1825 prange->svms, prange, prange->start, prange->last, 1826 invalid); 1827 1828 /* 1829 * If range is migrating, wait for migration is done. 1830 */ 1831 mutex_lock(&prange->migrate_mutex); 1832 1833 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 1834 false, true, false); 1835 if (r) 1836 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1837 prange->start); 1838 1839 mutex_unlock(&prange->migrate_mutex); 1840 if (r) 1841 goto out_reschedule; 1842 1843 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1844 goto out_reschedule; 1845 } 1846 1847 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1848 evicted_ranges) 1849 goto out_reschedule; 1850 1851 evicted_ranges = 0; 1852 1853 r = kgd2kfd_resume_mm(mm); 1854 if (r) { 1855 /* No recovery from this failure. Probably the CP is 1856 * hanging. No point trying again. 1857 */ 1858 pr_debug("failed %d to resume KFD\n", r); 1859 } 1860 1861 pr_debug("restore svm ranges successfully\n"); 1862 1863 out_reschedule: 1864 mutex_unlock(&svms->lock); 1865 mmap_write_unlock(mm); 1866 mutex_unlock(&process_info->lock); 1867 1868 /* If validation failed, reschedule another attempt */ 1869 if (evicted_ranges) { 1870 pr_debug("reschedule to restore svm range\n"); 1871 schedule_delayed_work(&svms->restore_work, 1872 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1873 1874 kfd_smi_event_queue_restore_rescheduled(mm); 1875 } 1876 mmput(mm); 1877 } 1878 1879 /** 1880 * svm_range_evict - evict svm range 1881 * @prange: svm range structure 1882 * @mm: current process mm_struct 1883 * @start: starting process queue number 1884 * @last: last process queue number 1885 * @event: mmu notifier event when range is evicted or migrated 1886 * 1887 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1888 * return to let CPU evict the buffer and proceed CPU pagetable update. 1889 * 1890 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1891 * If invalidation happens while restore work is running, restore work will 1892 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1893 * the queues. 1894 */ 1895 static int 1896 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1897 unsigned long start, unsigned long last, 1898 enum mmu_notifier_event event) 1899 { 1900 struct svm_range_list *svms = prange->svms; 1901 struct svm_range *pchild; 1902 struct kfd_process *p; 1903 int r = 0; 1904 1905 p = container_of(svms, struct kfd_process, svms); 1906 1907 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1908 svms, prange->start, prange->last, start, last); 1909 1910 if (!p->xnack_enabled || 1911 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1912 int evicted_ranges; 1913 bool mapped = prange->mapped_to_gpu; 1914 1915 list_for_each_entry(pchild, &prange->child_list, child_list) { 1916 if (!pchild->mapped_to_gpu) 1917 continue; 1918 mapped = true; 1919 mutex_lock_nested(&pchild->lock, 1); 1920 if (pchild->start <= last && pchild->last >= start) { 1921 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1922 pchild->start, pchild->last); 1923 atomic_inc(&pchild->invalid); 1924 } 1925 mutex_unlock(&pchild->lock); 1926 } 1927 1928 if (!mapped) 1929 return r; 1930 1931 if (prange->start <= last && prange->last >= start) 1932 atomic_inc(&prange->invalid); 1933 1934 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1935 if (evicted_ranges != 1) 1936 return r; 1937 1938 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1939 prange->svms, prange->start, prange->last); 1940 1941 /* First eviction, stop the queues */ 1942 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1943 if (r) 1944 pr_debug("failed to quiesce KFD\n"); 1945 1946 pr_debug("schedule to restore svm %p ranges\n", svms); 1947 schedule_delayed_work(&svms->restore_work, 1948 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1949 } else { 1950 unsigned long s, l; 1951 uint32_t trigger; 1952 1953 if (event == MMU_NOTIFY_MIGRATE) 1954 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1955 else 1956 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1957 1958 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1959 prange->svms, start, last); 1960 list_for_each_entry(pchild, &prange->child_list, child_list) { 1961 mutex_lock_nested(&pchild->lock, 1); 1962 s = max(start, pchild->start); 1963 l = min(last, pchild->last); 1964 if (l >= s) 1965 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1966 mutex_unlock(&pchild->lock); 1967 } 1968 s = max(start, prange->start); 1969 l = min(last, prange->last); 1970 if (l >= s) 1971 svm_range_unmap_from_gpus(prange, s, l, trigger); 1972 } 1973 1974 return r; 1975 } 1976 1977 static struct svm_range *svm_range_clone(struct svm_range *old) 1978 { 1979 struct svm_range *new; 1980 1981 new = svm_range_new(old->svms, old->start, old->last, false); 1982 if (!new) 1983 return NULL; 1984 if (svm_range_copy_dma_addrs(new, old)) { 1985 svm_range_free(new, false); 1986 return NULL; 1987 } 1988 if (old->svm_bo) { 1989 new->ttm_res = old->ttm_res; 1990 new->offset = old->offset; 1991 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1992 spin_lock(&new->svm_bo->list_lock); 1993 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1994 spin_unlock(&new->svm_bo->list_lock); 1995 } 1996 new->flags = old->flags; 1997 new->preferred_loc = old->preferred_loc; 1998 new->prefetch_loc = old->prefetch_loc; 1999 new->actual_loc = old->actual_loc; 2000 new->granularity = old->granularity; 2001 new->mapped_to_gpu = old->mapped_to_gpu; 2002 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2003 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2004 2005 return new; 2006 } 2007 2008 void svm_range_set_max_pages(struct amdgpu_device *adev) 2009 { 2010 uint64_t max_pages; 2011 uint64_t pages, _pages; 2012 uint64_t min_pages = 0; 2013 int i, id; 2014 2015 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2016 if (adev->kfd.dev->nodes[i]->xcp) 2017 id = adev->kfd.dev->nodes[i]->xcp->id; 2018 else 2019 id = -1; 2020 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2021 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2022 pages = rounddown_pow_of_two(pages); 2023 min_pages = min_not_zero(min_pages, pages); 2024 } 2025 2026 do { 2027 max_pages = READ_ONCE(max_svm_range_pages); 2028 _pages = min_not_zero(max_pages, min_pages); 2029 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2030 } 2031 2032 static int 2033 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2034 uint64_t max_pages, struct list_head *insert_list, 2035 struct list_head *update_list) 2036 { 2037 struct svm_range *prange; 2038 uint64_t l; 2039 2040 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2041 max_pages, start, last); 2042 2043 while (last >= start) { 2044 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2045 2046 prange = svm_range_new(svms, start, l, true); 2047 if (!prange) 2048 return -ENOMEM; 2049 list_add(&prange->list, insert_list); 2050 list_add(&prange->update_list, update_list); 2051 2052 start = l + 1; 2053 } 2054 return 0; 2055 } 2056 2057 /** 2058 * svm_range_add - add svm range and handle overlap 2059 * @p: the range add to this process svms 2060 * @start: page size aligned 2061 * @size: page size aligned 2062 * @nattr: number of attributes 2063 * @attrs: array of attributes 2064 * @update_list: output, the ranges need validate and update GPU mapping 2065 * @insert_list: output, the ranges need insert to svms 2066 * @remove_list: output, the ranges are replaced and need remove from svms 2067 * @remap_list: output, remap unaligned svm ranges 2068 * 2069 * Check if the virtual address range has overlap with any existing ranges, 2070 * split partly overlapping ranges and add new ranges in the gaps. All changes 2071 * should be applied to the range_list and interval tree transactionally. If 2072 * any range split or allocation fails, the entire update fails. Therefore any 2073 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2074 * unchanged. 2075 * 2076 * If the transaction succeeds, the caller can update and insert clones and 2077 * new ranges, then free the originals. 2078 * 2079 * Otherwise the caller can free the clones and new ranges, while the old 2080 * svm_ranges remain unchanged. 2081 * 2082 * Context: Process context, caller must hold svms->lock 2083 * 2084 * Return: 2085 * 0 - OK, otherwise error code 2086 */ 2087 static int 2088 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2089 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2090 struct list_head *update_list, struct list_head *insert_list, 2091 struct list_head *remove_list, struct list_head *remap_list) 2092 { 2093 unsigned long last = start + size - 1UL; 2094 struct svm_range_list *svms = &p->svms; 2095 struct interval_tree_node *node; 2096 struct svm_range *prange; 2097 struct svm_range *tmp; 2098 struct list_head new_list; 2099 int r = 0; 2100 2101 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2102 2103 INIT_LIST_HEAD(update_list); 2104 INIT_LIST_HEAD(insert_list); 2105 INIT_LIST_HEAD(remove_list); 2106 INIT_LIST_HEAD(&new_list); 2107 INIT_LIST_HEAD(remap_list); 2108 2109 node = interval_tree_iter_first(&svms->objects, start, last); 2110 while (node) { 2111 struct interval_tree_node *next; 2112 unsigned long next_start; 2113 2114 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2115 node->last); 2116 2117 prange = container_of(node, struct svm_range, it_node); 2118 next = interval_tree_iter_next(node, start, last); 2119 next_start = min(node->last, last) + 1; 2120 2121 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2122 prange->mapped_to_gpu) { 2123 /* nothing to do */ 2124 } else if (node->start < start || node->last > last) { 2125 /* node intersects the update range and its attributes 2126 * will change. Clone and split it, apply updates only 2127 * to the overlapping part 2128 */ 2129 struct svm_range *old = prange; 2130 2131 prange = svm_range_clone(old); 2132 if (!prange) { 2133 r = -ENOMEM; 2134 goto out; 2135 } 2136 2137 list_add(&old->update_list, remove_list); 2138 list_add(&prange->list, insert_list); 2139 list_add(&prange->update_list, update_list); 2140 2141 if (node->start < start) { 2142 pr_debug("change old range start\n"); 2143 r = svm_range_split_head(prange, start, 2144 insert_list, remap_list); 2145 if (r) 2146 goto out; 2147 } 2148 if (node->last > last) { 2149 pr_debug("change old range last\n"); 2150 r = svm_range_split_tail(prange, last, 2151 insert_list, remap_list); 2152 if (r) 2153 goto out; 2154 } 2155 } else { 2156 /* The node is contained within start..last, 2157 * just update it 2158 */ 2159 list_add(&prange->update_list, update_list); 2160 } 2161 2162 /* insert a new node if needed */ 2163 if (node->start > start) { 2164 r = svm_range_split_new(svms, start, node->start - 1, 2165 READ_ONCE(max_svm_range_pages), 2166 &new_list, update_list); 2167 if (r) 2168 goto out; 2169 } 2170 2171 node = next; 2172 start = next_start; 2173 } 2174 2175 /* add a final range at the end if needed */ 2176 if (start <= last) 2177 r = svm_range_split_new(svms, start, last, 2178 READ_ONCE(max_svm_range_pages), 2179 &new_list, update_list); 2180 2181 out: 2182 if (r) { 2183 list_for_each_entry_safe(prange, tmp, insert_list, list) 2184 svm_range_free(prange, false); 2185 list_for_each_entry_safe(prange, tmp, &new_list, list) 2186 svm_range_free(prange, true); 2187 } else { 2188 list_splice(&new_list, insert_list); 2189 } 2190 2191 return r; 2192 } 2193 2194 static void 2195 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2196 struct svm_range *prange) 2197 { 2198 unsigned long start; 2199 unsigned long last; 2200 2201 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2202 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2203 2204 if (prange->start == start && prange->last == last) 2205 return; 2206 2207 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2208 prange->svms, prange, start, last, prange->start, 2209 prange->last); 2210 2211 if (start != 0 && last != 0) { 2212 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2213 svm_range_remove_notifier(prange); 2214 } 2215 prange->it_node.start = prange->start; 2216 prange->it_node.last = prange->last; 2217 2218 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2219 svm_range_add_notifier_locked(mm, prange); 2220 } 2221 2222 static void 2223 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2224 struct mm_struct *mm) 2225 { 2226 switch (prange->work_item.op) { 2227 case SVM_OP_NULL: 2228 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2229 svms, prange, prange->start, prange->last); 2230 break; 2231 case SVM_OP_UNMAP_RANGE: 2232 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2233 svms, prange, prange->start, prange->last); 2234 svm_range_unlink(prange); 2235 svm_range_remove_notifier(prange); 2236 svm_range_free(prange, true); 2237 break; 2238 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2239 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2240 svms, prange, prange->start, prange->last); 2241 svm_range_update_notifier_and_interval_tree(mm, prange); 2242 break; 2243 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2244 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2245 svms, prange, prange->start, prange->last); 2246 svm_range_update_notifier_and_interval_tree(mm, prange); 2247 /* TODO: implement deferred validation and mapping */ 2248 break; 2249 case SVM_OP_ADD_RANGE: 2250 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2251 prange->start, prange->last); 2252 svm_range_add_to_svms(prange); 2253 svm_range_add_notifier_locked(mm, prange); 2254 break; 2255 case SVM_OP_ADD_RANGE_AND_MAP: 2256 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2257 prange, prange->start, prange->last); 2258 svm_range_add_to_svms(prange); 2259 svm_range_add_notifier_locked(mm, prange); 2260 /* TODO: implement deferred validation and mapping */ 2261 break; 2262 default: 2263 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2264 prange->work_item.op); 2265 } 2266 } 2267 2268 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2269 { 2270 struct kfd_process_device *pdd; 2271 struct kfd_process *p; 2272 int drain; 2273 uint32_t i; 2274 2275 p = container_of(svms, struct kfd_process, svms); 2276 2277 restart: 2278 drain = atomic_read(&svms->drain_pagefaults); 2279 if (!drain) 2280 return; 2281 2282 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2283 pdd = p->pdds[i]; 2284 if (!pdd) 2285 continue; 2286 2287 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2288 2289 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2290 pdd->dev->adev->irq.retry_cam_enabled ? 2291 &pdd->dev->adev->irq.ih : 2292 &pdd->dev->adev->irq.ih1); 2293 2294 if (pdd->dev->adev->irq.retry_cam_enabled) 2295 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2296 &pdd->dev->adev->irq.ih_soft); 2297 2298 2299 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2300 } 2301 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain) 2302 goto restart; 2303 } 2304 2305 static void svm_range_deferred_list_work(struct work_struct *work) 2306 { 2307 struct svm_range_list *svms; 2308 struct svm_range *prange; 2309 struct mm_struct *mm; 2310 2311 svms = container_of(work, struct svm_range_list, deferred_list_work); 2312 pr_debug("enter svms 0x%p\n", svms); 2313 2314 spin_lock(&svms->deferred_list_lock); 2315 while (!list_empty(&svms->deferred_range_list)) { 2316 prange = list_first_entry(&svms->deferred_range_list, 2317 struct svm_range, deferred_list); 2318 spin_unlock(&svms->deferred_list_lock); 2319 2320 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2321 prange->start, prange->last, prange->work_item.op); 2322 2323 mm = prange->work_item.mm; 2324 retry: 2325 mmap_write_lock(mm); 2326 2327 /* Checking for the need to drain retry faults must be inside 2328 * mmap write lock to serialize with munmap notifiers. 2329 */ 2330 if (unlikely(atomic_read(&svms->drain_pagefaults))) { 2331 mmap_write_unlock(mm); 2332 svm_range_drain_retry_fault(svms); 2333 goto retry; 2334 } 2335 2336 /* Remove from deferred_list must be inside mmap write lock, for 2337 * two race cases: 2338 * 1. unmap_from_cpu may change work_item.op and add the range 2339 * to deferred_list again, cause use after free bug. 2340 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2341 * lock and continue because deferred_list is empty, but 2342 * deferred_list work is actually waiting for mmap lock. 2343 */ 2344 spin_lock(&svms->deferred_list_lock); 2345 list_del_init(&prange->deferred_list); 2346 spin_unlock(&svms->deferred_list_lock); 2347 2348 mutex_lock(&svms->lock); 2349 mutex_lock(&prange->migrate_mutex); 2350 while (!list_empty(&prange->child_list)) { 2351 struct svm_range *pchild; 2352 2353 pchild = list_first_entry(&prange->child_list, 2354 struct svm_range, child_list); 2355 pr_debug("child prange 0x%p op %d\n", pchild, 2356 pchild->work_item.op); 2357 list_del_init(&pchild->child_list); 2358 svm_range_handle_list_op(svms, pchild, mm); 2359 } 2360 mutex_unlock(&prange->migrate_mutex); 2361 2362 svm_range_handle_list_op(svms, prange, mm); 2363 mutex_unlock(&svms->lock); 2364 mmap_write_unlock(mm); 2365 2366 /* Pairs with mmget in svm_range_add_list_work */ 2367 mmput(mm); 2368 2369 spin_lock(&svms->deferred_list_lock); 2370 } 2371 spin_unlock(&svms->deferred_list_lock); 2372 pr_debug("exit svms 0x%p\n", svms); 2373 } 2374 2375 void 2376 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2377 struct mm_struct *mm, enum svm_work_list_ops op) 2378 { 2379 spin_lock(&svms->deferred_list_lock); 2380 /* if prange is on the deferred list */ 2381 if (!list_empty(&prange->deferred_list)) { 2382 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2383 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2384 if (op != SVM_OP_NULL && 2385 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2386 prange->work_item.op = op; 2387 } else { 2388 prange->work_item.op = op; 2389 2390 /* Pairs with mmput in deferred_list_work */ 2391 mmget(mm); 2392 prange->work_item.mm = mm; 2393 list_add_tail(&prange->deferred_list, 2394 &prange->svms->deferred_range_list); 2395 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2396 prange, prange->start, prange->last, op); 2397 } 2398 spin_unlock(&svms->deferred_list_lock); 2399 } 2400 2401 void schedule_deferred_list_work(struct svm_range_list *svms) 2402 { 2403 spin_lock(&svms->deferred_list_lock); 2404 if (!list_empty(&svms->deferred_range_list)) 2405 schedule_work(&svms->deferred_list_work); 2406 spin_unlock(&svms->deferred_list_lock); 2407 } 2408 2409 static void 2410 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent, 2411 struct svm_range *prange, unsigned long start, 2412 unsigned long last) 2413 { 2414 struct svm_range *head; 2415 struct svm_range *tail; 2416 2417 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2418 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2419 prange->start, prange->last); 2420 return; 2421 } 2422 if (start > prange->last || last < prange->start) 2423 return; 2424 2425 head = tail = prange; 2426 if (start > prange->start) 2427 svm_range_split(prange, prange->start, start - 1, &tail); 2428 if (last < tail->last) 2429 svm_range_split(tail, last + 1, tail->last, &head); 2430 2431 if (head != prange && tail != prange) { 2432 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2433 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE); 2434 } else if (tail != prange) { 2435 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE); 2436 } else if (head != prange) { 2437 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE); 2438 } else if (parent != prange) { 2439 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2440 } 2441 } 2442 2443 static void 2444 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2445 unsigned long start, unsigned long last) 2446 { 2447 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2448 struct svm_range_list *svms; 2449 struct svm_range *pchild; 2450 struct kfd_process *p; 2451 unsigned long s, l; 2452 bool unmap_parent; 2453 2454 p = kfd_lookup_process_by_mm(mm); 2455 if (!p) 2456 return; 2457 svms = &p->svms; 2458 2459 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2460 prange, prange->start, prange->last, start, last); 2461 2462 /* Make sure pending page faults are drained in the deferred worker 2463 * before the range is freed to avoid straggler interrupts on 2464 * unmapped memory causing "phantom faults". 2465 */ 2466 atomic_inc(&svms->drain_pagefaults); 2467 2468 unmap_parent = start <= prange->start && last >= prange->last; 2469 2470 list_for_each_entry(pchild, &prange->child_list, child_list) { 2471 mutex_lock_nested(&pchild->lock, 1); 2472 s = max(start, pchild->start); 2473 l = min(last, pchild->last); 2474 if (l >= s) 2475 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2476 svm_range_unmap_split(mm, prange, pchild, start, last); 2477 mutex_unlock(&pchild->lock); 2478 } 2479 s = max(start, prange->start); 2480 l = min(last, prange->last); 2481 if (l >= s) 2482 svm_range_unmap_from_gpus(prange, s, l, trigger); 2483 svm_range_unmap_split(mm, prange, prange, start, last); 2484 2485 if (unmap_parent) 2486 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2487 else 2488 svm_range_add_list_work(svms, prange, mm, 2489 SVM_OP_UPDATE_RANGE_NOTIFIER); 2490 schedule_deferred_list_work(svms); 2491 2492 kfd_unref_process(p); 2493 } 2494 2495 /** 2496 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2497 * @mni: mmu_interval_notifier struct 2498 * @range: mmu_notifier_range struct 2499 * @cur_seq: value to pass to mmu_interval_set_seq() 2500 * 2501 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2502 * is from migration, or CPU page invalidation callback. 2503 * 2504 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2505 * work thread, and split prange if only part of prange is unmapped. 2506 * 2507 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2508 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2509 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2510 * update GPU mapping to recover. 2511 * 2512 * Context: mmap lock, notifier_invalidate_start lock are held 2513 * for invalidate event, prange lock is held if this is from migration 2514 */ 2515 static bool 2516 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2517 const struct mmu_notifier_range *range, 2518 unsigned long cur_seq) 2519 { 2520 struct svm_range *prange; 2521 unsigned long start; 2522 unsigned long last; 2523 2524 if (range->event == MMU_NOTIFY_RELEASE) 2525 return true; 2526 if (!mmget_not_zero(mni->mm)) 2527 return true; 2528 2529 start = mni->interval_tree.start; 2530 last = mni->interval_tree.last; 2531 start = max(start, range->start) >> PAGE_SHIFT; 2532 last = min(last, range->end - 1) >> PAGE_SHIFT; 2533 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2534 start, last, range->start >> PAGE_SHIFT, 2535 (range->end - 1) >> PAGE_SHIFT, 2536 mni->interval_tree.start >> PAGE_SHIFT, 2537 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2538 2539 prange = container_of(mni, struct svm_range, notifier); 2540 2541 svm_range_lock(prange); 2542 mmu_interval_set_seq(mni, cur_seq); 2543 2544 switch (range->event) { 2545 case MMU_NOTIFY_UNMAP: 2546 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2547 break; 2548 default: 2549 svm_range_evict(prange, mni->mm, start, last, range->event); 2550 break; 2551 } 2552 2553 svm_range_unlock(prange); 2554 mmput(mni->mm); 2555 2556 return true; 2557 } 2558 2559 /** 2560 * svm_range_from_addr - find svm range from fault address 2561 * @svms: svm range list header 2562 * @addr: address to search range interval tree, in pages 2563 * @parent: parent range if range is on child list 2564 * 2565 * Context: The caller must hold svms->lock 2566 * 2567 * Return: the svm_range found or NULL 2568 */ 2569 struct svm_range * 2570 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2571 struct svm_range **parent) 2572 { 2573 struct interval_tree_node *node; 2574 struct svm_range *prange; 2575 struct svm_range *pchild; 2576 2577 node = interval_tree_iter_first(&svms->objects, addr, addr); 2578 if (!node) 2579 return NULL; 2580 2581 prange = container_of(node, struct svm_range, it_node); 2582 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2583 addr, prange->start, prange->last, node->start, node->last); 2584 2585 if (addr >= prange->start && addr <= prange->last) { 2586 if (parent) 2587 *parent = prange; 2588 return prange; 2589 } 2590 list_for_each_entry(pchild, &prange->child_list, child_list) 2591 if (addr >= pchild->start && addr <= pchild->last) { 2592 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2593 addr, pchild->start, pchild->last); 2594 if (parent) 2595 *parent = prange; 2596 return pchild; 2597 } 2598 2599 return NULL; 2600 } 2601 2602 /* svm_range_best_restore_location - decide the best fault restore location 2603 * @prange: svm range structure 2604 * @adev: the GPU on which vm fault happened 2605 * 2606 * This is only called when xnack is on, to decide the best location to restore 2607 * the range mapping after GPU vm fault. Caller uses the best location to do 2608 * migration if actual loc is not best location, then update GPU page table 2609 * mapping to the best location. 2610 * 2611 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2612 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2613 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2614 * if range actual loc is cpu, best_loc is cpu 2615 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2616 * range actual loc. 2617 * Otherwise, GPU no access, best_loc is -1. 2618 * 2619 * Return: 2620 * -1 means vm fault GPU no access 2621 * 0 for CPU or GPU id 2622 */ 2623 static int32_t 2624 svm_range_best_restore_location(struct svm_range *prange, 2625 struct kfd_node *node, 2626 int32_t *gpuidx) 2627 { 2628 struct kfd_node *bo_node, *preferred_node; 2629 struct kfd_process *p; 2630 uint32_t gpuid; 2631 int r; 2632 2633 p = container_of(prange->svms, struct kfd_process, svms); 2634 2635 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2636 if (r < 0) { 2637 pr_debug("failed to get gpuid from kgd\n"); 2638 return -1; 2639 } 2640 2641 if (node->adev->gmc.is_app_apu) 2642 return 0; 2643 2644 if (prange->preferred_loc == gpuid || 2645 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2646 return prange->preferred_loc; 2647 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2648 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2649 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2650 return prange->preferred_loc; 2651 /* fall through */ 2652 } 2653 2654 if (test_bit(*gpuidx, prange->bitmap_access)) 2655 return gpuid; 2656 2657 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2658 if (!prange->actual_loc) 2659 return 0; 2660 2661 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2662 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2663 return prange->actual_loc; 2664 else 2665 return 0; 2666 } 2667 2668 return -1; 2669 } 2670 2671 static int 2672 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2673 unsigned long *start, unsigned long *last, 2674 bool *is_heap_stack) 2675 { 2676 struct vm_area_struct *vma; 2677 struct interval_tree_node *node; 2678 unsigned long start_limit, end_limit; 2679 2680 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2681 if (!vma) { 2682 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2683 return -EFAULT; 2684 } 2685 2686 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2687 2688 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2689 (unsigned long)ALIGN_DOWN(addr, 2UL << 8)); 2690 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2691 (unsigned long)ALIGN(addr + 1, 2UL << 8)); 2692 /* First range that starts after the fault address */ 2693 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2694 if (node) { 2695 end_limit = min(end_limit, node->start); 2696 /* Last range that ends before the fault address */ 2697 node = container_of(rb_prev(&node->rb), 2698 struct interval_tree_node, rb); 2699 } else { 2700 /* Last range must end before addr because 2701 * there was no range after addr 2702 */ 2703 node = container_of(rb_last(&p->svms.objects.rb_root), 2704 struct interval_tree_node, rb); 2705 } 2706 if (node) { 2707 if (node->last >= addr) { 2708 WARN(1, "Overlap with prev node and page fault addr\n"); 2709 return -EFAULT; 2710 } 2711 start_limit = max(start_limit, node->last + 1); 2712 } 2713 2714 *start = start_limit; 2715 *last = end_limit - 1; 2716 2717 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2718 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2719 *start, *last, *is_heap_stack); 2720 2721 return 0; 2722 } 2723 2724 static int 2725 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2726 uint64_t *bo_s, uint64_t *bo_l) 2727 { 2728 struct amdgpu_bo_va_mapping *mapping; 2729 struct interval_tree_node *node; 2730 struct amdgpu_bo *bo = NULL; 2731 unsigned long userptr; 2732 uint32_t i; 2733 int r; 2734 2735 for (i = 0; i < p->n_pdds; i++) { 2736 struct amdgpu_vm *vm; 2737 2738 if (!p->pdds[i]->drm_priv) 2739 continue; 2740 2741 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2742 r = amdgpu_bo_reserve(vm->root.bo, false); 2743 if (r) 2744 return r; 2745 2746 /* Check userptr by searching entire vm->va interval tree */ 2747 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2748 while (node) { 2749 mapping = container_of((struct rb_node *)node, 2750 struct amdgpu_bo_va_mapping, rb); 2751 bo = mapping->bo_va->base.bo; 2752 2753 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2754 start << PAGE_SHIFT, 2755 last << PAGE_SHIFT, 2756 &userptr)) { 2757 node = interval_tree_iter_next(node, 0, ~0ULL); 2758 continue; 2759 } 2760 2761 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2762 start, last); 2763 if (bo_s && bo_l) { 2764 *bo_s = userptr >> PAGE_SHIFT; 2765 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2766 } 2767 amdgpu_bo_unreserve(vm->root.bo); 2768 return -EADDRINUSE; 2769 } 2770 amdgpu_bo_unreserve(vm->root.bo); 2771 } 2772 return 0; 2773 } 2774 2775 static struct 2776 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2777 struct kfd_process *p, 2778 struct mm_struct *mm, 2779 int64_t addr) 2780 { 2781 struct svm_range *prange = NULL; 2782 unsigned long start, last; 2783 uint32_t gpuid, gpuidx; 2784 bool is_heap_stack; 2785 uint64_t bo_s = 0; 2786 uint64_t bo_l = 0; 2787 int r; 2788 2789 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2790 &is_heap_stack)) 2791 return NULL; 2792 2793 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2794 if (r != -EADDRINUSE) 2795 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2796 2797 if (r == -EADDRINUSE) { 2798 if (addr >= bo_s && addr <= bo_l) 2799 return NULL; 2800 2801 /* Create one page svm range if 2MB range overlapping */ 2802 start = addr; 2803 last = addr; 2804 } 2805 2806 prange = svm_range_new(&p->svms, start, last, true); 2807 if (!prange) { 2808 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2809 return NULL; 2810 } 2811 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2812 pr_debug("failed to get gpuid from kgd\n"); 2813 svm_range_free(prange, true); 2814 return NULL; 2815 } 2816 2817 if (is_heap_stack) 2818 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2819 2820 svm_range_add_to_svms(prange); 2821 svm_range_add_notifier_locked(mm, prange); 2822 2823 return prange; 2824 } 2825 2826 /* svm_range_skip_recover - decide if prange can be recovered 2827 * @prange: svm range structure 2828 * 2829 * GPU vm retry fault handle skip recover the range for cases: 2830 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2831 * deferred list work will drain the stale fault before free the prange. 2832 * 2. prange is on deferred list to add interval notifier after split, or 2833 * 3. prange is child range, it is split from parent prange, recover later 2834 * after interval notifier is added. 2835 * 2836 * Return: true to skip recover, false to recover 2837 */ 2838 static bool svm_range_skip_recover(struct svm_range *prange) 2839 { 2840 struct svm_range_list *svms = prange->svms; 2841 2842 spin_lock(&svms->deferred_list_lock); 2843 if (list_empty(&prange->deferred_list) && 2844 list_empty(&prange->child_list)) { 2845 spin_unlock(&svms->deferred_list_lock); 2846 return false; 2847 } 2848 spin_unlock(&svms->deferred_list_lock); 2849 2850 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2851 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2852 svms, prange, prange->start, prange->last); 2853 return true; 2854 } 2855 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2856 prange->work_item.op == SVM_OP_ADD_RANGE) { 2857 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2858 svms, prange, prange->start, prange->last); 2859 return true; 2860 } 2861 return false; 2862 } 2863 2864 static void 2865 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2866 int32_t gpuidx) 2867 { 2868 struct kfd_process_device *pdd; 2869 2870 /* fault is on different page of same range 2871 * or fault is skipped to recover later 2872 * or fault is on invalid virtual address 2873 */ 2874 if (gpuidx == MAX_GPU_INSTANCE) { 2875 uint32_t gpuid; 2876 int r; 2877 2878 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2879 if (r < 0) 2880 return; 2881 } 2882 2883 /* fault is recovered 2884 * or fault cannot recover because GPU no access on the range 2885 */ 2886 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2887 if (pdd) 2888 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2889 } 2890 2891 static bool 2892 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2893 { 2894 unsigned long requested = VM_READ; 2895 2896 if (write_fault) 2897 requested |= VM_WRITE; 2898 2899 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2900 vma->vm_flags); 2901 return (vma->vm_flags & requested) == requested; 2902 } 2903 2904 int 2905 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2906 uint32_t vmid, uint32_t node_id, 2907 uint64_t addr, bool write_fault) 2908 { 2909 struct mm_struct *mm = NULL; 2910 struct svm_range_list *svms; 2911 struct svm_range *prange; 2912 struct kfd_process *p; 2913 ktime_t timestamp = ktime_get_boottime(); 2914 struct kfd_node *node; 2915 int32_t best_loc; 2916 int32_t gpuidx = MAX_GPU_INSTANCE; 2917 bool write_locked = false; 2918 struct vm_area_struct *vma; 2919 bool migration = false; 2920 int r = 0; 2921 2922 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2923 pr_debug("device does not support SVM\n"); 2924 return -EFAULT; 2925 } 2926 2927 p = kfd_lookup_process_by_pasid(pasid); 2928 if (!p) { 2929 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2930 return 0; 2931 } 2932 svms = &p->svms; 2933 2934 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2935 2936 if (atomic_read(&svms->drain_pagefaults)) { 2937 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 2938 r = 0; 2939 goto out; 2940 } 2941 2942 if (!p->xnack_enabled) { 2943 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 2944 r = -EFAULT; 2945 goto out; 2946 } 2947 2948 /* p->lead_thread is available as kfd_process_wq_release flush the work 2949 * before releasing task ref. 2950 */ 2951 mm = get_task_mm(p->lead_thread); 2952 if (!mm) { 2953 pr_debug("svms 0x%p failed to get mm\n", svms); 2954 r = 0; 2955 goto out; 2956 } 2957 2958 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2959 if (!node) { 2960 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2961 vmid); 2962 r = -EFAULT; 2963 goto out; 2964 } 2965 mmap_read_lock(mm); 2966 retry_write_locked: 2967 mutex_lock(&svms->lock); 2968 prange = svm_range_from_addr(svms, addr, NULL); 2969 if (!prange) { 2970 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 2971 svms, addr); 2972 if (!write_locked) { 2973 /* Need the write lock to create new range with MMU notifier. 2974 * Also flush pending deferred work to make sure the interval 2975 * tree is up to date before we add a new range 2976 */ 2977 mutex_unlock(&svms->lock); 2978 mmap_read_unlock(mm); 2979 mmap_write_lock(mm); 2980 write_locked = true; 2981 goto retry_write_locked; 2982 } 2983 prange = svm_range_create_unregistered_range(node, p, mm, addr); 2984 if (!prange) { 2985 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 2986 svms, addr); 2987 mmap_write_downgrade(mm); 2988 r = -EFAULT; 2989 goto out_unlock_svms; 2990 } 2991 } 2992 if (write_locked) 2993 mmap_write_downgrade(mm); 2994 2995 mutex_lock(&prange->migrate_mutex); 2996 2997 if (svm_range_skip_recover(prange)) { 2998 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 2999 r = 0; 3000 goto out_unlock_range; 3001 } 3002 3003 /* skip duplicate vm fault on different pages of same range */ 3004 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3005 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3006 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3007 svms, prange->start, prange->last); 3008 r = 0; 3009 goto out_unlock_range; 3010 } 3011 3012 /* __do_munmap removed VMA, return success as we are handling stale 3013 * retry fault. 3014 */ 3015 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3016 if (!vma) { 3017 pr_debug("address 0x%llx VMA is removed\n", addr); 3018 r = 0; 3019 goto out_unlock_range; 3020 } 3021 3022 if (!svm_fault_allowed(vma, write_fault)) { 3023 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3024 write_fault ? "write" : "read"); 3025 r = -EPERM; 3026 goto out_unlock_range; 3027 } 3028 3029 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3030 if (best_loc == -1) { 3031 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3032 svms, prange->start, prange->last); 3033 r = -EACCES; 3034 goto out_unlock_range; 3035 } 3036 3037 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3038 svms, prange->start, prange->last, best_loc, 3039 prange->actual_loc); 3040 3041 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3042 write_fault, timestamp); 3043 3044 if (prange->actual_loc != best_loc) { 3045 migration = true; 3046 if (best_loc) { 3047 r = svm_migrate_to_vram(prange, best_loc, mm, 3048 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3049 if (r) { 3050 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3051 r, addr); 3052 /* Fallback to system memory if migration to 3053 * VRAM failed 3054 */ 3055 if (prange->actual_loc) 3056 r = svm_migrate_vram_to_ram(prange, mm, 3057 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3058 NULL); 3059 else 3060 r = 0; 3061 } 3062 } else { 3063 r = svm_migrate_vram_to_ram(prange, mm, 3064 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 3065 NULL); 3066 } 3067 if (r) { 3068 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3069 r, svms, prange->start, prange->last); 3070 goto out_unlock_range; 3071 } 3072 } 3073 3074 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false); 3075 if (r) 3076 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3077 r, svms, prange->start, prange->last); 3078 3079 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3080 migration); 3081 3082 out_unlock_range: 3083 mutex_unlock(&prange->migrate_mutex); 3084 out_unlock_svms: 3085 mutex_unlock(&svms->lock); 3086 mmap_read_unlock(mm); 3087 3088 svm_range_count_fault(node, p, gpuidx); 3089 3090 mmput(mm); 3091 out: 3092 kfd_unref_process(p); 3093 3094 if (r == -EAGAIN) { 3095 pr_debug("recover vm fault later\n"); 3096 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3097 r = 0; 3098 } 3099 return r; 3100 } 3101 3102 int 3103 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3104 { 3105 struct svm_range *prange, *pchild; 3106 uint64_t reserved_size = 0; 3107 uint64_t size; 3108 int r = 0; 3109 3110 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3111 3112 mutex_lock(&p->svms.lock); 3113 3114 list_for_each_entry(prange, &p->svms.list, list) { 3115 svm_range_lock(prange); 3116 list_for_each_entry(pchild, &prange->child_list, child_list) { 3117 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3118 if (xnack_enabled) { 3119 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3120 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3121 } else { 3122 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3123 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3124 if (r) 3125 goto out_unlock; 3126 reserved_size += size; 3127 } 3128 } 3129 3130 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3131 if (xnack_enabled) { 3132 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3133 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3134 } else { 3135 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3136 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3137 if (r) 3138 goto out_unlock; 3139 reserved_size += size; 3140 } 3141 out_unlock: 3142 svm_range_unlock(prange); 3143 if (r) 3144 break; 3145 } 3146 3147 if (r) 3148 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3149 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3150 else 3151 /* Change xnack mode must be inside svms lock, to avoid race with 3152 * svm_range_deferred_list_work unreserve memory in parallel. 3153 */ 3154 p->xnack_enabled = xnack_enabled; 3155 3156 mutex_unlock(&p->svms.lock); 3157 return r; 3158 } 3159 3160 void svm_range_list_fini(struct kfd_process *p) 3161 { 3162 struct svm_range *prange; 3163 struct svm_range *next; 3164 3165 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms); 3166 3167 cancel_delayed_work_sync(&p->svms.restore_work); 3168 3169 /* Ensure list work is finished before process is destroyed */ 3170 flush_work(&p->svms.deferred_list_work); 3171 3172 /* 3173 * Ensure no retry fault comes in afterwards, as page fault handler will 3174 * not find kfd process and take mm lock to recover fault. 3175 */ 3176 atomic_inc(&p->svms.drain_pagefaults); 3177 svm_range_drain_retry_fault(&p->svms); 3178 3179 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3180 svm_range_unlink(prange); 3181 svm_range_remove_notifier(prange); 3182 svm_range_free(prange, true); 3183 } 3184 3185 mutex_destroy(&p->svms.lock); 3186 3187 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms); 3188 } 3189 3190 int svm_range_list_init(struct kfd_process *p) 3191 { 3192 struct svm_range_list *svms = &p->svms; 3193 int i; 3194 3195 svms->objects = RB_ROOT_CACHED; 3196 mutex_init(&svms->lock); 3197 INIT_LIST_HEAD(&svms->list); 3198 atomic_set(&svms->evicted_ranges, 0); 3199 atomic_set(&svms->drain_pagefaults, 0); 3200 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3201 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3202 INIT_LIST_HEAD(&svms->deferred_range_list); 3203 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3204 spin_lock_init(&svms->deferred_list_lock); 3205 3206 for (i = 0; i < p->n_pdds; i++) 3207 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3208 bitmap_set(svms->bitmap_supported, i, 1); 3209 3210 return 0; 3211 } 3212 3213 /** 3214 * svm_range_check_vm - check if virtual address range mapped already 3215 * @p: current kfd_process 3216 * @start: range start address, in pages 3217 * @last: range last address, in pages 3218 * @bo_s: mapping start address in pages if address range already mapped 3219 * @bo_l: mapping last address in pages if address range already mapped 3220 * 3221 * The purpose is to avoid virtual address ranges already allocated by 3222 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3223 * It looks for each pdd in the kfd_process. 3224 * 3225 * Context: Process context 3226 * 3227 * Return 0 - OK, if the range is not mapped. 3228 * Otherwise error code: 3229 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3230 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3231 * a signal. Release all buffer reservations and return to user-space. 3232 */ 3233 static int 3234 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3235 uint64_t *bo_s, uint64_t *bo_l) 3236 { 3237 struct amdgpu_bo_va_mapping *mapping; 3238 struct interval_tree_node *node; 3239 uint32_t i; 3240 int r; 3241 3242 for (i = 0; i < p->n_pdds; i++) { 3243 struct amdgpu_vm *vm; 3244 3245 if (!p->pdds[i]->drm_priv) 3246 continue; 3247 3248 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3249 r = amdgpu_bo_reserve(vm->root.bo, false); 3250 if (r) 3251 return r; 3252 3253 node = interval_tree_iter_first(&vm->va, start, last); 3254 if (node) { 3255 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3256 start, last); 3257 mapping = container_of((struct rb_node *)node, 3258 struct amdgpu_bo_va_mapping, rb); 3259 if (bo_s && bo_l) { 3260 *bo_s = mapping->start; 3261 *bo_l = mapping->last; 3262 } 3263 amdgpu_bo_unreserve(vm->root.bo); 3264 return -EADDRINUSE; 3265 } 3266 amdgpu_bo_unreserve(vm->root.bo); 3267 } 3268 3269 return 0; 3270 } 3271 3272 /** 3273 * svm_range_is_valid - check if virtual address range is valid 3274 * @p: current kfd_process 3275 * @start: range start address, in pages 3276 * @size: range size, in pages 3277 * 3278 * Valid virtual address range means it belongs to one or more VMAs 3279 * 3280 * Context: Process context 3281 * 3282 * Return: 3283 * 0 - OK, otherwise error code 3284 */ 3285 static int 3286 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3287 { 3288 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3289 struct vm_area_struct *vma; 3290 unsigned long end; 3291 unsigned long start_unchg = start; 3292 3293 start <<= PAGE_SHIFT; 3294 end = start + (size << PAGE_SHIFT); 3295 do { 3296 vma = vma_lookup(p->mm, start); 3297 if (!vma || (vma->vm_flags & device_vma)) 3298 return -EFAULT; 3299 start = min(end, vma->vm_end); 3300 } while (start < end); 3301 3302 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3303 NULL); 3304 } 3305 3306 /** 3307 * svm_range_best_prefetch_location - decide the best prefetch location 3308 * @prange: svm range structure 3309 * 3310 * For xnack off: 3311 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3312 * can be CPU or GPU. 3313 * 3314 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3315 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3316 * the best prefetch location is always CPU, because GPU can not have coherent 3317 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3318 * 3319 * For xnack on: 3320 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3321 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3322 * 3323 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3324 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3325 * prefetch location is always CPU. 3326 * 3327 * Context: Process context 3328 * 3329 * Return: 3330 * 0 for CPU or GPU id 3331 */ 3332 static uint32_t 3333 svm_range_best_prefetch_location(struct svm_range *prange) 3334 { 3335 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3336 uint32_t best_loc = prange->prefetch_loc; 3337 struct kfd_process_device *pdd; 3338 struct kfd_node *bo_node; 3339 struct kfd_process *p; 3340 uint32_t gpuidx; 3341 3342 p = container_of(prange->svms, struct kfd_process, svms); 3343 3344 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3345 goto out; 3346 3347 bo_node = svm_range_get_node_by_id(prange, best_loc); 3348 if (!bo_node) { 3349 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3350 best_loc = 0; 3351 goto out; 3352 } 3353 3354 if (bo_node->adev->gmc.is_app_apu) { 3355 best_loc = 0; 3356 goto out; 3357 } 3358 3359 if (p->xnack_enabled) 3360 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3361 else 3362 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3363 MAX_GPU_INSTANCE); 3364 3365 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3366 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3367 if (!pdd) { 3368 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3369 continue; 3370 } 3371 3372 if (pdd->dev->adev == bo_node->adev) 3373 continue; 3374 3375 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3376 best_loc = 0; 3377 break; 3378 } 3379 } 3380 3381 out: 3382 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3383 p->xnack_enabled, &p->svms, prange->start, prange->last, 3384 best_loc); 3385 3386 return best_loc; 3387 } 3388 3389 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3390 * @mm: current process mm_struct 3391 * @prange: svm range structure 3392 * @migrated: output, true if migration is triggered 3393 * 3394 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3395 * from ram to vram. 3396 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3397 * from vram to ram. 3398 * 3399 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3400 * and restore work: 3401 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3402 * stops all queues, schedule restore work 3403 * 2. svm_range_restore_work wait for migration is done by 3404 * a. svm_range_validate_vram takes prange->migrate_mutex 3405 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3406 * 3. restore work update mappings of GPU, resume all queues. 3407 * 3408 * Context: Process context 3409 * 3410 * Return: 3411 * 0 - OK, otherwise - error code of migration 3412 */ 3413 static int 3414 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3415 bool *migrated) 3416 { 3417 uint32_t best_loc; 3418 int r = 0; 3419 3420 *migrated = false; 3421 best_loc = svm_range_best_prefetch_location(prange); 3422 3423 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3424 best_loc == prange->actual_loc) 3425 return 0; 3426 3427 if (!best_loc) { 3428 r = svm_migrate_vram_to_ram(prange, mm, 3429 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3430 *migrated = !r; 3431 return r; 3432 } 3433 3434 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3435 *migrated = !r; 3436 3437 return r; 3438 } 3439 3440 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3441 { 3442 if (!fence) 3443 return -EINVAL; 3444 3445 if (dma_fence_is_signaled(&fence->base)) 3446 return 0; 3447 3448 if (fence->svm_bo) { 3449 WRITE_ONCE(fence->svm_bo->evicting, 1); 3450 schedule_work(&fence->svm_bo->eviction_work); 3451 } 3452 3453 return 0; 3454 } 3455 3456 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3457 { 3458 struct svm_range_bo *svm_bo; 3459 struct mm_struct *mm; 3460 int r = 0; 3461 3462 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3463 if (!svm_bo_ref_unless_zero(svm_bo)) 3464 return; /* svm_bo was freed while eviction was pending */ 3465 3466 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3467 mm = svm_bo->eviction_fence->mm; 3468 } else { 3469 svm_range_bo_unref(svm_bo); 3470 return; 3471 } 3472 3473 mmap_read_lock(mm); 3474 spin_lock(&svm_bo->list_lock); 3475 while (!list_empty(&svm_bo->range_list) && !r) { 3476 struct svm_range *prange = 3477 list_first_entry(&svm_bo->range_list, 3478 struct svm_range, svm_bo_list); 3479 int retries = 3; 3480 3481 list_del_init(&prange->svm_bo_list); 3482 spin_unlock(&svm_bo->list_lock); 3483 3484 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3485 prange->start, prange->last); 3486 3487 mutex_lock(&prange->migrate_mutex); 3488 do { 3489 r = svm_migrate_vram_to_ram(prange, mm, 3490 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3491 } while (!r && prange->actual_loc && --retries); 3492 3493 if (!r && prange->actual_loc) 3494 pr_info_once("Migration failed during eviction"); 3495 3496 if (!prange->actual_loc) { 3497 mutex_lock(&prange->lock); 3498 prange->svm_bo = NULL; 3499 mutex_unlock(&prange->lock); 3500 } 3501 mutex_unlock(&prange->migrate_mutex); 3502 3503 spin_lock(&svm_bo->list_lock); 3504 } 3505 spin_unlock(&svm_bo->list_lock); 3506 mmap_read_unlock(mm); 3507 mmput(mm); 3508 3509 dma_fence_signal(&svm_bo->eviction_fence->base); 3510 3511 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3512 * has been called in svm_migrate_vram_to_ram 3513 */ 3514 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3515 svm_range_bo_unref(svm_bo); 3516 } 3517 3518 static int 3519 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3520 uint64_t start, uint64_t size, uint32_t nattr, 3521 struct kfd_ioctl_svm_attribute *attrs) 3522 { 3523 struct amdkfd_process_info *process_info = p->kgd_process_info; 3524 struct list_head update_list; 3525 struct list_head insert_list; 3526 struct list_head remove_list; 3527 struct list_head remap_list; 3528 struct svm_range_list *svms; 3529 struct svm_range *prange; 3530 struct svm_range *next; 3531 bool update_mapping = false; 3532 bool flush_tlb; 3533 int r, ret = 0; 3534 3535 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3536 p->pasid, &p->svms, start, start + size - 1, size); 3537 3538 r = svm_range_check_attr(p, nattr, attrs); 3539 if (r) 3540 return r; 3541 3542 svms = &p->svms; 3543 3544 mutex_lock(&process_info->lock); 3545 3546 svm_range_list_lock_and_flush_work(svms, mm); 3547 3548 r = svm_range_is_valid(p, start, size); 3549 if (r) { 3550 pr_debug("invalid range r=%d\n", r); 3551 mmap_write_unlock(mm); 3552 goto out; 3553 } 3554 3555 mutex_lock(&svms->lock); 3556 3557 /* Add new range and split existing ranges as needed */ 3558 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3559 &insert_list, &remove_list, &remap_list); 3560 if (r) { 3561 mutex_unlock(&svms->lock); 3562 mmap_write_unlock(mm); 3563 goto out; 3564 } 3565 /* Apply changes as a transaction */ 3566 list_for_each_entry_safe(prange, next, &insert_list, list) { 3567 svm_range_add_to_svms(prange); 3568 svm_range_add_notifier_locked(mm, prange); 3569 } 3570 list_for_each_entry(prange, &update_list, update_list) { 3571 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3572 /* TODO: unmap ranges from GPU that lost access */ 3573 } 3574 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3575 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3576 prange->svms, prange, prange->start, 3577 prange->last); 3578 svm_range_unlink(prange); 3579 svm_range_remove_notifier(prange); 3580 svm_range_free(prange, false); 3581 } 3582 3583 mmap_write_downgrade(mm); 3584 /* Trigger migrations and revalidate and map to GPUs as needed. If 3585 * this fails we may be left with partially completed actions. There 3586 * is no clean way of rolling back to the previous state in such a 3587 * case because the rollback wouldn't be guaranteed to work either. 3588 */ 3589 list_for_each_entry(prange, &update_list, update_list) { 3590 bool migrated; 3591 3592 mutex_lock(&prange->migrate_mutex); 3593 3594 r = svm_range_trigger_migration(mm, prange, &migrated); 3595 if (r) 3596 goto out_unlock_range; 3597 3598 if (migrated && (!p->xnack_enabled || 3599 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3600 prange->mapped_to_gpu) { 3601 pr_debug("restore_work will update mappings of GPUs\n"); 3602 mutex_unlock(&prange->migrate_mutex); 3603 continue; 3604 } 3605 3606 if (!migrated && !update_mapping) { 3607 mutex_unlock(&prange->migrate_mutex); 3608 continue; 3609 } 3610 3611 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3612 3613 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3614 true, true, flush_tlb); 3615 if (r) 3616 pr_debug("failed %d to map svm range\n", r); 3617 3618 out_unlock_range: 3619 mutex_unlock(&prange->migrate_mutex); 3620 if (r) 3621 ret = r; 3622 } 3623 3624 list_for_each_entry(prange, &remap_list, update_list) { 3625 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3626 prange, prange->start, prange->last); 3627 mutex_lock(&prange->migrate_mutex); 3628 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE, 3629 true, true, prange->mapped_to_gpu); 3630 if (r) 3631 pr_debug("failed %d on remap svm range\n", r); 3632 mutex_unlock(&prange->migrate_mutex); 3633 if (r) 3634 ret = r; 3635 } 3636 3637 dynamic_svm_range_dump(svms); 3638 3639 mutex_unlock(&svms->lock); 3640 mmap_read_unlock(mm); 3641 out: 3642 mutex_unlock(&process_info->lock); 3643 3644 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid, 3645 &p->svms, start, start + size - 1, r); 3646 3647 return ret ? ret : r; 3648 } 3649 3650 static int 3651 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3652 uint64_t start, uint64_t size, uint32_t nattr, 3653 struct kfd_ioctl_svm_attribute *attrs) 3654 { 3655 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3656 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3657 bool get_preferred_loc = false; 3658 bool get_prefetch_loc = false; 3659 bool get_granularity = false; 3660 bool get_accessible = false; 3661 bool get_flags = false; 3662 uint64_t last = start + size - 1UL; 3663 uint8_t granularity = 0xff; 3664 struct interval_tree_node *node; 3665 struct svm_range_list *svms; 3666 struct svm_range *prange; 3667 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3668 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3669 uint32_t flags_and = 0xffffffff; 3670 uint32_t flags_or = 0; 3671 int gpuidx; 3672 uint32_t i; 3673 int r = 0; 3674 3675 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3676 start + size - 1, nattr); 3677 3678 /* Flush pending deferred work to avoid racing with deferred actions from 3679 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3680 * can still race with get_attr because we don't hold the mmap lock. But that 3681 * would be a race condition in the application anyway, and undefined 3682 * behaviour is acceptable in that case. 3683 */ 3684 flush_work(&p->svms.deferred_list_work); 3685 3686 mmap_read_lock(mm); 3687 r = svm_range_is_valid(p, start, size); 3688 mmap_read_unlock(mm); 3689 if (r) { 3690 pr_debug("invalid range r=%d\n", r); 3691 return r; 3692 } 3693 3694 for (i = 0; i < nattr; i++) { 3695 switch (attrs[i].type) { 3696 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3697 get_preferred_loc = true; 3698 break; 3699 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3700 get_prefetch_loc = true; 3701 break; 3702 case KFD_IOCTL_SVM_ATTR_ACCESS: 3703 get_accessible = true; 3704 break; 3705 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3706 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3707 get_flags = true; 3708 break; 3709 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3710 get_granularity = true; 3711 break; 3712 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3713 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3714 fallthrough; 3715 default: 3716 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3717 return -EINVAL; 3718 } 3719 } 3720 3721 svms = &p->svms; 3722 3723 mutex_lock(&svms->lock); 3724 3725 node = interval_tree_iter_first(&svms->objects, start, last); 3726 if (!node) { 3727 pr_debug("range attrs not found return default values\n"); 3728 svm_range_set_default_attributes(&location, &prefetch_loc, 3729 &granularity, &flags_and); 3730 flags_or = flags_and; 3731 if (p->xnack_enabled) 3732 bitmap_copy(bitmap_access, svms->bitmap_supported, 3733 MAX_GPU_INSTANCE); 3734 else 3735 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3736 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3737 goto fill_values; 3738 } 3739 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3740 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3741 3742 while (node) { 3743 struct interval_tree_node *next; 3744 3745 prange = container_of(node, struct svm_range, it_node); 3746 next = interval_tree_iter_next(node, start, last); 3747 3748 if (get_preferred_loc) { 3749 if (prange->preferred_loc == 3750 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3751 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3752 location != prange->preferred_loc)) { 3753 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3754 get_preferred_loc = false; 3755 } else { 3756 location = prange->preferred_loc; 3757 } 3758 } 3759 if (get_prefetch_loc) { 3760 if (prange->prefetch_loc == 3761 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3762 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3763 prefetch_loc != prange->prefetch_loc)) { 3764 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3765 get_prefetch_loc = false; 3766 } else { 3767 prefetch_loc = prange->prefetch_loc; 3768 } 3769 } 3770 if (get_accessible) { 3771 bitmap_and(bitmap_access, bitmap_access, 3772 prange->bitmap_access, MAX_GPU_INSTANCE); 3773 bitmap_and(bitmap_aip, bitmap_aip, 3774 prange->bitmap_aip, MAX_GPU_INSTANCE); 3775 } 3776 if (get_flags) { 3777 flags_and &= prange->flags; 3778 flags_or |= prange->flags; 3779 } 3780 3781 if (get_granularity && prange->granularity < granularity) 3782 granularity = prange->granularity; 3783 3784 node = next; 3785 } 3786 fill_values: 3787 mutex_unlock(&svms->lock); 3788 3789 for (i = 0; i < nattr; i++) { 3790 switch (attrs[i].type) { 3791 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3792 attrs[i].value = location; 3793 break; 3794 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3795 attrs[i].value = prefetch_loc; 3796 break; 3797 case KFD_IOCTL_SVM_ATTR_ACCESS: 3798 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3799 attrs[i].value); 3800 if (gpuidx < 0) { 3801 pr_debug("invalid gpuid %x\n", attrs[i].value); 3802 return -EINVAL; 3803 } 3804 if (test_bit(gpuidx, bitmap_access)) 3805 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3806 else if (test_bit(gpuidx, bitmap_aip)) 3807 attrs[i].type = 3808 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3809 else 3810 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3811 break; 3812 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3813 attrs[i].value = flags_and; 3814 break; 3815 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3816 attrs[i].value = ~flags_or; 3817 break; 3818 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3819 attrs[i].value = (uint32_t)granularity; 3820 break; 3821 } 3822 } 3823 3824 return 0; 3825 } 3826 3827 int kfd_criu_resume_svm(struct kfd_process *p) 3828 { 3829 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3830 int nattr_common = 4, nattr_accessibility = 1; 3831 struct criu_svm_metadata *criu_svm_md = NULL; 3832 struct svm_range_list *svms = &p->svms; 3833 struct criu_svm_metadata *next = NULL; 3834 uint32_t set_flags = 0xffffffff; 3835 int i, j, num_attrs, ret = 0; 3836 uint64_t set_attr_size; 3837 struct mm_struct *mm; 3838 3839 if (list_empty(&svms->criu_svm_metadata_list)) { 3840 pr_debug("No SVM data from CRIU restore stage 2\n"); 3841 return ret; 3842 } 3843 3844 mm = get_task_mm(p->lead_thread); 3845 if (!mm) { 3846 pr_err("failed to get mm for the target process\n"); 3847 return -ESRCH; 3848 } 3849 3850 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3851 3852 i = j = 0; 3853 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3854 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3855 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3856 3857 for (j = 0; j < num_attrs; j++) { 3858 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3859 i, j, criu_svm_md->data.attrs[j].type, 3860 i, j, criu_svm_md->data.attrs[j].value); 3861 switch (criu_svm_md->data.attrs[j].type) { 3862 /* During Checkpoint operation, the query for 3863 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3864 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3865 * not used by the range which was checkpointed. Care 3866 * must be taken to not restore with an invalid value 3867 * otherwise the gpuidx value will be invalid and 3868 * set_attr would eventually fail so just replace those 3869 * with another dummy attribute such as 3870 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3871 */ 3872 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3873 if (criu_svm_md->data.attrs[j].value == 3874 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3875 criu_svm_md->data.attrs[j].type = 3876 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3877 criu_svm_md->data.attrs[j].value = 0; 3878 } 3879 break; 3880 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3881 set_flags = criu_svm_md->data.attrs[j].value; 3882 break; 3883 default: 3884 break; 3885 } 3886 } 3887 3888 /* CLR_FLAGS is not available via get_attr during checkpoint but 3889 * it needs to be inserted before restoring the ranges so 3890 * allocate extra space for it before calling set_attr 3891 */ 3892 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3893 (num_attrs + 1); 3894 set_attr_new = krealloc(set_attr, set_attr_size, 3895 GFP_KERNEL); 3896 if (!set_attr_new) { 3897 ret = -ENOMEM; 3898 goto exit; 3899 } 3900 set_attr = set_attr_new; 3901 3902 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3903 sizeof(struct kfd_ioctl_svm_attribute)); 3904 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3905 set_attr[num_attrs].value = ~set_flags; 3906 3907 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3908 criu_svm_md->data.size, num_attrs + 1, 3909 set_attr); 3910 if (ret) { 3911 pr_err("CRIU: failed to set range attributes\n"); 3912 goto exit; 3913 } 3914 3915 i++; 3916 } 3917 exit: 3918 kfree(set_attr); 3919 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 3920 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 3921 criu_svm_md->data.start_addr); 3922 kfree(criu_svm_md); 3923 } 3924 3925 mmput(mm); 3926 return ret; 3927 3928 } 3929 3930 int kfd_criu_restore_svm(struct kfd_process *p, 3931 uint8_t __user *user_priv_ptr, 3932 uint64_t *priv_data_offset, 3933 uint64_t max_priv_data_size) 3934 { 3935 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 3936 int nattr_common = 4, nattr_accessibility = 1; 3937 struct criu_svm_metadata *criu_svm_md = NULL; 3938 struct svm_range_list *svms = &p->svms; 3939 uint32_t num_devices; 3940 int ret = 0; 3941 3942 num_devices = p->n_pdds; 3943 /* Handle one SVM range object at a time, also the number of gpus are 3944 * assumed to be same on the restore node, checking must be done while 3945 * evaluating the topology earlier 3946 */ 3947 3948 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 3949 (nattr_common + nattr_accessibility * num_devices); 3950 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 3951 3952 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 3953 svm_attrs_size; 3954 3955 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 3956 if (!criu_svm_md) { 3957 pr_err("failed to allocate memory to store svm metadata\n"); 3958 return -ENOMEM; 3959 } 3960 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 3961 ret = -EINVAL; 3962 goto exit; 3963 } 3964 3965 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 3966 svm_priv_data_size); 3967 if (ret) { 3968 ret = -EFAULT; 3969 goto exit; 3970 } 3971 *priv_data_offset += svm_priv_data_size; 3972 3973 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 3974 3975 return 0; 3976 3977 3978 exit: 3979 kfree(criu_svm_md); 3980 return ret; 3981 } 3982 3983 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 3984 uint64_t *svm_priv_data_size) 3985 { 3986 uint64_t total_size, accessibility_size, common_attr_size; 3987 int nattr_common = 4, nattr_accessibility = 1; 3988 int num_devices = p->n_pdds; 3989 struct svm_range_list *svms; 3990 struct svm_range *prange; 3991 uint32_t count = 0; 3992 3993 *svm_priv_data_size = 0; 3994 3995 svms = &p->svms; 3996 if (!svms) 3997 return -EINVAL; 3998 3999 mutex_lock(&svms->lock); 4000 list_for_each_entry(prange, &svms->list, list) { 4001 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4002 prange, prange->start, prange->npages, 4003 prange->start + prange->npages - 1); 4004 count++; 4005 } 4006 mutex_unlock(&svms->lock); 4007 4008 *num_svm_ranges = count; 4009 /* Only the accessbility attributes need to be queried for all the gpus 4010 * individually, remaining ones are spanned across the entire process 4011 * regardless of the various gpu nodes. Of the remaining attributes, 4012 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4013 * 4014 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4015 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4016 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4017 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4018 * 4019 * ** ACCESSBILITY ATTRIBUTES ** 4020 * (Considered as one, type is altered during query, value is gpuid) 4021 * KFD_IOCTL_SVM_ATTR_ACCESS 4022 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4023 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4024 */ 4025 if (*num_svm_ranges > 0) { 4026 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4027 nattr_common; 4028 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4029 nattr_accessibility * num_devices; 4030 4031 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4032 common_attr_size + accessibility_size; 4033 4034 *svm_priv_data_size = *num_svm_ranges * total_size; 4035 } 4036 4037 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4038 *svm_priv_data_size); 4039 return 0; 4040 } 4041 4042 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4043 uint8_t __user *user_priv_data, 4044 uint64_t *priv_data_offset) 4045 { 4046 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4047 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4048 uint64_t svm_priv_data_size, query_attr_size = 0; 4049 int index, nattr_common = 4, ret = 0; 4050 struct svm_range_list *svms; 4051 int num_devices = p->n_pdds; 4052 struct svm_range *prange; 4053 struct mm_struct *mm; 4054 4055 svms = &p->svms; 4056 if (!svms) 4057 return -EINVAL; 4058 4059 mm = get_task_mm(p->lead_thread); 4060 if (!mm) { 4061 pr_err("failed to get mm for the target process\n"); 4062 return -ESRCH; 4063 } 4064 4065 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4066 (nattr_common + num_devices); 4067 4068 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4069 if (!query_attr) { 4070 ret = -ENOMEM; 4071 goto exit; 4072 } 4073 4074 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4075 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4076 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4077 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4078 4079 for (index = 0; index < num_devices; index++) { 4080 struct kfd_process_device *pdd = p->pdds[index]; 4081 4082 query_attr[index + nattr_common].type = 4083 KFD_IOCTL_SVM_ATTR_ACCESS; 4084 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4085 } 4086 4087 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4088 4089 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4090 if (!svm_priv) { 4091 ret = -ENOMEM; 4092 goto exit_query; 4093 } 4094 4095 index = 0; 4096 list_for_each_entry(prange, &svms->list, list) { 4097 4098 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4099 svm_priv->start_addr = prange->start; 4100 svm_priv->size = prange->npages; 4101 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4102 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4103 prange, prange->start, prange->npages, 4104 prange->start + prange->npages - 1, 4105 prange->npages * PAGE_SIZE); 4106 4107 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4108 svm_priv->size, 4109 (nattr_common + num_devices), 4110 svm_priv->attrs); 4111 if (ret) { 4112 pr_err("CRIU: failed to obtain range attributes\n"); 4113 goto exit_priv; 4114 } 4115 4116 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4117 svm_priv_data_size)) { 4118 pr_err("Failed to copy svm priv to user\n"); 4119 ret = -EFAULT; 4120 goto exit_priv; 4121 } 4122 4123 *priv_data_offset += svm_priv_data_size; 4124 4125 } 4126 4127 4128 exit_priv: 4129 kfree(svm_priv); 4130 exit_query: 4131 kfree(query_attr); 4132 exit: 4133 mmput(mm); 4134 return ret; 4135 } 4136 4137 int 4138 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4139 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4140 { 4141 struct mm_struct *mm = current->mm; 4142 int r; 4143 4144 start >>= PAGE_SHIFT; 4145 size >>= PAGE_SHIFT; 4146 4147 switch (op) { 4148 case KFD_IOCTL_SVM_OP_SET_ATTR: 4149 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4150 break; 4151 case KFD_IOCTL_SVM_OP_GET_ATTR: 4152 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4153 break; 4154 default: 4155 r = EINVAL; 4156 break; 4157 } 4158 4159 return r; 4160 } 4161