1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "amdgpu_reset.h" 37 #include "kfd_priv.h" 38 #include "kfd_svm.h" 39 #include "kfd_migrate.h" 40 #include "kfd_smi_events.h" 41 42 #ifdef dev_fmt 43 #undef dev_fmt 44 #endif 45 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 46 47 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 48 49 /* Long enough to ensure no retry fault comes after svm range is restored and 50 * page table is updated. 51 */ 52 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 53 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 54 #define dynamic_svm_range_dump(svms) \ 55 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 56 #else 57 #define dynamic_svm_range_dump(svms) \ 58 do { if (0) svm_range_debug_dump(svms); } while (0) 59 #endif 60 61 /* Giant svm range split into smaller ranges based on this, it is decided using 62 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 63 * power of 2MB. 64 */ 65 static uint64_t max_svm_range_pages; 66 67 struct criu_svm_metadata { 68 struct list_head list; 69 struct kfd_criu_svm_range_priv_data data; 70 }; 71 72 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 73 static bool 74 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 75 const struct mmu_notifier_range *range, 76 unsigned long cur_seq); 77 static int 78 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 79 uint64_t *bo_s, uint64_t *bo_l); 80 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 81 .invalidate = svm_range_cpu_invalidate_pagetables, 82 }; 83 84 /** 85 * svm_range_unlink - unlink svm_range from lists and interval tree 86 * @prange: svm range structure to be removed 87 * 88 * Remove the svm_range from the svms and svm_bo lists and the svms 89 * interval tree. 90 * 91 * Context: The caller must hold svms->lock 92 */ 93 static void svm_range_unlink(struct svm_range *prange) 94 { 95 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 96 prange, prange->start, prange->last); 97 98 if (prange->svm_bo) { 99 spin_lock(&prange->svm_bo->list_lock); 100 list_del(&prange->svm_bo_list); 101 spin_unlock(&prange->svm_bo->list_lock); 102 } 103 104 list_del(&prange->list); 105 if (prange->it_node.start != 0 && prange->it_node.last != 0) 106 interval_tree_remove(&prange->it_node, &prange->svms->objects); 107 } 108 109 static void 110 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 111 { 112 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 113 prange, prange->start, prange->last); 114 115 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 116 prange->start << PAGE_SHIFT, 117 prange->npages << PAGE_SHIFT, 118 &svm_range_mn_ops); 119 } 120 121 /** 122 * svm_range_add_to_svms - add svm range to svms 123 * @prange: svm range structure to be added 124 * 125 * Add the svm range to svms interval tree and link list 126 * 127 * Context: The caller must hold svms->lock 128 */ 129 static void svm_range_add_to_svms(struct svm_range *prange) 130 { 131 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 132 prange, prange->start, prange->last); 133 134 list_move_tail(&prange->list, &prange->svms->list); 135 prange->it_node.start = prange->start; 136 prange->it_node.last = prange->last; 137 interval_tree_insert(&prange->it_node, &prange->svms->objects); 138 } 139 140 static void svm_range_remove_notifier(struct svm_range *prange) 141 { 142 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 143 prange->svms, prange, 144 prange->notifier.interval_tree.start >> PAGE_SHIFT, 145 prange->notifier.interval_tree.last >> PAGE_SHIFT); 146 147 if (prange->notifier.interval_tree.start != 0 && 148 prange->notifier.interval_tree.last != 0) 149 mmu_interval_notifier_remove(&prange->notifier); 150 } 151 152 static bool 153 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 154 { 155 return dma_addr && !dma_mapping_error(dev, dma_addr) && 156 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 157 } 158 159 static int 160 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 161 unsigned long offset, unsigned long npages, 162 unsigned long *hmm_pfns, uint32_t gpuidx) 163 { 164 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 165 dma_addr_t *addr = prange->dma_addr[gpuidx]; 166 struct device *dev = adev->dev; 167 struct page *page; 168 int i, r; 169 170 if (!addr) { 171 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 172 if (!addr) 173 return -ENOMEM; 174 prange->dma_addr[gpuidx] = addr; 175 } 176 177 addr += offset; 178 for (i = 0; i < npages; i++) { 179 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 180 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 181 182 page = hmm_pfn_to_page(hmm_pfns[i]); 183 if (is_zone_device_page(page)) { 184 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 185 186 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 187 bo_adev->vm_manager.vram_base_offset - 188 bo_adev->kfd.pgmap.range.start; 189 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 190 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 191 continue; 192 } 193 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 194 r = dma_mapping_error(dev, addr[i]); 195 if (r) { 196 dev_err(dev, "failed %d dma_map_page\n", r); 197 return r; 198 } 199 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 200 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 201 } 202 203 return 0; 204 } 205 206 static int 207 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 208 unsigned long offset, unsigned long npages, 209 unsigned long *hmm_pfns) 210 { 211 struct kfd_process *p; 212 uint32_t gpuidx; 213 int r; 214 215 p = container_of(prange->svms, struct kfd_process, svms); 216 217 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 218 struct kfd_process_device *pdd; 219 220 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 221 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 222 if (!pdd) { 223 pr_debug("failed to find device idx %d\n", gpuidx); 224 return -EINVAL; 225 } 226 227 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 228 hmm_pfns, gpuidx); 229 if (r) 230 break; 231 } 232 233 return r; 234 } 235 236 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 237 unsigned long offset, unsigned long npages) 238 { 239 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 240 int i; 241 242 if (!dma_addr) 243 return; 244 245 for (i = offset; i < offset + npages; i++) { 246 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 247 continue; 248 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 249 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 250 dma_addr[i] = 0; 251 } 252 } 253 254 void svm_range_dma_unmap(struct svm_range *prange) 255 { 256 struct kfd_process_device *pdd; 257 dma_addr_t *dma_addr; 258 struct device *dev; 259 struct kfd_process *p; 260 uint32_t gpuidx; 261 262 p = container_of(prange->svms, struct kfd_process, svms); 263 264 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 265 dma_addr = prange->dma_addr[gpuidx]; 266 if (!dma_addr) 267 continue; 268 269 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 270 if (!pdd) { 271 pr_debug("failed to find device idx %d\n", gpuidx); 272 continue; 273 } 274 dev = &pdd->dev->adev->pdev->dev; 275 276 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 277 } 278 } 279 280 static void svm_range_free(struct svm_range *prange, bool do_unmap) 281 { 282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 284 uint32_t gpuidx; 285 286 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 287 prange->start, prange->last); 288 289 svm_range_vram_node_free(prange); 290 if (do_unmap) 291 svm_range_dma_unmap(prange); 292 293 if (do_unmap && !p->xnack_enabled) { 294 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 295 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 296 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 297 } 298 299 /* free dma_addr array for each gpu */ 300 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 301 if (prange->dma_addr[gpuidx]) { 302 kvfree(prange->dma_addr[gpuidx]); 303 prange->dma_addr[gpuidx] = NULL; 304 } 305 } 306 307 mutex_destroy(&prange->lock); 308 mutex_destroy(&prange->migrate_mutex); 309 kfree(prange); 310 } 311 312 static void 313 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 314 int32_t *prefetch_loc, uint8_t *granularity, 315 uint32_t *flags) 316 { 317 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 319 *granularity = svms->default_granularity; 320 *flags = 321 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 322 } 323 324 static struct 325 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 326 uint64_t last, bool update_mem_usage) 327 { 328 uint64_t size = last - start + 1; 329 struct svm_range *prange; 330 struct kfd_process *p; 331 332 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 333 if (!prange) 334 return NULL; 335 336 p = container_of(svms, struct kfd_process, svms); 337 if (!p->xnack_enabled && update_mem_usage && 338 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 339 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 340 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 341 kfree(prange); 342 return NULL; 343 } 344 prange->npages = size; 345 prange->svms = svms; 346 prange->start = start; 347 prange->last = last; 348 INIT_LIST_HEAD(&prange->list); 349 INIT_LIST_HEAD(&prange->update_list); 350 INIT_LIST_HEAD(&prange->svm_bo_list); 351 INIT_LIST_HEAD(&prange->deferred_list); 352 INIT_LIST_HEAD(&prange->child_list); 353 atomic_set(&prange->invalid, 0); 354 prange->validate_timestamp = 0; 355 prange->vram_pages = 0; 356 mutex_init(&prange->migrate_mutex); 357 mutex_init(&prange->lock); 358 359 if (p->xnack_enabled) 360 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 361 MAX_GPU_INSTANCE); 362 363 svm_range_set_default_attributes(svms, &prange->preferred_loc, 364 &prange->prefetch_loc, 365 &prange->granularity, &prange->flags); 366 367 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 368 369 return prange; 370 } 371 372 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 373 { 374 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 375 return false; 376 377 return true; 378 } 379 380 static void svm_range_bo_release(struct kref *kref) 381 { 382 struct svm_range_bo *svm_bo; 383 384 svm_bo = container_of(kref, struct svm_range_bo, kref); 385 pr_debug("svm_bo 0x%p\n", svm_bo); 386 387 spin_lock(&svm_bo->list_lock); 388 while (!list_empty(&svm_bo->range_list)) { 389 struct svm_range *prange = 390 list_first_entry(&svm_bo->range_list, 391 struct svm_range, svm_bo_list); 392 /* list_del_init tells a concurrent svm_range_vram_node_new when 393 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 394 */ 395 list_del_init(&prange->svm_bo_list); 396 spin_unlock(&svm_bo->list_lock); 397 398 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 399 prange->start, prange->last); 400 mutex_lock(&prange->lock); 401 prange->svm_bo = NULL; 402 /* prange should not hold vram page now */ 403 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 404 mutex_unlock(&prange->lock); 405 406 spin_lock(&svm_bo->list_lock); 407 } 408 spin_unlock(&svm_bo->list_lock); 409 410 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 411 struct kfd_process_device *pdd; 412 struct kfd_process *p; 413 struct mm_struct *mm; 414 415 mm = svm_bo->eviction_fence->mm; 416 /* 417 * The forked child process takes svm_bo device pages ref, svm_bo could be 418 * released after parent process is gone. 419 */ 420 p = kfd_lookup_process_by_mm(mm); 421 if (p) { 422 pdd = kfd_get_process_device_data(svm_bo->node, p); 423 if (pdd) 424 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 425 kfd_unref_process(p); 426 } 427 mmput(mm); 428 } 429 430 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 431 /* We're not in the eviction worker. Signal the fence. */ 432 dma_fence_signal(&svm_bo->eviction_fence->base); 433 dma_fence_put(&svm_bo->eviction_fence->base); 434 amdgpu_bo_unref(&svm_bo->bo); 435 kfree(svm_bo); 436 } 437 438 static void svm_range_bo_wq_release(struct work_struct *work) 439 { 440 struct svm_range_bo *svm_bo; 441 442 svm_bo = container_of(work, struct svm_range_bo, release_work); 443 svm_range_bo_release(&svm_bo->kref); 444 } 445 446 static void svm_range_bo_release_async(struct kref *kref) 447 { 448 struct svm_range_bo *svm_bo; 449 450 svm_bo = container_of(kref, struct svm_range_bo, kref); 451 pr_debug("svm_bo 0x%p\n", svm_bo); 452 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 453 schedule_work(&svm_bo->release_work); 454 } 455 456 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 457 { 458 kref_put(&svm_bo->kref, svm_range_bo_release_async); 459 } 460 461 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 462 { 463 if (svm_bo) 464 kref_put(&svm_bo->kref, svm_range_bo_release); 465 } 466 467 static bool 468 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 469 { 470 mutex_lock(&prange->lock); 471 if (!prange->svm_bo) { 472 mutex_unlock(&prange->lock); 473 return false; 474 } 475 if (prange->ttm_res) { 476 /* We still have a reference, all is well */ 477 mutex_unlock(&prange->lock); 478 return true; 479 } 480 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 481 /* 482 * Migrate from GPU to GPU, remove range from source svm_bo->node 483 * range list, and return false to allocate svm_bo from destination 484 * node. 485 */ 486 if (prange->svm_bo->node != node) { 487 mutex_unlock(&prange->lock); 488 489 spin_lock(&prange->svm_bo->list_lock); 490 list_del_init(&prange->svm_bo_list); 491 spin_unlock(&prange->svm_bo->list_lock); 492 493 svm_range_bo_unref(prange->svm_bo); 494 return false; 495 } 496 if (READ_ONCE(prange->svm_bo->evicting)) { 497 struct dma_fence *f; 498 struct svm_range_bo *svm_bo; 499 /* The BO is getting evicted, 500 * we need to get a new one 501 */ 502 mutex_unlock(&prange->lock); 503 svm_bo = prange->svm_bo; 504 f = dma_fence_get(&svm_bo->eviction_fence->base); 505 svm_range_bo_unref(prange->svm_bo); 506 /* wait for the fence to avoid long spin-loop 507 * at list_empty_careful 508 */ 509 dma_fence_wait(f, false); 510 dma_fence_put(f); 511 } else { 512 /* The BO was still around and we got 513 * a new reference to it 514 */ 515 mutex_unlock(&prange->lock); 516 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 517 prange->svms, prange->start, prange->last); 518 519 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 520 return true; 521 } 522 523 } else { 524 mutex_unlock(&prange->lock); 525 } 526 527 /* We need a new svm_bo. Spin-loop to wait for concurrent 528 * svm_range_bo_release to finish removing this range from 529 * its range list and set prange->svm_bo to null. After this, 530 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 531 */ 532 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 533 cond_resched(); 534 535 return false; 536 } 537 538 static struct svm_range_bo *svm_range_bo_new(void) 539 { 540 struct svm_range_bo *svm_bo; 541 542 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 543 if (!svm_bo) 544 return NULL; 545 546 kref_init(&svm_bo->kref); 547 INIT_LIST_HEAD(&svm_bo->range_list); 548 spin_lock_init(&svm_bo->list_lock); 549 550 return svm_bo; 551 } 552 553 int 554 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 555 bool clear) 556 { 557 struct kfd_process_device *pdd; 558 struct amdgpu_bo_param bp; 559 struct svm_range_bo *svm_bo; 560 struct amdgpu_bo_user *ubo; 561 struct amdgpu_bo *bo; 562 struct kfd_process *p; 563 struct mm_struct *mm; 564 int r; 565 566 p = container_of(prange->svms, struct kfd_process, svms); 567 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 568 p->lead_thread->pid, prange->svms, 569 prange->start, prange->last); 570 571 if (svm_range_validate_svm_bo(node, prange)) 572 return 0; 573 574 svm_bo = svm_range_bo_new(); 575 if (!svm_bo) { 576 pr_debug("failed to alloc svm bo\n"); 577 return -ENOMEM; 578 } 579 mm = get_task_mm(p->lead_thread); 580 if (!mm) { 581 pr_debug("failed to get mm\n"); 582 kfree(svm_bo); 583 return -ESRCH; 584 } 585 svm_bo->node = node; 586 svm_bo->eviction_fence = 587 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 588 mm, 589 svm_bo, p->context_id); 590 mmput(mm); 591 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 592 svm_bo->evicting = 0; 593 memset(&bp, 0, sizeof(bp)); 594 bp.size = prange->npages * PAGE_SIZE; 595 bp.byte_align = PAGE_SIZE; 596 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 597 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 598 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 599 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 600 bp.type = ttm_bo_type_device; 601 bp.resv = NULL; 602 if (node->xcp) 603 bp.xcp_id_plus1 = node->xcp->id + 1; 604 605 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 606 if (r) { 607 pr_debug("failed %d to create bo\n", r); 608 goto create_bo_failed; 609 } 610 bo = &ubo->bo; 611 612 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 613 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 614 bp.xcp_id_plus1 - 1); 615 616 r = amdgpu_bo_reserve(bo, true); 617 if (r) { 618 pr_debug("failed %d to reserve bo\n", r); 619 goto reserve_bo_failed; 620 } 621 622 if (clear) { 623 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 624 if (r) { 625 pr_debug("failed %d to sync bo\n", r); 626 amdgpu_bo_unreserve(bo); 627 goto reserve_bo_failed; 628 } 629 } 630 631 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 632 if (r) { 633 pr_debug("failed %d to reserve bo\n", r); 634 amdgpu_bo_unreserve(bo); 635 goto reserve_bo_failed; 636 } 637 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 638 639 amdgpu_bo_unreserve(bo); 640 641 svm_bo->bo = bo; 642 prange->svm_bo = svm_bo; 643 prange->ttm_res = bo->tbo.resource; 644 prange->offset = 0; 645 646 spin_lock(&svm_bo->list_lock); 647 list_add(&prange->svm_bo_list, &svm_bo->range_list); 648 spin_unlock(&svm_bo->list_lock); 649 650 pdd = svm_range_get_pdd_by_node(prange, node); 651 if (pdd) 652 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 653 654 return 0; 655 656 reserve_bo_failed: 657 amdgpu_bo_unref(&bo); 658 create_bo_failed: 659 dma_fence_put(&svm_bo->eviction_fence->base); 660 kfree(svm_bo); 661 prange->ttm_res = NULL; 662 663 return r; 664 } 665 666 void svm_range_vram_node_free(struct svm_range *prange) 667 { 668 /* serialize prange->svm_bo unref */ 669 mutex_lock(&prange->lock); 670 /* prange->svm_bo has not been unref */ 671 if (prange->ttm_res) { 672 prange->ttm_res = NULL; 673 mutex_unlock(&prange->lock); 674 svm_range_bo_unref(prange->svm_bo); 675 } else 676 mutex_unlock(&prange->lock); 677 } 678 679 struct kfd_node * 680 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 681 { 682 struct kfd_process *p; 683 struct kfd_process_device *pdd; 684 685 p = container_of(prange->svms, struct kfd_process, svms); 686 pdd = kfd_process_device_data_by_id(p, gpu_id); 687 if (!pdd) { 688 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 689 return NULL; 690 } 691 692 return pdd->dev; 693 } 694 695 struct kfd_process_device * 696 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 697 { 698 struct kfd_process *p; 699 700 p = container_of(prange->svms, struct kfd_process, svms); 701 702 return kfd_get_process_device_data(node, p); 703 } 704 705 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 706 { 707 struct ttm_operation_ctx ctx = { false, false }; 708 709 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 710 711 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 712 } 713 714 static int 715 svm_range_check_attr(struct kfd_process *p, 716 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 717 { 718 uint32_t i; 719 720 for (i = 0; i < nattr; i++) { 721 uint32_t val = attrs[i].value; 722 int gpuidx = MAX_GPU_INSTANCE; 723 724 switch (attrs[i].type) { 725 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 726 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 727 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 728 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 729 break; 730 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 731 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 732 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 733 break; 734 case KFD_IOCTL_SVM_ATTR_ACCESS: 735 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 736 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 737 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 738 break; 739 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 740 break; 741 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 742 break; 743 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 744 break; 745 default: 746 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 747 return -EINVAL; 748 } 749 750 if (gpuidx < 0) { 751 pr_debug("no GPU 0x%x found\n", val); 752 return -EINVAL; 753 } else if (gpuidx < MAX_GPU_INSTANCE && 754 !test_bit(gpuidx, p->svms.bitmap_supported)) { 755 pr_debug("GPU 0x%x not supported\n", val); 756 return -EINVAL; 757 } 758 } 759 760 return 0; 761 } 762 763 static void 764 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 765 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 766 bool *update_mapping) 767 { 768 uint32_t i; 769 int gpuidx; 770 771 for (i = 0; i < nattr; i++) { 772 switch (attrs[i].type) { 773 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 774 prange->preferred_loc = attrs[i].value; 775 break; 776 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 777 prange->prefetch_loc = attrs[i].value; 778 break; 779 case KFD_IOCTL_SVM_ATTR_ACCESS: 780 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 781 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 782 if (!p->xnack_enabled) 783 *update_mapping = true; 784 785 gpuidx = kfd_process_gpuidx_from_gpuid(p, 786 attrs[i].value); 787 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 788 bitmap_clear(prange->bitmap_access, gpuidx, 1); 789 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 790 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 791 bitmap_set(prange->bitmap_access, gpuidx, 1); 792 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 793 } else { 794 bitmap_clear(prange->bitmap_access, gpuidx, 1); 795 bitmap_set(prange->bitmap_aip, gpuidx, 1); 796 } 797 break; 798 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 799 *update_mapping = true; 800 prange->flags |= attrs[i].value; 801 break; 802 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 803 *update_mapping = true; 804 prange->flags &= ~attrs[i].value; 805 break; 806 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 807 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 808 break; 809 default: 810 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 811 } 812 } 813 } 814 815 static bool 816 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 817 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 818 { 819 uint32_t i; 820 int gpuidx; 821 822 for (i = 0; i < nattr; i++) { 823 switch (attrs[i].type) { 824 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 825 if (prange->preferred_loc != attrs[i].value) 826 return false; 827 break; 828 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 829 /* Prefetch should always trigger a migration even 830 * if the value of the attribute didn't change. 831 */ 832 return false; 833 case KFD_IOCTL_SVM_ATTR_ACCESS: 834 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 835 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 836 gpuidx = kfd_process_gpuidx_from_gpuid(p, 837 attrs[i].value); 838 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 839 if (test_bit(gpuidx, prange->bitmap_access) || 840 test_bit(gpuidx, prange->bitmap_aip)) 841 return false; 842 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 843 if (!test_bit(gpuidx, prange->bitmap_access)) 844 return false; 845 } else { 846 if (!test_bit(gpuidx, prange->bitmap_aip)) 847 return false; 848 } 849 break; 850 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 851 if ((prange->flags & attrs[i].value) != attrs[i].value) 852 return false; 853 break; 854 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 855 if ((prange->flags & attrs[i].value) != 0) 856 return false; 857 break; 858 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 859 if (prange->granularity != attrs[i].value) 860 return false; 861 break; 862 default: 863 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 864 } 865 } 866 867 return true; 868 } 869 870 /** 871 * svm_range_debug_dump - print all range information from svms 872 * @svms: svm range list header 873 * 874 * debug output svm range start, end, prefetch location from svms 875 * interval tree and link list 876 * 877 * Context: The caller must hold svms->lock 878 */ 879 static void svm_range_debug_dump(struct svm_range_list *svms) 880 { 881 struct interval_tree_node *node; 882 struct svm_range *prange; 883 884 pr_debug("dump svms 0x%p list\n", svms); 885 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 886 887 list_for_each_entry(prange, &svms->list, list) { 888 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 889 prange, prange->start, prange->npages, 890 prange->start + prange->npages - 1, 891 prange->actual_loc); 892 } 893 894 pr_debug("dump svms 0x%p interval tree\n", svms); 895 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 896 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 897 while (node) { 898 prange = container_of(node, struct svm_range, it_node); 899 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 900 prange, prange->start, prange->npages, 901 prange->start + prange->npages - 1, 902 prange->actual_loc); 903 node = interval_tree_iter_next(node, 0, ~0ULL); 904 } 905 } 906 907 static void * 908 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 909 uint64_t offset, uint64_t *vram_pages) 910 { 911 unsigned char *src = (unsigned char *)psrc + offset; 912 unsigned char *dst; 913 uint64_t i; 914 915 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 916 if (!dst) 917 return NULL; 918 919 if (!vram_pages) { 920 memcpy(dst, src, num_elements * size); 921 return (void *)dst; 922 } 923 924 *vram_pages = 0; 925 for (i = 0; i < num_elements; i++) { 926 dma_addr_t *temp; 927 temp = (dma_addr_t *)dst + i; 928 *temp = *((dma_addr_t *)src + i); 929 if (*temp&SVM_RANGE_VRAM_DOMAIN) 930 (*vram_pages)++; 931 } 932 933 return (void *)dst; 934 } 935 936 static int 937 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 938 { 939 int i; 940 941 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 942 if (!src->dma_addr[i]) 943 continue; 944 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 945 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 946 if (!dst->dma_addr[i]) 947 return -ENOMEM; 948 } 949 950 return 0; 951 } 952 953 static int 954 svm_range_split_array(void *ppnew, void *ppold, size_t size, 955 uint64_t old_start, uint64_t old_n, 956 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 957 { 958 unsigned char *new, *old, *pold; 959 uint64_t d; 960 961 if (!ppold) 962 return 0; 963 pold = *(unsigned char **)ppold; 964 if (!pold) 965 return 0; 966 967 d = (new_start - old_start) * size; 968 /* get dma addr array for new range and calculte its vram page number */ 969 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 970 if (!new) 971 return -ENOMEM; 972 d = (new_start == old_start) ? new_n * size : 0; 973 old = svm_range_copy_array(pold, size, old_n, d, NULL); 974 if (!old) { 975 kvfree(new); 976 return -ENOMEM; 977 } 978 kvfree(pold); 979 *(void **)ppold = old; 980 *(void **)ppnew = new; 981 982 return 0; 983 } 984 985 static int 986 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 987 uint64_t start, uint64_t last) 988 { 989 uint64_t npages = last - start + 1; 990 int i, r; 991 992 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 993 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 994 sizeof(*old->dma_addr[i]), old->start, 995 npages, new->start, new->npages, 996 old->actual_loc ? &new->vram_pages : NULL); 997 if (r) 998 return r; 999 } 1000 if (old->actual_loc) 1001 old->vram_pages -= new->vram_pages; 1002 1003 return 0; 1004 } 1005 1006 static int 1007 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1008 uint64_t start, uint64_t last) 1009 { 1010 uint64_t npages = last - start + 1; 1011 1012 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1013 new->svms, new, new->start, start, last); 1014 1015 if (new->start == old->start) { 1016 new->offset = old->offset; 1017 old->offset += new->npages; 1018 } else { 1019 new->offset = old->offset + npages; 1020 } 1021 1022 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1023 new->ttm_res = old->ttm_res; 1024 1025 spin_lock(&new->svm_bo->list_lock); 1026 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1027 spin_unlock(&new->svm_bo->list_lock); 1028 1029 return 0; 1030 } 1031 1032 /** 1033 * svm_range_split_adjust - split range and adjust 1034 * 1035 * @new: new range 1036 * @old: the old range 1037 * @start: the old range adjust to start address in pages 1038 * @last: the old range adjust to last address in pages 1039 * 1040 * Copy system memory dma_addr or vram ttm_res in old range to new 1041 * range from new_start up to size new->npages, the remaining old range is from 1042 * start to last 1043 * 1044 * Return: 1045 * 0 - OK, -ENOMEM - out of memory 1046 */ 1047 static int 1048 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1049 uint64_t start, uint64_t last) 1050 { 1051 int r; 1052 1053 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1054 new->svms, new->start, old->start, old->last, start, last); 1055 1056 if (new->start < old->start || 1057 new->last > old->last) { 1058 WARN_ONCE(1, "invalid new range start or last\n"); 1059 return -EINVAL; 1060 } 1061 1062 r = svm_range_split_pages(new, old, start, last); 1063 if (r) 1064 return r; 1065 1066 if (old->actual_loc && old->ttm_res) { 1067 r = svm_range_split_nodes(new, old, start, last); 1068 if (r) 1069 return r; 1070 } 1071 1072 old->npages = last - start + 1; 1073 old->start = start; 1074 old->last = last; 1075 new->flags = old->flags; 1076 new->preferred_loc = old->preferred_loc; 1077 new->prefetch_loc = old->prefetch_loc; 1078 new->actual_loc = old->actual_loc; 1079 new->granularity = old->granularity; 1080 new->mapped_to_gpu = old->mapped_to_gpu; 1081 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1082 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1083 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1084 1085 return 0; 1086 } 1087 1088 /** 1089 * svm_range_split - split a range in 2 ranges 1090 * 1091 * @prange: the svm range to split 1092 * @start: the remaining range start address in pages 1093 * @last: the remaining range last address in pages 1094 * @new: the result new range generated 1095 * 1096 * Two cases only: 1097 * case 1: if start == prange->start 1098 * prange ==> prange[start, last] 1099 * new range [last + 1, prange->last] 1100 * 1101 * case 2: if last == prange->last 1102 * prange ==> prange[start, last] 1103 * new range [prange->start, start - 1] 1104 * 1105 * Return: 1106 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1107 */ 1108 static int 1109 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1110 struct svm_range **new) 1111 { 1112 uint64_t old_start = prange->start; 1113 uint64_t old_last = prange->last; 1114 struct svm_range_list *svms; 1115 int r = 0; 1116 1117 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1118 old_start, old_last, start, last); 1119 1120 if (old_start != start && old_last != last) 1121 return -EINVAL; 1122 if (start < old_start || last > old_last) 1123 return -EINVAL; 1124 1125 svms = prange->svms; 1126 if (old_start == start) 1127 *new = svm_range_new(svms, last + 1, old_last, false); 1128 else 1129 *new = svm_range_new(svms, old_start, start - 1, false); 1130 if (!*new) 1131 return -ENOMEM; 1132 1133 r = svm_range_split_adjust(*new, prange, start, last); 1134 if (r) { 1135 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1136 r, old_start, old_last, start, last); 1137 svm_range_free(*new, false); 1138 *new = NULL; 1139 } 1140 1141 return r; 1142 } 1143 1144 static int 1145 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1146 struct list_head *insert_list, struct list_head *remap_list) 1147 { 1148 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1149 unsigned long start_align = ALIGN(prange->start, 512); 1150 bool huge_page_mapping = last_align_down > start_align; 1151 struct svm_range *tail = NULL; 1152 int r; 1153 1154 r = svm_range_split(prange, prange->start, new_last, &tail); 1155 1156 if (r) 1157 return r; 1158 1159 list_add(&tail->list, insert_list); 1160 1161 if (huge_page_mapping && tail->start > start_align && 1162 tail->start < last_align_down && (!IS_ALIGNED(tail->start, 512))) 1163 list_add(&tail->update_list, remap_list); 1164 1165 return 0; 1166 } 1167 1168 static int 1169 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1170 struct list_head *insert_list, struct list_head *remap_list) 1171 { 1172 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1173 unsigned long start_align = ALIGN(prange->start, 512); 1174 bool huge_page_mapping = last_align_down > start_align; 1175 struct svm_range *head = NULL; 1176 int r; 1177 1178 r = svm_range_split(prange, new_start, prange->last, &head); 1179 1180 if (r) 1181 return r; 1182 1183 list_add(&head->list, insert_list); 1184 1185 if (huge_page_mapping && head->last + 1 > start_align && 1186 head->last + 1 < last_align_down && (!IS_ALIGNED(head->last, 512))) 1187 list_add(&head->update_list, remap_list); 1188 1189 return 0; 1190 } 1191 1192 static void 1193 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1194 { 1195 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1196 pchild, pchild->start, pchild->last, prange, op); 1197 1198 pchild->work_item.mm = NULL; 1199 pchild->work_item.op = op; 1200 list_add_tail(&pchild->child_list, &prange->child_list); 1201 } 1202 1203 static bool 1204 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1205 { 1206 return (node_a->adev == node_b->adev || 1207 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1208 } 1209 1210 static uint64_t 1211 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1212 struct svm_range *prange, int domain) 1213 { 1214 struct kfd_node *bo_node; 1215 uint32_t flags = prange->flags; 1216 uint32_t mapping_flags = 0; 1217 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1218 uint64_t pte_flags; 1219 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1220 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1221 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1222 unsigned int mtype_local; 1223 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) 1225 bo_node = prange->svm_bo->node; 1226 1227 switch (gc_ip_version) { 1228 case IP_VERSION(9, 4, 1): 1229 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1230 if (bo_node == node) { 1231 mapping_flags |= coherent ? 1232 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1233 } else { 1234 mapping_flags |= coherent ? 1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1236 if (svm_nodes_in_same_hive(node, bo_node)) 1237 snoop = true; 1238 } 1239 } else { 1240 mapping_flags |= coherent ? 1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1242 } 1243 break; 1244 case IP_VERSION(9, 4, 2): 1245 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1246 if (bo_node == node) { 1247 mapping_flags |= coherent ? 1248 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1249 if (node->adev->gmc.xgmi.connected_to_cpu) 1250 snoop = true; 1251 } else { 1252 mapping_flags |= coherent ? 1253 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1254 if (svm_nodes_in_same_hive(node, bo_node)) 1255 snoop = true; 1256 } 1257 } else { 1258 mapping_flags |= coherent ? 1259 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1260 } 1261 break; 1262 case IP_VERSION(9, 4, 3): 1263 case IP_VERSION(9, 4, 4): 1264 case IP_VERSION(9, 5, 0): 1265 if (ext_coherent) 1266 mtype_local = AMDGPU_VM_MTYPE_CC; 1267 else 1268 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1269 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1270 snoop = true; 1271 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1272 /* local HBM region close to partition */ 1273 if (bo_node->adev == node->adev && 1274 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1275 mapping_flags |= mtype_local; 1276 /* local HBM region far from partition or remote XGMI GPU 1277 * with regular system scope coherence 1278 */ 1279 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1280 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1281 /* PCIe P2P on GPUs pre-9.5.0 */ 1282 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1283 !svm_nodes_in_same_hive(bo_node, node)) 1284 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1285 /* Other remote memory */ 1286 else 1287 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1288 /* system memory accessed by the APU */ 1289 } else if (node->adev->flags & AMD_IS_APU) { 1290 /* On NUMA systems, locality is determined per-page 1291 * in amdgpu_gmc_override_vm_pte_flags 1292 */ 1293 if (num_possible_nodes() <= 1) 1294 mapping_flags |= mtype_local; 1295 else 1296 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1297 /* system memory accessed by the dGPU */ 1298 } else { 1299 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1300 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1301 else 1302 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1303 } 1304 break; 1305 case IP_VERSION(12, 0, 0): 1306 case IP_VERSION(12, 0, 1): 1307 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1308 break; 1309 case IP_VERSION(12, 1, 0): 1310 snoop = true; 1311 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1312 /* local HBM */ 1313 if (bo_node->adev == node->adev) 1314 mapping_flags |= AMDGPU_VM_MTYPE_RW; 1315 /* Remote GPU memory */ 1316 else 1317 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : 1318 AMDGPU_VM_MTYPE_NC; 1319 /* system memory accessed by the dGPU */ 1320 } else { 1321 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1322 } 1323 break; 1324 default: 1325 mapping_flags |= coherent ? 1326 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1327 } 1328 1329 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1330 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1331 1332 pte_flags = AMDGPU_PTE_VALID; 1333 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1334 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1335 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1336 pte_flags |= AMDGPU_PTE_IS_PTE; 1337 1338 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1339 pte_flags |= AMDGPU_PTE_READABLE; 1340 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1341 pte_flags |= AMDGPU_PTE_WRITEABLE; 1342 1343 if ((gc_ip_version == IP_VERSION(12, 1, 0)) && 1344 node->adev->have_atomics_support) 1345 pte_flags |= AMDGPU_PTE_BUS_ATOMICS; 1346 1347 return pte_flags; 1348 } 1349 1350 static int 1351 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1352 uint64_t start, uint64_t last, 1353 struct dma_fence **fence) 1354 { 1355 uint64_t init_pte_value = adev->gmc.init_pte_flags; 1356 1357 pr_debug("[0x%llx 0x%llx]\n", start, last); 1358 1359 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1360 last, init_pte_value, 0, 0, NULL, NULL, 1361 fence); 1362 } 1363 1364 static int 1365 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1366 unsigned long last, uint32_t trigger) 1367 { 1368 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1369 struct kfd_process_device *pdd; 1370 struct dma_fence *fence = NULL; 1371 struct kfd_process *p; 1372 uint32_t gpuidx; 1373 int r = 0; 1374 1375 if (!prange->mapped_to_gpu) { 1376 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1377 prange, prange->start, prange->last); 1378 return 0; 1379 } 1380 1381 if (prange->start == start && prange->last == last) { 1382 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1383 prange->mapped_to_gpu = false; 1384 } 1385 1386 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1387 MAX_GPU_INSTANCE); 1388 p = container_of(prange->svms, struct kfd_process, svms); 1389 1390 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1391 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1392 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1393 if (!pdd) { 1394 pr_debug("failed to find device idx %d\n", gpuidx); 1395 return -EINVAL; 1396 } 1397 1398 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1399 start, last, trigger); 1400 1401 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1402 drm_priv_to_vm(pdd->drm_priv), 1403 start, last, &fence); 1404 if (r) 1405 break; 1406 1407 if (fence) { 1408 r = dma_fence_wait(fence, false); 1409 dma_fence_put(fence); 1410 fence = NULL; 1411 if (r) 1412 break; 1413 } 1414 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1415 } 1416 1417 return r; 1418 } 1419 1420 static int 1421 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1422 unsigned long offset, unsigned long npages, bool readonly, 1423 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1424 struct dma_fence **fence, bool flush_tlb) 1425 { 1426 struct amdgpu_device *adev = pdd->dev->adev; 1427 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1428 uint64_t pte_flags; 1429 unsigned long last_start; 1430 int last_domain; 1431 int r = 0; 1432 int64_t i, j; 1433 1434 last_start = prange->start + offset; 1435 1436 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1437 last_start, last_start + npages - 1, readonly); 1438 1439 for (i = offset; i < offset + npages; i++) { 1440 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1441 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1442 1443 /* Collect all pages in the same address range and memory domain 1444 * that can be mapped with a single call to update mapping. 1445 */ 1446 if (i < offset + npages - 1 && 1447 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1448 continue; 1449 1450 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1451 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1452 1453 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1454 if (readonly) 1455 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1456 1457 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1458 prange->svms, last_start, prange->start + i, 1459 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1460 pte_flags); 1461 1462 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1463 * different memory partition based on fpfn/lpfn, we should use 1464 * same vm_manager.vram_base_offset regardless memory partition. 1465 */ 1466 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1467 NULL, last_start, prange->start + i, 1468 pte_flags, 1469 (last_start - prange->start) << PAGE_SHIFT, 1470 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1471 NULL, dma_addr, &vm->last_update); 1472 1473 for (j = last_start - prange->start; j <= i; j++) 1474 dma_addr[j] |= last_domain; 1475 1476 if (r) { 1477 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1478 goto out; 1479 } 1480 last_start = prange->start + i + 1; 1481 } 1482 1483 r = amdgpu_vm_update_pdes(adev, vm, false); 1484 if (r) { 1485 pr_debug("failed %d to update directories 0x%lx\n", r, 1486 prange->start); 1487 goto out; 1488 } 1489 1490 if (fence) 1491 *fence = dma_fence_get(vm->last_update); 1492 1493 out: 1494 return r; 1495 } 1496 1497 static int 1498 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1499 unsigned long npages, bool readonly, 1500 unsigned long *bitmap, bool wait, bool flush_tlb) 1501 { 1502 struct kfd_process_device *pdd; 1503 struct amdgpu_device *bo_adev = NULL; 1504 struct kfd_process *p; 1505 struct dma_fence *fence = NULL; 1506 uint32_t gpuidx; 1507 int r = 0; 1508 1509 if (prange->svm_bo && prange->ttm_res) 1510 bo_adev = prange->svm_bo->node->adev; 1511 1512 p = container_of(prange->svms, struct kfd_process, svms); 1513 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1514 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1515 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1516 if (!pdd) { 1517 pr_debug("failed to find device idx %d\n", gpuidx); 1518 return -EINVAL; 1519 } 1520 1521 pdd = kfd_bind_process_to_device(pdd->dev, p); 1522 if (IS_ERR(pdd)) 1523 return -EINVAL; 1524 1525 if (bo_adev && pdd->dev->adev != bo_adev && 1526 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1527 pr_debug("cannot map to device idx %d\n", gpuidx); 1528 continue; 1529 } 1530 1531 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1532 prange->dma_addr[gpuidx], 1533 bo_adev, wait ? &fence : NULL, 1534 flush_tlb); 1535 if (r) 1536 break; 1537 1538 if (fence) { 1539 r = dma_fence_wait(fence, false); 1540 dma_fence_put(fence); 1541 fence = NULL; 1542 if (r) { 1543 pr_debug("failed %d to dma fence wait\n", r); 1544 break; 1545 } 1546 } 1547 1548 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1549 } 1550 1551 return r; 1552 } 1553 1554 struct svm_validate_context { 1555 struct kfd_process *process; 1556 struct svm_range *prange; 1557 bool intr; 1558 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1559 struct drm_exec exec; 1560 }; 1561 1562 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1563 { 1564 struct kfd_process_device *pdd; 1565 struct amdgpu_vm *vm; 1566 uint32_t gpuidx; 1567 int r; 1568 1569 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1570 drm_exec_until_all_locked(&ctx->exec) { 1571 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1572 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1573 if (!pdd) { 1574 pr_debug("failed to find device idx %d\n", gpuidx); 1575 r = -EINVAL; 1576 goto unreserve_out; 1577 } 1578 vm = drm_priv_to_vm(pdd->drm_priv); 1579 1580 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1581 drm_exec_retry_on_contention(&ctx->exec); 1582 if (unlikely(r)) { 1583 pr_debug("failed %d to reserve bo\n", r); 1584 goto unreserve_out; 1585 } 1586 } 1587 } 1588 1589 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1590 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1591 if (!pdd) { 1592 pr_debug("failed to find device idx %d\n", gpuidx); 1593 r = -EINVAL; 1594 goto unreserve_out; 1595 } 1596 1597 r = amdgpu_vm_validate(pdd->dev->adev, 1598 drm_priv_to_vm(pdd->drm_priv), NULL, 1599 svm_range_bo_validate, NULL); 1600 if (r) { 1601 pr_debug("failed %d validate pt bos\n", r); 1602 goto unreserve_out; 1603 } 1604 } 1605 1606 return 0; 1607 1608 unreserve_out: 1609 drm_exec_fini(&ctx->exec); 1610 return r; 1611 } 1612 1613 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1614 { 1615 drm_exec_fini(&ctx->exec); 1616 } 1617 1618 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1619 { 1620 struct kfd_process_device *pdd; 1621 1622 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1623 if (!pdd) 1624 return NULL; 1625 1626 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1627 } 1628 1629 /* 1630 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1631 * 1632 * To prevent concurrent destruction or change of range attributes, the 1633 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1634 * because that would block concurrent evictions and lead to deadlocks. To 1635 * serialize concurrent migrations or validations of the same range, the 1636 * prange->migrate_mutex must be held. 1637 * 1638 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1639 * eviction fence. 1640 * 1641 * The following sequence ensures race-free validation and GPU mapping: 1642 * 1643 * 1. Reserve page table (and SVM BO if range is in VRAM) 1644 * 2. hmm_range_fault to get page addresses (if system memory) 1645 * 3. DMA-map pages (if system memory) 1646 * 4-a. Take notifier lock 1647 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1648 * 4-c. Check that the range was not split or otherwise invalidated 1649 * 4-d. Update GPU page table 1650 * 4.e. Release notifier lock 1651 * 5. Release page table (and SVM BO) reservation 1652 */ 1653 static int svm_range_validate_and_map(struct mm_struct *mm, 1654 unsigned long map_start, unsigned long map_last, 1655 struct svm_range *prange, int32_t gpuidx, 1656 bool intr, bool wait, bool flush_tlb) 1657 { 1658 struct svm_validate_context *ctx; 1659 unsigned long start, end, addr; 1660 struct kfd_process *p; 1661 void *owner; 1662 int32_t idx; 1663 int r = 0; 1664 1665 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1666 if (!ctx) 1667 return -ENOMEM; 1668 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1669 ctx->prange = prange; 1670 ctx->intr = intr; 1671 1672 if (gpuidx < MAX_GPU_INSTANCE) { 1673 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1674 bitmap_set(ctx->bitmap, gpuidx, 1); 1675 } else if (ctx->process->xnack_enabled) { 1676 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1677 1678 /* If prefetch range to GPU, or GPU retry fault migrate range to 1679 * GPU, which has ACCESS attribute to the range, create mapping 1680 * on that GPU. 1681 */ 1682 if (prange->actual_loc) { 1683 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1684 prange->actual_loc); 1685 if (gpuidx < 0) { 1686 WARN_ONCE(1, "failed get device by id 0x%x\n", 1687 prange->actual_loc); 1688 r = -EINVAL; 1689 goto free_ctx; 1690 } 1691 if (test_bit(gpuidx, prange->bitmap_access)) 1692 bitmap_set(ctx->bitmap, gpuidx, 1); 1693 } 1694 1695 /* 1696 * If prange is already mapped or with always mapped flag, 1697 * update mapping on GPUs with ACCESS attribute 1698 */ 1699 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1700 if (prange->mapped_to_gpu || 1701 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1702 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1703 } 1704 } else { 1705 bitmap_or(ctx->bitmap, prange->bitmap_access, 1706 prange->bitmap_aip, MAX_GPU_INSTANCE); 1707 } 1708 1709 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1710 r = 0; 1711 goto free_ctx; 1712 } 1713 1714 if (prange->actual_loc && !prange->ttm_res) { 1715 /* This should never happen. actual_loc gets set by 1716 * svm_migrate_ram_to_vram after allocating a BO. 1717 */ 1718 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1719 r = -EINVAL; 1720 goto free_ctx; 1721 } 1722 1723 r = svm_range_reserve_bos(ctx, intr); 1724 if (r) 1725 goto free_ctx; 1726 1727 p = container_of(prange->svms, struct kfd_process, svms); 1728 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1729 MAX_GPU_INSTANCE)); 1730 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1731 if (kfd_svm_page_owner(p, idx) != owner) { 1732 owner = NULL; 1733 break; 1734 } 1735 } 1736 1737 start = map_start << PAGE_SHIFT; 1738 end = (map_last + 1) << PAGE_SHIFT; 1739 for (addr = start; !r && addr < end; ) { 1740 struct amdgpu_hmm_range *range = NULL; 1741 unsigned long map_start_vma; 1742 unsigned long map_last_vma; 1743 struct vm_area_struct *vma; 1744 unsigned long next = 0; 1745 unsigned long offset; 1746 unsigned long npages; 1747 bool readonly; 1748 1749 vma = vma_lookup(mm, addr); 1750 if (vma) { 1751 readonly = !(vma->vm_flags & VM_WRITE); 1752 1753 next = min(vma->vm_end, end); 1754 npages = (next - addr) >> PAGE_SHIFT; 1755 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1756 * unmap the memory. If it's not already mapped, this is a no-op 1757 * If PROT_WRITE is provided without READ, warn first then unmap 1758 */ 1759 if (!(vma->vm_flags & VM_READ)) { 1760 unsigned long e, s; 1761 1762 svm_range_lock(prange); 1763 if (vma->vm_flags & VM_WRITE) 1764 pr_debug("VM_WRITE without VM_READ is not supported"); 1765 s = max(start, prange->start); 1766 e = min(end, prange->last); 1767 if (e >= s) 1768 r = svm_range_unmap_from_gpus(prange, s, e, 1769 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1770 svm_range_unlock(prange); 1771 /* If unmap returns non-zero, we'll bail on the next for loop 1772 * iteration, so just leave r and continue 1773 */ 1774 addr = next; 1775 continue; 1776 } 1777 1778 WRITE_ONCE(p->svms.faulting_task, current); 1779 range = amdgpu_hmm_range_alloc(NULL); 1780 if (likely(range)) 1781 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1782 readonly, owner, range); 1783 else 1784 r = -ENOMEM; 1785 WRITE_ONCE(p->svms.faulting_task, NULL); 1786 if (r) 1787 pr_debug("failed %d to get svm range pages\n", r); 1788 } else { 1789 r = -EFAULT; 1790 } 1791 1792 if (!r) { 1793 offset = (addr >> PAGE_SHIFT) - prange->start; 1794 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1795 range->hmm_range.hmm_pfns); 1796 if (r) 1797 pr_debug("failed %d to dma map range\n", r); 1798 } 1799 1800 svm_range_lock(prange); 1801 1802 /* Free backing memory of hmm_range if it was initialized 1803 * Override return value to TRY AGAIN only if prior returns 1804 * were successful 1805 */ 1806 if (range && !amdgpu_hmm_range_valid(range) && !r) { 1807 pr_debug("hmm update the range, need validate again\n"); 1808 r = -EAGAIN; 1809 } 1810 1811 /* Free the hmm range */ 1812 amdgpu_hmm_range_free(range); 1813 1814 if (!r && !list_empty(&prange->child_list)) { 1815 pr_debug("range split by unmap in parallel, validate again\n"); 1816 r = -EAGAIN; 1817 } 1818 1819 if (!r) { 1820 map_start_vma = max(map_start, prange->start + offset); 1821 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1822 if (map_start_vma <= map_last_vma) { 1823 offset = map_start_vma - prange->start; 1824 npages = map_last_vma - map_start_vma + 1; 1825 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1826 ctx->bitmap, wait, flush_tlb); 1827 } 1828 } 1829 1830 if (!r && next == end) 1831 prange->mapped_to_gpu = true; 1832 1833 svm_range_unlock(prange); 1834 1835 addr = next; 1836 } 1837 1838 svm_range_unreserve_bos(ctx); 1839 if (!r) 1840 prange->validate_timestamp = ktime_get_boottime(); 1841 1842 free_ctx: 1843 kfree(ctx); 1844 1845 return r; 1846 } 1847 1848 /** 1849 * svm_range_list_lock_and_flush_work - flush pending deferred work 1850 * 1851 * @svms: the svm range list 1852 * @mm: the mm structure 1853 * 1854 * Context: Returns with mmap write lock held, pending deferred work flushed 1855 * 1856 */ 1857 void 1858 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1859 struct mm_struct *mm) 1860 { 1861 retry_flush_work: 1862 flush_work(&svms->deferred_list_work); 1863 mmap_write_lock(mm); 1864 1865 if (list_empty(&svms->deferred_range_list)) 1866 return; 1867 mmap_write_unlock(mm); 1868 pr_debug("retry flush\n"); 1869 goto retry_flush_work; 1870 } 1871 1872 static void svm_range_restore_work(struct work_struct *work) 1873 { 1874 struct delayed_work *dwork = to_delayed_work(work); 1875 struct amdkfd_process_info *process_info; 1876 struct svm_range_list *svms; 1877 struct svm_range *prange; 1878 struct kfd_process *p; 1879 struct mm_struct *mm; 1880 int evicted_ranges; 1881 int invalid; 1882 int r; 1883 1884 svms = container_of(dwork, struct svm_range_list, restore_work); 1885 evicted_ranges = atomic_read(&svms->evicted_ranges); 1886 if (!evicted_ranges) 1887 return; 1888 1889 pr_debug("restore svm ranges\n"); 1890 1891 p = container_of(svms, struct kfd_process, svms); 1892 process_info = p->kgd_process_info; 1893 1894 /* Keep mm reference when svm_range_validate_and_map ranges */ 1895 mm = get_task_mm(p->lead_thread); 1896 if (!mm) { 1897 pr_debug("svms 0x%p process mm gone\n", svms); 1898 return; 1899 } 1900 1901 mutex_lock(&process_info->lock); 1902 svm_range_list_lock_and_flush_work(svms, mm); 1903 mutex_lock(&svms->lock); 1904 1905 evicted_ranges = atomic_read(&svms->evicted_ranges); 1906 1907 list_for_each_entry(prange, &svms->list, list) { 1908 invalid = atomic_read(&prange->invalid); 1909 if (!invalid) 1910 continue; 1911 1912 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1913 prange->svms, prange, prange->start, prange->last, 1914 invalid); 1915 1916 /* 1917 * If range is migrating, wait for migration is done. 1918 */ 1919 mutex_lock(&prange->migrate_mutex); 1920 1921 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1922 MAX_GPU_INSTANCE, false, true, false); 1923 if (r) 1924 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1925 prange->start); 1926 1927 mutex_unlock(&prange->migrate_mutex); 1928 if (r) 1929 goto out_reschedule; 1930 1931 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1932 goto out_reschedule; 1933 } 1934 1935 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1936 evicted_ranges) 1937 goto out_reschedule; 1938 1939 evicted_ranges = 0; 1940 1941 r = kgd2kfd_resume_mm(mm); 1942 if (r) { 1943 /* No recovery from this failure. Probably the CP is 1944 * hanging. No point trying again. 1945 */ 1946 pr_debug("failed %d to resume KFD\n", r); 1947 } 1948 1949 pr_debug("restore svm ranges successfully\n"); 1950 1951 out_reschedule: 1952 mutex_unlock(&svms->lock); 1953 mmap_write_unlock(mm); 1954 mutex_unlock(&process_info->lock); 1955 1956 /* If validation failed, reschedule another attempt */ 1957 if (evicted_ranges) { 1958 pr_debug("reschedule to restore svm range\n"); 1959 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1960 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1961 1962 kfd_smi_event_queue_restore_rescheduled(mm); 1963 } 1964 mmput(mm); 1965 } 1966 1967 /** 1968 * svm_range_evict - evict svm range 1969 * @prange: svm range structure 1970 * @mm: current process mm_struct 1971 * @start: starting process queue number 1972 * @last: last process queue number 1973 * @event: mmu notifier event when range is evicted or migrated 1974 * 1975 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1976 * return to let CPU evict the buffer and proceed CPU pagetable update. 1977 * 1978 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1979 * If invalidation happens while restore work is running, restore work will 1980 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1981 * the queues. 1982 */ 1983 static int 1984 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1985 unsigned long start, unsigned long last, 1986 enum mmu_notifier_event event) 1987 { 1988 struct svm_range_list *svms = prange->svms; 1989 struct svm_range *pchild; 1990 struct kfd_process *p; 1991 int r = 0; 1992 1993 p = container_of(svms, struct kfd_process, svms); 1994 1995 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1996 svms, prange->start, prange->last, start, last); 1997 1998 if (!p->xnack_enabled || 1999 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 2000 int evicted_ranges; 2001 bool mapped = prange->mapped_to_gpu; 2002 2003 list_for_each_entry(pchild, &prange->child_list, child_list) { 2004 if (!pchild->mapped_to_gpu) 2005 continue; 2006 mapped = true; 2007 mutex_lock_nested(&pchild->lock, 1); 2008 if (pchild->start <= last && pchild->last >= start) { 2009 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 2010 pchild->start, pchild->last); 2011 atomic_inc(&pchild->invalid); 2012 } 2013 mutex_unlock(&pchild->lock); 2014 } 2015 2016 if (!mapped) 2017 return r; 2018 2019 if (prange->start <= last && prange->last >= start) 2020 atomic_inc(&prange->invalid); 2021 2022 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 2023 if (evicted_ranges != 1) 2024 return r; 2025 2026 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 2027 prange->svms, prange->start, prange->last); 2028 2029 /* First eviction, stop the queues */ 2030 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2031 if (r) 2032 pr_debug("failed to quiesce KFD\n"); 2033 2034 pr_debug("schedule to restore svm %p ranges\n", svms); 2035 queue_delayed_work(system_freezable_wq, &svms->restore_work, 2036 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 2037 } else { 2038 unsigned long s, l; 2039 uint32_t trigger; 2040 2041 if (event == MMU_NOTIFY_MIGRATE) 2042 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 2043 else 2044 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2045 2046 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2047 prange->svms, start, last); 2048 list_for_each_entry(pchild, &prange->child_list, child_list) { 2049 mutex_lock_nested(&pchild->lock, 1); 2050 s = max(start, pchild->start); 2051 l = min(last, pchild->last); 2052 if (l >= s) 2053 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2054 mutex_unlock(&pchild->lock); 2055 } 2056 s = max(start, prange->start); 2057 l = min(last, prange->last); 2058 if (l >= s) 2059 svm_range_unmap_from_gpus(prange, s, l, trigger); 2060 } 2061 2062 return r; 2063 } 2064 2065 static struct svm_range *svm_range_clone(struct svm_range *old) 2066 { 2067 struct svm_range *new; 2068 2069 new = svm_range_new(old->svms, old->start, old->last, false); 2070 if (!new) 2071 return NULL; 2072 if (svm_range_copy_dma_addrs(new, old)) { 2073 svm_range_free(new, false); 2074 return NULL; 2075 } 2076 if (old->svm_bo) { 2077 new->ttm_res = old->ttm_res; 2078 new->offset = old->offset; 2079 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2080 spin_lock(&new->svm_bo->list_lock); 2081 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2082 spin_unlock(&new->svm_bo->list_lock); 2083 } 2084 new->flags = old->flags; 2085 new->preferred_loc = old->preferred_loc; 2086 new->prefetch_loc = old->prefetch_loc; 2087 new->actual_loc = old->actual_loc; 2088 new->granularity = old->granularity; 2089 new->mapped_to_gpu = old->mapped_to_gpu; 2090 new->vram_pages = old->vram_pages; 2091 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2092 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2093 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2094 2095 return new; 2096 } 2097 2098 void svm_range_set_max_pages(struct amdgpu_device *adev) 2099 { 2100 uint64_t max_pages; 2101 uint64_t pages, _pages; 2102 uint64_t min_pages = 0; 2103 int i, id; 2104 2105 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2106 if (adev->kfd.dev->nodes[i]->xcp) 2107 id = adev->kfd.dev->nodes[i]->xcp->id; 2108 else 2109 id = -1; 2110 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2111 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2112 pages = rounddown_pow_of_two(pages); 2113 min_pages = min_not_zero(min_pages, pages); 2114 } 2115 2116 do { 2117 max_pages = READ_ONCE(max_svm_range_pages); 2118 _pages = min_not_zero(max_pages, min_pages); 2119 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2120 } 2121 2122 static int 2123 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2124 uint64_t max_pages, struct list_head *insert_list, 2125 struct list_head *update_list) 2126 { 2127 struct svm_range *prange; 2128 uint64_t l; 2129 2130 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2131 max_pages, start, last); 2132 2133 while (last >= start) { 2134 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2135 2136 prange = svm_range_new(svms, start, l, true); 2137 if (!prange) 2138 return -ENOMEM; 2139 list_add(&prange->list, insert_list); 2140 list_add(&prange->update_list, update_list); 2141 2142 start = l + 1; 2143 } 2144 return 0; 2145 } 2146 2147 /** 2148 * svm_range_add - add svm range and handle overlap 2149 * @p: the range add to this process svms 2150 * @start: page size aligned 2151 * @size: page size aligned 2152 * @nattr: number of attributes 2153 * @attrs: array of attributes 2154 * @update_list: output, the ranges need validate and update GPU mapping 2155 * @insert_list: output, the ranges need insert to svms 2156 * @remove_list: output, the ranges are replaced and need remove from svms 2157 * @remap_list: output, remap unaligned svm ranges 2158 * 2159 * Check if the virtual address range has overlap with any existing ranges, 2160 * split partly overlapping ranges and add new ranges in the gaps. All changes 2161 * should be applied to the range_list and interval tree transactionally. If 2162 * any range split or allocation fails, the entire update fails. Therefore any 2163 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2164 * unchanged. 2165 * 2166 * If the transaction succeeds, the caller can update and insert clones and 2167 * new ranges, then free the originals. 2168 * 2169 * Otherwise the caller can free the clones and new ranges, while the old 2170 * svm_ranges remain unchanged. 2171 * 2172 * Context: Process context, caller must hold svms->lock 2173 * 2174 * Return: 2175 * 0 - OK, otherwise error code 2176 */ 2177 static int 2178 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2179 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2180 struct list_head *update_list, struct list_head *insert_list, 2181 struct list_head *remove_list, struct list_head *remap_list) 2182 { 2183 unsigned long last = start + size - 1UL; 2184 struct svm_range_list *svms = &p->svms; 2185 struct interval_tree_node *node; 2186 struct svm_range *prange; 2187 struct svm_range *tmp; 2188 struct list_head new_list; 2189 int r = 0; 2190 2191 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2192 2193 INIT_LIST_HEAD(update_list); 2194 INIT_LIST_HEAD(insert_list); 2195 INIT_LIST_HEAD(remove_list); 2196 INIT_LIST_HEAD(&new_list); 2197 INIT_LIST_HEAD(remap_list); 2198 2199 node = interval_tree_iter_first(&svms->objects, start, last); 2200 while (node) { 2201 struct interval_tree_node *next; 2202 unsigned long next_start; 2203 2204 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2205 node->last); 2206 2207 prange = container_of(node, struct svm_range, it_node); 2208 next = interval_tree_iter_next(node, start, last); 2209 next_start = min(node->last, last) + 1; 2210 2211 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2212 prange->mapped_to_gpu) { 2213 /* nothing to do */ 2214 } else if (node->start < start || node->last > last) { 2215 /* node intersects the update range and its attributes 2216 * will change. Clone and split it, apply updates only 2217 * to the overlapping part 2218 */ 2219 struct svm_range *old = prange; 2220 2221 prange = svm_range_clone(old); 2222 if (!prange) { 2223 r = -ENOMEM; 2224 goto out; 2225 } 2226 2227 list_add(&old->update_list, remove_list); 2228 list_add(&prange->list, insert_list); 2229 list_add(&prange->update_list, update_list); 2230 2231 if (node->start < start) { 2232 pr_debug("change old range start\n"); 2233 r = svm_range_split_head(prange, start, 2234 insert_list, remap_list); 2235 if (r) 2236 goto out; 2237 } 2238 if (node->last > last) { 2239 pr_debug("change old range last\n"); 2240 r = svm_range_split_tail(prange, last, 2241 insert_list, remap_list); 2242 if (r) 2243 goto out; 2244 } 2245 } else { 2246 /* The node is contained within start..last, 2247 * just update it 2248 */ 2249 list_add(&prange->update_list, update_list); 2250 } 2251 2252 /* insert a new node if needed */ 2253 if (node->start > start) { 2254 r = svm_range_split_new(svms, start, node->start - 1, 2255 READ_ONCE(max_svm_range_pages), 2256 &new_list, update_list); 2257 if (r) 2258 goto out; 2259 } 2260 2261 node = next; 2262 start = next_start; 2263 } 2264 2265 /* add a final range at the end if needed */ 2266 if (start <= last) 2267 r = svm_range_split_new(svms, start, last, 2268 READ_ONCE(max_svm_range_pages), 2269 &new_list, update_list); 2270 2271 out: 2272 if (r) { 2273 list_for_each_entry_safe(prange, tmp, insert_list, list) 2274 svm_range_free(prange, false); 2275 list_for_each_entry_safe(prange, tmp, &new_list, list) 2276 svm_range_free(prange, true); 2277 } else { 2278 list_splice(&new_list, insert_list); 2279 } 2280 2281 return r; 2282 } 2283 2284 static void 2285 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2286 struct svm_range *prange) 2287 { 2288 unsigned long start; 2289 unsigned long last; 2290 2291 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2292 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2293 2294 if (prange->start == start && prange->last == last) 2295 return; 2296 2297 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2298 prange->svms, prange, start, last, prange->start, 2299 prange->last); 2300 2301 if (start != 0 && last != 0) { 2302 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2303 svm_range_remove_notifier(prange); 2304 } 2305 prange->it_node.start = prange->start; 2306 prange->it_node.last = prange->last; 2307 2308 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2309 svm_range_add_notifier_locked(mm, prange); 2310 } 2311 2312 static void 2313 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2314 struct mm_struct *mm) 2315 { 2316 switch (prange->work_item.op) { 2317 case SVM_OP_NULL: 2318 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2319 svms, prange, prange->start, prange->last); 2320 break; 2321 case SVM_OP_UNMAP_RANGE: 2322 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2323 svms, prange, prange->start, prange->last); 2324 svm_range_unlink(prange); 2325 svm_range_remove_notifier(prange); 2326 svm_range_free(prange, true); 2327 break; 2328 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2329 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2330 svms, prange, prange->start, prange->last); 2331 svm_range_update_notifier_and_interval_tree(mm, prange); 2332 break; 2333 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2334 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2335 svms, prange, prange->start, prange->last); 2336 svm_range_update_notifier_and_interval_tree(mm, prange); 2337 /* TODO: implement deferred validation and mapping */ 2338 break; 2339 case SVM_OP_ADD_RANGE: 2340 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2341 prange->start, prange->last); 2342 svm_range_add_to_svms(prange); 2343 svm_range_add_notifier_locked(mm, prange); 2344 break; 2345 case SVM_OP_ADD_RANGE_AND_MAP: 2346 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2347 prange, prange->start, prange->last); 2348 svm_range_add_to_svms(prange); 2349 svm_range_add_notifier_locked(mm, prange); 2350 /* TODO: implement deferred validation and mapping */ 2351 break; 2352 default: 2353 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2354 prange->work_item.op); 2355 } 2356 } 2357 2358 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2359 { 2360 struct kfd_process_device *pdd; 2361 struct kfd_process *p; 2362 uint32_t i; 2363 2364 p = container_of(svms, struct kfd_process, svms); 2365 2366 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2367 pdd = p->pdds[i]; 2368 if (!pdd) 2369 continue; 2370 2371 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2372 2373 if (!down_read_trylock(&pdd->dev->adev->reset_domain->sem)) 2374 continue; 2375 2376 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2377 pdd->dev->adev->irq.retry_cam_enabled ? 2378 &pdd->dev->adev->irq.ih : 2379 &pdd->dev->adev->irq.ih1); 2380 2381 if (pdd->dev->adev->irq.retry_cam_enabled) 2382 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2383 &pdd->dev->adev->irq.ih_soft); 2384 2385 up_read(&pdd->dev->adev->reset_domain->sem); 2386 2387 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2388 } 2389 } 2390 2391 static void svm_range_deferred_list_work(struct work_struct *work) 2392 { 2393 struct svm_range_list *svms; 2394 struct svm_range *prange; 2395 struct mm_struct *mm; 2396 2397 svms = container_of(work, struct svm_range_list, deferred_list_work); 2398 pr_debug("enter svms 0x%p\n", svms); 2399 2400 spin_lock(&svms->deferred_list_lock); 2401 while (!list_empty(&svms->deferred_range_list)) { 2402 prange = list_first_entry(&svms->deferred_range_list, 2403 struct svm_range, deferred_list); 2404 spin_unlock(&svms->deferred_list_lock); 2405 2406 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2407 prange->start, prange->last, prange->work_item.op); 2408 2409 mm = prange->work_item.mm; 2410 2411 mmap_write_lock(mm); 2412 2413 /* Remove from deferred_list must be inside mmap write lock, for 2414 * two race cases: 2415 * 1. unmap_from_cpu may change work_item.op and add the range 2416 * to deferred_list again, cause use after free bug. 2417 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2418 * lock and continue because deferred_list is empty, but 2419 * deferred_list work is actually waiting for mmap lock. 2420 */ 2421 spin_lock(&svms->deferred_list_lock); 2422 list_del_init(&prange->deferred_list); 2423 spin_unlock(&svms->deferred_list_lock); 2424 2425 mutex_lock(&svms->lock); 2426 mutex_lock(&prange->migrate_mutex); 2427 while (!list_empty(&prange->child_list)) { 2428 struct svm_range *pchild; 2429 2430 pchild = list_first_entry(&prange->child_list, 2431 struct svm_range, child_list); 2432 pr_debug("child prange 0x%p op %d\n", pchild, 2433 pchild->work_item.op); 2434 list_del_init(&pchild->child_list); 2435 svm_range_handle_list_op(svms, pchild, mm); 2436 } 2437 mutex_unlock(&prange->migrate_mutex); 2438 2439 svm_range_handle_list_op(svms, prange, mm); 2440 mutex_unlock(&svms->lock); 2441 mmap_write_unlock(mm); 2442 2443 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2444 * last mm refcount, schedule release work to avoid circular locking 2445 */ 2446 mmput_async(mm); 2447 2448 spin_lock(&svms->deferred_list_lock); 2449 } 2450 spin_unlock(&svms->deferred_list_lock); 2451 pr_debug("exit svms 0x%p\n", svms); 2452 } 2453 2454 void 2455 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2456 struct mm_struct *mm, enum svm_work_list_ops op) 2457 { 2458 spin_lock(&svms->deferred_list_lock); 2459 /* if prange is on the deferred list */ 2460 if (!list_empty(&prange->deferred_list)) { 2461 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2462 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2463 if (op != SVM_OP_NULL && 2464 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2465 prange->work_item.op = op; 2466 } else { 2467 /* Pairs with mmput in deferred_list_work. 2468 * If process is exiting and mm is gone, don't update mmu notifier. 2469 */ 2470 if (mmget_not_zero(mm)) { 2471 prange->work_item.mm = mm; 2472 prange->work_item.op = op; 2473 list_add_tail(&prange->deferred_list, 2474 &prange->svms->deferred_range_list); 2475 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2476 prange, prange->start, prange->last, op); 2477 } 2478 } 2479 spin_unlock(&svms->deferred_list_lock); 2480 } 2481 2482 void schedule_deferred_list_work(struct svm_range_list *svms) 2483 { 2484 spin_lock(&svms->deferred_list_lock); 2485 if (!list_empty(&svms->deferred_range_list)) 2486 schedule_work(&svms->deferred_list_work); 2487 spin_unlock(&svms->deferred_list_lock); 2488 } 2489 2490 static void 2491 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2492 unsigned long last) 2493 { 2494 struct svm_range *head; 2495 struct svm_range *tail; 2496 2497 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2498 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2499 prange->start, prange->last); 2500 return; 2501 } 2502 if (start > prange->last || last < prange->start) 2503 return; 2504 2505 head = tail = prange; 2506 if (start > prange->start) 2507 svm_range_split(prange, prange->start, start - 1, &tail); 2508 if (last < tail->last) 2509 svm_range_split(tail, last + 1, tail->last, &head); 2510 2511 if (head != prange && tail != prange) { 2512 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2513 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2514 } else if (tail != prange) { 2515 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2516 } else if (head != prange) { 2517 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2518 } else if (parent != prange) { 2519 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2520 } 2521 } 2522 2523 static void 2524 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2525 unsigned long start, unsigned long last) 2526 { 2527 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2528 struct svm_range_list *svms; 2529 struct svm_range *pchild; 2530 struct kfd_process *p; 2531 unsigned long s, l; 2532 bool unmap_parent; 2533 uint32_t i; 2534 2535 if (atomic_read(&prange->queue_refcount)) { 2536 int r; 2537 2538 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2539 prange->start << PAGE_SHIFT); 2540 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2541 if (r) 2542 pr_debug("failed %d to quiesce KFD queues\n", r); 2543 } 2544 2545 p = kfd_lookup_process_by_mm(mm); 2546 if (!p) 2547 return; 2548 svms = &p->svms; 2549 2550 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2551 prange, prange->start, prange->last, start, last); 2552 2553 /* calculate time stamps that are used to decide which page faults need be 2554 * dropped or handled before unmap pages from gpu vm 2555 */ 2556 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2557 struct kfd_process_device *pdd; 2558 struct amdgpu_device *adev; 2559 struct amdgpu_ih_ring *ih; 2560 uint32_t checkpoint_wptr; 2561 2562 pdd = p->pdds[i]; 2563 if (!pdd) 2564 continue; 2565 2566 adev = pdd->dev->adev; 2567 2568 /* Check and drain ih1 ring if cam not available */ 2569 if (!adev->irq.retry_cam_enabled && adev->irq.ih1.ring_size) { 2570 ih = &adev->irq.ih1; 2571 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2572 if (ih->rptr != checkpoint_wptr) { 2573 svms->checkpoint_ts[i] = 2574 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2575 continue; 2576 } 2577 } 2578 2579 /* check if dev->irq.ih_soft is not empty */ 2580 ih = &adev->irq.ih_soft; 2581 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2582 if (ih->rptr != checkpoint_wptr) 2583 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2584 } 2585 2586 unmap_parent = start <= prange->start && last >= prange->last; 2587 2588 list_for_each_entry(pchild, &prange->child_list, child_list) { 2589 mutex_lock_nested(&pchild->lock, 1); 2590 s = max(start, pchild->start); 2591 l = min(last, pchild->last); 2592 if (l >= s) 2593 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2594 svm_range_unmap_split(prange, pchild, start, last); 2595 mutex_unlock(&pchild->lock); 2596 } 2597 s = max(start, prange->start); 2598 l = min(last, prange->last); 2599 if (l >= s) 2600 svm_range_unmap_from_gpus(prange, s, l, trigger); 2601 svm_range_unmap_split(prange, prange, start, last); 2602 2603 if (unmap_parent) 2604 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2605 else 2606 svm_range_add_list_work(svms, prange, mm, 2607 SVM_OP_UPDATE_RANGE_NOTIFIER); 2608 schedule_deferred_list_work(svms); 2609 2610 kfd_unref_process(p); 2611 } 2612 2613 /** 2614 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2615 * @mni: mmu_interval_notifier struct 2616 * @range: mmu_notifier_range struct 2617 * @cur_seq: value to pass to mmu_interval_set_seq() 2618 * 2619 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2620 * is from migration, or CPU page invalidation callback. 2621 * 2622 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2623 * work thread, and split prange if only part of prange is unmapped. 2624 * 2625 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2626 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2627 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2628 * update GPU mapping to recover. 2629 * 2630 * Context: mmap lock, notifier_invalidate_start lock are held 2631 * for invalidate event, prange lock is held if this is from migration 2632 */ 2633 static bool 2634 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2635 const struct mmu_notifier_range *range, 2636 unsigned long cur_seq) 2637 { 2638 struct svm_range *prange; 2639 unsigned long start; 2640 unsigned long last; 2641 2642 if (range->event == MMU_NOTIFY_RELEASE) 2643 return true; 2644 2645 start = mni->interval_tree.start; 2646 last = mni->interval_tree.last; 2647 start = max(start, range->start) >> PAGE_SHIFT; 2648 last = min(last, range->end - 1) >> PAGE_SHIFT; 2649 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2650 start, last, range->start >> PAGE_SHIFT, 2651 (range->end - 1) >> PAGE_SHIFT, 2652 mni->interval_tree.start >> PAGE_SHIFT, 2653 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2654 2655 prange = container_of(mni, struct svm_range, notifier); 2656 2657 svm_range_lock(prange); 2658 mmu_interval_set_seq(mni, cur_seq); 2659 2660 switch (range->event) { 2661 case MMU_NOTIFY_UNMAP: 2662 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2663 break; 2664 default: 2665 svm_range_evict(prange, mni->mm, start, last, range->event); 2666 break; 2667 } 2668 2669 svm_range_unlock(prange); 2670 2671 return true; 2672 } 2673 2674 /** 2675 * svm_range_from_addr - find svm range from fault address 2676 * @svms: svm range list header 2677 * @addr: address to search range interval tree, in pages 2678 * @parent: parent range if range is on child list 2679 * 2680 * Context: The caller must hold svms->lock 2681 * 2682 * Return: the svm_range found or NULL 2683 */ 2684 struct svm_range * 2685 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2686 struct svm_range **parent) 2687 { 2688 struct interval_tree_node *node; 2689 struct svm_range *prange; 2690 struct svm_range *pchild; 2691 2692 node = interval_tree_iter_first(&svms->objects, addr, addr); 2693 if (!node) 2694 return NULL; 2695 2696 prange = container_of(node, struct svm_range, it_node); 2697 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2698 addr, prange->start, prange->last, node->start, node->last); 2699 2700 if (addr >= prange->start && addr <= prange->last) { 2701 if (parent) 2702 *parent = prange; 2703 return prange; 2704 } 2705 list_for_each_entry(pchild, &prange->child_list, child_list) 2706 if (addr >= pchild->start && addr <= pchild->last) { 2707 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2708 addr, pchild->start, pchild->last); 2709 if (parent) 2710 *parent = prange; 2711 return pchild; 2712 } 2713 2714 return NULL; 2715 } 2716 2717 /* svm_range_best_restore_location - decide the best fault restore location 2718 * @prange: svm range structure 2719 * @adev: the GPU on which vm fault happened 2720 * 2721 * This is only called when xnack is on, to decide the best location to restore 2722 * the range mapping after GPU vm fault. Caller uses the best location to do 2723 * migration if actual loc is not best location, then update GPU page table 2724 * mapping to the best location. 2725 * 2726 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2727 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2728 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2729 * if range actual loc is cpu, best_loc is cpu 2730 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2731 * range actual loc. 2732 * Otherwise, GPU no access, best_loc is -1. 2733 * 2734 * Return: 2735 * -1 means vm fault GPU no access 2736 * 0 for CPU or GPU id 2737 */ 2738 static int32_t 2739 svm_range_best_restore_location(struct svm_range *prange, 2740 struct kfd_node *node, 2741 int32_t *gpuidx) 2742 { 2743 struct kfd_node *bo_node, *preferred_node; 2744 struct kfd_process *p; 2745 uint32_t gpuid; 2746 int r; 2747 2748 p = container_of(prange->svms, struct kfd_process, svms); 2749 2750 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2751 if (r < 0) { 2752 pr_debug("failed to get gpuid from kgd\n"); 2753 return -1; 2754 } 2755 2756 if (node->adev->apu_prefer_gtt) 2757 return 0; 2758 2759 if (prange->preferred_loc == gpuid || 2760 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2761 return prange->preferred_loc; 2762 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2763 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2764 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2765 return prange->preferred_loc; 2766 /* fall through */ 2767 } 2768 2769 if (test_bit(*gpuidx, prange->bitmap_access)) 2770 return gpuid; 2771 2772 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2773 if (!prange->actual_loc) 2774 return 0; 2775 2776 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2777 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2778 return prange->actual_loc; 2779 else 2780 return 0; 2781 } 2782 2783 return -1; 2784 } 2785 2786 static int 2787 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2788 unsigned long *start, unsigned long *last, 2789 bool *is_heap_stack) 2790 { 2791 struct vm_area_struct *vma; 2792 struct interval_tree_node *node; 2793 struct rb_node *rb_node; 2794 unsigned long start_limit, end_limit; 2795 2796 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2797 if (!vma) { 2798 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2799 return -EFAULT; 2800 } 2801 2802 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2803 2804 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2805 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2806 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2807 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2808 2809 /* First range that starts after the fault address */ 2810 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2811 if (node) { 2812 end_limit = min(end_limit, node->start); 2813 /* Last range that ends before the fault address */ 2814 rb_node = rb_prev(&node->rb); 2815 } else { 2816 /* Last range must end before addr because 2817 * there was no range after addr 2818 */ 2819 rb_node = rb_last(&p->svms.objects.rb_root); 2820 } 2821 if (rb_node) { 2822 node = container_of(rb_node, struct interval_tree_node, rb); 2823 if (node->last >= addr) { 2824 WARN(1, "Overlap with prev node and page fault addr\n"); 2825 return -EFAULT; 2826 } 2827 start_limit = max(start_limit, node->last + 1); 2828 } 2829 2830 *start = start_limit; 2831 *last = end_limit - 1; 2832 2833 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2834 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2835 *start, *last, *is_heap_stack); 2836 2837 return 0; 2838 } 2839 2840 static int 2841 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2842 uint64_t *bo_s, uint64_t *bo_l) 2843 { 2844 struct amdgpu_bo_va_mapping *mapping; 2845 struct interval_tree_node *node; 2846 struct amdgpu_bo *bo = NULL; 2847 unsigned long userptr; 2848 uint32_t i; 2849 int r; 2850 2851 for (i = 0; i < p->n_pdds; i++) { 2852 struct amdgpu_vm *vm; 2853 2854 if (!p->pdds[i]->drm_priv) 2855 continue; 2856 2857 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2858 r = amdgpu_bo_reserve(vm->root.bo, false); 2859 if (r) 2860 return r; 2861 2862 /* Check userptr by searching entire vm->va interval tree */ 2863 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2864 while (node) { 2865 mapping = container_of((struct rb_node *)node, 2866 struct amdgpu_bo_va_mapping, rb); 2867 bo = mapping->bo_va->base.bo; 2868 2869 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2870 start << PAGE_SHIFT, 2871 last << PAGE_SHIFT, 2872 &userptr)) { 2873 node = interval_tree_iter_next(node, 0, ~0ULL); 2874 continue; 2875 } 2876 2877 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2878 start, last); 2879 if (bo_s && bo_l) { 2880 *bo_s = userptr >> PAGE_SHIFT; 2881 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2882 } 2883 amdgpu_bo_unreserve(vm->root.bo); 2884 return -EADDRINUSE; 2885 } 2886 amdgpu_bo_unreserve(vm->root.bo); 2887 } 2888 return 0; 2889 } 2890 2891 static struct 2892 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2893 struct kfd_process *p, 2894 struct mm_struct *mm, 2895 int64_t addr) 2896 { 2897 struct svm_range *prange = NULL; 2898 unsigned long start, last; 2899 uint32_t gpuid, gpuidx; 2900 bool is_heap_stack; 2901 uint64_t bo_s = 0; 2902 uint64_t bo_l = 0; 2903 int r; 2904 2905 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2906 &is_heap_stack)) 2907 return NULL; 2908 2909 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2910 if (r != -EADDRINUSE) 2911 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2912 2913 if (r == -EADDRINUSE) { 2914 if (addr >= bo_s && addr <= bo_l) 2915 return NULL; 2916 2917 /* Create one page svm range if 2MB range overlapping */ 2918 start = addr; 2919 last = addr; 2920 } 2921 2922 prange = svm_range_new(&p->svms, start, last, true); 2923 if (!prange) { 2924 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2925 return NULL; 2926 } 2927 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2928 pr_debug("failed to get gpuid from kgd\n"); 2929 svm_range_free(prange, true); 2930 return NULL; 2931 } 2932 2933 if (is_heap_stack) 2934 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2935 2936 svm_range_add_to_svms(prange); 2937 svm_range_add_notifier_locked(mm, prange); 2938 2939 return prange; 2940 } 2941 2942 /* svm_range_skip_recover - decide if prange can be recovered 2943 * @prange: svm range structure 2944 * 2945 * GPU vm retry fault handle skip recover the range for cases: 2946 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2947 * deferred list work will drain the stale fault before free the prange. 2948 * 2. prange is on deferred list to add interval notifier after split, or 2949 * 3. prange is child range, it is split from parent prange, recover later 2950 * after interval notifier is added. 2951 * 2952 * Return: true to skip recover, false to recover 2953 */ 2954 static bool svm_range_skip_recover(struct svm_range *prange) 2955 { 2956 struct svm_range_list *svms = prange->svms; 2957 2958 spin_lock(&svms->deferred_list_lock); 2959 if (list_empty(&prange->deferred_list) && 2960 list_empty(&prange->child_list)) { 2961 spin_unlock(&svms->deferred_list_lock); 2962 return false; 2963 } 2964 spin_unlock(&svms->deferred_list_lock); 2965 2966 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2967 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2968 svms, prange, prange->start, prange->last); 2969 return true; 2970 } 2971 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2972 prange->work_item.op == SVM_OP_ADD_RANGE) { 2973 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2974 svms, prange, prange->start, prange->last); 2975 return true; 2976 } 2977 return false; 2978 } 2979 2980 static void 2981 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2982 int32_t gpuidx) 2983 { 2984 struct kfd_process_device *pdd; 2985 2986 /* fault is on different page of same range 2987 * or fault is skipped to recover later 2988 * or fault is on invalid virtual address 2989 */ 2990 if (gpuidx == MAX_GPU_INSTANCE) { 2991 uint32_t gpuid; 2992 int r; 2993 2994 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2995 if (r < 0) 2996 return; 2997 } 2998 2999 /* fault is recovered 3000 * or fault cannot recover because GPU no access on the range 3001 */ 3002 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3003 if (pdd) 3004 WRITE_ONCE(pdd->faults, pdd->faults + 1); 3005 } 3006 3007 static bool 3008 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 3009 { 3010 unsigned long requested = VM_READ; 3011 3012 if (write_fault) 3013 requested |= VM_WRITE; 3014 3015 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 3016 vma->vm_flags); 3017 return (vma->vm_flags & requested) == requested; 3018 } 3019 3020 int 3021 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 3022 uint32_t vmid, uint32_t node_id, 3023 uint64_t addr, uint64_t ts, bool write_fault) 3024 { 3025 unsigned long start, last, size; 3026 struct mm_struct *mm = NULL; 3027 struct svm_range_list *svms; 3028 struct svm_range *prange; 3029 struct kfd_process *p; 3030 ktime_t timestamp = ktime_get_boottime(); 3031 struct kfd_node *node; 3032 int32_t best_loc; 3033 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 3034 bool write_locked = false; 3035 struct vm_area_struct *vma; 3036 bool migration = false; 3037 int r = 0; 3038 3039 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 3040 pr_debug("device does not support SVM\n"); 3041 return -EFAULT; 3042 } 3043 3044 p = kfd_lookup_process_by_pasid(pasid, NULL); 3045 if (!p) { 3046 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 3047 return 0; 3048 } 3049 svms = &p->svms; 3050 3051 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3052 3053 if (atomic_read(&svms->drain_pagefaults)) { 3054 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3055 r = 0; 3056 goto out; 3057 } 3058 3059 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3060 if (!node) { 3061 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3062 vmid); 3063 r = -EFAULT; 3064 goto out; 3065 } 3066 3067 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3068 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3069 r = -EFAULT; 3070 goto out; 3071 } 3072 3073 if (!p->xnack_enabled) { 3074 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3075 r = -EFAULT; 3076 goto out; 3077 } 3078 3079 /* p->lead_thread is available as kfd_process_wq_release flush the work 3080 * before releasing task ref. 3081 */ 3082 mm = get_task_mm(p->lead_thread); 3083 if (!mm) { 3084 pr_debug("svms 0x%p failed to get mm\n", svms); 3085 r = 0; 3086 goto out; 3087 } 3088 3089 mmap_read_lock(mm); 3090 retry_write_locked: 3091 mutex_lock(&svms->lock); 3092 3093 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3094 if (svms->checkpoint_ts[gpuidx] != 0) { 3095 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3096 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3097 if (write_locked) 3098 mmap_write_downgrade(mm); 3099 r = -EAGAIN; 3100 goto out_unlock_svms; 3101 } else { 3102 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3103 * to zero to avoid following ts wrap around give wrong comparing 3104 */ 3105 svms->checkpoint_ts[gpuidx] = 0; 3106 } 3107 } 3108 3109 prange = svm_range_from_addr(svms, addr, NULL); 3110 if (!prange) { 3111 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3112 svms, addr); 3113 if (!write_locked) { 3114 /* Need the write lock to create new range with MMU notifier. 3115 * Also flush pending deferred work to make sure the interval 3116 * tree is up to date before we add a new range 3117 */ 3118 mutex_unlock(&svms->lock); 3119 mmap_read_unlock(mm); 3120 mmap_write_lock(mm); 3121 write_locked = true; 3122 goto retry_write_locked; 3123 } 3124 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3125 if (!prange) { 3126 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3127 svms, addr); 3128 mmap_write_downgrade(mm); 3129 r = -EFAULT; 3130 goto out_unlock_svms; 3131 } 3132 } 3133 if (write_locked) 3134 mmap_write_downgrade(mm); 3135 3136 mutex_lock(&prange->migrate_mutex); 3137 3138 if (svm_range_skip_recover(prange)) { 3139 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3140 r = 0; 3141 goto out_unlock_range; 3142 } 3143 3144 /* skip duplicate vm fault on different pages of same range */ 3145 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3146 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3147 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3148 svms, prange->start, prange->last); 3149 r = 0; 3150 goto out_unlock_range; 3151 } 3152 3153 /* __do_munmap removed VMA, return success as we are handling stale 3154 * retry fault. 3155 */ 3156 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3157 if (!vma) { 3158 pr_debug("address 0x%llx VMA is removed\n", addr); 3159 r = 0; 3160 goto out_unlock_range; 3161 } 3162 3163 if (!svm_fault_allowed(vma, write_fault)) { 3164 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3165 write_fault ? "write" : "read"); 3166 r = -EPERM; 3167 goto out_unlock_range; 3168 } 3169 3170 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3171 if (best_loc == -1) { 3172 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3173 svms, prange->start, prange->last); 3174 r = -EACCES; 3175 goto out_unlock_range; 3176 } 3177 3178 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3179 svms, prange->start, prange->last, best_loc, 3180 prange->actual_loc); 3181 3182 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3183 write_fault, timestamp); 3184 3185 /* Align migration range start and size to granularity size */ 3186 size = 1UL << prange->granularity; 3187 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3188 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3189 if (prange->actual_loc != 0 || best_loc != 0) { 3190 if (best_loc) { 3191 r = svm_migrate_to_vram(prange, best_loc, start, last, 3192 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3193 if (r) { 3194 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3195 r, addr); 3196 /* Fallback to system memory if migration to 3197 * VRAM failed 3198 */ 3199 if (prange->actual_loc && prange->actual_loc != best_loc) 3200 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3201 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3202 else 3203 r = 0; 3204 } 3205 } else { 3206 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3207 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3208 } 3209 if (r) { 3210 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3211 r, svms, start, last); 3212 goto out_migrate_fail; 3213 } else { 3214 migration = true; 3215 } 3216 } 3217 3218 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3219 false, false); 3220 if (r) 3221 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3222 r, svms, start, last); 3223 3224 out_migrate_fail: 3225 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3226 migration); 3227 3228 out_unlock_range: 3229 mutex_unlock(&prange->migrate_mutex); 3230 out_unlock_svms: 3231 mutex_unlock(&svms->lock); 3232 mmap_read_unlock(mm); 3233 3234 if (r != -EAGAIN) 3235 svm_range_count_fault(node, p, gpuidx); 3236 3237 mmput(mm); 3238 out: 3239 kfd_unref_process(p); 3240 3241 if (r == -EAGAIN) { 3242 pr_debug("recover vm fault later\n"); 3243 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3244 r = 0; 3245 } 3246 return r; 3247 } 3248 3249 int 3250 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3251 { 3252 struct svm_range *prange, *pchild; 3253 uint64_t reserved_size = 0; 3254 uint64_t size; 3255 int r = 0; 3256 3257 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3258 3259 mutex_lock(&p->svms.lock); 3260 3261 list_for_each_entry(prange, &p->svms.list, list) { 3262 svm_range_lock(prange); 3263 list_for_each_entry(pchild, &prange->child_list, child_list) { 3264 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3265 if (xnack_enabled) { 3266 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3267 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3268 } else { 3269 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3270 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3271 if (r) 3272 goto out_unlock; 3273 reserved_size += size; 3274 } 3275 } 3276 3277 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3278 if (xnack_enabled) { 3279 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3280 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3281 } else { 3282 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3283 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3284 if (r) 3285 goto out_unlock; 3286 reserved_size += size; 3287 } 3288 out_unlock: 3289 svm_range_unlock(prange); 3290 if (r) 3291 break; 3292 } 3293 3294 if (r) 3295 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3296 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3297 else 3298 /* Change xnack mode must be inside svms lock, to avoid race with 3299 * svm_range_deferred_list_work unreserve memory in parallel. 3300 */ 3301 p->xnack_enabled = xnack_enabled; 3302 3303 mutex_unlock(&p->svms.lock); 3304 return r; 3305 } 3306 3307 void svm_range_list_fini(struct kfd_process *p) 3308 { 3309 struct svm_range *prange; 3310 struct svm_range *next; 3311 3312 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3313 &p->svms); 3314 3315 cancel_delayed_work_sync(&p->svms.restore_work); 3316 3317 /* Ensure list work is finished before process is destroyed */ 3318 flush_work(&p->svms.deferred_list_work); 3319 3320 /* 3321 * Ensure no retry fault comes in afterwards, as page fault handler will 3322 * not find kfd process and take mm lock to recover fault. 3323 * stop kfd page fault handing, then wait pending page faults got drained 3324 */ 3325 atomic_set(&p->svms.drain_pagefaults, 1); 3326 svm_range_drain_retry_fault(&p->svms); 3327 3328 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3329 svm_range_unlink(prange); 3330 svm_range_remove_notifier(prange); 3331 svm_range_free(prange, true); 3332 } 3333 3334 mutex_destroy(&p->svms.lock); 3335 3336 pr_debug("process pid %d svms 0x%p done\n", 3337 p->lead_thread->pid, &p->svms); 3338 } 3339 3340 int svm_range_list_init(struct kfd_process *p) 3341 { 3342 struct svm_range_list *svms = &p->svms; 3343 int i; 3344 3345 svms->objects = RB_ROOT_CACHED; 3346 mutex_init(&svms->lock); 3347 INIT_LIST_HEAD(&svms->list); 3348 atomic_set(&svms->evicted_ranges, 0); 3349 atomic_set(&svms->drain_pagefaults, 0); 3350 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3351 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3352 INIT_LIST_HEAD(&svms->deferred_range_list); 3353 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3354 spin_lock_init(&svms->deferred_list_lock); 3355 3356 for (i = 0; i < p->n_pdds; i++) 3357 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3358 bitmap_set(svms->bitmap_supported, i, 1); 3359 3360 /* Value of default granularity cannot exceed 0x1B, the 3361 * number of pages supported by a 4-level paging table 3362 */ 3363 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3364 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3365 3366 return 0; 3367 } 3368 3369 /** 3370 * svm_range_check_vm - check if virtual address range mapped already 3371 * @p: current kfd_process 3372 * @start: range start address, in pages 3373 * @last: range last address, in pages 3374 * @bo_s: mapping start address in pages if address range already mapped 3375 * @bo_l: mapping last address in pages if address range already mapped 3376 * 3377 * The purpose is to avoid virtual address ranges already allocated by 3378 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3379 * It looks for each pdd in the kfd_process. 3380 * 3381 * Context: Process context 3382 * 3383 * Return 0 - OK, if the range is not mapped. 3384 * Otherwise error code: 3385 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3386 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3387 * a signal. Release all buffer reservations and return to user-space. 3388 */ 3389 static int 3390 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3391 uint64_t *bo_s, uint64_t *bo_l) 3392 { 3393 struct amdgpu_bo_va_mapping *mapping; 3394 struct interval_tree_node *node; 3395 uint32_t i; 3396 int r; 3397 3398 for (i = 0; i < p->n_pdds; i++) { 3399 struct amdgpu_vm *vm; 3400 3401 if (!p->pdds[i]->drm_priv) 3402 continue; 3403 3404 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3405 r = amdgpu_bo_reserve(vm->root.bo, false); 3406 if (r) 3407 return r; 3408 3409 node = interval_tree_iter_first(&vm->va, start, last); 3410 if (node) { 3411 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3412 start, last); 3413 mapping = container_of((struct rb_node *)node, 3414 struct amdgpu_bo_va_mapping, rb); 3415 if (bo_s && bo_l) { 3416 *bo_s = mapping->start; 3417 *bo_l = mapping->last; 3418 } 3419 amdgpu_bo_unreserve(vm->root.bo); 3420 return -EADDRINUSE; 3421 } 3422 amdgpu_bo_unreserve(vm->root.bo); 3423 } 3424 3425 return 0; 3426 } 3427 3428 /** 3429 * svm_range_is_valid - check if virtual address range is valid 3430 * @p: current kfd_process 3431 * @start: range start address, in pages 3432 * @size: range size, in pages 3433 * 3434 * Valid virtual address range means it belongs to one or more VMAs 3435 * 3436 * Context: Process context 3437 * 3438 * Return: 3439 * 0 - OK, otherwise error code 3440 */ 3441 static int 3442 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3443 { 3444 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3445 struct vm_area_struct *vma; 3446 unsigned long end; 3447 unsigned long start_unchg = start; 3448 3449 start <<= PAGE_SHIFT; 3450 end = start + (size << PAGE_SHIFT); 3451 do { 3452 vma = vma_lookup(p->mm, start); 3453 if (!vma || (vma->vm_flags & device_vma)) 3454 return -EFAULT; 3455 start = min(end, vma->vm_end); 3456 } while (start < end); 3457 3458 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3459 NULL); 3460 } 3461 3462 /** 3463 * svm_range_best_prefetch_location - decide the best prefetch location 3464 * @prange: svm range structure 3465 * 3466 * For xnack off: 3467 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3468 * can be CPU or GPU. 3469 * 3470 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3471 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3472 * the best prefetch location is always CPU, because GPU can not have coherent 3473 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3474 * 3475 * For xnack on: 3476 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3477 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3478 * 3479 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3480 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3481 * prefetch location is always CPU. 3482 * 3483 * Context: Process context 3484 * 3485 * Return: 3486 * 0 for CPU or GPU id 3487 */ 3488 static uint32_t 3489 svm_range_best_prefetch_location(struct svm_range *prange) 3490 { 3491 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3492 uint32_t best_loc = prange->prefetch_loc; 3493 struct kfd_process_device *pdd; 3494 struct kfd_node *bo_node; 3495 struct kfd_process *p; 3496 uint32_t gpuidx; 3497 3498 p = container_of(prange->svms, struct kfd_process, svms); 3499 3500 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3501 goto out; 3502 3503 bo_node = svm_range_get_node_by_id(prange, best_loc); 3504 if (!bo_node) { 3505 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3506 best_loc = 0; 3507 goto out; 3508 } 3509 3510 if (bo_node->adev->apu_prefer_gtt) { 3511 best_loc = 0; 3512 goto out; 3513 } 3514 3515 if (p->xnack_enabled) 3516 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3517 else 3518 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3519 MAX_GPU_INSTANCE); 3520 3521 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3522 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3523 if (!pdd) { 3524 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3525 continue; 3526 } 3527 3528 if (pdd->dev->adev == bo_node->adev) 3529 continue; 3530 3531 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3532 best_loc = 0; 3533 break; 3534 } 3535 } 3536 3537 out: 3538 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3539 p->xnack_enabled, &p->svms, prange->start, prange->last, 3540 best_loc); 3541 3542 return best_loc; 3543 } 3544 3545 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3546 * @mm: current process mm_struct 3547 * @prange: svm range structure 3548 * @migrated: output, true if migration is triggered 3549 * 3550 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3551 * from ram to vram. 3552 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3553 * from vram to ram. 3554 * 3555 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3556 * and restore work: 3557 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3558 * stops all queues, schedule restore work 3559 * 2. svm_range_restore_work wait for migration is done by 3560 * a. svm_range_validate_vram takes prange->migrate_mutex 3561 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3562 * 3. restore work update mappings of GPU, resume all queues. 3563 * 3564 * Context: Process context 3565 * 3566 * Return: 3567 * 0 - OK, otherwise - error code of migration 3568 */ 3569 static int 3570 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3571 bool *migrated) 3572 { 3573 uint32_t best_loc; 3574 int r = 0; 3575 3576 *migrated = false; 3577 best_loc = svm_range_best_prefetch_location(prange); 3578 3579 /* when best_loc is a gpu node and same as prange->actual_loc 3580 * we still need do migration as prange->actual_loc !=0 does 3581 * not mean all pages in prange are vram. hmm migrate will pick 3582 * up right pages during migration. 3583 */ 3584 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3585 (best_loc == 0 && prange->actual_loc == 0)) 3586 return 0; 3587 3588 if (!best_loc) { 3589 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3590 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3591 *migrated = !r; 3592 return r; 3593 } 3594 3595 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3596 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3597 *migrated = !r; 3598 3599 return 0; 3600 } 3601 3602 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3603 { 3604 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3605 * signaled yet and we're under the protection of the fence->lock. 3606 * After the fence is signaled in svm_range_bo_release, we cannot get 3607 * here any more. 3608 * 3609 * Reference is dropped in svm_range_evict_svm_bo_worker. 3610 */ 3611 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3612 WRITE_ONCE(fence->svm_bo->evicting, 1); 3613 schedule_work(&fence->svm_bo->eviction_work); 3614 } 3615 3616 return 0; 3617 } 3618 3619 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3620 { 3621 struct svm_range_bo *svm_bo; 3622 struct mm_struct *mm; 3623 int r = 0; 3624 3625 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3626 3627 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3628 mm = svm_bo->eviction_fence->mm; 3629 } else { 3630 svm_range_bo_unref(svm_bo); 3631 return; 3632 } 3633 3634 mmap_read_lock(mm); 3635 spin_lock(&svm_bo->list_lock); 3636 while (!list_empty(&svm_bo->range_list) && !r) { 3637 struct svm_range *prange = 3638 list_first_entry(&svm_bo->range_list, 3639 struct svm_range, svm_bo_list); 3640 int retries = 3; 3641 3642 list_del_init(&prange->svm_bo_list); 3643 spin_unlock(&svm_bo->list_lock); 3644 3645 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3646 prange->start, prange->last); 3647 3648 mutex_lock(&prange->migrate_mutex); 3649 do { 3650 /* migrate all vram pages in this prange to sys ram 3651 * after that prange->actual_loc should be zero 3652 */ 3653 r = svm_migrate_vram_to_ram(prange, mm, 3654 prange->start, prange->last, 3655 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3656 } while (!r && prange->actual_loc && --retries); 3657 3658 if (!r && prange->actual_loc) 3659 pr_info_once("Migration failed during eviction"); 3660 3661 if (!prange->actual_loc) { 3662 mutex_lock(&prange->lock); 3663 prange->svm_bo = NULL; 3664 mutex_unlock(&prange->lock); 3665 } 3666 mutex_unlock(&prange->migrate_mutex); 3667 3668 spin_lock(&svm_bo->list_lock); 3669 } 3670 spin_unlock(&svm_bo->list_lock); 3671 mmap_read_unlock(mm); 3672 mmput(mm); 3673 3674 dma_fence_signal(&svm_bo->eviction_fence->base); 3675 3676 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3677 * has been called in svm_migrate_vram_to_ram 3678 */ 3679 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3680 svm_range_bo_unref(svm_bo); 3681 } 3682 3683 static int 3684 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3685 uint64_t start, uint64_t size, uint32_t nattr, 3686 struct kfd_ioctl_svm_attribute *attrs) 3687 { 3688 struct amdkfd_process_info *process_info = p->kgd_process_info; 3689 struct list_head update_list; 3690 struct list_head insert_list; 3691 struct list_head remove_list; 3692 struct list_head remap_list; 3693 struct svm_range_list *svms; 3694 struct svm_range *prange; 3695 struct svm_range *next; 3696 bool update_mapping = false; 3697 bool flush_tlb; 3698 int r, ret = 0; 3699 3700 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3701 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3702 3703 r = svm_range_check_attr(p, nattr, attrs); 3704 if (r) 3705 return r; 3706 3707 svms = &p->svms; 3708 3709 mutex_lock(&process_info->lock); 3710 3711 svm_range_list_lock_and_flush_work(svms, mm); 3712 3713 r = svm_range_is_valid(p, start, size); 3714 if (r) { 3715 pr_debug("invalid range r=%d\n", r); 3716 mmap_write_unlock(mm); 3717 goto out; 3718 } 3719 3720 mutex_lock(&svms->lock); 3721 3722 /* Add new range and split existing ranges as needed */ 3723 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3724 &insert_list, &remove_list, &remap_list); 3725 if (r) { 3726 mutex_unlock(&svms->lock); 3727 mmap_write_unlock(mm); 3728 goto out; 3729 } 3730 /* Apply changes as a transaction */ 3731 list_for_each_entry_safe(prange, next, &insert_list, list) { 3732 svm_range_add_to_svms(prange); 3733 svm_range_add_notifier_locked(mm, prange); 3734 } 3735 list_for_each_entry(prange, &update_list, update_list) { 3736 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3737 /* TODO: unmap ranges from GPU that lost access */ 3738 } 3739 update_mapping |= !p->xnack_enabled && !list_empty(&remap_list); 3740 3741 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3742 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3743 prange->svms, prange, prange->start, 3744 prange->last); 3745 svm_range_unlink(prange); 3746 svm_range_remove_notifier(prange); 3747 svm_range_free(prange, false); 3748 } 3749 3750 mmap_write_downgrade(mm); 3751 /* Trigger migrations and revalidate and map to GPUs as needed. If 3752 * this fails we may be left with partially completed actions. There 3753 * is no clean way of rolling back to the previous state in such a 3754 * case because the rollback wouldn't be guaranteed to work either. 3755 */ 3756 list_for_each_entry(prange, &update_list, update_list) { 3757 bool migrated; 3758 3759 mutex_lock(&prange->migrate_mutex); 3760 3761 r = svm_range_trigger_migration(mm, prange, &migrated); 3762 if (r) 3763 goto out_unlock_range; 3764 3765 if (migrated && (!p->xnack_enabled || 3766 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3767 prange->mapped_to_gpu) { 3768 pr_debug("restore_work will update mappings of GPUs\n"); 3769 mutex_unlock(&prange->migrate_mutex); 3770 continue; 3771 } 3772 3773 if (!migrated && !update_mapping) { 3774 mutex_unlock(&prange->migrate_mutex); 3775 continue; 3776 } 3777 3778 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3779 3780 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3781 MAX_GPU_INSTANCE, true, true, flush_tlb); 3782 if (r) 3783 pr_debug("failed %d to map svm range\n", r); 3784 3785 out_unlock_range: 3786 mutex_unlock(&prange->migrate_mutex); 3787 if (r) 3788 ret = r; 3789 } 3790 3791 list_for_each_entry(prange, &remap_list, update_list) { 3792 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3793 prange, prange->start, prange->last); 3794 mutex_lock(&prange->migrate_mutex); 3795 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3796 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3797 if (r) 3798 pr_debug("failed %d on remap svm range\n", r); 3799 mutex_unlock(&prange->migrate_mutex); 3800 if (r) 3801 ret = r; 3802 } 3803 3804 dynamic_svm_range_dump(svms); 3805 3806 mutex_unlock(&svms->lock); 3807 mmap_read_unlock(mm); 3808 out: 3809 mutex_unlock(&process_info->lock); 3810 3811 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3812 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3813 3814 return ret ? ret : r; 3815 } 3816 3817 static int 3818 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3819 uint64_t start, uint64_t size, uint32_t nattr, 3820 struct kfd_ioctl_svm_attribute *attrs) 3821 { 3822 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3823 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3824 bool get_preferred_loc = false; 3825 bool get_prefetch_loc = false; 3826 bool get_granularity = false; 3827 bool get_accessible = false; 3828 bool get_flags = false; 3829 uint64_t last = start + size - 1UL; 3830 uint8_t granularity = 0xff; 3831 struct interval_tree_node *node; 3832 struct svm_range_list *svms; 3833 struct svm_range *prange; 3834 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3835 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3836 uint32_t flags_and = 0xffffffff; 3837 uint32_t flags_or = 0; 3838 int gpuidx; 3839 uint32_t i; 3840 int r = 0; 3841 3842 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3843 start + size - 1, nattr); 3844 3845 /* Flush pending deferred work to avoid racing with deferred actions from 3846 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3847 * can still race with get_attr because we don't hold the mmap lock. But that 3848 * would be a race condition in the application anyway, and undefined 3849 * behaviour is acceptable in that case. 3850 */ 3851 flush_work(&p->svms.deferred_list_work); 3852 3853 mmap_read_lock(mm); 3854 r = svm_range_is_valid(p, start, size); 3855 mmap_read_unlock(mm); 3856 if (r) { 3857 pr_debug("invalid range r=%d\n", r); 3858 return r; 3859 } 3860 3861 for (i = 0; i < nattr; i++) { 3862 switch (attrs[i].type) { 3863 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3864 get_preferred_loc = true; 3865 break; 3866 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3867 get_prefetch_loc = true; 3868 break; 3869 case KFD_IOCTL_SVM_ATTR_ACCESS: 3870 get_accessible = true; 3871 break; 3872 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3873 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3874 get_flags = true; 3875 break; 3876 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3877 get_granularity = true; 3878 break; 3879 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3880 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3881 fallthrough; 3882 default: 3883 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3884 return -EINVAL; 3885 } 3886 } 3887 3888 svms = &p->svms; 3889 3890 mutex_lock(&svms->lock); 3891 3892 node = interval_tree_iter_first(&svms->objects, start, last); 3893 if (!node) { 3894 pr_debug("range attrs not found return default values\n"); 3895 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3896 &granularity, &flags_and); 3897 flags_or = flags_and; 3898 if (p->xnack_enabled) 3899 bitmap_copy(bitmap_access, svms->bitmap_supported, 3900 MAX_GPU_INSTANCE); 3901 else 3902 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3903 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3904 goto fill_values; 3905 } 3906 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3907 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3908 3909 while (node) { 3910 struct interval_tree_node *next; 3911 3912 prange = container_of(node, struct svm_range, it_node); 3913 next = interval_tree_iter_next(node, start, last); 3914 3915 if (get_preferred_loc) { 3916 if (prange->preferred_loc == 3917 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3918 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3919 location != prange->preferred_loc)) { 3920 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3921 get_preferred_loc = false; 3922 } else { 3923 location = prange->preferred_loc; 3924 } 3925 } 3926 if (get_prefetch_loc) { 3927 if (prange->prefetch_loc == 3928 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3929 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3930 prefetch_loc != prange->prefetch_loc)) { 3931 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3932 get_prefetch_loc = false; 3933 } else { 3934 prefetch_loc = prange->prefetch_loc; 3935 } 3936 } 3937 if (get_accessible) { 3938 bitmap_and(bitmap_access, bitmap_access, 3939 prange->bitmap_access, MAX_GPU_INSTANCE); 3940 bitmap_and(bitmap_aip, bitmap_aip, 3941 prange->bitmap_aip, MAX_GPU_INSTANCE); 3942 } 3943 if (get_flags) { 3944 flags_and &= prange->flags; 3945 flags_or |= prange->flags; 3946 } 3947 3948 if (get_granularity && prange->granularity < granularity) 3949 granularity = prange->granularity; 3950 3951 node = next; 3952 } 3953 fill_values: 3954 mutex_unlock(&svms->lock); 3955 3956 for (i = 0; i < nattr; i++) { 3957 switch (attrs[i].type) { 3958 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3959 attrs[i].value = location; 3960 break; 3961 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3962 attrs[i].value = prefetch_loc; 3963 break; 3964 case KFD_IOCTL_SVM_ATTR_ACCESS: 3965 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3966 attrs[i].value); 3967 if (gpuidx < 0) { 3968 pr_debug("invalid gpuid %x\n", attrs[i].value); 3969 return -EINVAL; 3970 } 3971 if (test_bit(gpuidx, bitmap_access)) 3972 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3973 else if (test_bit(gpuidx, bitmap_aip)) 3974 attrs[i].type = 3975 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3976 else 3977 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3978 break; 3979 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3980 attrs[i].value = flags_and; 3981 break; 3982 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3983 attrs[i].value = ~flags_or; 3984 break; 3985 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3986 attrs[i].value = (uint32_t)granularity; 3987 break; 3988 } 3989 } 3990 3991 return 0; 3992 } 3993 3994 int kfd_criu_resume_svm(struct kfd_process *p) 3995 { 3996 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3997 int nattr_common = 4, nattr_accessibility = 1; 3998 struct criu_svm_metadata *criu_svm_md = NULL; 3999 struct svm_range_list *svms = &p->svms; 4000 struct criu_svm_metadata *next = NULL; 4001 uint32_t set_flags = 0xffffffff; 4002 int i, j, num_attrs, ret = 0; 4003 uint64_t set_attr_size; 4004 struct mm_struct *mm; 4005 4006 if (list_empty(&svms->criu_svm_metadata_list)) { 4007 pr_debug("No SVM data from CRIU restore stage 2\n"); 4008 return ret; 4009 } 4010 4011 mm = get_task_mm(p->lead_thread); 4012 if (!mm) { 4013 pr_err("failed to get mm for the target process\n"); 4014 return -ESRCH; 4015 } 4016 4017 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 4018 4019 i = j = 0; 4020 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 4021 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 4022 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 4023 4024 for (j = 0; j < num_attrs; j++) { 4025 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 4026 i, j, criu_svm_md->data.attrs[j].type, 4027 i, j, criu_svm_md->data.attrs[j].value); 4028 switch (criu_svm_md->data.attrs[j].type) { 4029 /* During Checkpoint operation, the query for 4030 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 4031 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 4032 * not used by the range which was checkpointed. Care 4033 * must be taken to not restore with an invalid value 4034 * otherwise the gpuidx value will be invalid and 4035 * set_attr would eventually fail so just replace those 4036 * with another dummy attribute such as 4037 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 4038 */ 4039 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 4040 if (criu_svm_md->data.attrs[j].value == 4041 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 4042 criu_svm_md->data.attrs[j].type = 4043 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4044 criu_svm_md->data.attrs[j].value = 0; 4045 } 4046 break; 4047 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4048 set_flags = criu_svm_md->data.attrs[j].value; 4049 break; 4050 default: 4051 break; 4052 } 4053 } 4054 4055 /* CLR_FLAGS is not available via get_attr during checkpoint but 4056 * it needs to be inserted before restoring the ranges so 4057 * allocate extra space for it before calling set_attr 4058 */ 4059 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4060 (num_attrs + 1); 4061 set_attr_new = krealloc(set_attr, set_attr_size, 4062 GFP_KERNEL); 4063 if (!set_attr_new) { 4064 ret = -ENOMEM; 4065 goto exit; 4066 } 4067 set_attr = set_attr_new; 4068 4069 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4070 sizeof(struct kfd_ioctl_svm_attribute)); 4071 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4072 set_attr[num_attrs].value = ~set_flags; 4073 4074 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4075 criu_svm_md->data.size, num_attrs + 1, 4076 set_attr); 4077 if (ret) { 4078 pr_err("CRIU: failed to set range attributes\n"); 4079 goto exit; 4080 } 4081 4082 i++; 4083 } 4084 exit: 4085 kfree(set_attr); 4086 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4087 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4088 criu_svm_md->data.start_addr); 4089 kfree(criu_svm_md); 4090 } 4091 4092 mmput(mm); 4093 return ret; 4094 4095 } 4096 4097 int kfd_criu_restore_svm(struct kfd_process *p, 4098 uint8_t __user *user_priv_ptr, 4099 uint64_t *priv_data_offset, 4100 uint64_t max_priv_data_size) 4101 { 4102 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4103 int nattr_common = 4, nattr_accessibility = 1; 4104 struct criu_svm_metadata *criu_svm_md = NULL; 4105 struct svm_range_list *svms = &p->svms; 4106 uint32_t num_devices; 4107 int ret = 0; 4108 4109 num_devices = p->n_pdds; 4110 /* Handle one SVM range object at a time, also the number of gpus are 4111 * assumed to be same on the restore node, checking must be done while 4112 * evaluating the topology earlier 4113 */ 4114 4115 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4116 (nattr_common + nattr_accessibility * num_devices); 4117 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4118 4119 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4120 svm_attrs_size; 4121 4122 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4123 if (!criu_svm_md) { 4124 pr_err("failed to allocate memory to store svm metadata\n"); 4125 return -ENOMEM; 4126 } 4127 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4128 ret = -EINVAL; 4129 goto exit; 4130 } 4131 4132 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4133 svm_priv_data_size); 4134 if (ret) { 4135 ret = -EFAULT; 4136 goto exit; 4137 } 4138 *priv_data_offset += svm_priv_data_size; 4139 4140 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4141 4142 return 0; 4143 4144 4145 exit: 4146 kfree(criu_svm_md); 4147 return ret; 4148 } 4149 4150 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4151 uint64_t *svm_priv_data_size) 4152 { 4153 uint64_t total_size, accessibility_size, common_attr_size; 4154 int nattr_common = 4, nattr_accessibility = 1; 4155 int num_devices = p->n_pdds; 4156 struct svm_range_list *svms; 4157 struct svm_range *prange; 4158 uint32_t count = 0; 4159 4160 *svm_priv_data_size = 0; 4161 4162 svms = &p->svms; 4163 4164 mutex_lock(&svms->lock); 4165 list_for_each_entry(prange, &svms->list, list) { 4166 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4167 prange, prange->start, prange->npages, 4168 prange->start + prange->npages - 1); 4169 count++; 4170 } 4171 mutex_unlock(&svms->lock); 4172 4173 *num_svm_ranges = count; 4174 /* Only the accessbility attributes need to be queried for all the gpus 4175 * individually, remaining ones are spanned across the entire process 4176 * regardless of the various gpu nodes. Of the remaining attributes, 4177 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4178 * 4179 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4180 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4181 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4182 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4183 * 4184 * ** ACCESSBILITY ATTRIBUTES ** 4185 * (Considered as one, type is altered during query, value is gpuid) 4186 * KFD_IOCTL_SVM_ATTR_ACCESS 4187 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4188 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4189 */ 4190 if (*num_svm_ranges > 0) { 4191 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4192 nattr_common; 4193 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4194 nattr_accessibility * num_devices; 4195 4196 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4197 common_attr_size + accessibility_size; 4198 4199 *svm_priv_data_size = *num_svm_ranges * total_size; 4200 } 4201 4202 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4203 *svm_priv_data_size); 4204 } 4205 4206 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4207 uint8_t __user *user_priv_data, 4208 uint64_t *priv_data_offset) 4209 { 4210 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4211 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4212 uint64_t svm_priv_data_size, query_attr_size = 0; 4213 int index, nattr_common = 4, ret = 0; 4214 struct svm_range_list *svms; 4215 int num_devices = p->n_pdds; 4216 struct svm_range *prange; 4217 struct mm_struct *mm; 4218 4219 svms = &p->svms; 4220 4221 mm = get_task_mm(p->lead_thread); 4222 if (!mm) { 4223 pr_err("failed to get mm for the target process\n"); 4224 return -ESRCH; 4225 } 4226 4227 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4228 (nattr_common + num_devices); 4229 4230 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4231 if (!query_attr) { 4232 ret = -ENOMEM; 4233 goto exit; 4234 } 4235 4236 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4237 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4238 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4239 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4240 4241 for (index = 0; index < num_devices; index++) { 4242 struct kfd_process_device *pdd = p->pdds[index]; 4243 4244 query_attr[index + nattr_common].type = 4245 KFD_IOCTL_SVM_ATTR_ACCESS; 4246 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4247 } 4248 4249 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4250 4251 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4252 if (!svm_priv) { 4253 ret = -ENOMEM; 4254 goto exit_query; 4255 } 4256 4257 index = 0; 4258 list_for_each_entry(prange, &svms->list, list) { 4259 4260 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4261 svm_priv->start_addr = prange->start; 4262 svm_priv->size = prange->npages; 4263 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4264 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4265 prange, prange->start, prange->npages, 4266 prange->start + prange->npages - 1, 4267 prange->npages * PAGE_SIZE); 4268 4269 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4270 svm_priv->size, 4271 (nattr_common + num_devices), 4272 svm_priv->attrs); 4273 if (ret) { 4274 pr_err("CRIU: failed to obtain range attributes\n"); 4275 goto exit_priv; 4276 } 4277 4278 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4279 svm_priv_data_size)) { 4280 pr_err("Failed to copy svm priv to user\n"); 4281 ret = -EFAULT; 4282 goto exit_priv; 4283 } 4284 4285 *priv_data_offset += svm_priv_data_size; 4286 4287 } 4288 4289 4290 exit_priv: 4291 kfree(svm_priv); 4292 exit_query: 4293 kfree(query_attr); 4294 exit: 4295 mmput(mm); 4296 return ret; 4297 } 4298 4299 int 4300 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4301 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4302 { 4303 struct mm_struct *mm = current->mm; 4304 int r; 4305 4306 start >>= PAGE_SHIFT; 4307 size >>= PAGE_SHIFT; 4308 4309 switch (op) { 4310 case KFD_IOCTL_SVM_OP_SET_ATTR: 4311 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4312 break; 4313 case KFD_IOCTL_SVM_OP_GET_ATTR: 4314 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4315 break; 4316 default: 4317 r = -EINVAL; 4318 break; 4319 } 4320 4321 return r; 4322 } 4323