xref: /linux/drivers/gpu/drm/amd/amdkfd/kfd_queue.c (revision f7543209ce5dc09e3f5a27a7d4ee53e226283719)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Copyright 2014-2022 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  */
24 
25 #include <linux/slab.h>
26 #include "kfd_priv.h"
27 
28 void print_queue_properties(struct queue_properties *q)
29 {
30 	if (!q)
31 		return;
32 
33 	pr_debug("Printing queue properties:\n");
34 	pr_debug("Queue Type: %u\n", q->type);
35 	pr_debug("Queue Size: %llu\n", q->queue_size);
36 	pr_debug("Queue percent: %u\n", q->queue_percent);
37 	pr_debug("Queue Address: 0x%llX\n", q->queue_address);
38 	pr_debug("Queue Id: %u\n", q->queue_id);
39 	pr_debug("Queue Process Vmid: %u\n", q->vmid);
40 	pr_debug("Queue Read Pointer: 0x%px\n", q->read_ptr);
41 	pr_debug("Queue Write Pointer: 0x%px\n", q->write_ptr);
42 	pr_debug("Queue Doorbell Pointer: 0x%p\n", q->doorbell_ptr);
43 	pr_debug("Queue Doorbell Offset: %u\n", q->doorbell_off);
44 }
45 
46 void print_queue(struct queue *q)
47 {
48 	if (!q)
49 		return;
50 	pr_debug("Printing queue:\n");
51 	pr_debug("Queue Type: %u\n", q->properties.type);
52 	pr_debug("Queue Size: %llu\n", q->properties.queue_size);
53 	pr_debug("Queue percent: %u\n", q->properties.queue_percent);
54 	pr_debug("Queue Address: 0x%llX\n", q->properties.queue_address);
55 	pr_debug("Queue Id: %u\n", q->properties.queue_id);
56 	pr_debug("Queue Process Vmid: %u\n", q->properties.vmid);
57 	pr_debug("Queue Read Pointer: 0x%px\n", q->properties.read_ptr);
58 	pr_debug("Queue Write Pointer: 0x%px\n", q->properties.write_ptr);
59 	pr_debug("Queue Doorbell Pointer: 0x%p\n", q->properties.doorbell_ptr);
60 	pr_debug("Queue Doorbell Offset: %u\n", q->properties.doorbell_off);
61 	pr_debug("Queue MQD Address: 0x%p\n", q->mqd);
62 	pr_debug("Queue MQD Gart: 0x%llX\n", q->gart_mqd_addr);
63 	pr_debug("Queue Process Address: 0x%p\n", q->process);
64 	pr_debug("Queue Device Address: 0x%p\n", q->device);
65 }
66 
67 int init_queue(struct queue **q, const struct queue_properties *properties)
68 {
69 	struct queue *tmp_q;
70 
71 	tmp_q = kzalloc(sizeof(*tmp_q), GFP_KERNEL);
72 	if (!tmp_q)
73 		return -ENOMEM;
74 
75 	memcpy(&tmp_q->properties, properties, sizeof(*properties));
76 
77 	*q = tmp_q;
78 	return 0;
79 }
80 
81 void uninit_queue(struct queue *q)
82 {
83 	kfree(q);
84 }
85 
86 int kfd_queue_buffer_get(struct amdgpu_vm *vm, void __user *addr, struct amdgpu_bo **pbo,
87 			 u64 expected_size)
88 {
89 	struct amdgpu_bo_va_mapping *mapping;
90 	u64 user_addr;
91 	u64 size;
92 
93 	user_addr = (u64)addr >> AMDGPU_GPU_PAGE_SHIFT;
94 	size = expected_size >> AMDGPU_GPU_PAGE_SHIFT;
95 
96 	mapping = amdgpu_vm_bo_lookup_mapping(vm, user_addr);
97 	if (!mapping)
98 		goto out_err;
99 
100 	if (user_addr != mapping->start || user_addr + size - 1 != mapping->last) {
101 		pr_debug("expected size 0x%llx not equal to mapping addr 0x%llx size 0x%llx\n",
102 			expected_size, mapping->start << AMDGPU_GPU_PAGE_SHIFT,
103 			(mapping->last - mapping->start + 1) << AMDGPU_GPU_PAGE_SHIFT);
104 		goto out_err;
105 	}
106 
107 	*pbo = amdgpu_bo_ref(mapping->bo_va->base.bo);
108 	return 0;
109 
110 out_err:
111 	*pbo = NULL;
112 	return -EINVAL;
113 }
114 
115 int kfd_queue_acquire_buffers(struct kfd_process_device *pdd, struct queue_properties *properties)
116 {
117 	struct amdgpu_vm *vm;
118 	int err;
119 
120 	vm = drm_priv_to_vm(pdd->drm_priv);
121 	err = amdgpu_bo_reserve(vm->root.bo, false);
122 	if (err)
123 		return err;
124 
125 	err = kfd_queue_buffer_get(vm, properties->write_ptr, &properties->wptr_bo, PAGE_SIZE);
126 	if (err)
127 		goto out_unreserve;
128 
129 	amdgpu_bo_unreserve(vm->root.bo);
130 	return 0;
131 
132 out_unreserve:
133 	amdgpu_bo_unreserve(vm->root.bo);
134 	return err;
135 }
136 
137 int kfd_queue_release_buffers(struct kfd_process_device *pdd, struct queue_properties *properties)
138 {
139 	amdgpu_bo_unref(&properties->wptr_bo);
140 	return 0;
141 }
142