1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef KFD_PRIV_H_INCLUDED 25 #define KFD_PRIV_H_INCLUDED 26 27 #include <linux/hashtable.h> 28 #include <linux/mmu_notifier.h> 29 #include <linux/memremap.h> 30 #include <linux/mutex.h> 31 #include <linux/types.h> 32 #include <linux/atomic.h> 33 #include <linux/workqueue.h> 34 #include <linux/spinlock.h> 35 #include <linux/kfd_ioctl.h> 36 #include <linux/idr.h> 37 #include <linux/kfifo.h> 38 #include <linux/seq_file.h> 39 #include <linux/kref.h> 40 #include <linux/sysfs.h> 41 #include <linux/device_cgroup.h> 42 #include <drm/drm_file.h> 43 #include <drm/drm_drv.h> 44 #include <drm/drm_device.h> 45 #include <drm/drm_ioctl.h> 46 #include <kgd_kfd_interface.h> 47 #include <linux/swap.h> 48 49 #include "amd_shared.h" 50 #include "amdgpu.h" 51 52 #define KFD_MAX_RING_ENTRY_SIZE 8 53 54 #define KFD_SYSFS_FILE_MODE 0444 55 56 /* GPU ID hash width in bits */ 57 #define KFD_GPU_ID_HASH_WIDTH 16 58 59 /* Use upper bits of mmap offset to store KFD driver specific information. 60 * BITS[63:62] - Encode MMAP type 61 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to 62 * BITS[45:0] - MMAP offset value 63 * 64 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these 65 * defines are w.r.t to PAGE_SIZE 66 */ 67 #define KFD_MMAP_TYPE_SHIFT 62 68 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT) 69 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT) 70 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT) 71 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT) 72 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT) 73 74 #define KFD_MMAP_GPU_ID_SHIFT 46 75 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \ 76 << KFD_MMAP_GPU_ID_SHIFT) 77 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\ 78 & KFD_MMAP_GPU_ID_MASK) 79 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \ 80 >> KFD_MMAP_GPU_ID_SHIFT) 81 82 /* 83 * When working with cp scheduler we should assign the HIQ manually or via 84 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot 85 * definitions for Kaveri. In Kaveri only the first ME queues participates 86 * in the cp scheduling taking that in mind we set the HIQ slot in the 87 * second ME. 88 */ 89 #define KFD_CIK_HIQ_PIPE 4 90 #define KFD_CIK_HIQ_QUEUE 0 91 92 /* Macro for allocating structures */ 93 #define kfd_alloc_struct(ptr_to_struct) \ 94 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) 95 96 #define KFD_MAX_NUM_OF_PROCESSES 512 97 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 98 99 /* 100 * Size of the per-process TBA+TMA buffer: 2 pages 101 * 102 * The first chunk is the TBA used for the CWSR ISA code. The second 103 * chunk is used as TMA for user-mode trap handler setup in daisy-chain mode. 104 */ 105 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2) 106 #define KFD_CWSR_TMA_OFFSET (PAGE_SIZE + 2048) 107 108 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ 109 (KFD_MAX_NUM_OF_PROCESSES * \ 110 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) 111 112 #define KFD_KERNEL_QUEUE_SIZE 2048 113 114 #define KFD_UNMAP_LATENCY_MS (4000) 115 116 #define KFD_MAX_SDMA_QUEUES 128 117 118 /* 119 * 512 = 0x200 120 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the 121 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA. 122 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC 123 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in 124 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE. 125 */ 126 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512 127 128 /** 129 * enum kfd_ioctl_flags - KFD ioctl flags 130 * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how 131 * userspace can use a given ioctl. 132 */ 133 enum kfd_ioctl_flags { 134 /* 135 * @KFD_IOC_FLAG_CHECKPOINT_RESTORE: 136 * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially 137 * perform privileged operations and load arbitrary data into MQDs and 138 * eventually HQD registers when the queue is mapped by HWS. In order to 139 * prevent this we should perform additional security checks. 140 * 141 * This is equivalent to callers with the CHECKPOINT_RESTORE capability. 142 * 143 * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE, 144 * we also allow ioctls with SYS_ADMIN capability. 145 */ 146 KFD_IOC_FLAG_CHECKPOINT_RESTORE = BIT(0), 147 }; 148 /* 149 * Kernel module parameter to specify maximum number of supported queues per 150 * device 151 */ 152 extern int max_num_of_queues_per_device; 153 154 155 /* Kernel module parameter to specify the scheduling policy */ 156 extern int sched_policy; 157 158 /* 159 * Kernel module parameter to specify the maximum process 160 * number per HW scheduler 161 */ 162 extern int hws_max_conc_proc; 163 164 extern int cwsr_enable; 165 166 /* 167 * Kernel module parameter to specify whether to send sigterm to HSA process on 168 * unhandled exception 169 */ 170 extern int send_sigterm; 171 172 /* 173 * This kernel module is used to simulate large bar machine on non-large bar 174 * enabled machines. 175 */ 176 extern int debug_largebar; 177 178 /* Set sh_mem_config.retry_disable on GFX v9 */ 179 extern int amdgpu_noretry; 180 181 /* Halt if HWS hang is detected */ 182 extern int halt_if_hws_hang; 183 184 /* Whether MEC FW support GWS barriers */ 185 extern bool hws_gws_support; 186 187 /* Queue preemption timeout in ms */ 188 extern int queue_preemption_timeout_ms; 189 190 /* 191 * Don't evict process queues on vm fault 192 */ 193 extern int amdgpu_no_queue_eviction_on_vm_fault; 194 195 /* Enable eviction debug messages */ 196 extern bool debug_evictions; 197 198 extern struct mutex kfd_processes_mutex; 199 200 enum cache_policy { 201 cache_policy_coherent, 202 cache_policy_noncoherent 203 }; 204 205 #define KFD_GC_VERSION(dev) (amdgpu_ip_version((dev)->adev, GC_HWIP, 0)) 206 #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1))) 207 #define KFD_SUPPORT_XNACK_PER_PROCESS(dev)\ 208 ((KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) || \ 209 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) || \ 210 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4))) 211 212 struct kfd_node; 213 214 struct kfd_event_interrupt_class { 215 bool (*interrupt_isr)(struct kfd_node *dev, 216 const uint32_t *ih_ring_entry, uint32_t *patched_ihre, 217 bool *patched_flag); 218 void (*interrupt_wq)(struct kfd_node *dev, 219 const uint32_t *ih_ring_entry); 220 }; 221 222 struct kfd_device_info { 223 uint32_t gfx_target_version; 224 const struct kfd_event_interrupt_class *event_interrupt_class; 225 unsigned int max_pasid_bits; 226 unsigned int max_no_of_hqd; 227 unsigned int doorbell_size; 228 size_t ih_ring_entry_size; 229 uint8_t num_of_watch_points; 230 uint16_t mqd_size_aligned; 231 bool supports_cwsr; 232 bool needs_pci_atomics; 233 uint32_t no_atomic_fw_version; 234 unsigned int num_sdma_queues_per_engine; 235 unsigned int num_reserved_sdma_queues_per_engine; 236 DECLARE_BITMAP(reserved_sdma_queues_bitmap, KFD_MAX_SDMA_QUEUES); 237 }; 238 239 unsigned int kfd_get_num_sdma_engines(struct kfd_node *kdev); 240 unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_node *kdev); 241 242 struct kfd_mem_obj { 243 uint32_t range_start; 244 uint32_t range_end; 245 uint64_t gpu_addr; 246 uint32_t *cpu_ptr; 247 void *gtt_mem; 248 }; 249 250 struct kfd_vmid_info { 251 uint32_t first_vmid_kfd; 252 uint32_t last_vmid_kfd; 253 uint32_t vmid_num_kfd; 254 }; 255 256 #define MAX_KFD_NODES 8 257 258 struct kfd_dev; 259 260 struct kfd_node { 261 unsigned int node_id; 262 struct amdgpu_device *adev; /* Duplicated here along with keeping 263 * a copy in kfd_dev to save a hop 264 */ 265 const struct kfd2kgd_calls *kfd2kgd; /* Duplicated here along with 266 * keeping a copy in kfd_dev to 267 * save a hop 268 */ 269 struct kfd_vmid_info vm_info; 270 unsigned int id; /* topology stub index */ 271 uint32_t xcc_mask; /* Instance mask of XCCs present */ 272 struct amdgpu_xcp *xcp; 273 274 /* Interrupts */ 275 struct kfifo ih_fifo; 276 struct workqueue_struct *ih_wq; 277 struct work_struct interrupt_work; 278 spinlock_t interrupt_lock; 279 280 /* 281 * Interrupts of interest to KFD are copied 282 * from the HW ring into a SW ring. 283 */ 284 bool interrupts_active; 285 uint32_t interrupt_bitmap; /* Only used for GFX 9.4.3 */ 286 287 /* QCM Device instance */ 288 struct device_queue_manager *dqm; 289 290 /* Global GWS resource shared between processes */ 291 void *gws; 292 bool gws_debug_workaround; 293 294 /* Clients watching SMI events */ 295 struct list_head smi_clients; 296 spinlock_t smi_lock; 297 uint32_t reset_seq_num; 298 299 /* SRAM ECC flag */ 300 atomic_t sram_ecc_flag; 301 302 /*spm process id */ 303 unsigned int spm_pasid; 304 305 /* Maximum process number mapped to HW scheduler */ 306 unsigned int max_proc_per_quantum; 307 308 unsigned int compute_vmid_bitmap; 309 310 struct kfd_local_mem_info local_mem_info; 311 312 struct kfd_dev *kfd; 313 }; 314 315 struct kfd_dev { 316 struct amdgpu_device *adev; 317 318 struct kfd_device_info device_info; 319 320 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells 321 * page used by kernel queue 322 */ 323 324 struct kgd2kfd_shared_resources shared_resources; 325 326 const struct kfd2kgd_calls *kfd2kgd; 327 struct mutex doorbell_mutex; 328 329 void *gtt_mem; 330 uint64_t gtt_start_gpu_addr; 331 void *gtt_start_cpu_ptr; 332 void *gtt_sa_bitmap; 333 struct mutex gtt_sa_lock; 334 unsigned int gtt_sa_chunk_size; 335 unsigned int gtt_sa_num_of_chunks; 336 337 bool init_complete; 338 339 /* Firmware versions */ 340 uint16_t mec_fw_version; 341 uint16_t mec2_fw_version; 342 uint16_t sdma_fw_version; 343 344 /* CWSR */ 345 bool cwsr_enabled; 346 const void *cwsr_isa; 347 unsigned int cwsr_isa_size; 348 349 /* xGMI */ 350 uint64_t hive_id; 351 352 bool pci_atomic_requested; 353 354 /* Compute Profile ref. count */ 355 atomic_t compute_profile; 356 357 struct ida doorbell_ida; 358 unsigned int max_doorbell_slices; 359 360 int noretry; 361 362 struct kfd_node *nodes[MAX_KFD_NODES]; 363 unsigned int num_nodes; 364 365 /* Track per device allocated watch points */ 366 uint32_t alloc_watch_ids; 367 spinlock_t watch_points_lock; 368 369 /* Kernel doorbells for KFD device */ 370 struct amdgpu_bo *doorbells; 371 372 /* bitmap for dynamic doorbell allocation from doorbell object */ 373 unsigned long *doorbell_bitmap; 374 }; 375 376 enum kfd_mempool { 377 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, 378 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, 379 KFD_MEMPOOL_FRAMEBUFFER = 3, 380 }; 381 382 /* Character device interface */ 383 int kfd_chardev_init(void); 384 void kfd_chardev_exit(void); 385 386 /** 387 * enum kfd_unmap_queues_filter - Enum for queue filters. 388 * 389 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the 390 * running queues list. 391 * 392 * @KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES: Preempts all non-static queues 393 * in the run list. 394 * 395 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to 396 * specific process. 397 * 398 */ 399 enum kfd_unmap_queues_filter { 400 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES = 1, 401 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES = 2, 402 KFD_UNMAP_QUEUES_FILTER_BY_PASID = 3 403 }; 404 405 /** 406 * enum kfd_queue_type - Enum for various queue types. 407 * 408 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. 409 * 410 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type. 411 * 412 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. 413 * 414 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. 415 * 416 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface. 417 */ 418 enum kfd_queue_type { 419 KFD_QUEUE_TYPE_COMPUTE, 420 KFD_QUEUE_TYPE_SDMA, 421 KFD_QUEUE_TYPE_HIQ, 422 KFD_QUEUE_TYPE_DIQ, 423 KFD_QUEUE_TYPE_SDMA_XGMI 424 }; 425 426 enum kfd_queue_format { 427 KFD_QUEUE_FORMAT_PM4, 428 KFD_QUEUE_FORMAT_AQL 429 }; 430 431 enum KFD_QUEUE_PRIORITY { 432 KFD_QUEUE_PRIORITY_MINIMUM = 0, 433 KFD_QUEUE_PRIORITY_MAXIMUM = 15 434 }; 435 436 /** 437 * struct queue_properties 438 * 439 * @type: The queue type. 440 * 441 * @queue_id: Queue identifier. 442 * 443 * @queue_address: Queue ring buffer address. 444 * 445 * @queue_size: Queue ring buffer size. 446 * 447 * @priority: Defines the queue priority relative to other queues in the 448 * process. 449 * This is just an indication and HW scheduling may override the priority as 450 * necessary while keeping the relative prioritization. 451 * the priority granularity is from 0 to f which f is the highest priority. 452 * currently all queues are initialized with the highest priority. 453 * 454 * @queue_percent: This field is partially implemented and currently a zero in 455 * this field defines that the queue is non active. 456 * 457 * @read_ptr: User space address which points to the number of dwords the 458 * cp read from the ring buffer. This field updates automatically by the H/W. 459 * 460 * @write_ptr: Defines the number of dwords written to the ring buffer. 461 * 462 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring 463 * buffer. This field should be similar to write_ptr and the user should 464 * update this field after updating the write_ptr. 465 * 466 * @doorbell_off: The doorbell offset in the doorbell pci-bar. 467 * 468 * @is_interop: Defines if this is a interop queue. Interop queue means that 469 * the queue can access both graphics and compute resources. 470 * 471 * @is_evicted: Defines if the queue is evicted. Only active queues 472 * are evicted, rendering them inactive. 473 * 474 * @is_active: Defines if the queue is active or not. @is_active and 475 * @is_evicted are protected by the DQM lock. 476 * 477 * @is_gws: Defines if the queue has been updated to be GWS-capable or not. 478 * @is_gws should be protected by the DQM lock, since changing it can yield the 479 * possibility of updating DQM state on number of GWS queues. 480 * 481 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid 482 * of the queue. 483 * 484 * This structure represents the queue properties for each queue no matter if 485 * it's user mode or kernel mode queue. 486 * 487 */ 488 489 struct queue_properties { 490 enum kfd_queue_type type; 491 enum kfd_queue_format format; 492 unsigned int queue_id; 493 uint64_t queue_address; 494 uint64_t queue_size; 495 uint32_t priority; 496 uint32_t queue_percent; 497 void __user *read_ptr; 498 void __user *write_ptr; 499 void __iomem *doorbell_ptr; 500 uint32_t doorbell_off; 501 bool is_interop; 502 bool is_evicted; 503 bool is_suspended; 504 bool is_being_destroyed; 505 bool is_active; 506 bool is_gws; 507 uint32_t pm4_target_xcc; 508 bool is_dbg_wa; 509 bool is_user_cu_masked; 510 /* Not relevant for user mode queues in cp scheduling */ 511 unsigned int vmid; 512 /* Relevant only for sdma queues*/ 513 uint32_t sdma_engine_id; 514 uint32_t sdma_queue_id; 515 uint32_t sdma_vm_addr; 516 /* Relevant only for VI */ 517 uint64_t eop_ring_buffer_address; 518 uint32_t eop_ring_buffer_size; 519 uint64_t ctx_save_restore_area_address; 520 uint32_t ctx_save_restore_area_size; 521 uint32_t ctl_stack_size; 522 uint64_t tba_addr; 523 uint64_t tma_addr; 524 uint64_t exception_status; 525 526 struct amdgpu_bo *wptr_bo; 527 }; 528 529 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \ 530 (q).queue_address != 0 && \ 531 (q).queue_percent > 0 && \ 532 !(q).is_evicted && \ 533 !(q).is_suspended) 534 535 enum mqd_update_flag { 536 UPDATE_FLAG_DBG_WA_ENABLE = 1, 537 UPDATE_FLAG_DBG_WA_DISABLE = 2, 538 UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */ 539 }; 540 541 struct mqd_update_info { 542 union { 543 struct { 544 uint32_t count; /* Must be a multiple of 32 */ 545 uint32_t *ptr; 546 } cu_mask; 547 }; 548 enum mqd_update_flag update_flag; 549 }; 550 551 /** 552 * struct queue 553 * 554 * @list: Queue linked list. 555 * 556 * @mqd: The queue MQD (memory queue descriptor). 557 * 558 * @mqd_mem_obj: The MQD local gpu memory object. 559 * 560 * @gart_mqd_addr: The MQD gart mc address. 561 * 562 * @properties: The queue properties. 563 * 564 * @mec: Used only in no cp scheduling mode and identifies to micro engine id 565 * that the queue should be executed on. 566 * 567 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe 568 * id. 569 * 570 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. 571 * 572 * @process: The kfd process that created this queue. 573 * 574 * @device: The kfd device that created this queue. 575 * 576 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL 577 * otherwise. 578 * 579 * This structure represents user mode compute queues. 580 * It contains all the necessary data to handle such queues. 581 * 582 */ 583 584 struct queue { 585 struct list_head list; 586 void *mqd; 587 struct kfd_mem_obj *mqd_mem_obj; 588 uint64_t gart_mqd_addr; 589 struct queue_properties properties; 590 591 uint32_t mec; 592 uint32_t pipe; 593 uint32_t queue; 594 595 unsigned int sdma_id; 596 unsigned int doorbell_id; 597 598 struct kfd_process *process; 599 struct kfd_node *device; 600 void *gws; 601 602 /* procfs */ 603 struct kobject kobj; 604 605 void *gang_ctx_bo; 606 uint64_t gang_ctx_gpu_addr; 607 void *gang_ctx_cpu_ptr; 608 609 struct amdgpu_bo *wptr_bo_gart; 610 }; 611 612 enum KFD_MQD_TYPE { 613 KFD_MQD_TYPE_HIQ = 0, /* for hiq */ 614 KFD_MQD_TYPE_CP, /* for cp queues and diq */ 615 KFD_MQD_TYPE_SDMA, /* for sdma queues */ 616 KFD_MQD_TYPE_DIQ, /* for diq */ 617 KFD_MQD_TYPE_MAX 618 }; 619 620 enum KFD_PIPE_PRIORITY { 621 KFD_PIPE_PRIORITY_CS_LOW = 0, 622 KFD_PIPE_PRIORITY_CS_MEDIUM, 623 KFD_PIPE_PRIORITY_CS_HIGH 624 }; 625 626 struct scheduling_resources { 627 unsigned int vmid_mask; 628 enum kfd_queue_type type; 629 uint64_t queue_mask; 630 uint64_t gws_mask; 631 uint32_t oac_mask; 632 uint32_t gds_heap_base; 633 uint32_t gds_heap_size; 634 }; 635 636 struct process_queue_manager { 637 /* data */ 638 struct kfd_process *process; 639 struct list_head queues; 640 unsigned long *queue_slot_bitmap; 641 }; 642 643 struct qcm_process_device { 644 /* The Device Queue Manager that owns this data */ 645 struct device_queue_manager *dqm; 646 struct process_queue_manager *pqm; 647 /* Queues list */ 648 struct list_head queues_list; 649 struct list_head priv_queue_list; 650 651 unsigned int queue_count; 652 unsigned int vmid; 653 bool is_debug; 654 unsigned int evicted; /* eviction counter, 0=active */ 655 656 /* This flag tells if we should reset all wavefronts on 657 * process termination 658 */ 659 bool reset_wavefronts; 660 661 /* This flag tells us if this process has a GWS-capable 662 * queue that will be mapped into the runlist. It's 663 * possible to request a GWS BO, but not have the queue 664 * currently mapped, and this changes how the MAP_PROCESS 665 * PM4 packet is configured. 666 */ 667 bool mapped_gws_queue; 668 669 /* All the memory management data should be here too */ 670 uint64_t gds_context_area; 671 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */ 672 uint64_t page_table_base; 673 uint32_t sh_mem_config; 674 uint32_t sh_mem_bases; 675 uint32_t sh_mem_ape1_base; 676 uint32_t sh_mem_ape1_limit; 677 uint32_t gds_size; 678 uint32_t num_gws; 679 uint32_t num_oac; 680 uint32_t sh_hidden_private_base; 681 682 /* CWSR memory */ 683 struct kgd_mem *cwsr_mem; 684 void *cwsr_kaddr; 685 uint64_t cwsr_base; 686 uint64_t tba_addr; 687 uint64_t tma_addr; 688 689 /* IB memory */ 690 struct kgd_mem *ib_mem; 691 uint64_t ib_base; 692 void *ib_kaddr; 693 694 /* doorbells for kfd process */ 695 struct amdgpu_bo *proc_doorbells; 696 697 /* bitmap for dynamic doorbell allocation from the bo */ 698 unsigned long *doorbell_bitmap; 699 }; 700 701 /* KFD Memory Eviction */ 702 703 /* Approx. wait time before attempting to restore evicted BOs */ 704 #define PROCESS_RESTORE_TIME_MS 100 705 /* Approx. back off time if restore fails due to lack of memory */ 706 #define PROCESS_BACK_OFF_TIME_MS 100 707 /* Approx. time before evicting the process again */ 708 #define PROCESS_ACTIVE_TIME_MS 10 709 710 /* 8 byte handle containing GPU ID in the most significant 4 bytes and 711 * idr_handle in the least significant 4 bytes 712 */ 713 #define MAKE_HANDLE(gpu_id, idr_handle) \ 714 (((uint64_t)(gpu_id) << 32) + idr_handle) 715 #define GET_GPU_ID(handle) (handle >> 32) 716 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF) 717 718 enum kfd_pdd_bound { 719 PDD_UNBOUND = 0, 720 PDD_BOUND, 721 PDD_BOUND_SUSPENDED, 722 }; 723 724 #define MAX_SYSFS_FILENAME_LEN 15 725 726 /* 727 * SDMA counter runs at 100MHz frequency. 728 * We display SDMA activity in microsecond granularity in sysfs. 729 * As a result, the divisor is 100. 730 */ 731 #define SDMA_ACTIVITY_DIVISOR 100 732 733 /* Data that is per-process-per device. */ 734 struct kfd_process_device { 735 /* The device that owns this data. */ 736 struct kfd_node *dev; 737 738 /* The process that owns this kfd_process_device. */ 739 struct kfd_process *process; 740 741 /* per-process-per device QCM data structure */ 742 struct qcm_process_device qpd; 743 744 /*Apertures*/ 745 uint64_t lds_base; 746 uint64_t lds_limit; 747 uint64_t gpuvm_base; 748 uint64_t gpuvm_limit; 749 uint64_t scratch_base; 750 uint64_t scratch_limit; 751 752 /* VM context for GPUVM allocations */ 753 struct file *drm_file; 754 void *drm_priv; 755 756 /* GPUVM allocations storage */ 757 struct idr alloc_idr; 758 759 /* Flag used to tell the pdd has dequeued from the dqm. 760 * This is used to prevent dev->dqm->ops.process_termination() from 761 * being called twice when it is already called in IOMMU callback 762 * function. 763 */ 764 bool already_dequeued; 765 bool runtime_inuse; 766 767 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ 768 enum kfd_pdd_bound bound; 769 770 /* VRAM usage */ 771 uint64_t vram_usage; 772 struct attribute attr_vram; 773 char vram_filename[MAX_SYSFS_FILENAME_LEN]; 774 775 /* SDMA activity tracking */ 776 uint64_t sdma_past_activity_counter; 777 struct attribute attr_sdma; 778 char sdma_filename[MAX_SYSFS_FILENAME_LEN]; 779 780 /* Eviction activity tracking */ 781 uint64_t last_evict_timestamp; 782 atomic64_t evict_duration_counter; 783 struct attribute attr_evict; 784 785 struct kobject *kobj_stats; 786 787 /* 788 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process 789 * that is associated with device encoded by "this" struct instance. The 790 * value reflects CU usage by all of the waves launched by this process 791 * on this device. A very important property of occupancy parameter is 792 * that its value is a snapshot of current use. 793 * 794 * Following is to be noted regarding how this parameter is reported: 795 * 796 * The number of waves that a CU can launch is limited by couple of 797 * parameters. These are encoded by struct amdgpu_cu_info instance 798 * that is part of every device definition. For GFX9 devices this 799 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves 800 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu) 801 * when they do use scratch memory. This could change for future 802 * devices and therefore this example should be considered as a guide. 803 * 804 * All CU's of a device are available for the process. This may not be true 805 * under certain conditions - e.g. CU masking. 806 * 807 * Finally number of CU's that are occupied by a process is affected by both 808 * number of CU's a device has along with number of other competing processes 809 */ 810 struct attribute attr_cu_occupancy; 811 812 /* sysfs counters for GPU retry fault and page migration tracking */ 813 struct kobject *kobj_counters; 814 struct attribute attr_faults; 815 struct attribute attr_page_in; 816 struct attribute attr_page_out; 817 uint64_t faults; 818 uint64_t page_in; 819 uint64_t page_out; 820 821 /* Exception code status*/ 822 uint64_t exception_status; 823 void *vm_fault_exc_data; 824 size_t vm_fault_exc_data_size; 825 826 /* Tracks debug per-vmid request settings */ 827 uint32_t spi_dbg_override; 828 uint32_t spi_dbg_launch_mode; 829 uint32_t watch_points[4]; 830 uint32_t alloc_watch_ids; 831 832 /* 833 * If this process has been checkpointed before, then the user 834 * application will use the original gpu_id on the 835 * checkpointed node to refer to this device. 836 */ 837 uint32_t user_gpu_id; 838 839 void *proc_ctx_bo; 840 uint64_t proc_ctx_gpu_addr; 841 void *proc_ctx_cpu_ptr; 842 }; 843 844 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) 845 846 struct svm_range_list { 847 struct mutex lock; 848 struct rb_root_cached objects; 849 struct list_head list; 850 struct work_struct deferred_list_work; 851 struct list_head deferred_range_list; 852 struct list_head criu_svm_metadata_list; 853 spinlock_t deferred_list_lock; 854 atomic_t evicted_ranges; 855 atomic_t drain_pagefaults; 856 struct delayed_work restore_work; 857 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE); 858 struct task_struct *faulting_task; 859 }; 860 861 /* Process data */ 862 struct kfd_process { 863 /* 864 * kfd_process are stored in an mm_struct*->kfd_process* 865 * hash table (kfd_processes in kfd_process.c) 866 */ 867 struct hlist_node kfd_processes; 868 869 /* 870 * Opaque pointer to mm_struct. We don't hold a reference to 871 * it so it should never be dereferenced from here. This is 872 * only used for looking up processes by their mm. 873 */ 874 void *mm; 875 876 struct kref ref; 877 struct work_struct release_work; 878 879 struct mutex mutex; 880 881 /* 882 * In any process, the thread that started main() is the lead 883 * thread and outlives the rest. 884 * It is here because amd_iommu_bind_pasid wants a task_struct. 885 * It can also be used for safely getting a reference to the 886 * mm_struct of the process. 887 */ 888 struct task_struct *lead_thread; 889 890 /* We want to receive a notification when the mm_struct is destroyed */ 891 struct mmu_notifier mmu_notifier; 892 893 u32 pasid; 894 895 /* 896 * Array of kfd_process_device pointers, 897 * one for each device the process is using. 898 */ 899 struct kfd_process_device *pdds[MAX_GPU_INSTANCE]; 900 uint32_t n_pdds; 901 902 struct process_queue_manager pqm; 903 904 /*Is the user space process 32 bit?*/ 905 bool is_32bit_user_mode; 906 907 /* Event-related data */ 908 struct mutex event_mutex; 909 /* Event ID allocator and lookup */ 910 struct idr event_idr; 911 /* Event page */ 912 u64 signal_handle; 913 struct kfd_signal_page *signal_page; 914 size_t signal_mapped_size; 915 size_t signal_event_count; 916 bool signal_event_limit_reached; 917 918 /* Information used for memory eviction */ 919 void *kgd_process_info; 920 /* Eviction fence that is attached to all the BOs of this process. The 921 * fence will be triggered during eviction and new one will be created 922 * during restore 923 */ 924 struct dma_fence __rcu *ef; 925 926 /* Work items for evicting and restoring BOs */ 927 struct delayed_work eviction_work; 928 struct delayed_work restore_work; 929 /* seqno of the last scheduled eviction */ 930 unsigned int last_eviction_seqno; 931 /* Approx. the last timestamp (in jiffies) when the process was 932 * restored after an eviction 933 */ 934 unsigned long last_restore_timestamp; 935 936 /* Indicates device process is debug attached with reserved vmid. */ 937 bool debug_trap_enabled; 938 939 /* per-process-per device debug event fd file */ 940 struct file *dbg_ev_file; 941 942 /* If the process is a kfd debugger, we need to know so we can clean 943 * up at exit time. If a process enables debugging on itself, it does 944 * its own clean-up, so we don't set the flag here. We track this by 945 * counting the number of processes this process is debugging. 946 */ 947 atomic_t debugged_process_count; 948 949 /* If the process is a debugged, this is the debugger process */ 950 struct kfd_process *debugger_process; 951 952 /* Kobj for our procfs */ 953 struct kobject *kobj; 954 struct kobject *kobj_queues; 955 struct attribute attr_pasid; 956 957 /* Keep track cwsr init */ 958 bool has_cwsr; 959 960 /* Exception code enable mask and status */ 961 uint64_t exception_enable_mask; 962 uint64_t exception_status; 963 964 /* Used to drain stale interrupts */ 965 wait_queue_head_t wait_irq_drain; 966 bool irq_drain_is_open; 967 968 /* shared virtual memory registered by this process */ 969 struct svm_range_list svms; 970 971 bool xnack_enabled; 972 973 /* Work area for debugger event writer worker. */ 974 struct work_struct debug_event_workarea; 975 976 /* Tracks debug per-vmid request for debug flags */ 977 u32 dbg_flags; 978 979 atomic_t poison; 980 /* Queues are in paused stated because we are in the process of doing a CRIU checkpoint */ 981 bool queues_paused; 982 983 /* Tracks runtime enable status */ 984 struct semaphore runtime_enable_sema; 985 bool is_runtime_retry; 986 struct kfd_runtime_info runtime_info; 987 }; 988 989 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */ 990 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE); 991 extern struct srcu_struct kfd_processes_srcu; 992 993 /** 994 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer. 995 * 996 * @filep: pointer to file structure. 997 * @p: amdkfd process pointer. 998 * @data: pointer to arg that was copied from user. 999 * 1000 * Return: returns ioctl completion code. 1001 */ 1002 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, 1003 void *data); 1004 1005 struct amdkfd_ioctl_desc { 1006 unsigned int cmd; 1007 int flags; 1008 amdkfd_ioctl_t *func; 1009 unsigned int cmd_drv; 1010 const char *name; 1011 }; 1012 bool kfd_dev_is_large_bar(struct kfd_node *dev); 1013 1014 int kfd_process_create_wq(void); 1015 void kfd_process_destroy_wq(void); 1016 void kfd_cleanup_processes(void); 1017 struct kfd_process *kfd_create_process(struct task_struct *thread); 1018 struct kfd_process *kfd_get_process(const struct task_struct *task); 1019 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid); 1020 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm); 1021 1022 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id); 1023 int kfd_process_gpuid_from_node(struct kfd_process *p, struct kfd_node *node, 1024 uint32_t *gpuid, uint32_t *gpuidx); 1025 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p, 1026 uint32_t gpuidx, uint32_t *gpuid) { 1027 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL; 1028 } 1029 static inline struct kfd_process_device *kfd_process_device_from_gpuidx( 1030 struct kfd_process *p, uint32_t gpuidx) { 1031 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL; 1032 } 1033 1034 void kfd_unref_process(struct kfd_process *p); 1035 int kfd_process_evict_queues(struct kfd_process *p, uint32_t trigger); 1036 int kfd_process_restore_queues(struct kfd_process *p); 1037 void kfd_suspend_all_processes(void); 1038 int kfd_resume_all_processes(void); 1039 1040 struct kfd_process_device *kfd_process_device_data_by_id(struct kfd_process *process, 1041 uint32_t gpu_id); 1042 1043 int kfd_process_get_user_gpu_id(struct kfd_process *p, uint32_t actual_gpu_id); 1044 1045 int kfd_process_device_init_vm(struct kfd_process_device *pdd, 1046 struct file *drm_file); 1047 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_node *dev, 1048 struct kfd_process *p); 1049 struct kfd_process_device *kfd_get_process_device_data(struct kfd_node *dev, 1050 struct kfd_process *p); 1051 struct kfd_process_device *kfd_create_process_device_data(struct kfd_node *dev, 1052 struct kfd_process *p); 1053 1054 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported); 1055 1056 int kfd_reserved_mem_mmap(struct kfd_node *dev, struct kfd_process *process, 1057 struct vm_area_struct *vma); 1058 1059 /* KFD process API for creating and translating handles */ 1060 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd, 1061 void *mem); 1062 void *kfd_process_device_translate_handle(struct kfd_process_device *p, 1063 int handle); 1064 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd, 1065 int handle); 1066 struct kfd_process *kfd_lookup_process_by_pid(struct pid *pid); 1067 1068 /* PASIDs */ 1069 int kfd_pasid_init(void); 1070 void kfd_pasid_exit(void); 1071 bool kfd_set_pasid_limit(unsigned int new_limit); 1072 unsigned int kfd_get_pasid_limit(void); 1073 u32 kfd_pasid_alloc(void); 1074 void kfd_pasid_free(u32 pasid); 1075 1076 /* Doorbells */ 1077 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd); 1078 int kfd_doorbell_init(struct kfd_dev *kfd); 1079 void kfd_doorbell_fini(struct kfd_dev *kfd); 1080 int kfd_doorbell_mmap(struct kfd_node *dev, struct kfd_process *process, 1081 struct vm_area_struct *vma); 1082 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, 1083 unsigned int *doorbell_off); 1084 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); 1085 u32 read_kernel_doorbell(u32 __iomem *db); 1086 void write_kernel_doorbell(void __iomem *db, u32 value); 1087 void write_kernel_doorbell64(void __iomem *db, u64 value); 1088 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd, 1089 struct kfd_process_device *pdd, 1090 unsigned int doorbell_id); 1091 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd); 1092 int kfd_alloc_process_doorbells(struct kfd_dev *kfd, 1093 struct kfd_process_device *pdd); 1094 void kfd_free_process_doorbells(struct kfd_dev *kfd, 1095 struct kfd_process_device *pdd); 1096 /* GTT Sub-Allocator */ 1097 1098 int kfd_gtt_sa_allocate(struct kfd_node *node, unsigned int size, 1099 struct kfd_mem_obj **mem_obj); 1100 1101 int kfd_gtt_sa_free(struct kfd_node *node, struct kfd_mem_obj *mem_obj); 1102 1103 extern struct device *kfd_device; 1104 1105 /* KFD's procfs */ 1106 void kfd_procfs_init(void); 1107 void kfd_procfs_shutdown(void); 1108 int kfd_procfs_add_queue(struct queue *q); 1109 void kfd_procfs_del_queue(struct queue *q); 1110 1111 /* Topology */ 1112 int kfd_topology_init(void); 1113 void kfd_topology_shutdown(void); 1114 int kfd_topology_add_device(struct kfd_node *gpu); 1115 int kfd_topology_remove_device(struct kfd_node *gpu); 1116 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 1117 uint32_t proximity_domain); 1118 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 1119 uint32_t proximity_domain); 1120 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); 1121 struct kfd_node *kfd_device_by_id(uint32_t gpu_id); 1122 struct kfd_node *kfd_device_by_pci_dev(const struct pci_dev *pdev); 1123 static inline bool kfd_irq_is_from_node(struct kfd_node *node, uint32_t node_id, 1124 uint32_t vmid) 1125 { 1126 return (node->interrupt_bitmap & (1 << node_id)) != 0 && 1127 (node->compute_vmid_bitmap & (1 << vmid)) != 0; 1128 } 1129 static inline struct kfd_node *kfd_node_by_irq_ids(struct amdgpu_device *adev, 1130 uint32_t node_id, uint32_t vmid) { 1131 struct kfd_dev *dev = adev->kfd.dev; 1132 uint32_t i; 1133 1134 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && 1135 KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 4)) 1136 return dev->nodes[0]; 1137 1138 for (i = 0; i < dev->num_nodes; i++) 1139 if (kfd_irq_is_from_node(dev->nodes[i], node_id, vmid)) 1140 return dev->nodes[i]; 1141 1142 return NULL; 1143 } 1144 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev); 1145 int kfd_numa_node_to_apic_id(int numa_node_id); 1146 1147 /* Interrupts */ 1148 #define KFD_IRQ_FENCE_CLIENTID 0xff 1149 #define KFD_IRQ_FENCE_SOURCEID 0xff 1150 #define KFD_IRQ_IS_FENCE(client, source) \ 1151 ((client) == KFD_IRQ_FENCE_CLIENTID && \ 1152 (source) == KFD_IRQ_FENCE_SOURCEID) 1153 int kfd_interrupt_init(struct kfd_node *dev); 1154 void kfd_interrupt_exit(struct kfd_node *dev); 1155 bool enqueue_ih_ring_entry(struct kfd_node *kfd, const void *ih_ring_entry); 1156 bool interrupt_is_wanted(struct kfd_node *dev, 1157 const uint32_t *ih_ring_entry, 1158 uint32_t *patched_ihre, bool *flag); 1159 int kfd_process_drain_interrupts(struct kfd_process_device *pdd); 1160 void kfd_process_close_interrupt_drain(unsigned int pasid); 1161 1162 /* amdkfd Apertures */ 1163 int kfd_init_apertures(struct kfd_process *process); 1164 1165 void kfd_process_set_trap_handler(struct qcm_process_device *qpd, 1166 uint64_t tba_addr, 1167 uint64_t tma_addr); 1168 void kfd_process_set_trap_debug_flag(struct qcm_process_device *qpd, 1169 bool enabled); 1170 1171 /* CWSR initialization */ 1172 int kfd_process_init_cwsr_apu(struct kfd_process *process, struct file *filep); 1173 1174 /* CRIU */ 1175 /* 1176 * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private 1177 * structures: 1178 * kfd_criu_process_priv_data 1179 * kfd_criu_device_priv_data 1180 * kfd_criu_bo_priv_data 1181 * kfd_criu_queue_priv_data 1182 * kfd_criu_event_priv_data 1183 * kfd_criu_svm_range_priv_data 1184 */ 1185 1186 #define KFD_CRIU_PRIV_VERSION 1 1187 1188 struct kfd_criu_process_priv_data { 1189 uint32_t version; 1190 uint32_t xnack_mode; 1191 }; 1192 1193 struct kfd_criu_device_priv_data { 1194 /* For future use */ 1195 uint64_t reserved; 1196 }; 1197 1198 struct kfd_criu_bo_priv_data { 1199 uint64_t user_addr; 1200 uint32_t idr_handle; 1201 uint32_t mapped_gpuids[MAX_GPU_INSTANCE]; 1202 }; 1203 1204 /* 1205 * The first 4 bytes of kfd_criu_queue_priv_data, kfd_criu_event_priv_data, 1206 * kfd_criu_svm_range_priv_data is the object type 1207 */ 1208 enum kfd_criu_object_type { 1209 KFD_CRIU_OBJECT_TYPE_QUEUE, 1210 KFD_CRIU_OBJECT_TYPE_EVENT, 1211 KFD_CRIU_OBJECT_TYPE_SVM_RANGE, 1212 }; 1213 1214 struct kfd_criu_svm_range_priv_data { 1215 uint32_t object_type; 1216 uint64_t start_addr; 1217 uint64_t size; 1218 /* Variable length array of attributes */ 1219 struct kfd_ioctl_svm_attribute attrs[]; 1220 }; 1221 1222 struct kfd_criu_queue_priv_data { 1223 uint32_t object_type; 1224 uint64_t q_address; 1225 uint64_t q_size; 1226 uint64_t read_ptr_addr; 1227 uint64_t write_ptr_addr; 1228 uint64_t doorbell_off; 1229 uint64_t eop_ring_buffer_address; 1230 uint64_t ctx_save_restore_area_address; 1231 uint32_t gpu_id; 1232 uint32_t type; 1233 uint32_t format; 1234 uint32_t q_id; 1235 uint32_t priority; 1236 uint32_t q_percent; 1237 uint32_t doorbell_id; 1238 uint32_t gws; 1239 uint32_t sdma_id; 1240 uint32_t eop_ring_buffer_size; 1241 uint32_t ctx_save_restore_area_size; 1242 uint32_t ctl_stack_size; 1243 uint32_t mqd_size; 1244 }; 1245 1246 struct kfd_criu_event_priv_data { 1247 uint32_t object_type; 1248 uint64_t user_handle; 1249 uint32_t event_id; 1250 uint32_t auto_reset; 1251 uint32_t type; 1252 uint32_t signaled; 1253 1254 union { 1255 struct kfd_hsa_memory_exception_data memory_exception_data; 1256 struct kfd_hsa_hw_exception_data hw_exception_data; 1257 }; 1258 }; 1259 1260 int kfd_process_get_queue_info(struct kfd_process *p, 1261 uint32_t *num_queues, 1262 uint64_t *priv_data_sizes); 1263 1264 int kfd_criu_checkpoint_queues(struct kfd_process *p, 1265 uint8_t __user *user_priv_data, 1266 uint64_t *priv_data_offset); 1267 1268 int kfd_criu_restore_queue(struct kfd_process *p, 1269 uint8_t __user *user_priv_data, 1270 uint64_t *priv_data_offset, 1271 uint64_t max_priv_data_size); 1272 1273 int kfd_criu_checkpoint_events(struct kfd_process *p, 1274 uint8_t __user *user_priv_data, 1275 uint64_t *priv_data_offset); 1276 1277 int kfd_criu_restore_event(struct file *devkfd, 1278 struct kfd_process *p, 1279 uint8_t __user *user_priv_data, 1280 uint64_t *priv_data_offset, 1281 uint64_t max_priv_data_size); 1282 /* CRIU - End */ 1283 1284 /* Queue Context Management */ 1285 int init_queue(struct queue **q, const struct queue_properties *properties); 1286 void uninit_queue(struct queue *q); 1287 void print_queue_properties(struct queue_properties *q); 1288 void print_queue(struct queue *q); 1289 int kfd_queue_buffer_get(struct amdgpu_vm *vm, void __user *addr, struct amdgpu_bo **pbo, 1290 u64 expected_size); 1291 int kfd_queue_acquire_buffers(struct kfd_process_device *pdd, struct queue_properties *properties); 1292 int kfd_queue_release_buffers(struct kfd_process_device *pdd, struct queue_properties *properties); 1293 1294 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, 1295 struct kfd_node *dev); 1296 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, 1297 struct kfd_node *dev); 1298 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type, 1299 struct kfd_node *dev); 1300 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, 1301 struct kfd_node *dev); 1302 struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type, 1303 struct kfd_node *dev); 1304 struct mqd_manager *mqd_manager_init_v12(enum KFD_MQD_TYPE type, 1305 struct kfd_node *dev); 1306 struct device_queue_manager *device_queue_manager_init(struct kfd_node *dev); 1307 void device_queue_manager_uninit(struct device_queue_manager *dqm); 1308 struct kernel_queue *kernel_queue_init(struct kfd_node *dev, 1309 enum kfd_queue_type type); 1310 void kernel_queue_uninit(struct kernel_queue *kq); 1311 int kfd_dqm_evict_pasid(struct device_queue_manager *dqm, u32 pasid); 1312 1313 /* Process Queue Manager */ 1314 struct process_queue_node { 1315 struct queue *q; 1316 struct kernel_queue *kq; 1317 struct list_head process_queue_list; 1318 }; 1319 1320 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd); 1321 void kfd_process_dequeue_from_all_devices(struct kfd_process *p); 1322 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); 1323 void pqm_uninit(struct process_queue_manager *pqm); 1324 int pqm_create_queue(struct process_queue_manager *pqm, 1325 struct kfd_node *dev, 1326 struct file *f, 1327 struct queue_properties *properties, 1328 unsigned int *qid, 1329 const struct kfd_criu_queue_priv_data *q_data, 1330 const void *restore_mqd, 1331 const void *restore_ctl_stack, 1332 uint32_t *p_doorbell_offset_in_process); 1333 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); 1334 int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid, 1335 struct queue_properties *p); 1336 int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid, 1337 struct mqd_update_info *minfo); 1338 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 1339 void *gws); 1340 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, 1341 unsigned int qid); 1342 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm, 1343 unsigned int qid); 1344 int pqm_get_wave_state(struct process_queue_manager *pqm, 1345 unsigned int qid, 1346 void __user *ctl_stack, 1347 u32 *ctl_stack_used_size, 1348 u32 *save_area_used_size); 1349 int pqm_get_queue_snapshot(struct process_queue_manager *pqm, 1350 uint64_t exception_clear_mask, 1351 void __user *buf, 1352 int *num_qss_entries, 1353 uint32_t *entry_size); 1354 1355 int amdkfd_fence_wait_timeout(struct device_queue_manager *dqm, 1356 uint64_t fence_value, 1357 unsigned int timeout_ms); 1358 1359 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm, 1360 unsigned int qid, 1361 u32 *mqd_size, 1362 u32 *ctl_stack_size); 1363 /* Packet Manager */ 1364 1365 #define KFD_FENCE_COMPLETED (100) 1366 #define KFD_FENCE_INIT (10) 1367 1368 struct packet_manager { 1369 struct device_queue_manager *dqm; 1370 struct kernel_queue *priv_queue; 1371 struct mutex lock; 1372 bool allocated; 1373 struct kfd_mem_obj *ib_buffer_obj; 1374 unsigned int ib_size_bytes; 1375 bool is_over_subscription; 1376 1377 const struct packet_manager_funcs *pmf; 1378 }; 1379 1380 struct packet_manager_funcs { 1381 /* Support ASIC-specific packet formats for PM4 packets */ 1382 int (*map_process)(struct packet_manager *pm, uint32_t *buffer, 1383 struct qcm_process_device *qpd); 1384 int (*runlist)(struct packet_manager *pm, uint32_t *buffer, 1385 uint64_t ib, size_t ib_size_in_dwords, bool chain); 1386 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer, 1387 struct scheduling_resources *res); 1388 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer, 1389 struct queue *q, bool is_static); 1390 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer, 1391 enum kfd_unmap_queues_filter mode, 1392 uint32_t filter_param, bool reset); 1393 int (*set_grace_period)(struct packet_manager *pm, uint32_t *buffer, 1394 uint32_t grace_period); 1395 int (*query_status)(struct packet_manager *pm, uint32_t *buffer, 1396 uint64_t fence_address, uint64_t fence_value); 1397 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer); 1398 1399 /* Packet sizes */ 1400 int map_process_size; 1401 int runlist_size; 1402 int set_resources_size; 1403 int map_queues_size; 1404 int unmap_queues_size; 1405 int set_grace_period_size; 1406 int query_status_size; 1407 int release_mem_size; 1408 }; 1409 1410 extern const struct packet_manager_funcs kfd_vi_pm_funcs; 1411 extern const struct packet_manager_funcs kfd_v9_pm_funcs; 1412 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs; 1413 1414 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); 1415 void pm_uninit(struct packet_manager *pm); 1416 int pm_send_set_resources(struct packet_manager *pm, 1417 struct scheduling_resources *res); 1418 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); 1419 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, 1420 uint64_t fence_value); 1421 1422 int pm_send_unmap_queue(struct packet_manager *pm, 1423 enum kfd_unmap_queues_filter mode, 1424 uint32_t filter_param, bool reset); 1425 1426 void pm_release_ib(struct packet_manager *pm); 1427 1428 int pm_update_grace_period(struct packet_manager *pm, uint32_t grace_period); 1429 1430 /* Following PM funcs can be shared among VI and AI */ 1431 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size); 1432 1433 uint64_t kfd_get_number_elems(struct kfd_dev *kfd); 1434 1435 /* Events */ 1436 extern const struct kfd_event_interrupt_class event_interrupt_class_cik; 1437 extern const struct kfd_event_interrupt_class event_interrupt_class_v9; 1438 extern const struct kfd_event_interrupt_class event_interrupt_class_v9_4_3; 1439 extern const struct kfd_event_interrupt_class event_interrupt_class_v10; 1440 extern const struct kfd_event_interrupt_class event_interrupt_class_v11; 1441 1442 extern const struct kfd_device_global_init_class device_global_init_class_cik; 1443 1444 int kfd_event_init_process(struct kfd_process *p); 1445 void kfd_event_free_process(struct kfd_process *p); 1446 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); 1447 int kfd_wait_on_events(struct kfd_process *p, 1448 uint32_t num_events, void __user *data, 1449 bool all, uint32_t *user_timeout_ms, 1450 uint32_t *wait_result); 1451 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id, 1452 uint32_t valid_id_bits); 1453 void kfd_signal_hw_exception_event(u32 pasid); 1454 int kfd_set_event(struct kfd_process *p, uint32_t event_id); 1455 int kfd_reset_event(struct kfd_process *p, uint32_t event_id); 1456 int kfd_kmap_event_page(struct kfd_process *p, uint64_t event_page_offset); 1457 1458 int kfd_event_create(struct file *devkfd, struct kfd_process *p, 1459 uint32_t event_type, bool auto_reset, uint32_t node_id, 1460 uint32_t *event_id, uint32_t *event_trigger_data, 1461 uint64_t *event_page_offset, uint32_t *event_slot_index); 1462 1463 int kfd_get_num_events(struct kfd_process *p); 1464 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); 1465 1466 void kfd_signal_vm_fault_event(struct kfd_node *dev, u32 pasid, 1467 struct kfd_vm_fault_info *info, 1468 struct kfd_hsa_memory_exception_data *data); 1469 1470 void kfd_signal_reset_event(struct kfd_node *dev); 1471 1472 void kfd_signal_poison_consumed_event(struct kfd_node *dev, u32 pasid); 1473 1474 static inline void kfd_flush_tlb(struct kfd_process_device *pdd, 1475 enum TLB_FLUSH_TYPE type) 1476 { 1477 struct amdgpu_device *adev = pdd->dev->adev; 1478 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1479 1480 amdgpu_vm_flush_compute_tlb(adev, vm, type, pdd->dev->xcc_mask); 1481 } 1482 1483 static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) 1484 { 1485 return KFD_GC_VERSION(dev) >= IP_VERSION(9, 4, 2) || 1486 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) || 1487 KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0); 1488 } 1489 1490 int kfd_send_exception_to_runtime(struct kfd_process *p, 1491 unsigned int queue_id, 1492 uint64_t error_reason); 1493 bool kfd_is_locked(void); 1494 1495 /* Compute profile */ 1496 void kfd_inc_compute_active(struct kfd_node *dev); 1497 void kfd_dec_compute_active(struct kfd_node *dev); 1498 1499 /* Cgroup Support */ 1500 /* Check with device cgroup if @kfd device is accessible */ 1501 static inline int kfd_devcgroup_check_permission(struct kfd_node *node) 1502 { 1503 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF) 1504 struct drm_device *ddev; 1505 1506 if (node->xcp) 1507 ddev = node->xcp->ddev; 1508 else 1509 ddev = adev_to_drm(node->adev); 1510 1511 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR, 1512 ddev->render->index, 1513 DEVCG_ACC_WRITE | DEVCG_ACC_READ); 1514 #else 1515 return 0; 1516 #endif 1517 } 1518 1519 static inline bool kfd_is_first_node(struct kfd_node *node) 1520 { 1521 return (node == node->kfd->nodes[0]); 1522 } 1523 1524 /* Debugfs */ 1525 #if defined(CONFIG_DEBUG_FS) 1526 1527 void kfd_debugfs_init(void); 1528 void kfd_debugfs_fini(void); 1529 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data); 1530 int pqm_debugfs_mqds(struct seq_file *m, void *data); 1531 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data); 1532 int dqm_debugfs_hqds(struct seq_file *m, void *data); 1533 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data); 1534 int pm_debugfs_runlist(struct seq_file *m, void *data); 1535 1536 int kfd_debugfs_hang_hws(struct kfd_node *dev); 1537 int pm_debugfs_hang_hws(struct packet_manager *pm); 1538 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm); 1539 1540 #else 1541 1542 static inline void kfd_debugfs_init(void) {} 1543 static inline void kfd_debugfs_fini(void) {} 1544 1545 #endif 1546 1547 #endif 1548