1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/types.h> 26 #include <linux/mutex.h> 27 #include <linux/slab.h> 28 #include <linux/printk.h> 29 #include <linux/sched.h> 30 #include "kfd_kernel_queue.h" 31 #include "kfd_priv.h" 32 #include "kfd_device_queue_manager.h" 33 #include "kfd_pm4_headers.h" 34 #include "kfd_pm4_opcodes.h" 35 #include "amdgpu_reset.h" 36 37 #define PM4_COUNT_ZERO (((1 << 15) - 1) << 16) 38 39 /* Initialize a kernel queue, including allocations of GART memory 40 * needed for the queue. 41 */ 42 static bool kq_initialize(struct kernel_queue *kq, struct kfd_node *dev, 43 enum kfd_queue_type type, unsigned int queue_size) 44 { 45 struct queue_properties prop; 46 int retval; 47 union PM4_MES_TYPE_3_HEADER nop; 48 49 pr_debug("Initializing queue type %d size %d\n", type, queue_size); 50 51 memset(&prop, 0, sizeof(prop)); 52 memset(&nop, 0, sizeof(nop)); 53 54 nop.opcode = IT_NOP; 55 nop.type = PM4_TYPE_3; 56 nop.u32all |= PM4_COUNT_ZERO; 57 58 kq->dev = dev; 59 kq->nop_packet = nop.u32all; 60 kq->mqd_mgr = dev->dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]; 61 if (!kq->mqd_mgr) 62 return false; 63 64 prop.doorbell_ptr = kfd_get_kernel_doorbell(dev->kfd, &prop.doorbell_off); 65 66 if (!prop.doorbell_ptr) { 67 dev_err(dev->adev->dev, "Failed to initialize doorbell"); 68 goto err_get_kernel_doorbell; 69 } 70 71 retval = kfd_gtt_sa_allocate(dev, queue_size, &kq->pq); 72 if (retval != 0) { 73 dev_err(dev->adev->dev, "Failed to init pq queues size %d\n", 74 queue_size); 75 goto err_pq_allocate_vidmem; 76 } 77 78 kq->pq_kernel_addr = kq->pq->cpu_ptr; 79 kq->pq_gpu_addr = kq->pq->gpu_addr; 80 81 /* For CIK family asics, kq->eop_mem is not needed */ 82 if (dev->adev->asic_type > CHIP_MULLINS) { 83 retval = kfd_gtt_sa_allocate(dev, PAGE_SIZE, &kq->eop_mem); 84 if (retval != 0) 85 goto err_eop_allocate_vidmem; 86 87 kq->eop_gpu_addr = kq->eop_mem->gpu_addr; 88 kq->eop_kernel_addr = kq->eop_mem->cpu_ptr; 89 90 memset(kq->eop_kernel_addr, 0, PAGE_SIZE); 91 } 92 93 retval = kfd_gtt_sa_allocate(dev, sizeof(*kq->rptr_kernel), 94 &kq->rptr_mem); 95 96 if (retval != 0) 97 goto err_rptr_allocate_vidmem; 98 99 kq->rptr_kernel = kq->rptr_mem->cpu_ptr; 100 kq->rptr_gpu_addr = kq->rptr_mem->gpu_addr; 101 102 retval = kfd_gtt_sa_allocate(dev, dev->kfd->device_info.doorbell_size, 103 &kq->wptr_mem); 104 105 if (retval != 0) 106 goto err_wptr_allocate_vidmem; 107 108 kq->wptr_kernel = kq->wptr_mem->cpu_ptr; 109 kq->wptr_gpu_addr = kq->wptr_mem->gpu_addr; 110 111 memset(kq->pq_kernel_addr, 0, queue_size); 112 memset(kq->rptr_kernel, 0, sizeof(*kq->rptr_kernel)); 113 memset(kq->wptr_kernel, 0, dev->kfd->device_info.doorbell_size); 114 115 prop.queue_size = queue_size; 116 prop.is_interop = false; 117 prop.is_gws = false; 118 prop.priority = 1; 119 prop.queue_percent = 100; 120 prop.type = type; 121 prop.vmid = 0; 122 prop.queue_address = kq->pq_gpu_addr; 123 prop.read_ptr = (uint32_t *) kq->rptr_gpu_addr; 124 prop.write_ptr = (uint32_t *) kq->wptr_gpu_addr; 125 prop.eop_ring_buffer_address = kq->eop_gpu_addr; 126 prop.eop_ring_buffer_size = PAGE_SIZE; 127 128 if (init_queue(&kq->queue, &prop) != 0) 129 goto err_init_queue; 130 131 kq->queue->device = dev; 132 133 kq->queue->mqd_mem_obj = kq->mqd_mgr->allocate_mqd(kq->mqd_mgr->dev, 134 &kq->queue->properties); 135 if (!kq->queue->mqd_mem_obj) 136 goto err_allocate_mqd; 137 kq->mqd_mgr->init_mqd(kq->mqd_mgr, &kq->queue->mqd, 138 kq->queue->mqd_mem_obj, 139 &kq->queue->gart_mqd_addr, 140 &kq->queue->properties); 141 /* assign HIQ to HQD */ 142 if (type == KFD_QUEUE_TYPE_HIQ) { 143 pr_debug("Assigning hiq to hqd\n"); 144 kq->queue->pipe = KFD_CIK_HIQ_PIPE; 145 kq->queue->queue = KFD_CIK_HIQ_QUEUE; 146 kq->mqd_mgr->load_mqd(kq->mqd_mgr, kq->queue->mqd, 147 kq->queue->pipe, kq->queue->queue, 148 &kq->queue->properties, NULL); 149 } 150 151 print_queue(kq->queue); 152 153 return true; 154 err_allocate_mqd: 155 uninit_queue(kq->queue); 156 err_init_queue: 157 kfd_gtt_sa_free(dev, kq->wptr_mem); 158 err_wptr_allocate_vidmem: 159 kfd_gtt_sa_free(dev, kq->rptr_mem); 160 err_rptr_allocate_vidmem: 161 kfd_gtt_sa_free(dev, kq->eop_mem); 162 err_eop_allocate_vidmem: 163 kfd_gtt_sa_free(dev, kq->pq); 164 err_pq_allocate_vidmem: 165 kfd_release_kernel_doorbell(dev->kfd, prop.doorbell_ptr); 166 err_get_kernel_doorbell: 167 return false; 168 169 } 170 171 /* Uninitialize a kernel queue and free all its memory usages. */ 172 static void kq_uninitialize(struct kernel_queue *kq) 173 { 174 if (kq->queue->properties.type == KFD_QUEUE_TYPE_HIQ && down_read_trylock(&kq->dev->adev->reset_domain->sem)) { 175 kq->mqd_mgr->destroy_mqd(kq->mqd_mgr, 176 kq->queue->mqd, 177 KFD_PREEMPT_TYPE_WAVEFRONT_RESET, 178 KFD_UNMAP_LATENCY_MS, 179 kq->queue->pipe, 180 kq->queue->queue); 181 up_read(&kq->dev->adev->reset_domain->sem); 182 } 183 184 kq->mqd_mgr->free_mqd(kq->mqd_mgr, kq->queue->mqd, 185 kq->queue->mqd_mem_obj); 186 187 kfd_gtt_sa_free(kq->dev, kq->rptr_mem); 188 kfd_gtt_sa_free(kq->dev, kq->wptr_mem); 189 190 /* For CIK family asics, kq->eop_mem is Null, kfd_gtt_sa_free() 191 * is able to handle NULL properly. 192 */ 193 kfd_gtt_sa_free(kq->dev, kq->eop_mem); 194 195 kfd_gtt_sa_free(kq->dev, kq->pq); 196 kfd_release_kernel_doorbell(kq->dev->kfd, 197 kq->queue->properties.doorbell_ptr); 198 uninit_queue(kq->queue); 199 } 200 201 int kq_acquire_packet_buffer(struct kernel_queue *kq, 202 size_t packet_size_in_dwords, unsigned int **buffer_ptr) 203 { 204 size_t available_size; 205 size_t queue_size_dwords; 206 uint32_t wptr, rptr; 207 uint64_t wptr64; 208 unsigned int *queue_address; 209 210 /* When rptr == wptr, the buffer is empty. 211 * When rptr == wptr + 1, the buffer is full. 212 * It is always rptr that advances to the position of wptr, rather than 213 * the opposite. So we can only use up to queue_size_dwords - 1 dwords. 214 */ 215 rptr = *kq->rptr_kernel; 216 wptr = kq->pending_wptr; 217 wptr64 = kq->pending_wptr64; 218 queue_address = (unsigned int *)kq->pq_kernel_addr; 219 queue_size_dwords = kq->queue->properties.queue_size / 4; 220 221 pr_debug("rptr: %d\n", rptr); 222 pr_debug("wptr: %d\n", wptr); 223 pr_debug("queue_address 0x%p\n", queue_address); 224 225 available_size = (rptr + queue_size_dwords - 1 - wptr) % 226 queue_size_dwords; 227 228 if (packet_size_in_dwords > available_size) { 229 /* 230 * make sure calling functions know 231 * kq_acquire_packet_buffer() failed 232 */ 233 goto err_no_space; 234 } 235 236 if (wptr + packet_size_in_dwords >= queue_size_dwords) { 237 /* make sure after rolling back to position 0, there is 238 * still enough space. 239 */ 240 if (packet_size_in_dwords >= rptr) 241 goto err_no_space; 242 243 /* fill nops, roll back and start at position 0 */ 244 while (wptr > 0) { 245 queue_address[wptr] = kq->nop_packet; 246 wptr = (wptr + 1) % queue_size_dwords; 247 wptr64++; 248 } 249 } 250 251 *buffer_ptr = &queue_address[wptr]; 252 kq->pending_wptr = wptr + packet_size_in_dwords; 253 kq->pending_wptr64 = wptr64 + packet_size_in_dwords; 254 255 return 0; 256 257 err_no_space: 258 *buffer_ptr = NULL; 259 return -ENOMEM; 260 } 261 262 int kq_submit_packet(struct kernel_queue *kq) 263 { 264 #ifdef DEBUG 265 int i; 266 267 for (i = *kq->wptr_kernel; i < kq->pending_wptr; i++) { 268 pr_debug("0x%2X ", kq->pq_kernel_addr[i]); 269 if (i % 15 == 0) 270 pr_debug("\n"); 271 } 272 pr_debug("\n"); 273 #endif 274 /* Fatal err detected, packet submission won't go through */ 275 if (amdgpu_amdkfd_is_fed(kq->dev->adev)) 276 return -EIO; 277 278 /* Make sure ring buffer is updated before wptr updated */ 279 mb(); 280 281 if (kq->dev->kfd->device_info.doorbell_size == 8) { 282 *kq->wptr64_kernel = kq->pending_wptr64; 283 mb(); /* Make sure wptr updated before ring doorbell */ 284 write_kernel_doorbell64(kq->queue->properties.doorbell_ptr, 285 kq->pending_wptr64); 286 } else { 287 *kq->wptr_kernel = kq->pending_wptr; 288 mb(); /* Make sure wptr updated before ring doorbell */ 289 write_kernel_doorbell(kq->queue->properties.doorbell_ptr, 290 kq->pending_wptr); 291 } 292 293 return 0; 294 } 295 296 void kq_rollback_packet(struct kernel_queue *kq) 297 { 298 if (kq->dev->kfd->device_info.doorbell_size == 8) { 299 kq->pending_wptr64 = *kq->wptr64_kernel; 300 kq->pending_wptr = *kq->wptr_kernel % 301 (kq->queue->properties.queue_size / 4); 302 } else { 303 kq->pending_wptr = *kq->wptr_kernel; 304 } 305 } 306 307 struct kernel_queue *kernel_queue_init(struct kfd_node *dev, 308 enum kfd_queue_type type) 309 { 310 struct kernel_queue *kq; 311 312 kq = kzalloc(sizeof(*kq), GFP_KERNEL); 313 if (!kq) 314 return NULL; 315 316 if (kq_initialize(kq, dev, type, KFD_KERNEL_QUEUE_SIZE)) 317 return kq; 318 319 dev_err(dev->adev->dev, "Failed to init kernel queue\n"); 320 321 kfree(kq); 322 return NULL; 323 } 324 325 void kernel_queue_uninit(struct kernel_queue *kq) 326 { 327 kq_uninitialize(kq); 328 kfree(kq); 329 } 330