xref: /linux/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c (revision 55d0969c451159cff86949b38c39171cab962069)
1 /*
2  * Copyright 2023 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #include "kfd_events.h"
24 #include "kfd_debug.h"
25 #include "soc15_int.h"
26 #include "kfd_device_queue_manager.h"
27 
28 /*
29  * GFX10 SQ Interrupts
30  *
31  * There are 3 encoding types of interrupts sourced from SQ sent as a 44-bit
32  * packet to the Interrupt Handler:
33  * Auto - Generated by the SQG (various cmd overflows, timestamps etc)
34  * Wave - Generated by S_SENDMSG through a shader program
35  * Error - HW generated errors (Illegal instructions, Memviols, EDC etc)
36  *
37  * The 44-bit packet is mapped as {context_id1[7:0],context_id0[31:0]} plus
38  * 4-bits for VMID (SOC15_VMID_FROM_IH_ENTRY) as such:
39  *
40  * - context_id1[7:6]
41  * Encoding type (0 = Auto, 1 = Wave, 2 = Error)
42  *
43  * - context_id0[24]
44  * PRIV bit indicates that Wave S_SEND or error occurred within trap
45  *
46  * - context_id0[22:0]
47  * 23-bit data with the following layout per encoding type:
48  * Auto - only context_id0[8:0] is used, which reports various interrupts
49  * generated by SQG.  The rest is 0.
50  * Wave - user data sent from m0 via S_SENDMSG
51  * Error - Error type (context_id0[22:19]), Error Details (rest of bits)
52  *
53  * The other context_id bits show coordinates (SE/SH/CU/SIMD/WGP) for wave
54  * S_SENDMSG and Errors.  These are 0 for Auto.
55  */
56 
57 enum SQ_INTERRUPT_WORD_ENCODING {
58 	SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0,
59 	SQ_INTERRUPT_WORD_ENCODING_INST,
60 	SQ_INTERRUPT_WORD_ENCODING_ERROR,
61 };
62 
63 enum SQ_INTERRUPT_ERROR_TYPE {
64 	SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0,
65 	SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST,
66 	SQ_INTERRUPT_ERROR_TYPE_MEMVIOL,
67 	SQ_INTERRUPT_ERROR_TYPE_EDC_FED,
68 };
69 
70 /* SQ_INTERRUPT_WORD_AUTO_CTXID */
71 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE__SHIFT 0
72 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT__SHIFT 1
73 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL__SHIFT 2
74 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL__SHIFT 3
75 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR__SHIFT 7
76 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID__SHIFT 4
77 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING__SHIFT 6
78 
79 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_MASK 0x00000001
80 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT_MASK 0x00000002
81 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL_MASK 0x00000004
82 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL_MASK 0x00000008
83 #define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR_MASK 0x00000080
84 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID_MASK 0x030
85 #define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING_MASK 0x0c0
86 
87 /* SQ_INTERRUPT_WORD_WAVE_CTXID */
88 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA__SHIFT 0
89 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID__SHIFT 23
90 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV__SHIFT 24
91 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID__SHIFT 25
92 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID__SHIFT 30
93 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID__SHIFT 0
94 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID__SHIFT 4
95 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING__SHIFT 6
96 
97 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA_MASK 0x000007fffff
98 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID_MASK 0x0000800000
99 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK 0x00001000000
100 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID_MASK 0x0003e000000
101 #define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID_MASK 0x000c0000000
102 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID_MASK 0x00f
103 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID_MASK 0x030
104 #define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING_MASK 0x0c0
105 
106 #define KFD_CTXID0__ERR_TYPE_MASK 0x780000
107 #define KFD_CTXID0__ERR_TYPE__SHIFT 19
108 
109 /* GFX10 SQ interrupt ENC type bit (context_id1[7:6]) for wave s_sendmsg */
110 #define KFD_CONTEXT_ID1_ENC_TYPE_WAVE_MASK	0x40
111 /* GFX10 SQ interrupt PRIV bit (context_id0[24]) for s_sendmsg inside trap */
112 #define KFD_CONTEXT_ID0_PRIV_MASK		0x1000000
113 /*
114  * The debugger will send user data(m0) with PRIV=1 to indicate it requires
115  * notification from the KFD with the following queue id (DOORBELL_ID) and
116  * trap code (TRAP_CODE).
117  */
118 #define KFD_CONTEXT_ID0_DEBUG_DOORBELL_MASK	0x0003ff
119 #define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_SHIFT	10
120 #define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_MASK	0x07fc00
121 #define KFD_DEBUG_DOORBELL_ID(ctxid0)	((ctxid0) &	\
122 				KFD_CONTEXT_ID0_DEBUG_DOORBELL_MASK)
123 #define KFD_DEBUG_TRAP_CODE(ctxid0)	(((ctxid0) &	\
124 				KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_MASK)	\
125 				>> KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_SHIFT)
126 #define KFD_DEBUG_CP_BAD_OP_ECODE_MASK		0x3fffc00
127 #define KFD_DEBUG_CP_BAD_OP_ECODE_SHIFT		10
128 #define KFD_DEBUG_CP_BAD_OP_ECODE(ctxid0) (((ctxid0) &			\
129 				KFD_DEBUG_CP_BAD_OP_ECODE_MASK)		\
130 				>> KFD_DEBUG_CP_BAD_OP_ECODE_SHIFT)
131 
132 static bool event_interrupt_isr_v10(struct kfd_node *dev,
133 					const uint32_t *ih_ring_entry,
134 					uint32_t *patched_ihre,
135 					bool *patched_flag)
136 {
137 	uint16_t source_id, client_id, pasid, vmid;
138 	const uint32_t *data = ih_ring_entry;
139 
140 	source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
141 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
142 
143 	/* Only handle interrupts from KFD VMIDs */
144 	vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
145 	if (!KFD_IRQ_IS_FENCE(client_id, source_id) &&
146 	   (vmid < dev->vm_info.first_vmid_kfd ||
147 	    vmid > dev->vm_info.last_vmid_kfd))
148 		return false;
149 
150 	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
151 
152 	/* Only handle clients we care about */
153 	if (client_id != SOC15_IH_CLIENTID_GRBM_CP &&
154 	    client_id != SOC15_IH_CLIENTID_SDMA0 &&
155 	    client_id != SOC15_IH_CLIENTID_SDMA1 &&
156 	    client_id != SOC15_IH_CLIENTID_SDMA2 &&
157 	    client_id != SOC15_IH_CLIENTID_SDMA3 &&
158 	    client_id != SOC15_IH_CLIENTID_SDMA4 &&
159 	    client_id != SOC15_IH_CLIENTID_SDMA5 &&
160 	    client_id != SOC15_IH_CLIENTID_SDMA6 &&
161 	    client_id != SOC15_IH_CLIENTID_SDMA7 &&
162 	    client_id != SOC15_IH_CLIENTID_VMC &&
163 	    client_id != SOC15_IH_CLIENTID_VMC1 &&
164 	    client_id != SOC15_IH_CLIENTID_UTCL2 &&
165 	    client_id != SOC15_IH_CLIENTID_SE0SH &&
166 	    client_id != SOC15_IH_CLIENTID_SE1SH &&
167 	    client_id != SOC15_IH_CLIENTID_SE2SH &&
168 	    client_id != SOC15_IH_CLIENTID_SE3SH)
169 		return false;
170 
171 	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",
172 		 client_id, source_id, vmid, pasid);
173 	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",
174 		 data[0], data[1], data[2], data[3],
175 		 data[4], data[5], data[6], data[7]);
176 
177 	/* If there is no valid PASID, it's likely a bug */
178 	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))
179 		return 0;
180 
181 	/* Interrupt types we care about: various signals and faults.
182 	 * They will be forwarded to a work queue (see below).
183 	 */
184 	return source_id == SOC15_INTSRC_CP_END_OF_PIPE ||
185 		source_id == SOC15_INTSRC_SDMA_TRAP ||
186 		source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG ||
187 		source_id == SOC15_INTSRC_CP_BAD_OPCODE ||
188 		client_id == SOC15_IH_CLIENTID_VMC ||
189 		client_id == SOC15_IH_CLIENTID_VMC1 ||
190 		client_id == SOC15_IH_CLIENTID_UTCL2 ||
191 		KFD_IRQ_IS_FENCE(client_id, source_id);
192 }
193 
194 static void event_interrupt_wq_v10(struct kfd_node *dev,
195 					const uint32_t *ih_ring_entry)
196 {
197 	uint16_t source_id, client_id, pasid, vmid;
198 	uint32_t context_id0, context_id1;
199 	uint32_t encoding, sq_intr_err_type;
200 
201 	source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
202 	client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
203 	pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
204 	vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
205 	context_id0 = SOC15_CONTEXT_ID0_FROM_IH_ENTRY(ih_ring_entry);
206 	context_id1 = SOC15_CONTEXT_ID1_FROM_IH_ENTRY(ih_ring_entry);
207 
208 	if (client_id == SOC15_IH_CLIENTID_GRBM_CP ||
209 	    client_id == SOC15_IH_CLIENTID_SE0SH ||
210 	    client_id == SOC15_IH_CLIENTID_SE1SH ||
211 	    client_id == SOC15_IH_CLIENTID_SE2SH ||
212 	    client_id == SOC15_IH_CLIENTID_SE3SH) {
213 		if (source_id == SOC15_INTSRC_CP_END_OF_PIPE)
214 			kfd_signal_event_interrupt(pasid, context_id0, 32);
215 		else if (source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG) {
216 			encoding = REG_GET_FIELD(context_id1,
217 						SQ_INTERRUPT_WORD_WAVE_CTXID1, ENCODING);
218 			switch (encoding) {
219 			case SQ_INTERRUPT_WORD_ENCODING_AUTO:
220 				pr_debug_ratelimited(
221 					"sq_intr: auto, se %d, ttrace %d, wlt %d, ttrac_buf0_full %d, ttrac_buf1_full %d, ttrace_utc_err %d\n",
222 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_AUTO_CTXID1,
223 							SE_ID),
224 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
225 							THREAD_TRACE),
226 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
227 							WLT),
228 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
229 							THREAD_TRACE_BUF0_FULL),
230 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
231 							THREAD_TRACE_BUF1_FULL),
232 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,
233 							THREAD_TRACE_UTC_ERROR));
234 				break;
235 			case SQ_INTERRUPT_WORD_ENCODING_INST:
236 				pr_debug_ratelimited("sq_intr: inst, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",
237 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
238 							SE_ID),
239 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
240 							DATA),
241 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
242 							SA_ID),
243 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
244 							PRIV),
245 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
246 							WAVE_ID),
247 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
248 							SIMD_ID),
249 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
250 							WGP_ID));
251 				if (context_id0 & SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK) {
252 					if (kfd_set_dbg_ev_from_interrupt(dev, pasid,
253 							KFD_DEBUG_DOORBELL_ID(context_id0),
254 							KFD_DEBUG_TRAP_CODE(context_id0),
255 							NULL, 0))
256 						return;
257 				}
258 				break;
259 			case SQ_INTERRUPT_WORD_ENCODING_ERROR:
260 				sq_intr_err_type = REG_GET_FIELD(context_id0, KFD_CTXID0,
261 								ERR_TYPE);
262 				pr_warn_ratelimited("sq_intr: error, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d, err_type %d\n",
263 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
264 							SE_ID),
265 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
266 							DATA),
267 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
268 							SA_ID),
269 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
270 							PRIV),
271 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
272 							WAVE_ID),
273 					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,
274 							SIMD_ID),
275 					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,
276 							WGP_ID),
277 					sq_intr_err_type);
278 				break;
279 			default:
280 				break;
281 			}
282 			kfd_signal_event_interrupt(pasid, context_id0 & 0x7fffff, 23);
283 		} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE &&
284 			   KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) {
285 			kfd_set_dbg_ev_from_interrupt(dev, pasid,
286 				KFD_DEBUG_DOORBELL_ID(context_id0),
287 				KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)),
288 				NULL,
289 				0);
290 		}
291 	} else if (client_id == SOC15_IH_CLIENTID_SDMA0 ||
292 		   client_id == SOC15_IH_CLIENTID_SDMA1 ||
293 		   client_id == SOC15_IH_CLIENTID_SDMA2 ||
294 		   client_id == SOC15_IH_CLIENTID_SDMA3 ||
295 		   (client_id == SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid &&
296 		    KFD_GC_VERSION(dev) == IP_VERSION(10, 3, 0)) ||
297 		   client_id == SOC15_IH_CLIENTID_SDMA4 ||
298 		   client_id == SOC15_IH_CLIENTID_SDMA5 ||
299 		   client_id == SOC15_IH_CLIENTID_SDMA6 ||
300 		   client_id == SOC15_IH_CLIENTID_SDMA7) {
301 		if (source_id == SOC15_INTSRC_SDMA_TRAP) {
302 			kfd_signal_event_interrupt(pasid, context_id0 & 0xfffffff, 28);
303 		}
304 	} else if (client_id == SOC15_IH_CLIENTID_VMC ||
305 		   client_id == SOC15_IH_CLIENTID_VMC1 ||
306 		   client_id == SOC15_IH_CLIENTID_UTCL2) {
307 		struct kfd_vm_fault_info info = {0};
308 		uint16_t ring_id = SOC15_RING_ID_FROM_IH_ENTRY(ih_ring_entry);
309 		struct kfd_hsa_memory_exception_data exception_data;
310 
311 		info.vmid = vmid;
312 		info.mc_id = client_id;
313 		info.page_addr = ih_ring_entry[4] |
314 			(uint64_t)(ih_ring_entry[5] & 0xf) << 32;
315 		info.prot_valid = ring_id & 0x08;
316 		info.prot_read  = ring_id & 0x10;
317 		info.prot_write = ring_id & 0x20;
318 
319 		memset(&exception_data, 0, sizeof(exception_data));
320 		exception_data.gpu_id = dev->id;
321 		exception_data.va = (info.page_addr) << PAGE_SHIFT;
322 		exception_data.failure.NotPresent = info.prot_valid ? 1 : 0;
323 		exception_data.failure.NoExecute = info.prot_exec ? 1 : 0;
324 		exception_data.failure.ReadOnly = info.prot_write ? 1 : 0;
325 		exception_data.failure.imprecise = 0;
326 
327 		kfd_set_dbg_ev_from_interrupt(dev,
328 						pasid,
329 						-1,
330 						KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION),
331 						&exception_data,
332 						sizeof(exception_data));
333 	} else if (KFD_IRQ_IS_FENCE(client_id, source_id)) {
334 		kfd_process_close_interrupt_drain(pasid);
335 	}
336 }
337 
338 const struct kfd_event_interrupt_class event_interrupt_class_v10 = {
339 	.interrupt_isr = event_interrupt_isr_v10,
340 	.interrupt_wq = event_interrupt_wq_v10,
341 };
342