1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef KFD_DEVICE_QUEUE_MANAGER_H_ 26 #define KFD_DEVICE_QUEUE_MANAGER_H_ 27 28 #include <linux/rwsem.h> 29 #include <linux/list.h> 30 #include <linux/mutex.h> 31 #include <linux/sched/mm.h> 32 #include "kfd_priv.h" 33 #include "kfd_mqd_manager.h" 34 35 36 #define VMID_NUM 16 37 38 #define KFD_MES_PROCESS_QUANTUM 100000 39 #define KFD_MES_GANG_QUANTUM 10000 40 #define USE_DEFAULT_GRACE_PERIOD 0xffffffff 41 42 struct device_process_node { 43 struct qcm_process_device *qpd; 44 struct list_head list; 45 }; 46 47 union SQ_CMD_BITS { 48 struct { 49 uint32_t cmd:3; 50 uint32_t:1; 51 uint32_t mode:3; 52 uint32_t check_vmid:1; 53 uint32_t trap_id:3; 54 uint32_t:5; 55 uint32_t wave_id:4; 56 uint32_t simd_id:2; 57 uint32_t:2; 58 uint32_t queue_id:3; 59 uint32_t:1; 60 uint32_t vm_id:4; 61 } bitfields, bits; 62 uint32_t u32All; 63 signed int i32All; 64 float f32All; 65 }; 66 67 union GRBM_GFX_INDEX_BITS { 68 struct { 69 uint32_t instance_index:8; 70 uint32_t sh_index:8; 71 uint32_t se_index:8; 72 uint32_t:5; 73 uint32_t sh_broadcast_writes:1; 74 uint32_t instance_broadcast_writes:1; 75 uint32_t se_broadcast_writes:1; 76 } bitfields, bits; 77 uint32_t u32All; 78 signed int i32All; 79 float f32All; 80 }; 81 82 /** 83 * struct device_queue_manager_ops 84 * 85 * @create_queue: Queue creation routine. 86 * 87 * @destroy_queue: Queue destruction routine. 88 * 89 * @update_queue: Queue update routine. 90 * 91 * @exeute_queues: Dispatches the queues list to the H/W. 92 * 93 * @register_process: This routine associates a specific process with device. 94 * 95 * @unregister_process: destroys the associations between process to device. 96 * 97 * @initialize: Initializes the pipelines and memory module for that device. 98 * 99 * @start: Initializes the resources/modules the device needs for queues 100 * execution. This function is called on device initialization and after the 101 * system woke up after suspension. 102 * 103 * @stop: This routine stops execution of all the active queue running on the 104 * H/W and basically this function called on system suspend. 105 * 106 * @uninitialize: Destroys all the device queue manager resources allocated in 107 * initialize routine. 108 * 109 * @create_kernel_queue: Creates kernel queue. Used for debug queue. 110 * 111 * @destroy_kernel_queue: Destroys kernel queue. Used for debug queue. 112 * 113 * @set_cache_memory_policy: Sets memory policy (cached/ non cached) for the 114 * memory apertures. 115 * 116 * @process_termination: Clears all process queues belongs to that device. 117 * 118 * @evict_process_queues: Evict all active queues of a process 119 * 120 * @restore_process_queues: Restore all evicted queues of a process 121 * 122 * @get_wave_state: Retrieves context save state and optionally copies the 123 * control stack, if kept in the MQD, to the given userspace address. 124 * 125 * @reset_queues: reset queues which consume RAS poison 126 * @get_queue_checkpoint_info: Retrieves queue size information for CRIU checkpoint. 127 * 128 * @checkpoint_mqd: checkpoint queue MQD contents for CRIU. 129 */ 130 131 struct device_queue_manager_ops { 132 int (*create_queue)(struct device_queue_manager *dqm, 133 struct queue *q, 134 struct qcm_process_device *qpd, 135 const struct kfd_criu_queue_priv_data *qd, 136 const void *restore_mqd, 137 const void *restore_ctl_stack); 138 139 int (*destroy_queue)(struct device_queue_manager *dqm, 140 struct qcm_process_device *qpd, 141 struct queue *q); 142 143 int (*update_queue)(struct device_queue_manager *dqm, 144 struct queue *q, struct mqd_update_info *minfo); 145 146 int (*register_process)(struct device_queue_manager *dqm, 147 struct qcm_process_device *qpd); 148 149 int (*unregister_process)(struct device_queue_manager *dqm, 150 struct qcm_process_device *qpd); 151 152 int (*initialize)(struct device_queue_manager *dqm); 153 int (*start)(struct device_queue_manager *dqm); 154 int (*stop)(struct device_queue_manager *dqm); 155 void (*uninitialize)(struct device_queue_manager *dqm); 156 int (*create_kernel_queue)(struct device_queue_manager *dqm, 157 struct kernel_queue *kq, 158 struct qcm_process_device *qpd); 159 160 void (*destroy_kernel_queue)(struct device_queue_manager *dqm, 161 struct kernel_queue *kq, 162 struct qcm_process_device *qpd); 163 164 bool (*set_cache_memory_policy)(struct device_queue_manager *dqm, 165 struct qcm_process_device *qpd, 166 enum cache_policy default_policy, 167 enum cache_policy alternate_policy, 168 void __user *alternate_aperture_base, 169 uint64_t alternate_aperture_size); 170 171 int (*process_termination)(struct device_queue_manager *dqm, 172 struct qcm_process_device *qpd); 173 174 int (*evict_process_queues)(struct device_queue_manager *dqm, 175 struct qcm_process_device *qpd); 176 int (*restore_process_queues)(struct device_queue_manager *dqm, 177 struct qcm_process_device *qpd); 178 179 int (*get_wave_state)(struct device_queue_manager *dqm, 180 struct queue *q, 181 void __user *ctl_stack, 182 u32 *ctl_stack_used_size, 183 u32 *save_area_used_size); 184 185 int (*reset_queues)(struct device_queue_manager *dqm, 186 uint16_t pasid); 187 void (*get_queue_checkpoint_info)(struct device_queue_manager *dqm, 188 const struct queue *q, u32 *mqd_size, 189 u32 *ctl_stack_size); 190 191 int (*checkpoint_mqd)(struct device_queue_manager *dqm, 192 const struct queue *q, 193 void *mqd, 194 void *ctl_stack); 195 }; 196 197 struct device_queue_manager_asic_ops { 198 int (*update_qpd)(struct device_queue_manager *dqm, 199 struct qcm_process_device *qpd); 200 bool (*set_cache_memory_policy)(struct device_queue_manager *dqm, 201 struct qcm_process_device *qpd, 202 enum cache_policy default_policy, 203 enum cache_policy alternate_policy, 204 void __user *alternate_aperture_base, 205 uint64_t alternate_aperture_size); 206 void (*init_sdma_vm)(struct device_queue_manager *dqm, 207 struct queue *q, 208 struct qcm_process_device *qpd); 209 struct mqd_manager * (*mqd_manager_init)(enum KFD_MQD_TYPE type, 210 struct kfd_node *dev); 211 }; 212 213 /** 214 * struct device_queue_manager 215 * 216 * This struct is a base class for the kfd queues scheduler in the 217 * device level. The device base class should expose the basic operations 218 * for queue creation and queue destruction. This base class hides the 219 * scheduling mode of the driver and the specific implementation of the 220 * concrete device. This class is the only class in the queues scheduler 221 * that configures the H/W. 222 * 223 */ 224 225 struct device_queue_manager { 226 struct device_queue_manager_ops ops; 227 struct device_queue_manager_asic_ops asic_ops; 228 229 struct mqd_manager *mqd_mgrs[KFD_MQD_TYPE_MAX]; 230 struct packet_manager packet_mgr; 231 struct kfd_node *dev; 232 struct mutex lock_hidden; /* use dqm_lock/unlock(dqm) */ 233 struct list_head queues; 234 unsigned int saved_flags; 235 unsigned int processes_count; 236 unsigned int active_queue_count; 237 unsigned int active_cp_queue_count; 238 unsigned int gws_queue_count; 239 unsigned int total_queue_count; 240 unsigned int next_pipe_to_allocate; 241 unsigned int *allocated_queues; 242 DECLARE_BITMAP(sdma_bitmap, KFD_MAX_SDMA_QUEUES); 243 DECLARE_BITMAP(xgmi_sdma_bitmap, KFD_MAX_SDMA_QUEUES); 244 /* the pasid mapping for each kfd vmid */ 245 uint16_t vmid_pasid[VMID_NUM]; 246 uint64_t pipelines_addr; 247 uint64_t fence_gpu_addr; 248 uint64_t *fence_addr; 249 struct kfd_mem_obj *fence_mem; 250 bool active_runlist; 251 int sched_policy; 252 uint32_t trap_debug_vmid; 253 254 /* hw exception */ 255 bool is_hws_hang; 256 bool is_resetting; 257 struct work_struct hw_exception_work; 258 struct kfd_mem_obj hiq_sdma_mqd; 259 bool sched_running; 260 261 /* used for GFX 9.4.3 only */ 262 uint32_t current_logical_xcc_start; 263 264 uint32_t wait_times; 265 266 wait_queue_head_t destroy_wait; 267 }; 268 269 void device_queue_manager_init_cik( 270 struct device_queue_manager_asic_ops *asic_ops); 271 void device_queue_manager_init_vi( 272 struct device_queue_manager_asic_ops *asic_ops); 273 void device_queue_manager_init_v9( 274 struct device_queue_manager_asic_ops *asic_ops); 275 void device_queue_manager_init_v10( 276 struct device_queue_manager_asic_ops *asic_ops); 277 void device_queue_manager_init_v11( 278 struct device_queue_manager_asic_ops *asic_ops); 279 void device_queue_manager_init_v12( 280 struct device_queue_manager_asic_ops *asic_ops); 281 void program_sh_mem_settings(struct device_queue_manager *dqm, 282 struct qcm_process_device *qpd); 283 unsigned int get_cp_queues_num(struct device_queue_manager *dqm); 284 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm); 285 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm); 286 unsigned int get_num_sdma_queues(struct device_queue_manager *dqm); 287 unsigned int get_num_xgmi_sdma_queues(struct device_queue_manager *dqm); 288 int reserve_debug_trap_vmid(struct device_queue_manager *dqm, 289 struct qcm_process_device *qpd); 290 int release_debug_trap_vmid(struct device_queue_manager *dqm, 291 struct qcm_process_device *qpd); 292 int suspend_queues(struct kfd_process *p, 293 uint32_t num_queues, 294 uint32_t grace_period, 295 uint64_t exception_clear_mask, 296 uint32_t *usr_queue_id_array); 297 int resume_queues(struct kfd_process *p, 298 uint32_t num_queues, 299 uint32_t *usr_queue_id_array); 300 void set_queue_snapshot_entry(struct queue *q, 301 uint64_t exception_clear_mask, 302 struct kfd_queue_snapshot_entry *qss_entry); 303 int debug_lock_and_unmap(struct device_queue_manager *dqm); 304 int debug_map_and_unlock(struct device_queue_manager *dqm); 305 int debug_refresh_runlist(struct device_queue_manager *dqm); 306 307 static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) 308 { 309 return (pdd->lds_base >> 16) & 0xFF; 310 } 311 312 static inline unsigned int 313 get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd) 314 { 315 return (pdd->lds_base >> 60) & 0x0E; 316 } 317 318 /* The DQM lock can be taken in MMU notifiers. Make sure no reclaim-FS 319 * happens while holding this lock anywhere to prevent deadlocks when 320 * an MMU notifier runs in reclaim-FS context. 321 */ 322 static inline void dqm_lock(struct device_queue_manager *dqm) 323 { 324 mutex_lock(&dqm->lock_hidden); 325 dqm->saved_flags = memalloc_noreclaim_save(); 326 } 327 static inline void dqm_unlock(struct device_queue_manager *dqm) 328 { 329 memalloc_noreclaim_restore(dqm->saved_flags); 330 mutex_unlock(&dqm->lock_hidden); 331 } 332 333 static inline int read_sdma_queue_counter(uint64_t __user *q_rptr, uint64_t *val) 334 { 335 /* SDMA activity counter is stored at queue's RPTR + 0x8 location. */ 336 return get_user(*val, q_rptr + 1); 337 } 338 #endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */ 339