1 /* 2 * Copyright 2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include "kfd_debug.h" 24 #include "kfd_device_queue_manager.h" 25 #include "kfd_topology.h" 26 #include <linux/file.h> 27 #include <uapi/linux/kfd_ioctl.h> 28 #include <uapi/linux/kfd_sysfs.h> 29 30 #define MAX_WATCH_ADDRESSES 4 31 32 int kfd_dbg_ev_query_debug_event(struct kfd_process *process, 33 unsigned int *queue_id, 34 unsigned int *gpu_id, 35 uint64_t exception_clear_mask, 36 uint64_t *event_status) 37 { 38 struct process_queue_manager *pqm; 39 struct process_queue_node *pqn; 40 int i; 41 42 if (!(process && process->debug_trap_enabled)) 43 return -ENODATA; 44 45 mutex_lock(&process->event_mutex); 46 *event_status = 0; 47 *queue_id = 0; 48 *gpu_id = 0; 49 50 /* find and report queue events */ 51 pqm = &process->pqm; 52 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 53 uint64_t tmp = process->exception_enable_mask; 54 55 if (!pqn->q) 56 continue; 57 58 tmp &= pqn->q->properties.exception_status; 59 60 if (!tmp) 61 continue; 62 63 *event_status = pqn->q->properties.exception_status; 64 *queue_id = pqn->q->properties.queue_id; 65 *gpu_id = pqn->q->device->id; 66 pqn->q->properties.exception_status &= ~exception_clear_mask; 67 goto out; 68 } 69 70 /* find and report device events */ 71 for (i = 0; i < process->n_pdds; i++) { 72 struct kfd_process_device *pdd = process->pdds[i]; 73 uint64_t tmp = process->exception_enable_mask 74 & pdd->exception_status; 75 76 if (!tmp) 77 continue; 78 79 *event_status = pdd->exception_status; 80 *gpu_id = pdd->dev->id; 81 pdd->exception_status &= ~exception_clear_mask; 82 goto out; 83 } 84 85 /* report process events */ 86 if (process->exception_enable_mask & process->exception_status) { 87 *event_status = process->exception_status; 88 process->exception_status &= ~exception_clear_mask; 89 } 90 91 out: 92 mutex_unlock(&process->event_mutex); 93 return *event_status ? 0 : -EAGAIN; 94 } 95 96 void debug_event_write_work_handler(struct work_struct *work) 97 { 98 struct kfd_process *process; 99 100 static const char write_data = '.'; 101 loff_t pos = 0; 102 103 process = container_of(work, 104 struct kfd_process, 105 debug_event_workarea); 106 107 if (process->debug_trap_enabled && process->dbg_ev_file) 108 kernel_write(process->dbg_ev_file, &write_data, 1, &pos); 109 } 110 111 /* update process/device/queue exception status, write to descriptor 112 * only if exception_status is enabled. 113 */ 114 bool kfd_dbg_ev_raise(uint64_t event_mask, 115 struct kfd_process *process, struct kfd_node *dev, 116 unsigned int source_id, bool use_worker, 117 void *exception_data, size_t exception_data_size) 118 { 119 struct process_queue_manager *pqm; 120 struct process_queue_node *pqn; 121 int i; 122 static const char write_data = '.'; 123 loff_t pos = 0; 124 bool is_subscribed = true; 125 126 if (!(process && process->debug_trap_enabled)) 127 return false; 128 129 mutex_lock(&process->event_mutex); 130 131 if (event_mask & KFD_EC_MASK_DEVICE) { 132 for (i = 0; i < process->n_pdds; i++) { 133 struct kfd_process_device *pdd = process->pdds[i]; 134 135 if (pdd->dev != dev) 136 continue; 137 138 pdd->exception_status |= event_mask & KFD_EC_MASK_DEVICE; 139 140 if (event_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 141 if (!pdd->vm_fault_exc_data) { 142 pdd->vm_fault_exc_data = kmemdup( 143 exception_data, 144 exception_data_size, 145 GFP_KERNEL); 146 if (!pdd->vm_fault_exc_data) 147 pr_debug("Failed to allocate exception data memory"); 148 } else { 149 pr_debug("Debugger exception data not saved\n"); 150 print_hex_dump_bytes("exception data: ", 151 DUMP_PREFIX_OFFSET, 152 exception_data, 153 exception_data_size); 154 } 155 } 156 break; 157 } 158 } else if (event_mask & KFD_EC_MASK_PROCESS) { 159 process->exception_status |= event_mask & KFD_EC_MASK_PROCESS; 160 } else { 161 pqm = &process->pqm; 162 list_for_each_entry(pqn, &pqm->queues, 163 process_queue_list) { 164 int target_id; 165 166 if (!pqn->q) 167 continue; 168 169 target_id = event_mask & KFD_EC_MASK(EC_QUEUE_NEW) ? 170 pqn->q->properties.queue_id : 171 pqn->q->doorbell_id; 172 173 if (pqn->q->device != dev || target_id != source_id) 174 continue; 175 176 pqn->q->properties.exception_status |= event_mask; 177 break; 178 } 179 } 180 181 if (process->exception_enable_mask & event_mask) { 182 if (use_worker) 183 schedule_work(&process->debug_event_workarea); 184 else 185 kernel_write(process->dbg_ev_file, 186 &write_data, 187 1, 188 &pos); 189 } else { 190 is_subscribed = false; 191 } 192 193 mutex_unlock(&process->event_mutex); 194 195 return is_subscribed; 196 } 197 198 /* set pending event queue entry from ring entry */ 199 bool kfd_set_dbg_ev_from_interrupt(struct kfd_node *dev, 200 unsigned int pasid, 201 uint32_t doorbell_id, 202 uint64_t trap_mask, 203 void *exception_data, 204 size_t exception_data_size) 205 { 206 struct kfd_process *p; 207 struct kfd_process_device *pdd = NULL; 208 bool signaled_to_debugger_or_runtime = false; 209 210 p = kfd_lookup_process_by_pasid(pasid, &pdd); 211 212 if (!pdd) 213 return false; 214 215 if (!kfd_dbg_ev_raise(trap_mask, p, dev, doorbell_id, true, 216 exception_data, exception_data_size)) { 217 struct process_queue_manager *pqm; 218 struct process_queue_node *pqn; 219 220 if (!!(trap_mask & KFD_EC_MASK_QUEUE) && 221 p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) { 222 mutex_lock(&p->mutex); 223 224 pqm = &p->pqm; 225 list_for_each_entry(pqn, &pqm->queues, 226 process_queue_list) { 227 228 if (!(pqn->q && pqn->q->device == dev && 229 pqn->q->doorbell_id == doorbell_id)) 230 continue; 231 232 kfd_send_exception_to_runtime(p, pqn->q->properties.queue_id, 233 trap_mask); 234 235 signaled_to_debugger_or_runtime = true; 236 237 break; 238 } 239 240 mutex_unlock(&p->mutex); 241 } else if (trap_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 242 kfd_evict_process_device(pdd); 243 kfd_signal_vm_fault_event(pdd, NULL, exception_data); 244 245 signaled_to_debugger_or_runtime = true; 246 } 247 } else { 248 signaled_to_debugger_or_runtime = true; 249 } 250 251 kfd_unref_process(p); 252 253 return signaled_to_debugger_or_runtime; 254 } 255 256 int kfd_dbg_send_exception_to_runtime(struct kfd_process *p, 257 unsigned int dev_id, 258 unsigned int queue_id, 259 uint64_t error_reason) 260 { 261 if (error_reason & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 262 struct kfd_process_device *pdd = NULL; 263 struct kfd_hsa_memory_exception_data *data; 264 int i; 265 266 for (i = 0; i < p->n_pdds; i++) { 267 if (p->pdds[i]->dev->id == dev_id) { 268 pdd = p->pdds[i]; 269 break; 270 } 271 } 272 273 if (!pdd) 274 return -ENODEV; 275 276 data = (struct kfd_hsa_memory_exception_data *) 277 pdd->vm_fault_exc_data; 278 279 kfd_evict_process_device(pdd); 280 kfd_signal_vm_fault_event(pdd, NULL, data); 281 error_reason &= ~KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION); 282 } 283 284 if (error_reason & (KFD_EC_MASK(EC_PROCESS_RUNTIME))) { 285 /* 286 * block should only happen after the debugger receives runtime 287 * enable notice. 288 */ 289 up(&p->runtime_enable_sema); 290 error_reason &= ~KFD_EC_MASK(EC_PROCESS_RUNTIME); 291 } 292 293 if (error_reason) 294 return kfd_send_exception_to_runtime(p, queue_id, error_reason); 295 296 return 0; 297 } 298 299 static int kfd_dbg_set_queue_workaround(struct queue *q, bool enable) 300 { 301 struct mqd_update_info minfo = {0}; 302 int err; 303 304 if (!q) 305 return 0; 306 307 if (!kfd_dbg_has_cwsr_workaround(q->device)) 308 return 0; 309 310 if (enable && q->properties.is_user_cu_masked) 311 return -EBUSY; 312 313 minfo.update_flag = enable ? UPDATE_FLAG_DBG_WA_ENABLE : UPDATE_FLAG_DBG_WA_DISABLE; 314 315 q->properties.is_dbg_wa = enable; 316 err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo); 317 if (err) 318 q->properties.is_dbg_wa = false; 319 320 return err; 321 } 322 323 static int kfd_dbg_set_workaround(struct kfd_process *target, bool enable) 324 { 325 struct process_queue_manager *pqm = &target->pqm; 326 struct process_queue_node *pqn; 327 int r = 0; 328 329 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 330 r = kfd_dbg_set_queue_workaround(pqn->q, enable); 331 if (enable && r) 332 goto unwind; 333 } 334 335 return 0; 336 337 unwind: 338 list_for_each_entry(pqn, &pqm->queues, process_queue_list) 339 kfd_dbg_set_queue_workaround(pqn->q, false); 340 341 if (enable) 342 target->runtime_info.runtime_state = r == -EBUSY ? 343 DEBUG_RUNTIME_STATE_ENABLED_BUSY : 344 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 345 346 return r; 347 } 348 349 int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en) 350 { 351 uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode; 352 uint32_t flags = pdd->process->dbg_flags; 353 struct amdgpu_device *adev = pdd->dev->adev; 354 int r; 355 356 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 357 return 0; 358 359 if (!pdd->proc_ctx_cpu_ptr) { 360 r = amdgpu_amdkfd_alloc_gtt_mem(adev, 361 AMDGPU_MES_PROC_CTX_SIZE, 362 &pdd->proc_ctx_bo, 363 &pdd->proc_ctx_gpu_addr, 364 &pdd->proc_ctx_cpu_ptr, 365 false); 366 if (r) { 367 dev_err(adev->dev, 368 "failed to allocate process context bo\n"); 369 return r; 370 } 371 memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE); 372 } 373 374 return amdgpu_mes_set_shader_debugger(pdd->dev->adev, 375 pdd->proc_ctx_gpu_addr, spi_dbg_cntl, 376 pdd->watch_points, flags, sq_trap_en, 377 ffs(pdd->dev->xcc_mask) - 1); 378 } 379 380 #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1 381 static int kfd_dbg_get_dev_watch_id(struct kfd_process_device *pdd, int *watch_id) 382 { 383 int i; 384 385 *watch_id = KFD_DEBUGGER_INVALID_WATCH_POINT_ID; 386 387 spin_lock(&pdd->dev->watch_points_lock); 388 389 for (i = 0; i < MAX_WATCH_ADDRESSES; i++) { 390 /* device watchpoint in use so skip */ 391 if ((pdd->dev->alloc_watch_ids >> i) & 0x1) 392 continue; 393 394 pdd->alloc_watch_ids |= 0x1 << i; 395 pdd->dev->alloc_watch_ids |= 0x1 << i; 396 *watch_id = i; 397 spin_unlock(&pdd->dev->watch_points_lock); 398 return 0; 399 } 400 401 spin_unlock(&pdd->dev->watch_points_lock); 402 403 return -ENOMEM; 404 } 405 406 static void kfd_dbg_clear_dev_watch_id(struct kfd_process_device *pdd, int watch_id) 407 { 408 spin_lock(&pdd->dev->watch_points_lock); 409 410 /* process owns device watch point so safe to clear */ 411 if ((pdd->alloc_watch_ids >> watch_id) & 0x1) { 412 pdd->alloc_watch_ids &= ~(0x1 << watch_id); 413 pdd->dev->alloc_watch_ids &= ~(0x1 << watch_id); 414 } 415 416 spin_unlock(&pdd->dev->watch_points_lock); 417 } 418 419 static bool kfd_dbg_owns_dev_watch_id(struct kfd_process_device *pdd, int watch_id) 420 { 421 bool owns_watch_id = false; 422 423 spin_lock(&pdd->dev->watch_points_lock); 424 owns_watch_id = watch_id < MAX_WATCH_ADDRESSES && 425 ((pdd->alloc_watch_ids >> watch_id) & 0x1); 426 427 spin_unlock(&pdd->dev->watch_points_lock); 428 429 return owns_watch_id; 430 } 431 432 int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd, 433 uint32_t watch_id) 434 { 435 int r; 436 437 if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id)) 438 return -EINVAL; 439 440 if (!pdd->dev->kfd->shared_resources.enable_mes) { 441 r = debug_lock_and_unmap(pdd->dev->dqm); 442 if (r) 443 return r; 444 } 445 446 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 447 pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch( 448 pdd->dev->adev, 449 watch_id); 450 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 451 452 if (!pdd->dev->kfd->shared_resources.enable_mes) 453 r = debug_map_and_unlock(pdd->dev->dqm); 454 else 455 r = kfd_dbg_set_mes_debug_mode(pdd, true); 456 457 kfd_dbg_clear_dev_watch_id(pdd, watch_id); 458 459 return r; 460 } 461 462 int kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device *pdd, 463 uint64_t watch_address, 464 uint32_t watch_address_mask, 465 uint32_t *watch_id, 466 uint32_t watch_mode) 467 { 468 int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id); 469 uint32_t xcc_mask = pdd->dev->xcc_mask; 470 471 if (r) 472 return r; 473 474 if (!pdd->dev->kfd->shared_resources.enable_mes) { 475 r = debug_lock_and_unmap(pdd->dev->dqm); 476 if (r) { 477 kfd_dbg_clear_dev_watch_id(pdd, *watch_id); 478 return r; 479 } 480 } 481 482 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 483 for_each_inst(xcc_id, xcc_mask) 484 pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch( 485 pdd->dev->adev, 486 watch_address, 487 watch_address_mask, 488 *watch_id, 489 watch_mode, 490 pdd->dev->vm_info.last_vmid_kfd, 491 xcc_id); 492 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 493 494 if (!pdd->dev->kfd->shared_resources.enable_mes) 495 r = debug_map_and_unlock(pdd->dev->dqm); 496 else 497 r = kfd_dbg_set_mes_debug_mode(pdd, true); 498 499 /* HWS is broken so no point in HW rollback but release the watchpoint anyways */ 500 if (r) 501 kfd_dbg_clear_dev_watch_id(pdd, *watch_id); 502 503 return 0; 504 } 505 506 static void kfd_dbg_clear_process_address_watch(struct kfd_process *target) 507 { 508 int i, j; 509 510 for (i = 0; i < target->n_pdds; i++) 511 for (j = 0; j < MAX_WATCH_ADDRESSES; j++) 512 kfd_dbg_trap_clear_dev_address_watch(target->pdds[i], j); 513 } 514 515 int kfd_dbg_trap_set_flags(struct kfd_process *target, uint32_t *flags) 516 { 517 uint32_t prev_flags = target->dbg_flags; 518 int i, r = 0, rewind_count = 0; 519 520 for (i = 0; i < target->n_pdds; i++) { 521 struct kfd_topology_device *topo_dev = 522 kfd_topology_device_by_id(target->pdds[i]->dev->id); 523 uint32_t caps = topo_dev->node_props.capability; 524 uint32_t caps2 = topo_dev->node_props.capability2; 525 526 if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED) && 527 (*flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP)) { 528 *flags = prev_flags; 529 return -EACCES; 530 } 531 532 if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED) && 533 (*flags & KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP)) { 534 *flags = prev_flags; 535 return -EACCES; 536 } 537 538 if (!(caps2 & HSA_CAP2_TRAP_DEBUG_LDS_OUT_OF_ADDR_RANGE_SUPPORTED) && 539 (*flags & KFD_DBG_TRAP_FLAG_LDS_OUT_OF_ADDR_RANGE)) { 540 *flags = prev_flags; 541 return -EACCES; 542 } 543 } 544 545 target->dbg_flags = *flags; 546 *flags = prev_flags; 547 for (i = 0; i < target->n_pdds; i++) { 548 struct kfd_process_device *pdd = target->pdds[i]; 549 550 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 551 continue; 552 553 if (!pdd->dev->kfd->shared_resources.enable_mes) 554 r = debug_refresh_runlist(pdd->dev->dqm); 555 else 556 r = kfd_dbg_set_mes_debug_mode(pdd, true); 557 558 if (r) { 559 target->dbg_flags = prev_flags; 560 break; 561 } 562 563 rewind_count++; 564 } 565 566 /* Rewind flags */ 567 if (r) { 568 target->dbg_flags = prev_flags; 569 570 for (i = 0; i < rewind_count; i++) { 571 struct kfd_process_device *pdd = target->pdds[i]; 572 573 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 574 continue; 575 576 if (!pdd->dev->kfd->shared_resources.enable_mes) 577 debug_refresh_runlist(pdd->dev->dqm); 578 else 579 kfd_dbg_set_mes_debug_mode(pdd, true); 580 } 581 } 582 583 return r; 584 } 585 586 /* kfd_dbg_trap_deactivate: 587 * target: target process 588 * unwind: If this is unwinding a failed kfd_dbg_trap_enable() 589 * unwind_count: 590 * If unwind == true, how far down the pdd list we need 591 * to unwind 592 * else: ignored 593 */ 594 void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind_count) 595 { 596 int i; 597 598 if (!unwind) { 599 uint32_t flags = 0; 600 int resume_count = resume_queues(target, 0, NULL); 601 602 if (resume_count) 603 pr_debug("Resumed %d queues\n", resume_count); 604 605 cancel_work_sync(&target->debug_event_workarea); 606 kfd_dbg_clear_process_address_watch(target); 607 kfd_dbg_trap_set_wave_launch_mode(target, 0); 608 609 kfd_dbg_trap_set_flags(target, &flags); 610 } 611 612 for (i = 0; i < target->n_pdds; i++) { 613 struct kfd_process_device *pdd = target->pdds[i]; 614 615 /* If this is an unwind, and we have unwound the required 616 * enable calls on the pdd list, we need to stop now 617 * otherwise we may mess up another debugger session. 618 */ 619 if (unwind && i == unwind_count) 620 break; 621 622 kfd_process_set_trap_debug_flag(&pdd->qpd, false); 623 624 /* GFX off is already disabled by debug activate if not RLC restore supported. */ 625 if (kfd_dbg_is_rlc_restore_supported(pdd->dev)) 626 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 627 pdd->spi_dbg_override = 628 pdd->dev->kfd2kgd->disable_debug_trap( 629 pdd->dev->adev, 630 target->runtime_info.ttmp_setup, 631 pdd->dev->vm_info.last_vmid_kfd); 632 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 633 634 if (!kfd_dbg_is_per_vmid_supported(pdd->dev) && 635 release_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd)) 636 pr_err("Failed to release debug vmid on [%i]\n", pdd->dev->id); 637 638 if (!pdd->dev->kfd->shared_resources.enable_mes) 639 debug_refresh_runlist(pdd->dev->dqm); 640 else 641 kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 642 } 643 644 kfd_dbg_set_workaround(target, false); 645 } 646 647 static void kfd_dbg_clean_exception_status(struct kfd_process *target) 648 { 649 struct process_queue_manager *pqm; 650 struct process_queue_node *pqn; 651 int i; 652 653 for (i = 0; i < target->n_pdds; i++) { 654 struct kfd_process_device *pdd = target->pdds[i]; 655 656 kfd_process_drain_interrupts(pdd); 657 658 pdd->exception_status = 0; 659 } 660 661 pqm = &target->pqm; 662 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 663 if (!pqn->q) 664 continue; 665 666 pqn->q->properties.exception_status = 0; 667 } 668 669 target->exception_status = 0; 670 } 671 672 int kfd_dbg_trap_disable(struct kfd_process *target) 673 { 674 if (!target->debug_trap_enabled) 675 return 0; 676 677 /* 678 * Defer deactivation to runtime if runtime not enabled otherwise reset 679 * attached running target runtime state to enable for re-attach. 680 */ 681 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) 682 kfd_dbg_trap_deactivate(target, false, 0); 683 else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 684 target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 685 686 cancel_work_sync(&target->debug_event_workarea); 687 fput(target->dbg_ev_file); 688 target->dbg_ev_file = NULL; 689 690 if (target->debugger_process) { 691 atomic_dec(&target->debugger_process->debugged_process_count); 692 target->debugger_process = NULL; 693 } 694 695 target->debug_trap_enabled = false; 696 kfd_dbg_clean_exception_status(target); 697 kfd_unref_process(target); 698 699 return 0; 700 } 701 702 int kfd_dbg_trap_activate(struct kfd_process *target) 703 { 704 int i, r = 0; 705 706 r = kfd_dbg_set_workaround(target, true); 707 if (r) 708 return r; 709 710 for (i = 0; i < target->n_pdds; i++) { 711 struct kfd_process_device *pdd = target->pdds[i]; 712 713 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) { 714 r = reserve_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd); 715 716 if (r) { 717 target->runtime_info.runtime_state = (r == -EBUSY) ? 718 DEBUG_RUNTIME_STATE_ENABLED_BUSY : 719 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 720 721 goto unwind_err; 722 } 723 } 724 725 /* Disable GFX OFF to prevent garbage read/writes to debug registers. 726 * If RLC restore of debug registers is not supported and runtime enable 727 * hasn't done so already on ttmp setup request, restore the trap config registers. 728 * 729 * If RLC restore of debug registers is not supported, keep gfx off disabled for 730 * the debug session. 731 */ 732 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 733 if (!(kfd_dbg_is_rlc_restore_supported(pdd->dev) || 734 target->runtime_info.ttmp_setup)) 735 pdd->dev->kfd2kgd->enable_debug_trap(pdd->dev->adev, true, 736 pdd->dev->vm_info.last_vmid_kfd); 737 738 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 739 pdd->dev->adev, 740 false, 741 pdd->dev->vm_info.last_vmid_kfd); 742 743 if (kfd_dbg_is_rlc_restore_supported(pdd->dev)) 744 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 745 746 /* 747 * Setting the debug flag in the trap handler requires that the TMA has been 748 * allocated, which occurs during CWSR initialization. 749 * In the event that CWSR has not been initialized at this point, setting the 750 * flag will be called again during CWSR initialization if the target process 751 * is still debug enabled. 752 */ 753 kfd_process_set_trap_debug_flag(&pdd->qpd, true); 754 755 if (!pdd->dev->kfd->shared_resources.enable_mes) 756 r = debug_refresh_runlist(pdd->dev->dqm); 757 else 758 r = kfd_dbg_set_mes_debug_mode(pdd, true); 759 760 if (r) { 761 target->runtime_info.runtime_state = 762 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 763 goto unwind_err; 764 } 765 } 766 767 return 0; 768 769 unwind_err: 770 /* Enabling debug failed, we need to disable on 771 * all GPUs so the enable is all or nothing. 772 */ 773 kfd_dbg_trap_deactivate(target, true, i); 774 return r; 775 } 776 777 int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd, 778 void __user *runtime_info, uint32_t *runtime_size) 779 { 780 struct file *f; 781 uint32_t copy_size; 782 int i, r = 0; 783 784 if (target->debug_trap_enabled) 785 return -EALREADY; 786 787 /* Enable pre-checks */ 788 for (i = 0; i < target->n_pdds; i++) { 789 struct kfd_process_device *pdd = target->pdds[i]; 790 791 if (!KFD_IS_SOC15(pdd->dev)) 792 return -ENODEV; 793 794 if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) || 795 kfd_dbg_has_cwsr_workaround(pdd->dev))) 796 return -EBUSY; 797 } 798 799 copy_size = min((size_t)(*runtime_size), sizeof(target->runtime_info)); 800 801 f = fget(fd); 802 if (!f) { 803 pr_err("Failed to get file for (%i)\n", fd); 804 return -EBADF; 805 } 806 807 target->dbg_ev_file = f; 808 809 /* defer activation to runtime if not runtime enabled */ 810 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) 811 kfd_dbg_trap_activate(target); 812 813 /* We already hold the process reference but hold another one for the 814 * debug session. 815 */ 816 kref_get(&target->ref); 817 target->debug_trap_enabled = true; 818 819 if (target->debugger_process) 820 atomic_inc(&target->debugger_process->debugged_process_count); 821 822 if (copy_to_user(runtime_info, (void *)&target->runtime_info, copy_size)) { 823 kfd_dbg_trap_deactivate(target, false, 0); 824 r = -EFAULT; 825 } 826 827 *runtime_size = sizeof(target->runtime_info); 828 829 return r; 830 } 831 832 static int kfd_dbg_validate_trap_override_request(struct kfd_process *p, 833 uint32_t trap_override, 834 uint32_t trap_mask_request, 835 uint32_t *trap_mask_supported) 836 { 837 int i = 0; 838 839 *trap_mask_supported = 0xffffffff; 840 841 for (i = 0; i < p->n_pdds; i++) { 842 struct kfd_process_device *pdd = p->pdds[i]; 843 int err = pdd->dev->kfd2kgd->validate_trap_override_request( 844 pdd->dev->adev, 845 trap_override, 846 trap_mask_supported); 847 848 if (err) 849 return err; 850 } 851 852 if (trap_mask_request & ~*trap_mask_supported) 853 return -EACCES; 854 855 return 0; 856 } 857 858 int kfd_dbg_trap_set_wave_launch_override(struct kfd_process *target, 859 uint32_t trap_override, 860 uint32_t trap_mask_bits, 861 uint32_t trap_mask_request, 862 uint32_t *trap_mask_prev, 863 uint32_t *trap_mask_supported) 864 { 865 int r = 0, i; 866 867 r = kfd_dbg_validate_trap_override_request(target, 868 trap_override, 869 trap_mask_request, 870 trap_mask_supported); 871 872 if (r) 873 return r; 874 875 for (i = 0; i < target->n_pdds; i++) { 876 struct kfd_process_device *pdd = target->pdds[i]; 877 878 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 879 pdd->spi_dbg_override = pdd->dev->kfd2kgd->set_wave_launch_trap_override( 880 pdd->dev->adev, 881 pdd->dev->vm_info.last_vmid_kfd, 882 trap_override, 883 trap_mask_bits, 884 trap_mask_request, 885 trap_mask_prev, 886 pdd->spi_dbg_override); 887 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 888 889 if (!pdd->dev->kfd->shared_resources.enable_mes) 890 r = debug_refresh_runlist(pdd->dev->dqm); 891 else 892 r = kfd_dbg_set_mes_debug_mode(pdd, true); 893 894 if (r) 895 break; 896 } 897 898 return r; 899 } 900 901 int kfd_dbg_trap_set_wave_launch_mode(struct kfd_process *target, 902 uint8_t wave_launch_mode) 903 { 904 int r = 0, i; 905 906 if (wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL && 907 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT && 908 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG) 909 return -EINVAL; 910 911 for (i = 0; i < target->n_pdds; i++) { 912 struct kfd_process_device *pdd = target->pdds[i]; 913 914 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 915 pdd->spi_dbg_launch_mode = pdd->dev->kfd2kgd->set_wave_launch_mode( 916 pdd->dev->adev, 917 wave_launch_mode, 918 pdd->dev->vm_info.last_vmid_kfd); 919 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 920 921 if (!pdd->dev->kfd->shared_resources.enable_mes) 922 r = debug_refresh_runlist(pdd->dev->dqm); 923 else 924 r = kfd_dbg_set_mes_debug_mode(pdd, true); 925 926 if (r) 927 break; 928 } 929 930 return r; 931 } 932 933 int kfd_dbg_trap_query_exception_info(struct kfd_process *target, 934 uint32_t source_id, 935 uint32_t exception_code, 936 bool clear_exception, 937 void __user *info, 938 uint32_t *info_size) 939 { 940 bool found = false; 941 int r = 0; 942 uint32_t copy_size, actual_info_size = 0; 943 uint64_t *exception_status_ptr = NULL; 944 945 if (!target) 946 return -EINVAL; 947 948 if (!info || !info_size) 949 return -EINVAL; 950 951 mutex_lock(&target->event_mutex); 952 953 if (KFD_DBG_EC_TYPE_IS_QUEUE(exception_code)) { 954 /* Per queue exceptions */ 955 struct queue *queue = NULL; 956 int i; 957 958 for (i = 0; i < target->n_pdds; i++) { 959 struct kfd_process_device *pdd = target->pdds[i]; 960 struct qcm_process_device *qpd = &pdd->qpd; 961 962 list_for_each_entry(queue, &qpd->queues_list, list) { 963 if (!found && queue->properties.queue_id == source_id) { 964 found = true; 965 break; 966 } 967 } 968 if (found) 969 break; 970 } 971 972 if (!found) { 973 r = -EINVAL; 974 goto out; 975 } 976 977 if (!(queue->properties.exception_status & KFD_EC_MASK(exception_code))) { 978 r = -ENODATA; 979 goto out; 980 } 981 exception_status_ptr = &queue->properties.exception_status; 982 } else if (KFD_DBG_EC_TYPE_IS_DEVICE(exception_code)) { 983 /* Per device exceptions */ 984 struct kfd_process_device *pdd = NULL; 985 int i; 986 987 for (i = 0; i < target->n_pdds; i++) { 988 pdd = target->pdds[i]; 989 if (pdd->dev->id == source_id) { 990 found = true; 991 break; 992 } 993 } 994 995 if (!found) { 996 r = -EINVAL; 997 goto out; 998 } 999 1000 if (!(pdd->exception_status & KFD_EC_MASK(exception_code))) { 1001 r = -ENODATA; 1002 goto out; 1003 } 1004 1005 if (exception_code == EC_DEVICE_MEMORY_VIOLATION) { 1006 copy_size = min((size_t)(*info_size), pdd->vm_fault_exc_data_size); 1007 1008 if (copy_to_user(info, pdd->vm_fault_exc_data, copy_size)) { 1009 r = -EFAULT; 1010 goto out; 1011 } 1012 actual_info_size = pdd->vm_fault_exc_data_size; 1013 if (clear_exception) { 1014 kfree(pdd->vm_fault_exc_data); 1015 pdd->vm_fault_exc_data = NULL; 1016 pdd->vm_fault_exc_data_size = 0; 1017 } 1018 } 1019 exception_status_ptr = &pdd->exception_status; 1020 } else if (KFD_DBG_EC_TYPE_IS_PROCESS(exception_code)) { 1021 /* Per process exceptions */ 1022 if (!(target->exception_status & KFD_EC_MASK(exception_code))) { 1023 r = -ENODATA; 1024 goto out; 1025 } 1026 1027 if (exception_code == EC_PROCESS_RUNTIME) { 1028 copy_size = min((size_t)(*info_size), sizeof(target->runtime_info)); 1029 1030 if (copy_to_user(info, (void *)&target->runtime_info, copy_size)) { 1031 r = -EFAULT; 1032 goto out; 1033 } 1034 1035 actual_info_size = sizeof(target->runtime_info); 1036 } 1037 1038 exception_status_ptr = &target->exception_status; 1039 } else { 1040 pr_debug("Bad exception type [%i]\n", exception_code); 1041 r = -EINVAL; 1042 goto out; 1043 } 1044 1045 *info_size = actual_info_size; 1046 if (clear_exception) 1047 *exception_status_ptr &= ~KFD_EC_MASK(exception_code); 1048 out: 1049 mutex_unlock(&target->event_mutex); 1050 return r; 1051 } 1052 1053 int kfd_dbg_trap_device_snapshot(struct kfd_process *target, 1054 uint64_t exception_clear_mask, 1055 void __user *user_info, 1056 uint32_t *number_of_device_infos, 1057 uint32_t *entry_size) 1058 { 1059 struct kfd_dbg_device_info_entry device_info; 1060 uint32_t tmp_entry_size, tmp_num_devices; 1061 int i, r = 0; 1062 1063 if (!(target && user_info && number_of_device_infos && entry_size)) 1064 return -EINVAL; 1065 1066 tmp_entry_size = *entry_size; 1067 1068 tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds); 1069 *number_of_device_infos = target->n_pdds; 1070 *entry_size = min_t(size_t, *entry_size, sizeof(device_info)); 1071 1072 if (!tmp_num_devices) 1073 return 0; 1074 1075 memset(&device_info, 0, sizeof(device_info)); 1076 1077 mutex_lock(&target->event_mutex); 1078 1079 /* Run over all pdd of the process */ 1080 for (i = 0; i < tmp_num_devices; i++) { 1081 struct kfd_process_device *pdd = target->pdds[i]; 1082 struct kfd_topology_device *topo_dev = kfd_topology_device_by_id(pdd->dev->id); 1083 1084 device_info.gpu_id = pdd->dev->id; 1085 device_info.exception_status = pdd->exception_status; 1086 device_info.lds_base = pdd->lds_base; 1087 device_info.lds_limit = pdd->lds_limit; 1088 device_info.scratch_base = pdd->scratch_base; 1089 device_info.scratch_limit = pdd->scratch_limit; 1090 device_info.gpuvm_base = pdd->gpuvm_base; 1091 device_info.gpuvm_limit = pdd->gpuvm_limit; 1092 device_info.location_id = topo_dev->node_props.location_id; 1093 device_info.vendor_id = topo_dev->node_props.vendor_id; 1094 device_info.device_id = topo_dev->node_props.device_id; 1095 device_info.revision_id = pdd->dev->adev->pdev->revision; 1096 device_info.subsystem_vendor_id = pdd->dev->adev->pdev->subsystem_vendor; 1097 device_info.subsystem_device_id = pdd->dev->adev->pdev->subsystem_device; 1098 device_info.fw_version = pdd->dev->kfd->mec_fw_version; 1099 device_info.gfx_target_version = 1100 topo_dev->node_props.gfx_target_version; 1101 device_info.simd_count = topo_dev->node_props.simd_count; 1102 device_info.max_waves_per_simd = 1103 topo_dev->node_props.max_waves_per_simd; 1104 device_info.array_count = topo_dev->node_props.array_count; 1105 device_info.simd_arrays_per_engine = 1106 topo_dev->node_props.simd_arrays_per_engine; 1107 device_info.num_xcc = NUM_XCC(pdd->dev->xcc_mask); 1108 device_info.capability = topo_dev->node_props.capability; 1109 device_info.debug_prop = topo_dev->node_props.debug_prop; 1110 1111 if (exception_clear_mask) 1112 pdd->exception_status &= ~exception_clear_mask; 1113 1114 if (copy_to_user(user_info, &device_info, *entry_size)) { 1115 r = -EFAULT; 1116 break; 1117 } 1118 1119 user_info += tmp_entry_size; 1120 } 1121 1122 mutex_unlock(&target->event_mutex); 1123 1124 return r; 1125 } 1126 1127 void kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process *target, 1128 uint64_t exception_set_mask) 1129 { 1130 uint64_t found_mask = 0; 1131 struct process_queue_manager *pqm; 1132 struct process_queue_node *pqn; 1133 static const char write_data = '.'; 1134 loff_t pos = 0; 1135 int i; 1136 1137 mutex_lock(&target->event_mutex); 1138 1139 found_mask |= target->exception_status; 1140 1141 pqm = &target->pqm; 1142 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1143 if (!pqn->q) 1144 continue; 1145 1146 found_mask |= pqn->q->properties.exception_status; 1147 } 1148 1149 for (i = 0; i < target->n_pdds; i++) { 1150 struct kfd_process_device *pdd = target->pdds[i]; 1151 1152 found_mask |= pdd->exception_status; 1153 } 1154 1155 if (exception_set_mask & found_mask) 1156 kernel_write(target->dbg_ev_file, &write_data, 1, &pos); 1157 1158 target->exception_enable_mask = exception_set_mask; 1159 1160 mutex_unlock(&target->event_mutex); 1161 } 1162