xref: /linux/drivers/gpu/drm/amd/amdkfd/kfd_debug.c (revision 4a063f64f905310ae7ec81f2e1cc9fdefb7ac3d7)
1 /*
2  * Copyright 2023 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #include "kfd_debug.h"
24 #include "kfd_device_queue_manager.h"
25 #include "kfd_topology.h"
26 #include <linux/file.h>
27 #include <uapi/linux/kfd_ioctl.h>
28 #include <uapi/linux/kfd_sysfs.h>
29 
30 #define MAX_WATCH_ADDRESSES	4
31 
32 int kfd_dbg_ev_query_debug_event(struct kfd_process *process,
33 		      unsigned int *queue_id,
34 		      unsigned int *gpu_id,
35 		      uint64_t exception_clear_mask,
36 		      uint64_t *event_status)
37 {
38 	struct process_queue_manager *pqm;
39 	struct process_queue_node *pqn;
40 	int i;
41 
42 	if (!(process && process->debug_trap_enabled))
43 		return -ENODATA;
44 
45 	mutex_lock(&process->event_mutex);
46 	*event_status = 0;
47 	*queue_id = 0;
48 	*gpu_id = 0;
49 
50 	/* find and report queue events */
51 	pqm = &process->pqm;
52 	list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
53 		uint64_t tmp = process->exception_enable_mask;
54 
55 		if (!pqn->q)
56 			continue;
57 
58 		tmp &= pqn->q->properties.exception_status;
59 
60 		if (!tmp)
61 			continue;
62 
63 		*event_status = pqn->q->properties.exception_status;
64 		*queue_id = pqn->q->properties.queue_id;
65 		*gpu_id = pqn->q->device->id;
66 		pqn->q->properties.exception_status &= ~exception_clear_mask;
67 		goto out;
68 	}
69 
70 	/* find and report device events */
71 	for (i = 0; i < process->n_pdds; i++) {
72 		struct kfd_process_device *pdd = process->pdds[i];
73 		uint64_t tmp = process->exception_enable_mask
74 						& pdd->exception_status;
75 
76 		if (!tmp)
77 			continue;
78 
79 		*event_status = pdd->exception_status;
80 		*gpu_id = pdd->dev->id;
81 		pdd->exception_status &= ~exception_clear_mask;
82 		goto out;
83 	}
84 
85 	/* report process events */
86 	if (process->exception_enable_mask & process->exception_status) {
87 		*event_status = process->exception_status;
88 		process->exception_status &= ~exception_clear_mask;
89 	}
90 
91 out:
92 	mutex_unlock(&process->event_mutex);
93 	return *event_status ? 0 : -EAGAIN;
94 }
95 
96 void debug_event_write_work_handler(struct work_struct *work)
97 {
98 	struct kfd_process *process;
99 
100 	static const char write_data = '.';
101 	loff_t pos = 0;
102 
103 	process = container_of(work,
104 			struct kfd_process,
105 			debug_event_workarea);
106 
107 	if (process->debug_trap_enabled && process->dbg_ev_file)
108 		kernel_write(process->dbg_ev_file, &write_data, 1, &pos);
109 }
110 
111 /* update process/device/queue exception status, write to descriptor
112  * only if exception_status is enabled.
113  */
114 bool kfd_dbg_ev_raise(uint64_t event_mask,
115 			struct kfd_process *process, struct kfd_node *dev,
116 			unsigned int source_id, bool use_worker,
117 			void *exception_data, size_t exception_data_size)
118 {
119 	struct process_queue_manager *pqm;
120 	struct process_queue_node *pqn;
121 	int i;
122 	static const char write_data = '.';
123 	loff_t pos = 0;
124 	bool is_subscribed = true;
125 
126 	if (!(process && process->debug_trap_enabled))
127 		return false;
128 
129 	mutex_lock(&process->event_mutex);
130 
131 	if (event_mask & KFD_EC_MASK_DEVICE) {
132 		for (i = 0; i < process->n_pdds; i++) {
133 			struct kfd_process_device *pdd = process->pdds[i];
134 
135 			if (pdd->dev != dev)
136 				continue;
137 
138 			pdd->exception_status |= event_mask & KFD_EC_MASK_DEVICE;
139 
140 			if (event_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
141 				if (!pdd->vm_fault_exc_data) {
142 					pdd->vm_fault_exc_data = kmemdup(
143 							exception_data,
144 							exception_data_size,
145 							GFP_KERNEL);
146 					if (!pdd->vm_fault_exc_data)
147 						pr_debug("Failed to allocate exception data memory");
148 				} else {
149 					pr_debug("Debugger exception data not saved\n");
150 					print_hex_dump_bytes("exception data: ",
151 							DUMP_PREFIX_OFFSET,
152 							exception_data,
153 							exception_data_size);
154 				}
155 			}
156 			break;
157 		}
158 	} else if (event_mask & KFD_EC_MASK_PROCESS) {
159 		process->exception_status |= event_mask & KFD_EC_MASK_PROCESS;
160 	} else {
161 		pqm = &process->pqm;
162 		list_for_each_entry(pqn, &pqm->queues,
163 				process_queue_list) {
164 			int target_id;
165 
166 			if (!pqn->q)
167 				continue;
168 
169 			target_id = event_mask & KFD_EC_MASK(EC_QUEUE_NEW) ?
170 					pqn->q->properties.queue_id :
171 							pqn->q->doorbell_id;
172 
173 			if (pqn->q->device != dev || target_id != source_id)
174 				continue;
175 
176 			pqn->q->properties.exception_status |= event_mask;
177 			break;
178 		}
179 	}
180 
181 	if (process->exception_enable_mask & event_mask) {
182 		if (use_worker)
183 			schedule_work(&process->debug_event_workarea);
184 		else
185 			kernel_write(process->dbg_ev_file,
186 					&write_data,
187 					1,
188 					&pos);
189 	} else {
190 		is_subscribed = false;
191 	}
192 
193 	mutex_unlock(&process->event_mutex);
194 
195 	return is_subscribed;
196 }
197 
198 /* set pending event queue entry from ring entry  */
199 bool kfd_set_dbg_ev_from_interrupt(struct kfd_node *dev,
200 				   unsigned int pasid,
201 				   uint32_t doorbell_id,
202 				   uint64_t trap_mask,
203 				   void *exception_data,
204 				   size_t exception_data_size)
205 {
206 	struct kfd_process *p;
207 	struct kfd_process_device *pdd = NULL;
208 	bool signaled_to_debugger_or_runtime = false;
209 
210 	p = kfd_lookup_process_by_pasid(pasid, &pdd);
211 
212 	if (!pdd)
213 		return false;
214 
215 	if (!kfd_dbg_ev_raise(trap_mask, p, dev, doorbell_id, true,
216 			      exception_data, exception_data_size)) {
217 		struct process_queue_manager *pqm;
218 		struct process_queue_node *pqn;
219 
220 		if (!!(trap_mask & KFD_EC_MASK_QUEUE) &&
221 		       p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) {
222 			mutex_lock(&p->mutex);
223 
224 			pqm = &p->pqm;
225 			list_for_each_entry(pqn, &pqm->queues,
226 							process_queue_list) {
227 
228 				if (!(pqn->q && pqn->q->device == dev &&
229 				      pqn->q->doorbell_id == doorbell_id))
230 					continue;
231 
232 				kfd_send_exception_to_runtime(p, pqn->q->properties.queue_id,
233 							      trap_mask);
234 
235 				signaled_to_debugger_or_runtime = true;
236 
237 				break;
238 			}
239 
240 			mutex_unlock(&p->mutex);
241 		} else if (trap_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
242 			kfd_evict_process_device(pdd);
243 			kfd_signal_vm_fault_event(pdd, NULL, exception_data);
244 
245 			signaled_to_debugger_or_runtime = true;
246 		}
247 	} else {
248 		signaled_to_debugger_or_runtime = true;
249 	}
250 
251 	kfd_unref_process(p);
252 
253 	return signaled_to_debugger_or_runtime;
254 }
255 
256 int kfd_dbg_send_exception_to_runtime(struct kfd_process *p,
257 					unsigned int dev_id,
258 					unsigned int queue_id,
259 					uint64_t error_reason)
260 {
261 	if (error_reason & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
262 		struct kfd_process_device *pdd = NULL;
263 		struct kfd_hsa_memory_exception_data *data;
264 		int i;
265 
266 		for (i = 0; i < p->n_pdds; i++) {
267 			if (p->pdds[i]->dev->id == dev_id) {
268 				pdd = p->pdds[i];
269 				break;
270 			}
271 		}
272 
273 		if (!pdd)
274 			return -ENODEV;
275 
276 		data = (struct kfd_hsa_memory_exception_data *)
277 						pdd->vm_fault_exc_data;
278 
279 		kfd_evict_process_device(pdd);
280 		kfd_signal_vm_fault_event(pdd, NULL, data);
281 		error_reason &= ~KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION);
282 	}
283 
284 	if (error_reason & (KFD_EC_MASK(EC_PROCESS_RUNTIME))) {
285 		/*
286 		 * block should only happen after the debugger receives runtime
287 		 * enable notice.
288 		 */
289 		up(&p->runtime_enable_sema);
290 		error_reason &= ~KFD_EC_MASK(EC_PROCESS_RUNTIME);
291 	}
292 
293 	if (error_reason)
294 		return kfd_send_exception_to_runtime(p, queue_id, error_reason);
295 
296 	return 0;
297 }
298 
299 static int kfd_dbg_set_queue_workaround(struct queue *q, bool enable)
300 {
301 	struct mqd_update_info minfo = {0};
302 	int err;
303 
304 	if (!q)
305 		return 0;
306 
307 	if (!kfd_dbg_has_cwsr_workaround(q->device))
308 		return 0;
309 
310 	if (enable && q->properties.is_user_cu_masked)
311 		return -EBUSY;
312 
313 	minfo.update_flag = enable ? UPDATE_FLAG_DBG_WA_ENABLE : UPDATE_FLAG_DBG_WA_DISABLE;
314 
315 	q->properties.is_dbg_wa = enable;
316 	err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo);
317 	if (err)
318 		q->properties.is_dbg_wa = false;
319 
320 	return err;
321 }
322 
323 static int kfd_dbg_set_workaround(struct kfd_process *target, bool enable)
324 {
325 	struct process_queue_manager *pqm = &target->pqm;
326 	struct process_queue_node *pqn;
327 	int r = 0;
328 
329 	list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
330 		r = kfd_dbg_set_queue_workaround(pqn->q, enable);
331 		if (enable && r)
332 			goto unwind;
333 	}
334 
335 	return 0;
336 
337 unwind:
338 	list_for_each_entry(pqn, &pqm->queues, process_queue_list)
339 		kfd_dbg_set_queue_workaround(pqn->q, false);
340 
341 	if (enable)
342 		target->runtime_info.runtime_state = r == -EBUSY ?
343 				DEBUG_RUNTIME_STATE_ENABLED_BUSY :
344 				DEBUG_RUNTIME_STATE_ENABLED_ERROR;
345 
346 	return r;
347 }
348 
349 int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en)
350 {
351 	uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;
352 	uint32_t flags = pdd->process->dbg_flags;
353 	struct amdgpu_device *adev = pdd->dev->adev;
354 	int r;
355 
356 	if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
357 		return 0;
358 
359 	if (!pdd->proc_ctx_cpu_ptr) {
360 		r = amdgpu_amdkfd_alloc_kernel_mem(adev,
361 			AMDGPU_MES_PROC_CTX_SIZE,
362 			AMDGPU_GEM_DOMAIN_GTT,
363 			&pdd->proc_ctx_bo,
364 			&pdd->proc_ctx_gpu_addr,
365 			&pdd->proc_ctx_cpu_ptr,
366 			false);
367 		if (r) {
368 			dev_err(adev->dev,
369 			"failed to allocate process context bo\n");
370 			return r;
371 		}
372 		memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
373 	}
374 
375 	return amdgpu_mes_set_shader_debugger(pdd->dev->adev,
376 					pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
377 					pdd->watch_points, flags, sq_trap_en,
378 					ffs(pdd->dev->xcc_mask) - 1);
379 }
380 
381 #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1
382 static int kfd_dbg_get_dev_watch_id(struct kfd_process_device *pdd, int *watch_id)
383 {
384 	int i;
385 
386 	*watch_id = KFD_DEBUGGER_INVALID_WATCH_POINT_ID;
387 
388 	spin_lock(&pdd->dev->watch_points_lock);
389 
390 	for (i = 0; i < MAX_WATCH_ADDRESSES; i++) {
391 		/* device watchpoint in use so skip */
392 		if ((pdd->dev->alloc_watch_ids >> i) & 0x1)
393 			continue;
394 
395 		pdd->alloc_watch_ids |= 0x1 << i;
396 		pdd->dev->alloc_watch_ids |= 0x1 << i;
397 		*watch_id = i;
398 		spin_unlock(&pdd->dev->watch_points_lock);
399 		return 0;
400 	}
401 
402 	spin_unlock(&pdd->dev->watch_points_lock);
403 
404 	return -ENOMEM;
405 }
406 
407 static void kfd_dbg_clear_dev_watch_id(struct kfd_process_device *pdd, u32 watch_id)
408 {
409 	spin_lock(&pdd->dev->watch_points_lock);
410 
411 	/* process owns device watch point so safe to clear */
412 	if (pdd->alloc_watch_ids & BIT(watch_id)) {
413 		pdd->alloc_watch_ids &= ~BIT(watch_id);
414 		pdd->dev->alloc_watch_ids &= ~BIT(watch_id);
415 	}
416 
417 	spin_unlock(&pdd->dev->watch_points_lock);
418 }
419 
420 static bool kfd_dbg_owns_dev_watch_id(struct kfd_process_device *pdd, u32 watch_id)
421 {
422 	bool owns_watch_id = false;
423 
424 	spin_lock(&pdd->dev->watch_points_lock);
425 	owns_watch_id = pdd->alloc_watch_ids & BIT(watch_id);
426 	spin_unlock(&pdd->dev->watch_points_lock);
427 
428 	return owns_watch_id;
429 }
430 
431 int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd,
432 					uint32_t watch_id)
433 {
434 	int r;
435 
436 	if (watch_id >= MAX_WATCH_ADDRESSES)
437 		return -EINVAL;
438 
439 	if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id))
440 		return -EINVAL;
441 
442 	if (!pdd->dev->kfd->shared_resources.enable_mes) {
443 		r = debug_lock_and_unmap(pdd->dev->dqm);
444 		if (r)
445 			return r;
446 	}
447 
448 	amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
449 	pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch(
450 							pdd->dev->adev,
451 							watch_id);
452 	amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
453 
454 	if (!pdd->dev->kfd->shared_resources.enable_mes)
455 		r = debug_map_and_unlock(pdd->dev->dqm);
456 	else
457 		r = kfd_dbg_set_mes_debug_mode(pdd, true);
458 
459 	kfd_dbg_clear_dev_watch_id(pdd, watch_id);
460 
461 	return r;
462 }
463 
464 int kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device *pdd,
465 					uint64_t watch_address,
466 					uint32_t watch_address_mask,
467 					uint32_t *watch_id,
468 					uint32_t watch_mode)
469 {
470 	int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id);
471 	uint32_t xcc_mask = pdd->dev->xcc_mask;
472 
473 	if (r)
474 		return r;
475 
476 	if (*watch_id >= MAX_WATCH_ADDRESSES)
477 		return -EINVAL;
478 
479 	if (!pdd->dev->kfd->shared_resources.enable_mes) {
480 		r = debug_lock_and_unmap(pdd->dev->dqm);
481 		if (r) {
482 			kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
483 			return r;
484 		}
485 	}
486 
487 	amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
488 	for_each_inst(xcc_id, xcc_mask)
489 		pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch(
490 				pdd->dev->adev,
491 				watch_address,
492 				watch_address_mask,
493 				*watch_id,
494 				watch_mode,
495 				pdd->dev->vm_info.last_vmid_kfd,
496 				xcc_id);
497 	amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
498 
499 	if (!pdd->dev->kfd->shared_resources.enable_mes)
500 		r = debug_map_and_unlock(pdd->dev->dqm);
501 	else
502 		r = kfd_dbg_set_mes_debug_mode(pdd, true);
503 
504 	/* HWS is broken so no point in HW rollback but release the watchpoint anyways */
505 	if (r)
506 		kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
507 
508 	return 0;
509 }
510 
511 static void kfd_dbg_clear_process_address_watch(struct kfd_process *target)
512 {
513 	int i, j;
514 
515 	for (i = 0; i < target->n_pdds; i++)
516 		for (j = 0; j < MAX_WATCH_ADDRESSES; j++)
517 			kfd_dbg_trap_clear_dev_address_watch(target->pdds[i], j);
518 }
519 
520 int kfd_dbg_trap_set_flags(struct kfd_process *target, uint32_t *flags)
521 {
522 	uint32_t prev_flags = target->dbg_flags;
523 	int i, r = 0, rewind_count = 0;
524 
525 	for (i = 0; i < target->n_pdds; i++) {
526 		struct kfd_topology_device *topo_dev =
527 				kfd_topology_device_by_id(target->pdds[i]->dev->id);
528 		uint32_t caps = topo_dev->node_props.capability;
529 		uint32_t caps2 = topo_dev->node_props.capability2;
530 
531 		if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED) &&
532 			(*flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP)) {
533 			*flags = prev_flags;
534 			return -EACCES;
535 		}
536 
537 		if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED) &&
538 		    (*flags & KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP)) {
539 			*flags = prev_flags;
540 			return -EACCES;
541 		}
542 
543 		if (!(caps2 & HSA_CAP2_TRAP_DEBUG_LDS_OUT_OF_ADDR_RANGE_SUPPORTED) &&
544 		    (*flags & KFD_DBG_TRAP_FLAG_LDS_OUT_OF_ADDR_RANGE)) {
545 			*flags = prev_flags;
546 			return -EACCES;
547 		}
548 	}
549 
550 	target->dbg_flags = *flags;
551 	*flags = prev_flags;
552 	for (i = 0; i < target->n_pdds; i++) {
553 		struct kfd_process_device *pdd = target->pdds[i];
554 
555 		if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
556 			continue;
557 
558 		if (!pdd->dev->kfd->shared_resources.enable_mes)
559 			r = debug_refresh_runlist(pdd->dev->dqm);
560 		else
561 			r = kfd_dbg_set_mes_debug_mode(pdd, true);
562 
563 		if (r) {
564 			target->dbg_flags = prev_flags;
565 			break;
566 		}
567 
568 		rewind_count++;
569 	}
570 
571 	/* Rewind flags */
572 	if (r) {
573 		target->dbg_flags = prev_flags;
574 
575 		for (i = 0; i < rewind_count; i++) {
576 			struct kfd_process_device *pdd = target->pdds[i];
577 
578 			if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
579 				continue;
580 
581 			if (!pdd->dev->kfd->shared_resources.enable_mes)
582 				(void)debug_refresh_runlist(pdd->dev->dqm);
583 			else
584 				(void)kfd_dbg_set_mes_debug_mode(pdd, true);
585 		}
586 	}
587 
588 	return r;
589 }
590 
591 /* kfd_dbg_trap_deactivate:
592  *	target: target process
593  *	unwind: If this is unwinding a failed kfd_dbg_trap_enable()
594  *	unwind_count:
595  *		If unwind == true, how far down the pdd list we need
596  *				to unwind
597  *		else: ignored
598  */
599 void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind_count)
600 {
601 	int i;
602 
603 	if (!unwind) {
604 		uint32_t flags = 0;
605 		int resume_count = resume_queues(target, 0, NULL);
606 
607 		if (resume_count)
608 			pr_debug("Resumed %d queues\n", resume_count);
609 
610 		cancel_work_sync(&target->debug_event_workarea);
611 		kfd_dbg_clear_process_address_watch(target);
612 		kfd_dbg_trap_set_wave_launch_mode(target, 0);
613 
614 		kfd_dbg_trap_set_flags(target, &flags);
615 	}
616 
617 	for (i = 0; i < target->n_pdds; i++) {
618 		struct kfd_process_device *pdd = target->pdds[i];
619 
620 		/* If this is an unwind, and we have unwound the required
621 		 * enable calls on the pdd list, we need to stop now
622 		 * otherwise we may mess up another debugger session.
623 		 */
624 		if (unwind && i == unwind_count)
625 			break;
626 
627 		kfd_process_set_trap_debug_flag(&pdd->qpd, false);
628 
629 		/* GFX off is already disabled by debug activate if not RLC restore supported. */
630 		if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
631 			amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
632 		pdd->spi_dbg_override =
633 				pdd->dev->kfd2kgd->disable_debug_trap(
634 				pdd->dev->adev,
635 				target->runtime_info.ttmp_setup,
636 				pdd->dev->vm_info.last_vmid_kfd);
637 		amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
638 
639 		if (!kfd_dbg_is_per_vmid_supported(pdd->dev) &&
640 				release_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd))
641 			pr_err("Failed to release debug vmid on [%i]\n", pdd->dev->id);
642 
643 		if (!pdd->dev->kfd->shared_resources.enable_mes)
644 			(void)debug_refresh_runlist(pdd->dev->dqm);
645 		else
646 			(void)kfd_dbg_set_mes_debug_mode(pdd,
647 							 !kfd_dbg_has_cwsr_workaround(pdd->dev));
648 	}
649 
650 	kfd_dbg_set_workaround(target, false);
651 }
652 
653 static void kfd_dbg_clean_exception_status(struct kfd_process *target)
654 {
655 	struct process_queue_manager *pqm;
656 	struct process_queue_node *pqn;
657 	int i;
658 
659 	for (i = 0; i < target->n_pdds; i++) {
660 		struct kfd_process_device *pdd = target->pdds[i];
661 
662 		kfd_process_drain_interrupts(pdd);
663 
664 		pdd->exception_status = 0;
665 	}
666 
667 	pqm = &target->pqm;
668 	list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
669 		if (!pqn->q)
670 			continue;
671 
672 		pqn->q->properties.exception_status = 0;
673 	}
674 
675 	target->exception_status = 0;
676 }
677 
678 int kfd_dbg_trap_disable(struct kfd_process *target)
679 {
680 	if (!target->debug_trap_enabled)
681 		return 0;
682 
683 	/*
684 	 * Defer deactivation to runtime if runtime not enabled otherwise reset
685 	 * attached running target runtime state to enable for re-attach.
686 	 */
687 	if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
688 		kfd_dbg_trap_deactivate(target, false, 0);
689 	else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED)
690 		target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED;
691 
692 	cancel_work_sync(&target->debug_event_workarea);
693 	fput(target->dbg_ev_file);
694 	target->dbg_ev_file = NULL;
695 
696 	if (target->debugger_process) {
697 		atomic_dec(&target->debugger_process->debugged_process_count);
698 		target->debugger_process = NULL;
699 	}
700 
701 	target->debug_trap_enabled = false;
702 	kfd_dbg_clean_exception_status(target);
703 	kfd_unref_process(target);
704 
705 	return 0;
706 }
707 
708 int kfd_dbg_trap_activate(struct kfd_process *target)
709 {
710 	int i, r = 0;
711 
712 	r = kfd_dbg_set_workaround(target, true);
713 	if (r)
714 		return r;
715 
716 	for (i = 0; i < target->n_pdds; i++) {
717 		struct kfd_process_device *pdd = target->pdds[i];
718 
719 		if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) {
720 			r = reserve_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd);
721 
722 			if (r) {
723 				target->runtime_info.runtime_state = (r == -EBUSY) ?
724 							DEBUG_RUNTIME_STATE_ENABLED_BUSY :
725 							DEBUG_RUNTIME_STATE_ENABLED_ERROR;
726 
727 				goto unwind_err;
728 			}
729 		}
730 
731 		/* Disable GFX OFF to prevent garbage read/writes to debug registers.
732 		 * If RLC restore of debug registers is not supported and runtime enable
733 		 * hasn't done so already on ttmp setup request, restore the trap config registers.
734 		 *
735 		 * If RLC restore of debug registers is not supported, keep gfx off disabled for
736 		 * the debug session.
737 		 */
738 		amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
739 		if (!(kfd_dbg_is_rlc_restore_supported(pdd->dev) ||
740 						target->runtime_info.ttmp_setup))
741 			pdd->dev->kfd2kgd->enable_debug_trap(pdd->dev->adev, true,
742 								pdd->dev->vm_info.last_vmid_kfd);
743 
744 		pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap(
745 					pdd->dev->adev,
746 					false,
747 					pdd->dev->vm_info.last_vmid_kfd);
748 
749 		if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
750 			amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
751 
752 		/*
753 		 * Setting the debug flag in the trap handler requires that the TMA has been
754 		 * allocated, which occurs during CWSR initialization.
755 		 * In the event that CWSR has not been initialized at this point, setting the
756 		 * flag will be called again during CWSR initialization if the target process
757 		 * is still debug enabled.
758 		 */
759 		kfd_process_set_trap_debug_flag(&pdd->qpd, true);
760 
761 		if (!pdd->dev->kfd->shared_resources.enable_mes)
762 			r = debug_refresh_runlist(pdd->dev->dqm);
763 		else
764 			r = kfd_dbg_set_mes_debug_mode(pdd, true);
765 
766 		if (r) {
767 			target->runtime_info.runtime_state =
768 					DEBUG_RUNTIME_STATE_ENABLED_ERROR;
769 			goto unwind_err;
770 		}
771 	}
772 
773 	return 0;
774 
775 unwind_err:
776 	/* Enabling debug failed, we need to disable on
777 	 * all GPUs so the enable is all or nothing.
778 	 */
779 	kfd_dbg_trap_deactivate(target, true, i);
780 	return r;
781 }
782 
783 int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd,
784 			void __user *runtime_info, uint32_t *runtime_size)
785 {
786 	struct file *f;
787 	uint32_t copy_size;
788 	int i, r = 0;
789 
790 	if (target->debug_trap_enabled)
791 		return -EALREADY;
792 
793 	/* Enable pre-checks */
794 	for (i = 0; i < target->n_pdds; i++) {
795 		struct kfd_process_device *pdd = target->pdds[i];
796 
797 		if (!KFD_IS_SOC15(pdd->dev))
798 			return -ENODEV;
799 
800 		if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) ||
801 					 kfd_dbg_has_cwsr_workaround(pdd->dev)))
802 			return -EBUSY;
803 	}
804 
805 	copy_size = min((size_t)(*runtime_size), sizeof(target->runtime_info));
806 
807 	f = fget(fd);
808 	if (!f) {
809 		pr_err("Failed to get file for (%i)\n", fd);
810 		return -EBADF;
811 	}
812 
813 	target->dbg_ev_file = f;
814 
815 	/* defer activation to runtime if not runtime enabled */
816 	if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
817 		kfd_dbg_trap_activate(target);
818 
819 	/* We already hold the process reference but hold another one for the
820 	 * debug session.
821 	 */
822 	kref_get(&target->ref);
823 	target->debug_trap_enabled = true;
824 
825 	if (target->debugger_process)
826 		atomic_inc(&target->debugger_process->debugged_process_count);
827 
828 	if (copy_to_user(runtime_info, (void *)&target->runtime_info, copy_size)) {
829 		kfd_dbg_trap_deactivate(target, false, 0);
830 		r = -EFAULT;
831 	}
832 
833 	*runtime_size = sizeof(target->runtime_info);
834 
835 	return r;
836 }
837 
838 static int kfd_dbg_validate_trap_override_request(struct kfd_process *p,
839 						uint32_t trap_override,
840 						uint32_t trap_mask_request,
841 						uint32_t *trap_mask_supported)
842 {
843 	int i = 0;
844 
845 	*trap_mask_supported = 0xffffffff;
846 
847 	for (i = 0; i < p->n_pdds; i++) {
848 		struct kfd_process_device *pdd = p->pdds[i];
849 		int err = pdd->dev->kfd2kgd->validate_trap_override_request(
850 								pdd->dev->adev,
851 								trap_override,
852 								trap_mask_supported);
853 
854 		if (err)
855 			return err;
856 	}
857 
858 	if (trap_mask_request & ~*trap_mask_supported)
859 		return -EACCES;
860 
861 	return 0;
862 }
863 
864 int kfd_dbg_trap_set_wave_launch_override(struct kfd_process *target,
865 					uint32_t trap_override,
866 					uint32_t trap_mask_bits,
867 					uint32_t trap_mask_request,
868 					uint32_t *trap_mask_prev,
869 					uint32_t *trap_mask_supported)
870 {
871 	int r = 0, i;
872 
873 	r = kfd_dbg_validate_trap_override_request(target,
874 						trap_override,
875 						trap_mask_request,
876 						trap_mask_supported);
877 
878 	if (r)
879 		return r;
880 
881 	for (i = 0; i < target->n_pdds; i++) {
882 		struct kfd_process_device *pdd = target->pdds[i];
883 
884 		amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
885 		pdd->spi_dbg_override = pdd->dev->kfd2kgd->set_wave_launch_trap_override(
886 				pdd->dev->adev,
887 				pdd->dev->vm_info.last_vmid_kfd,
888 				trap_override,
889 				trap_mask_bits,
890 				trap_mask_request,
891 				trap_mask_prev,
892 				pdd->spi_dbg_override);
893 		amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
894 
895 		if (!pdd->dev->kfd->shared_resources.enable_mes)
896 			r = debug_refresh_runlist(pdd->dev->dqm);
897 		else
898 			r = kfd_dbg_set_mes_debug_mode(pdd, true);
899 
900 		if (r)
901 			break;
902 	}
903 
904 	return r;
905 }
906 
907 int kfd_dbg_trap_set_wave_launch_mode(struct kfd_process *target,
908 					uint8_t wave_launch_mode)
909 {
910 	int r = 0, i;
911 
912 	if (wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL &&
913 			wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT &&
914 			wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG)
915 		return -EINVAL;
916 
917 	for (i = 0; i < target->n_pdds; i++) {
918 		struct kfd_process_device *pdd = target->pdds[i];
919 
920 		amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
921 		pdd->spi_dbg_launch_mode = pdd->dev->kfd2kgd->set_wave_launch_mode(
922 				pdd->dev->adev,
923 				wave_launch_mode,
924 				pdd->dev->vm_info.last_vmid_kfd);
925 		amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
926 
927 		if (!pdd->dev->kfd->shared_resources.enable_mes)
928 			r = debug_refresh_runlist(pdd->dev->dqm);
929 		else
930 			r = kfd_dbg_set_mes_debug_mode(pdd, true);
931 
932 		if (r)
933 			break;
934 	}
935 
936 	return r;
937 }
938 
939 int kfd_dbg_trap_query_exception_info(struct kfd_process *target,
940 		uint32_t source_id,
941 		uint32_t exception_code,
942 		bool clear_exception,
943 		void __user *info,
944 		uint32_t *info_size)
945 {
946 	bool found = false;
947 	int r = 0;
948 	uint32_t copy_size, actual_info_size = 0;
949 	uint64_t *exception_status_ptr = NULL;
950 
951 	if (!target)
952 		return -EINVAL;
953 
954 	if (!info || !info_size)
955 		return -EINVAL;
956 
957 	mutex_lock(&target->event_mutex);
958 
959 	if (KFD_DBG_EC_TYPE_IS_QUEUE(exception_code)) {
960 		/* Per queue exceptions */
961 		struct queue *queue = NULL;
962 		int i;
963 
964 		for (i = 0; i < target->n_pdds; i++) {
965 			struct kfd_process_device *pdd = target->pdds[i];
966 			struct qcm_process_device *qpd = &pdd->qpd;
967 
968 			list_for_each_entry(queue, &qpd->queues_list, list) {
969 				if (!found && queue->properties.queue_id == source_id) {
970 					found = true;
971 					break;
972 				}
973 			}
974 			if (found)
975 				break;
976 		}
977 
978 		if (!found) {
979 			r = -EINVAL;
980 			goto out;
981 		}
982 
983 		if (!(queue->properties.exception_status & KFD_EC_MASK(exception_code))) {
984 			r = -ENODATA;
985 			goto out;
986 		}
987 		exception_status_ptr = &queue->properties.exception_status;
988 	} else if (KFD_DBG_EC_TYPE_IS_DEVICE(exception_code)) {
989 		/* Per device exceptions */
990 		struct kfd_process_device *pdd = NULL;
991 		int i;
992 
993 		for (i = 0; i < target->n_pdds; i++) {
994 			pdd = target->pdds[i];
995 			if (pdd->dev->id == source_id) {
996 				found = true;
997 				break;
998 			}
999 		}
1000 
1001 		if (!found) {
1002 			r = -EINVAL;
1003 			goto out;
1004 		}
1005 
1006 		if (!(pdd->exception_status & KFD_EC_MASK(exception_code))) {
1007 			r = -ENODATA;
1008 			goto out;
1009 		}
1010 
1011 		if (exception_code == EC_DEVICE_MEMORY_VIOLATION) {
1012 			copy_size = min((size_t)(*info_size), pdd->vm_fault_exc_data_size);
1013 
1014 			if (copy_to_user(info, pdd->vm_fault_exc_data, copy_size)) {
1015 				r = -EFAULT;
1016 				goto out;
1017 			}
1018 			actual_info_size = pdd->vm_fault_exc_data_size;
1019 			if (clear_exception) {
1020 				kfree(pdd->vm_fault_exc_data);
1021 				pdd->vm_fault_exc_data = NULL;
1022 				pdd->vm_fault_exc_data_size = 0;
1023 			}
1024 		}
1025 		exception_status_ptr = &pdd->exception_status;
1026 	} else if (KFD_DBG_EC_TYPE_IS_PROCESS(exception_code)) {
1027 		/* Per process exceptions */
1028 		if (!(target->exception_status & KFD_EC_MASK(exception_code))) {
1029 			r = -ENODATA;
1030 			goto out;
1031 		}
1032 
1033 		if (exception_code == EC_PROCESS_RUNTIME) {
1034 			copy_size = min((size_t)(*info_size), sizeof(target->runtime_info));
1035 
1036 			if (copy_to_user(info, (void *)&target->runtime_info, copy_size)) {
1037 				r = -EFAULT;
1038 				goto out;
1039 			}
1040 
1041 			actual_info_size = sizeof(target->runtime_info);
1042 		}
1043 
1044 		exception_status_ptr = &target->exception_status;
1045 	} else {
1046 		pr_debug("Bad exception type [%i]\n", exception_code);
1047 		r = -EINVAL;
1048 		goto out;
1049 	}
1050 
1051 	*info_size = actual_info_size;
1052 	if (clear_exception)
1053 		*exception_status_ptr &= ~KFD_EC_MASK(exception_code);
1054 out:
1055 	mutex_unlock(&target->event_mutex);
1056 	return r;
1057 }
1058 
1059 int kfd_dbg_trap_device_snapshot(struct kfd_process *target,
1060 		uint64_t exception_clear_mask,
1061 		void __user *user_info,
1062 		uint32_t *number_of_device_infos,
1063 		uint32_t *entry_size)
1064 {
1065 	struct kfd_dbg_device_info_entry device_info;
1066 	uint32_t tmp_entry_size, tmp_num_devices;
1067 	int i, r = 0;
1068 
1069 	if (!(target && user_info && number_of_device_infos && entry_size))
1070 		return -EINVAL;
1071 
1072 	tmp_entry_size = *entry_size;
1073 
1074 	tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds);
1075 	*number_of_device_infos = target->n_pdds;
1076 	*entry_size = min_t(size_t, *entry_size, sizeof(device_info));
1077 
1078 	if (!tmp_num_devices)
1079 		return 0;
1080 
1081 	memset(&device_info, 0, sizeof(device_info));
1082 
1083 	mutex_lock(&target->event_mutex);
1084 
1085 	/* Run over all pdd of the process */
1086 	for (i = 0; i < tmp_num_devices; i++) {
1087 		struct kfd_process_device *pdd = target->pdds[i];
1088 		struct kfd_topology_device *topo_dev = kfd_topology_device_by_id(pdd->dev->id);
1089 
1090 		device_info.gpu_id = pdd->dev->id;
1091 		device_info.exception_status = pdd->exception_status;
1092 		device_info.lds_base = pdd->lds_base;
1093 		device_info.lds_limit = pdd->lds_limit;
1094 		device_info.scratch_base = pdd->scratch_base;
1095 		device_info.scratch_limit = pdd->scratch_limit;
1096 		device_info.gpuvm_base = pdd->gpuvm_base;
1097 		device_info.gpuvm_limit = pdd->gpuvm_limit;
1098 		device_info.location_id = topo_dev->node_props.location_id;
1099 		device_info.vendor_id = topo_dev->node_props.vendor_id;
1100 		device_info.device_id = topo_dev->node_props.device_id;
1101 		device_info.revision_id = pdd->dev->adev->pdev->revision;
1102 		device_info.subsystem_vendor_id = pdd->dev->adev->pdev->subsystem_vendor;
1103 		device_info.subsystem_device_id = pdd->dev->adev->pdev->subsystem_device;
1104 		device_info.fw_version = pdd->dev->kfd->mec_fw_version;
1105 		device_info.gfx_target_version =
1106 			topo_dev->node_props.gfx_target_version;
1107 		device_info.simd_count = topo_dev->node_props.simd_count;
1108 		device_info.max_waves_per_simd =
1109 			topo_dev->node_props.max_waves_per_simd;
1110 		device_info.array_count = topo_dev->node_props.array_count;
1111 		device_info.simd_arrays_per_engine =
1112 			topo_dev->node_props.simd_arrays_per_engine;
1113 		device_info.num_xcc = NUM_XCC(pdd->dev->xcc_mask);
1114 		device_info.capability = topo_dev->node_props.capability;
1115 		device_info.debug_prop = topo_dev->node_props.debug_prop;
1116 		device_info.capability2 = topo_dev->node_props.capability2;
1117 
1118 		if (exception_clear_mask)
1119 			pdd->exception_status &= ~exception_clear_mask;
1120 
1121 		if (copy_to_user(user_info, &device_info, *entry_size)) {
1122 			r = -EFAULT;
1123 			break;
1124 		}
1125 
1126 		user_info += tmp_entry_size;
1127 	}
1128 
1129 	mutex_unlock(&target->event_mutex);
1130 
1131 	return r;
1132 }
1133 
1134 void kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process *target,
1135 					uint64_t exception_set_mask)
1136 {
1137 	uint64_t found_mask = 0;
1138 	struct process_queue_manager *pqm;
1139 	struct process_queue_node *pqn;
1140 	static const char write_data = '.';
1141 	loff_t pos = 0;
1142 	int i;
1143 
1144 	mutex_lock(&target->event_mutex);
1145 
1146 	found_mask |= target->exception_status;
1147 
1148 	pqm = &target->pqm;
1149 	list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
1150 		if (!pqn->q)
1151 			continue;
1152 
1153 		found_mask |= pqn->q->properties.exception_status;
1154 	}
1155 
1156 	for (i = 0; i < target->n_pdds; i++) {
1157 		struct kfd_process_device *pdd = target->pdds[i];
1158 
1159 		found_mask |= pdd->exception_status;
1160 	}
1161 
1162 	if (exception_set_mask & found_mask)
1163 		kernel_write(target->dbg_ev_file, &write_data, 1, &pos);
1164 
1165 	target->exception_enable_mask = exception_set_mask;
1166 
1167 	mutex_unlock(&target->event_mutex);
1168 }
1169