1 /* 2 * Copyright 2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include "kfd_debug.h" 24 #include "kfd_device_queue_manager.h" 25 #include "kfd_topology.h" 26 #include <linux/file.h> 27 #include <uapi/linux/kfd_ioctl.h> 28 #include <uapi/linux/kfd_sysfs.h> 29 30 #define MAX_WATCH_ADDRESSES 4 31 32 int kfd_dbg_ev_query_debug_event(struct kfd_process *process, 33 unsigned int *queue_id, 34 unsigned int *gpu_id, 35 uint64_t exception_clear_mask, 36 uint64_t *event_status) 37 { 38 struct process_queue_manager *pqm; 39 struct process_queue_node *pqn; 40 int i; 41 42 if (!(process && process->debug_trap_enabled)) 43 return -ENODATA; 44 45 mutex_lock(&process->event_mutex); 46 *event_status = 0; 47 *queue_id = 0; 48 *gpu_id = 0; 49 50 /* find and report queue events */ 51 pqm = &process->pqm; 52 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 53 uint64_t tmp = process->exception_enable_mask; 54 55 if (!pqn->q) 56 continue; 57 58 tmp &= pqn->q->properties.exception_status; 59 60 if (!tmp) 61 continue; 62 63 *event_status = pqn->q->properties.exception_status; 64 *queue_id = pqn->q->properties.queue_id; 65 *gpu_id = pqn->q->device->id; 66 pqn->q->properties.exception_status &= ~exception_clear_mask; 67 goto out; 68 } 69 70 /* find and report device events */ 71 for (i = 0; i < process->n_pdds; i++) { 72 struct kfd_process_device *pdd = process->pdds[i]; 73 uint64_t tmp = process->exception_enable_mask 74 & pdd->exception_status; 75 76 if (!tmp) 77 continue; 78 79 *event_status = pdd->exception_status; 80 *gpu_id = pdd->dev->id; 81 pdd->exception_status &= ~exception_clear_mask; 82 goto out; 83 } 84 85 /* report process events */ 86 if (process->exception_enable_mask & process->exception_status) { 87 *event_status = process->exception_status; 88 process->exception_status &= ~exception_clear_mask; 89 } 90 91 out: 92 mutex_unlock(&process->event_mutex); 93 return *event_status ? 0 : -EAGAIN; 94 } 95 96 void debug_event_write_work_handler(struct work_struct *work) 97 { 98 struct kfd_process *process; 99 100 static const char write_data = '.'; 101 loff_t pos = 0; 102 103 process = container_of(work, 104 struct kfd_process, 105 debug_event_workarea); 106 107 if (process->debug_trap_enabled && process->dbg_ev_file) 108 kernel_write(process->dbg_ev_file, &write_data, 1, &pos); 109 } 110 111 /* update process/device/queue exception status, write to descriptor 112 * only if exception_status is enabled. 113 */ 114 bool kfd_dbg_ev_raise(uint64_t event_mask, 115 struct kfd_process *process, struct kfd_node *dev, 116 unsigned int source_id, bool use_worker, 117 void *exception_data, size_t exception_data_size) 118 { 119 struct process_queue_manager *pqm; 120 struct process_queue_node *pqn; 121 int i; 122 static const char write_data = '.'; 123 loff_t pos = 0; 124 bool is_subscribed = true; 125 126 if (!(process && process->debug_trap_enabled)) 127 return false; 128 129 mutex_lock(&process->event_mutex); 130 131 if (event_mask & KFD_EC_MASK_DEVICE) { 132 for (i = 0; i < process->n_pdds; i++) { 133 struct kfd_process_device *pdd = process->pdds[i]; 134 135 if (pdd->dev != dev) 136 continue; 137 138 pdd->exception_status |= event_mask & KFD_EC_MASK_DEVICE; 139 140 if (event_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 141 if (!pdd->vm_fault_exc_data) { 142 pdd->vm_fault_exc_data = kmemdup( 143 exception_data, 144 exception_data_size, 145 GFP_KERNEL); 146 if (!pdd->vm_fault_exc_data) 147 pr_debug("Failed to allocate exception data memory"); 148 } else { 149 pr_debug("Debugger exception data not saved\n"); 150 print_hex_dump_bytes("exception data: ", 151 DUMP_PREFIX_OFFSET, 152 exception_data, 153 exception_data_size); 154 } 155 } 156 break; 157 } 158 } else if (event_mask & KFD_EC_MASK_PROCESS) { 159 process->exception_status |= event_mask & KFD_EC_MASK_PROCESS; 160 } else { 161 pqm = &process->pqm; 162 list_for_each_entry(pqn, &pqm->queues, 163 process_queue_list) { 164 int target_id; 165 166 if (!pqn->q) 167 continue; 168 169 target_id = event_mask & KFD_EC_MASK(EC_QUEUE_NEW) ? 170 pqn->q->properties.queue_id : 171 pqn->q->doorbell_id; 172 173 if (pqn->q->device != dev || target_id != source_id) 174 continue; 175 176 pqn->q->properties.exception_status |= event_mask; 177 break; 178 } 179 } 180 181 if (process->exception_enable_mask & event_mask) { 182 if (use_worker) 183 schedule_work(&process->debug_event_workarea); 184 else 185 kernel_write(process->dbg_ev_file, 186 &write_data, 187 1, 188 &pos); 189 } else { 190 is_subscribed = false; 191 } 192 193 mutex_unlock(&process->event_mutex); 194 195 return is_subscribed; 196 } 197 198 /* set pending event queue entry from ring entry */ 199 bool kfd_set_dbg_ev_from_interrupt(struct kfd_node *dev, 200 unsigned int pasid, 201 uint32_t doorbell_id, 202 uint64_t trap_mask, 203 void *exception_data, 204 size_t exception_data_size) 205 { 206 struct kfd_process *p; 207 struct kfd_process_device *pdd = NULL; 208 bool signaled_to_debugger_or_runtime = false; 209 210 p = kfd_lookup_process_by_pasid(pasid, &pdd); 211 212 if (!pdd) 213 return false; 214 215 if (!kfd_dbg_ev_raise(trap_mask, p, dev, doorbell_id, true, 216 exception_data, exception_data_size)) { 217 struct process_queue_manager *pqm; 218 struct process_queue_node *pqn; 219 220 if (!!(trap_mask & KFD_EC_MASK_QUEUE) && 221 p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) { 222 mutex_lock(&p->mutex); 223 224 pqm = &p->pqm; 225 list_for_each_entry(pqn, &pqm->queues, 226 process_queue_list) { 227 228 if (!(pqn->q && pqn->q->device == dev && 229 pqn->q->doorbell_id == doorbell_id)) 230 continue; 231 232 kfd_send_exception_to_runtime(p, pqn->q->properties.queue_id, 233 trap_mask); 234 235 signaled_to_debugger_or_runtime = true; 236 237 break; 238 } 239 240 mutex_unlock(&p->mutex); 241 } else if (trap_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 242 kfd_evict_process_device(pdd); 243 kfd_signal_vm_fault_event(pdd, NULL, exception_data); 244 245 signaled_to_debugger_or_runtime = true; 246 } 247 } else { 248 signaled_to_debugger_or_runtime = true; 249 } 250 251 kfd_unref_process(p); 252 253 return signaled_to_debugger_or_runtime; 254 } 255 256 int kfd_dbg_send_exception_to_runtime(struct kfd_process *p, 257 unsigned int dev_id, 258 unsigned int queue_id, 259 uint64_t error_reason) 260 { 261 if (error_reason & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) { 262 struct kfd_process_device *pdd = NULL; 263 struct kfd_hsa_memory_exception_data *data; 264 int i; 265 266 for (i = 0; i < p->n_pdds; i++) { 267 if (p->pdds[i]->dev->id == dev_id) { 268 pdd = p->pdds[i]; 269 break; 270 } 271 } 272 273 if (!pdd) 274 return -ENODEV; 275 276 data = (struct kfd_hsa_memory_exception_data *) 277 pdd->vm_fault_exc_data; 278 279 kfd_evict_process_device(pdd); 280 kfd_signal_vm_fault_event(pdd, NULL, data); 281 error_reason &= ~KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION); 282 } 283 284 if (error_reason & (KFD_EC_MASK(EC_PROCESS_RUNTIME))) { 285 /* 286 * block should only happen after the debugger receives runtime 287 * enable notice. 288 */ 289 up(&p->runtime_enable_sema); 290 error_reason &= ~KFD_EC_MASK(EC_PROCESS_RUNTIME); 291 } 292 293 if (error_reason) 294 return kfd_send_exception_to_runtime(p, queue_id, error_reason); 295 296 return 0; 297 } 298 299 static int kfd_dbg_set_queue_workaround(struct queue *q, bool enable) 300 { 301 struct mqd_update_info minfo = {0}; 302 int err; 303 304 if (!q) 305 return 0; 306 307 if (!kfd_dbg_has_cwsr_workaround(q->device)) 308 return 0; 309 310 if (enable && q->properties.is_user_cu_masked) 311 return -EBUSY; 312 313 minfo.update_flag = enable ? UPDATE_FLAG_DBG_WA_ENABLE : UPDATE_FLAG_DBG_WA_DISABLE; 314 315 q->properties.is_dbg_wa = enable; 316 err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo); 317 if (err) 318 q->properties.is_dbg_wa = false; 319 320 return err; 321 } 322 323 static int kfd_dbg_set_workaround(struct kfd_process *target, bool enable) 324 { 325 struct process_queue_manager *pqm = &target->pqm; 326 struct process_queue_node *pqn; 327 int r = 0; 328 329 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 330 r = kfd_dbg_set_queue_workaround(pqn->q, enable); 331 if (enable && r) 332 goto unwind; 333 } 334 335 return 0; 336 337 unwind: 338 list_for_each_entry(pqn, &pqm->queues, process_queue_list) 339 kfd_dbg_set_queue_workaround(pqn->q, false); 340 341 if (enable) 342 target->runtime_info.runtime_state = r == -EBUSY ? 343 DEBUG_RUNTIME_STATE_ENABLED_BUSY : 344 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 345 346 return r; 347 } 348 349 int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en) 350 { 351 uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode; 352 uint32_t flags = pdd->process->dbg_flags; 353 struct amdgpu_device *adev = pdd->dev->adev; 354 int r; 355 356 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 357 return 0; 358 359 if (!pdd->proc_ctx_cpu_ptr) { 360 r = amdgpu_amdkfd_alloc_gtt_mem(adev, 361 AMDGPU_MES_PROC_CTX_SIZE, 362 &pdd->proc_ctx_bo, 363 &pdd->proc_ctx_gpu_addr, 364 &pdd->proc_ctx_cpu_ptr, 365 false); 366 if (r) { 367 dev_err(adev->dev, 368 "failed to allocate process context bo\n"); 369 return r; 370 } 371 memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE); 372 } 373 374 return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl, 375 pdd->watch_points, flags, sq_trap_en, 0); 376 } 377 378 #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1 379 static int kfd_dbg_get_dev_watch_id(struct kfd_process_device *pdd, int *watch_id) 380 { 381 int i; 382 383 *watch_id = KFD_DEBUGGER_INVALID_WATCH_POINT_ID; 384 385 spin_lock(&pdd->dev->watch_points_lock); 386 387 for (i = 0; i < MAX_WATCH_ADDRESSES; i++) { 388 /* device watchpoint in use so skip */ 389 if ((pdd->dev->alloc_watch_ids >> i) & 0x1) 390 continue; 391 392 pdd->alloc_watch_ids |= 0x1 << i; 393 pdd->dev->alloc_watch_ids |= 0x1 << i; 394 *watch_id = i; 395 spin_unlock(&pdd->dev->watch_points_lock); 396 return 0; 397 } 398 399 spin_unlock(&pdd->dev->watch_points_lock); 400 401 return -ENOMEM; 402 } 403 404 static void kfd_dbg_clear_dev_watch_id(struct kfd_process_device *pdd, int watch_id) 405 { 406 spin_lock(&pdd->dev->watch_points_lock); 407 408 /* process owns device watch point so safe to clear */ 409 if ((pdd->alloc_watch_ids >> watch_id) & 0x1) { 410 pdd->alloc_watch_ids &= ~(0x1 << watch_id); 411 pdd->dev->alloc_watch_ids &= ~(0x1 << watch_id); 412 } 413 414 spin_unlock(&pdd->dev->watch_points_lock); 415 } 416 417 static bool kfd_dbg_owns_dev_watch_id(struct kfd_process_device *pdd, int watch_id) 418 { 419 bool owns_watch_id = false; 420 421 spin_lock(&pdd->dev->watch_points_lock); 422 owns_watch_id = watch_id < MAX_WATCH_ADDRESSES && 423 ((pdd->alloc_watch_ids >> watch_id) & 0x1); 424 425 spin_unlock(&pdd->dev->watch_points_lock); 426 427 return owns_watch_id; 428 } 429 430 int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd, 431 uint32_t watch_id) 432 { 433 int r; 434 435 if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id)) 436 return -EINVAL; 437 438 if (!pdd->dev->kfd->shared_resources.enable_mes) { 439 r = debug_lock_and_unmap(pdd->dev->dqm); 440 if (r) 441 return r; 442 } 443 444 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 445 pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch( 446 pdd->dev->adev, 447 watch_id); 448 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 449 450 if (!pdd->dev->kfd->shared_resources.enable_mes) 451 r = debug_map_and_unlock(pdd->dev->dqm); 452 else 453 r = kfd_dbg_set_mes_debug_mode(pdd, true); 454 455 kfd_dbg_clear_dev_watch_id(pdd, watch_id); 456 457 return r; 458 } 459 460 int kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device *pdd, 461 uint64_t watch_address, 462 uint32_t watch_address_mask, 463 uint32_t *watch_id, 464 uint32_t watch_mode) 465 { 466 int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id); 467 uint32_t xcc_mask = pdd->dev->xcc_mask; 468 469 if (r) 470 return r; 471 472 if (!pdd->dev->kfd->shared_resources.enable_mes) { 473 r = debug_lock_and_unmap(pdd->dev->dqm); 474 if (r) { 475 kfd_dbg_clear_dev_watch_id(pdd, *watch_id); 476 return r; 477 } 478 } 479 480 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 481 for_each_inst(xcc_id, xcc_mask) 482 pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch( 483 pdd->dev->adev, 484 watch_address, 485 watch_address_mask, 486 *watch_id, 487 watch_mode, 488 pdd->dev->vm_info.last_vmid_kfd, 489 xcc_id); 490 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 491 492 if (!pdd->dev->kfd->shared_resources.enable_mes) 493 r = debug_map_and_unlock(pdd->dev->dqm); 494 else 495 r = kfd_dbg_set_mes_debug_mode(pdd, true); 496 497 /* HWS is broken so no point in HW rollback but release the watchpoint anyways */ 498 if (r) 499 kfd_dbg_clear_dev_watch_id(pdd, *watch_id); 500 501 return 0; 502 } 503 504 static void kfd_dbg_clear_process_address_watch(struct kfd_process *target) 505 { 506 int i, j; 507 508 for (i = 0; i < target->n_pdds; i++) 509 for (j = 0; j < MAX_WATCH_ADDRESSES; j++) 510 kfd_dbg_trap_clear_dev_address_watch(target->pdds[i], j); 511 } 512 513 int kfd_dbg_trap_set_flags(struct kfd_process *target, uint32_t *flags) 514 { 515 uint32_t prev_flags = target->dbg_flags; 516 int i, r = 0, rewind_count = 0; 517 518 for (i = 0; i < target->n_pdds; i++) { 519 struct kfd_topology_device *topo_dev = 520 kfd_topology_device_by_id(target->pdds[i]->dev->id); 521 uint32_t caps = topo_dev->node_props.capability; 522 uint32_t caps2 = topo_dev->node_props.capability2; 523 524 if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED) && 525 (*flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP)) { 526 *flags = prev_flags; 527 return -EACCES; 528 } 529 530 if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED) && 531 (*flags & KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP)) { 532 *flags = prev_flags; 533 return -EACCES; 534 } 535 536 if (!(caps2 & HSA_CAP2_TRAP_DEBUG_LDS_OUT_OF_ADDR_RANGE_SUPPORTED) && 537 (*flags & KFD_DBG_TRAP_FLAG_LDS_OUT_OF_ADDR_RANGE)) { 538 *flags = prev_flags; 539 return -EACCES; 540 } 541 } 542 543 target->dbg_flags = *flags; 544 *flags = prev_flags; 545 for (i = 0; i < target->n_pdds; i++) { 546 struct kfd_process_device *pdd = target->pdds[i]; 547 548 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 549 continue; 550 551 if (!pdd->dev->kfd->shared_resources.enable_mes) 552 r = debug_refresh_runlist(pdd->dev->dqm); 553 else 554 r = kfd_dbg_set_mes_debug_mode(pdd, true); 555 556 if (r) { 557 target->dbg_flags = prev_flags; 558 break; 559 } 560 561 rewind_count++; 562 } 563 564 /* Rewind flags */ 565 if (r) { 566 target->dbg_flags = prev_flags; 567 568 for (i = 0; i < rewind_count; i++) { 569 struct kfd_process_device *pdd = target->pdds[i]; 570 571 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 572 continue; 573 574 if (!pdd->dev->kfd->shared_resources.enable_mes) 575 debug_refresh_runlist(pdd->dev->dqm); 576 else 577 kfd_dbg_set_mes_debug_mode(pdd, true); 578 } 579 } 580 581 return r; 582 } 583 584 /* kfd_dbg_trap_deactivate: 585 * target: target process 586 * unwind: If this is unwinding a failed kfd_dbg_trap_enable() 587 * unwind_count: 588 * If unwind == true, how far down the pdd list we need 589 * to unwind 590 * else: ignored 591 */ 592 void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind_count) 593 { 594 int i; 595 596 if (!unwind) { 597 uint32_t flags = 0; 598 int resume_count = resume_queues(target, 0, NULL); 599 600 if (resume_count) 601 pr_debug("Resumed %d queues\n", resume_count); 602 603 cancel_work_sync(&target->debug_event_workarea); 604 kfd_dbg_clear_process_address_watch(target); 605 kfd_dbg_trap_set_wave_launch_mode(target, 0); 606 607 kfd_dbg_trap_set_flags(target, &flags); 608 } 609 610 for (i = 0; i < target->n_pdds; i++) { 611 struct kfd_process_device *pdd = target->pdds[i]; 612 613 /* If this is an unwind, and we have unwound the required 614 * enable calls on the pdd list, we need to stop now 615 * otherwise we may mess up another debugger session. 616 */ 617 if (unwind && i == unwind_count) 618 break; 619 620 kfd_process_set_trap_debug_flag(&pdd->qpd, false); 621 622 /* GFX off is already disabled by debug activate if not RLC restore supported. */ 623 if (kfd_dbg_is_rlc_restore_supported(pdd->dev)) 624 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 625 pdd->spi_dbg_override = 626 pdd->dev->kfd2kgd->disable_debug_trap( 627 pdd->dev->adev, 628 target->runtime_info.ttmp_setup, 629 pdd->dev->vm_info.last_vmid_kfd); 630 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 631 632 if (!kfd_dbg_is_per_vmid_supported(pdd->dev) && 633 release_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd)) 634 pr_err("Failed to release debug vmid on [%i]\n", pdd->dev->id); 635 636 if (!pdd->dev->kfd->shared_resources.enable_mes) 637 debug_refresh_runlist(pdd->dev->dqm); 638 else 639 kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 640 } 641 642 kfd_dbg_set_workaround(target, false); 643 } 644 645 static void kfd_dbg_clean_exception_status(struct kfd_process *target) 646 { 647 struct process_queue_manager *pqm; 648 struct process_queue_node *pqn; 649 int i; 650 651 for (i = 0; i < target->n_pdds; i++) { 652 struct kfd_process_device *pdd = target->pdds[i]; 653 654 kfd_process_drain_interrupts(pdd); 655 656 pdd->exception_status = 0; 657 } 658 659 pqm = &target->pqm; 660 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 661 if (!pqn->q) 662 continue; 663 664 pqn->q->properties.exception_status = 0; 665 } 666 667 target->exception_status = 0; 668 } 669 670 int kfd_dbg_trap_disable(struct kfd_process *target) 671 { 672 if (!target->debug_trap_enabled) 673 return 0; 674 675 /* 676 * Defer deactivation to runtime if runtime not enabled otherwise reset 677 * attached running target runtime state to enable for re-attach. 678 */ 679 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) 680 kfd_dbg_trap_deactivate(target, false, 0); 681 else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 682 target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 683 684 cancel_work_sync(&target->debug_event_workarea); 685 fput(target->dbg_ev_file); 686 target->dbg_ev_file = NULL; 687 688 if (target->debugger_process) { 689 atomic_dec(&target->debugger_process->debugged_process_count); 690 target->debugger_process = NULL; 691 } 692 693 target->debug_trap_enabled = false; 694 kfd_dbg_clean_exception_status(target); 695 kfd_unref_process(target); 696 697 return 0; 698 } 699 700 int kfd_dbg_trap_activate(struct kfd_process *target) 701 { 702 int i, r = 0; 703 704 r = kfd_dbg_set_workaround(target, true); 705 if (r) 706 return r; 707 708 for (i = 0; i < target->n_pdds; i++) { 709 struct kfd_process_device *pdd = target->pdds[i]; 710 711 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) { 712 r = reserve_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd); 713 714 if (r) { 715 target->runtime_info.runtime_state = (r == -EBUSY) ? 716 DEBUG_RUNTIME_STATE_ENABLED_BUSY : 717 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 718 719 goto unwind_err; 720 } 721 } 722 723 /* Disable GFX OFF to prevent garbage read/writes to debug registers. 724 * If RLC restore of debug registers is not supported and runtime enable 725 * hasn't done so already on ttmp setup request, restore the trap config registers. 726 * 727 * If RLC restore of debug registers is not supported, keep gfx off disabled for 728 * the debug session. 729 */ 730 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 731 if (!(kfd_dbg_is_rlc_restore_supported(pdd->dev) || 732 target->runtime_info.ttmp_setup)) 733 pdd->dev->kfd2kgd->enable_debug_trap(pdd->dev->adev, true, 734 pdd->dev->vm_info.last_vmid_kfd); 735 736 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 737 pdd->dev->adev, 738 false, 739 pdd->dev->vm_info.last_vmid_kfd); 740 741 if (kfd_dbg_is_rlc_restore_supported(pdd->dev)) 742 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 743 744 /* 745 * Setting the debug flag in the trap handler requires that the TMA has been 746 * allocated, which occurs during CWSR initialization. 747 * In the event that CWSR has not been initialized at this point, setting the 748 * flag will be called again during CWSR initialization if the target process 749 * is still debug enabled. 750 */ 751 kfd_process_set_trap_debug_flag(&pdd->qpd, true); 752 753 if (!pdd->dev->kfd->shared_resources.enable_mes) 754 r = debug_refresh_runlist(pdd->dev->dqm); 755 else 756 r = kfd_dbg_set_mes_debug_mode(pdd, true); 757 758 if (r) { 759 target->runtime_info.runtime_state = 760 DEBUG_RUNTIME_STATE_ENABLED_ERROR; 761 goto unwind_err; 762 } 763 } 764 765 return 0; 766 767 unwind_err: 768 /* Enabling debug failed, we need to disable on 769 * all GPUs so the enable is all or nothing. 770 */ 771 kfd_dbg_trap_deactivate(target, true, i); 772 return r; 773 } 774 775 int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd, 776 void __user *runtime_info, uint32_t *runtime_size) 777 { 778 struct file *f; 779 uint32_t copy_size; 780 int i, r = 0; 781 782 if (target->debug_trap_enabled) 783 return -EALREADY; 784 785 /* Enable pre-checks */ 786 for (i = 0; i < target->n_pdds; i++) { 787 struct kfd_process_device *pdd = target->pdds[i]; 788 789 if (!KFD_IS_SOC15(pdd->dev)) 790 return -ENODEV; 791 792 if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) || 793 kfd_dbg_has_cwsr_workaround(pdd->dev))) 794 return -EBUSY; 795 } 796 797 copy_size = min((size_t)(*runtime_size), sizeof(target->runtime_info)); 798 799 f = fget(fd); 800 if (!f) { 801 pr_err("Failed to get file for (%i)\n", fd); 802 return -EBADF; 803 } 804 805 target->dbg_ev_file = f; 806 807 /* defer activation to runtime if not runtime enabled */ 808 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) 809 kfd_dbg_trap_activate(target); 810 811 /* We already hold the process reference but hold another one for the 812 * debug session. 813 */ 814 kref_get(&target->ref); 815 target->debug_trap_enabled = true; 816 817 if (target->debugger_process) 818 atomic_inc(&target->debugger_process->debugged_process_count); 819 820 if (copy_to_user(runtime_info, (void *)&target->runtime_info, copy_size)) { 821 kfd_dbg_trap_deactivate(target, false, 0); 822 r = -EFAULT; 823 } 824 825 *runtime_size = sizeof(target->runtime_info); 826 827 return r; 828 } 829 830 static int kfd_dbg_validate_trap_override_request(struct kfd_process *p, 831 uint32_t trap_override, 832 uint32_t trap_mask_request, 833 uint32_t *trap_mask_supported) 834 { 835 int i = 0; 836 837 *trap_mask_supported = 0xffffffff; 838 839 for (i = 0; i < p->n_pdds; i++) { 840 struct kfd_process_device *pdd = p->pdds[i]; 841 int err = pdd->dev->kfd2kgd->validate_trap_override_request( 842 pdd->dev->adev, 843 trap_override, 844 trap_mask_supported); 845 846 if (err) 847 return err; 848 } 849 850 if (trap_mask_request & ~*trap_mask_supported) 851 return -EACCES; 852 853 return 0; 854 } 855 856 int kfd_dbg_trap_set_wave_launch_override(struct kfd_process *target, 857 uint32_t trap_override, 858 uint32_t trap_mask_bits, 859 uint32_t trap_mask_request, 860 uint32_t *trap_mask_prev, 861 uint32_t *trap_mask_supported) 862 { 863 int r = 0, i; 864 865 r = kfd_dbg_validate_trap_override_request(target, 866 trap_override, 867 trap_mask_request, 868 trap_mask_supported); 869 870 if (r) 871 return r; 872 873 for (i = 0; i < target->n_pdds; i++) { 874 struct kfd_process_device *pdd = target->pdds[i]; 875 876 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 877 pdd->spi_dbg_override = pdd->dev->kfd2kgd->set_wave_launch_trap_override( 878 pdd->dev->adev, 879 pdd->dev->vm_info.last_vmid_kfd, 880 trap_override, 881 trap_mask_bits, 882 trap_mask_request, 883 trap_mask_prev, 884 pdd->spi_dbg_override); 885 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 886 887 if (!pdd->dev->kfd->shared_resources.enable_mes) 888 r = debug_refresh_runlist(pdd->dev->dqm); 889 else 890 r = kfd_dbg_set_mes_debug_mode(pdd, true); 891 892 if (r) 893 break; 894 } 895 896 return r; 897 } 898 899 int kfd_dbg_trap_set_wave_launch_mode(struct kfd_process *target, 900 uint8_t wave_launch_mode) 901 { 902 int r = 0, i; 903 904 if (wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL && 905 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT && 906 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG) 907 return -EINVAL; 908 909 for (i = 0; i < target->n_pdds; i++) { 910 struct kfd_process_device *pdd = target->pdds[i]; 911 912 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 913 pdd->spi_dbg_launch_mode = pdd->dev->kfd2kgd->set_wave_launch_mode( 914 pdd->dev->adev, 915 wave_launch_mode, 916 pdd->dev->vm_info.last_vmid_kfd); 917 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 918 919 if (!pdd->dev->kfd->shared_resources.enable_mes) 920 r = debug_refresh_runlist(pdd->dev->dqm); 921 else 922 r = kfd_dbg_set_mes_debug_mode(pdd, true); 923 924 if (r) 925 break; 926 } 927 928 return r; 929 } 930 931 int kfd_dbg_trap_query_exception_info(struct kfd_process *target, 932 uint32_t source_id, 933 uint32_t exception_code, 934 bool clear_exception, 935 void __user *info, 936 uint32_t *info_size) 937 { 938 bool found = false; 939 int r = 0; 940 uint32_t copy_size, actual_info_size = 0; 941 uint64_t *exception_status_ptr = NULL; 942 943 if (!target) 944 return -EINVAL; 945 946 if (!info || !info_size) 947 return -EINVAL; 948 949 mutex_lock(&target->event_mutex); 950 951 if (KFD_DBG_EC_TYPE_IS_QUEUE(exception_code)) { 952 /* Per queue exceptions */ 953 struct queue *queue = NULL; 954 int i; 955 956 for (i = 0; i < target->n_pdds; i++) { 957 struct kfd_process_device *pdd = target->pdds[i]; 958 struct qcm_process_device *qpd = &pdd->qpd; 959 960 list_for_each_entry(queue, &qpd->queues_list, list) { 961 if (!found && queue->properties.queue_id == source_id) { 962 found = true; 963 break; 964 } 965 } 966 if (found) 967 break; 968 } 969 970 if (!found) { 971 r = -EINVAL; 972 goto out; 973 } 974 975 if (!(queue->properties.exception_status & KFD_EC_MASK(exception_code))) { 976 r = -ENODATA; 977 goto out; 978 } 979 exception_status_ptr = &queue->properties.exception_status; 980 } else if (KFD_DBG_EC_TYPE_IS_DEVICE(exception_code)) { 981 /* Per device exceptions */ 982 struct kfd_process_device *pdd = NULL; 983 int i; 984 985 for (i = 0; i < target->n_pdds; i++) { 986 pdd = target->pdds[i]; 987 if (pdd->dev->id == source_id) { 988 found = true; 989 break; 990 } 991 } 992 993 if (!found) { 994 r = -EINVAL; 995 goto out; 996 } 997 998 if (!(pdd->exception_status & KFD_EC_MASK(exception_code))) { 999 r = -ENODATA; 1000 goto out; 1001 } 1002 1003 if (exception_code == EC_DEVICE_MEMORY_VIOLATION) { 1004 copy_size = min((size_t)(*info_size), pdd->vm_fault_exc_data_size); 1005 1006 if (copy_to_user(info, pdd->vm_fault_exc_data, copy_size)) { 1007 r = -EFAULT; 1008 goto out; 1009 } 1010 actual_info_size = pdd->vm_fault_exc_data_size; 1011 if (clear_exception) { 1012 kfree(pdd->vm_fault_exc_data); 1013 pdd->vm_fault_exc_data = NULL; 1014 pdd->vm_fault_exc_data_size = 0; 1015 } 1016 } 1017 exception_status_ptr = &pdd->exception_status; 1018 } else if (KFD_DBG_EC_TYPE_IS_PROCESS(exception_code)) { 1019 /* Per process exceptions */ 1020 if (!(target->exception_status & KFD_EC_MASK(exception_code))) { 1021 r = -ENODATA; 1022 goto out; 1023 } 1024 1025 if (exception_code == EC_PROCESS_RUNTIME) { 1026 copy_size = min((size_t)(*info_size), sizeof(target->runtime_info)); 1027 1028 if (copy_to_user(info, (void *)&target->runtime_info, copy_size)) { 1029 r = -EFAULT; 1030 goto out; 1031 } 1032 1033 actual_info_size = sizeof(target->runtime_info); 1034 } 1035 1036 exception_status_ptr = &target->exception_status; 1037 } else { 1038 pr_debug("Bad exception type [%i]\n", exception_code); 1039 r = -EINVAL; 1040 goto out; 1041 } 1042 1043 *info_size = actual_info_size; 1044 if (clear_exception) 1045 *exception_status_ptr &= ~KFD_EC_MASK(exception_code); 1046 out: 1047 mutex_unlock(&target->event_mutex); 1048 return r; 1049 } 1050 1051 int kfd_dbg_trap_device_snapshot(struct kfd_process *target, 1052 uint64_t exception_clear_mask, 1053 void __user *user_info, 1054 uint32_t *number_of_device_infos, 1055 uint32_t *entry_size) 1056 { 1057 struct kfd_dbg_device_info_entry device_info; 1058 uint32_t tmp_entry_size, tmp_num_devices; 1059 int i, r = 0; 1060 1061 if (!(target && user_info && number_of_device_infos && entry_size)) 1062 return -EINVAL; 1063 1064 tmp_entry_size = *entry_size; 1065 1066 tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds); 1067 *number_of_device_infos = target->n_pdds; 1068 *entry_size = min_t(size_t, *entry_size, sizeof(device_info)); 1069 1070 if (!tmp_num_devices) 1071 return 0; 1072 1073 memset(&device_info, 0, sizeof(device_info)); 1074 1075 mutex_lock(&target->event_mutex); 1076 1077 /* Run over all pdd of the process */ 1078 for (i = 0; i < tmp_num_devices; i++) { 1079 struct kfd_process_device *pdd = target->pdds[i]; 1080 struct kfd_topology_device *topo_dev = kfd_topology_device_by_id(pdd->dev->id); 1081 1082 device_info.gpu_id = pdd->dev->id; 1083 device_info.exception_status = pdd->exception_status; 1084 device_info.lds_base = pdd->lds_base; 1085 device_info.lds_limit = pdd->lds_limit; 1086 device_info.scratch_base = pdd->scratch_base; 1087 device_info.scratch_limit = pdd->scratch_limit; 1088 device_info.gpuvm_base = pdd->gpuvm_base; 1089 device_info.gpuvm_limit = pdd->gpuvm_limit; 1090 device_info.location_id = topo_dev->node_props.location_id; 1091 device_info.vendor_id = topo_dev->node_props.vendor_id; 1092 device_info.device_id = topo_dev->node_props.device_id; 1093 device_info.revision_id = pdd->dev->adev->pdev->revision; 1094 device_info.subsystem_vendor_id = pdd->dev->adev->pdev->subsystem_vendor; 1095 device_info.subsystem_device_id = pdd->dev->adev->pdev->subsystem_device; 1096 device_info.fw_version = pdd->dev->kfd->mec_fw_version; 1097 device_info.gfx_target_version = 1098 topo_dev->node_props.gfx_target_version; 1099 device_info.simd_count = topo_dev->node_props.simd_count; 1100 device_info.max_waves_per_simd = 1101 topo_dev->node_props.max_waves_per_simd; 1102 device_info.array_count = topo_dev->node_props.array_count; 1103 device_info.simd_arrays_per_engine = 1104 topo_dev->node_props.simd_arrays_per_engine; 1105 device_info.num_xcc = NUM_XCC(pdd->dev->xcc_mask); 1106 device_info.capability = topo_dev->node_props.capability; 1107 device_info.debug_prop = topo_dev->node_props.debug_prop; 1108 1109 if (exception_clear_mask) 1110 pdd->exception_status &= ~exception_clear_mask; 1111 1112 if (copy_to_user(user_info, &device_info, *entry_size)) { 1113 r = -EFAULT; 1114 break; 1115 } 1116 1117 user_info += tmp_entry_size; 1118 } 1119 1120 mutex_unlock(&target->event_mutex); 1121 1122 return r; 1123 } 1124 1125 void kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process *target, 1126 uint64_t exception_set_mask) 1127 { 1128 uint64_t found_mask = 0; 1129 struct process_queue_manager *pqm; 1130 struct process_queue_node *pqn; 1131 static const char write_data = '.'; 1132 loff_t pos = 0; 1133 int i; 1134 1135 mutex_lock(&target->event_mutex); 1136 1137 found_mask |= target->exception_status; 1138 1139 pqm = &target->pqm; 1140 list_for_each_entry(pqn, &pqm->queues, process_queue_list) { 1141 if (!pqn->q) 1142 continue; 1143 1144 found_mask |= pqn->q->properties.exception_status; 1145 } 1146 1147 for (i = 0; i < target->n_pdds; i++) { 1148 struct kfd_process_device *pdd = target->pdds[i]; 1149 1150 found_mask |= pdd->exception_status; 1151 } 1152 1153 if (exception_set_mask & found_mask) 1154 kernel_write(target->dbg_ev_file, &write_data, 1, &pos); 1155 1156 target->exception_enable_mask = exception_set_mask; 1157 1158 mutex_unlock(&target->event_mutex); 1159 } 1160