1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/capability.h> 25 #include <linux/device.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/overflow.h> 30 #include <linux/sched.h> 31 #include <linux/slab.h> 32 #include <linux/uaccess.h> 33 #include <linux/compat.h> 34 #include <uapi/linux/kfd_ioctl.h> 35 #include <linux/time.h> 36 #include <linux/mm.h> 37 #include <linux/mman.h> 38 #include <linux/ptrace.h> 39 #include <linux/dma-buf.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 #include "kfd_debug.h" 48 #include "amdgpu_ptl.h" 49 50 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 51 static int kfd_open(struct inode *, struct file *); 52 static int kfd_release(struct inode *, struct file *); 53 static int kfd_mmap(struct file *, struct vm_area_struct *); 54 55 static const char kfd_dev_name[] = "kfd"; 56 57 static const struct file_operations kfd_fops = { 58 .owner = THIS_MODULE, 59 .unlocked_ioctl = kfd_ioctl, 60 .compat_ioctl = compat_ptr_ioctl, 61 .open = kfd_open, 62 .release = kfd_release, 63 .mmap = kfd_mmap, 64 }; 65 66 static int kfd_char_dev_major = -1; 67 struct device *kfd_device; 68 static const struct class kfd_class = { 69 .name = kfd_dev_name, 70 }; 71 72 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 73 { 74 struct kfd_process_device *pdd; 75 76 mutex_lock(&p->mutex); 77 pdd = kfd_process_device_data_by_id(p, gpu_id); 78 79 if (pdd) 80 return pdd; 81 82 mutex_unlock(&p->mutex); 83 return NULL; 84 } 85 86 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 87 { 88 mutex_unlock(&pdd->process->mutex); 89 } 90 91 int kfd_chardev_init(void) 92 { 93 int err = 0; 94 95 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 96 err = kfd_char_dev_major; 97 if (err < 0) 98 goto err_register_chrdev; 99 100 err = class_register(&kfd_class); 101 if (err) 102 goto err_class_create; 103 104 kfd_device = device_create(&kfd_class, NULL, 105 MKDEV(kfd_char_dev_major, 0), 106 NULL, kfd_dev_name); 107 err = PTR_ERR(kfd_device); 108 if (IS_ERR(kfd_device)) 109 goto err_device_create; 110 111 return 0; 112 113 err_device_create: 114 class_unregister(&kfd_class); 115 err_class_create: 116 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 117 err_register_chrdev: 118 return err; 119 } 120 121 void kfd_chardev_exit(void) 122 { 123 device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0)); 124 class_unregister(&kfd_class); 125 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 126 kfd_device = NULL; 127 } 128 129 130 static int kfd_open(struct inode *inode, struct file *filep) 131 { 132 struct kfd_process *process; 133 bool is_32bit_user_mode; 134 135 if (iminor(inode) != 0) 136 return -ENODEV; 137 138 is_32bit_user_mode = in_compat_syscall(); 139 140 if (is_32bit_user_mode) { 141 dev_warn(kfd_device, 142 "Process %d (32-bit) failed to open /dev/kfd\n" 143 "32-bit processes are not supported by amdkfd\n", 144 current->pid); 145 return -EPERM; 146 } 147 148 process = kfd_create_process(current); 149 if (IS_ERR(process)) 150 return PTR_ERR(process); 151 152 /* filep now owns the reference returned by kfd_create_process */ 153 filep->private_data = process; 154 155 dev_dbg(kfd_device, "process pid %d opened kfd node, compat mode (32 bit) - %d\n", 156 process->lead_thread->pid, process->is_32bit_user_mode); 157 158 return 0; 159 } 160 161 static int kfd_release(struct inode *inode, struct file *filep) 162 { 163 struct kfd_process *process = filep->private_data; 164 165 if (!process) 166 return 0; 167 168 if (process->context_id != KFD_CONTEXT_ID_PRIMARY) 169 kfd_process_notifier_release_internal(process); 170 171 kfd_unref_process(process); 172 173 return 0; 174 } 175 176 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 177 void *data) 178 { 179 struct kfd_ioctl_get_version_args *args = data; 180 181 args->major_version = KFD_IOCTL_MAJOR_VERSION; 182 args->minor_version = KFD_IOCTL_MINOR_VERSION; 183 184 return 0; 185 } 186 187 static int set_queue_properties_from_user(struct queue_properties *q_properties, 188 struct kfd_ioctl_create_queue_args *args) 189 { 190 /* 191 * Repurpose queue percentage to accommodate new features: 192 * bit 0-7: queue percentage 193 * bit 8-15: pm4_target_xcc 194 */ 195 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 196 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 197 return -EINVAL; 198 } 199 200 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 201 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 202 return -EINVAL; 203 } 204 205 if ((args->ring_base_address) && 206 (!access_ok((const void __user *) args->ring_base_address, 207 sizeof(uint64_t)))) { 208 pr_err("Can't access ring base address\n"); 209 return -EFAULT; 210 } 211 212 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 213 pr_err("Ring size must be a power of 2 or 0\n"); 214 return -EINVAL; 215 } 216 217 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 218 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 219 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 220 } 221 222 if ((args->metadata_ring_size != 0) && !is_power_of_2(args->metadata_ring_size)) { 223 pr_err("Metadata ring size must be a power of 2 or 0\n"); 224 return -EINVAL; 225 } 226 227 if (!access_ok((const void __user *) args->read_pointer_address, 228 sizeof(uint32_t))) { 229 pr_err("Can't access read pointer\n"); 230 return -EFAULT; 231 } 232 233 if (!access_ok((const void __user *) args->write_pointer_address, 234 sizeof(uint32_t))) { 235 pr_err("Can't access write pointer\n"); 236 return -EFAULT; 237 } 238 239 if (args->eop_buffer_address && 240 !access_ok((const void __user *) args->eop_buffer_address, 241 sizeof(uint32_t))) { 242 pr_debug("Can't access eop buffer"); 243 return -EFAULT; 244 } 245 246 if (args->ctx_save_restore_address && 247 !access_ok((const void __user *) args->ctx_save_restore_address, 248 sizeof(uint32_t))) { 249 pr_debug("Can't access ctx save restore buffer"); 250 return -EFAULT; 251 } 252 253 q_properties->is_interop = false; 254 q_properties->is_gws = false; 255 q_properties->queue_percent = args->queue_percentage & 0xFF; 256 /* bit 8-15 are repurposed to be PM4 target XCC */ 257 q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 258 q_properties->priority = args->queue_priority; 259 q_properties->queue_address = args->ring_base_address; 260 q_properties->queue_size = args->ring_size; 261 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 262 q_properties->metadata_queue_size = args->metadata_ring_size; 263 264 q_properties->read_ptr = (void __user *)args->read_pointer_address; 265 q_properties->write_ptr = (void __user *)args->write_pointer_address; 266 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 267 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 268 q_properties->ctx_save_restore_area_address = 269 args->ctx_save_restore_address; 270 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 271 q_properties->ctl_stack_size = args->ctl_stack_size; 272 q_properties->sdma_engine_id = args->sdma_engine_id; 273 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 274 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 275 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 276 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 277 q_properties->type = KFD_QUEUE_TYPE_SDMA; 278 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 279 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 280 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID) 281 q_properties->type = KFD_QUEUE_TYPE_SDMA_BY_ENG_ID; 282 else 283 return -ENOTSUPP; 284 285 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 286 q_properties->format = KFD_QUEUE_FORMAT_AQL; 287 else 288 q_properties->format = KFD_QUEUE_FORMAT_PM4; 289 290 pr_debug("Queue Percentage: %d, %d\n", 291 q_properties->queue_percent, args->queue_percentage); 292 293 pr_debug("Queue Priority: %d, %d\n", 294 q_properties->priority, args->queue_priority); 295 296 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 297 q_properties->queue_address, args->ring_base_address); 298 299 pr_debug("Queue Size: 0x%llX, %u\n", 300 q_properties->queue_size, args->ring_size); 301 302 pr_debug("Queue r/w Pointers: %px, %px\n", 303 q_properties->read_ptr, 304 q_properties->write_ptr); 305 306 pr_debug("Queue Format: %d\n", q_properties->format); 307 308 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 309 310 pr_debug("Queue CTX save area: 0x%llX\n", 311 q_properties->ctx_save_restore_area_address); 312 313 return 0; 314 } 315 316 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 317 void *data) 318 { 319 struct kfd_ioctl_create_queue_args *args = data; 320 struct kfd_node *dev; 321 int err = 0; 322 unsigned int queue_id; 323 struct kfd_process_device *pdd; 324 struct queue_properties q_properties; 325 uint32_t doorbell_offset_in_process = 0; 326 327 memset(&q_properties, 0, sizeof(struct queue_properties)); 328 329 pr_debug("Creating queue ioctl\n"); 330 331 err = set_queue_properties_from_user(&q_properties, args); 332 if (err) 333 return err; 334 335 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 336 337 mutex_lock(&p->mutex); 338 339 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 340 if (!pdd) { 341 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 342 err = -EINVAL; 343 goto err_pdd; 344 } 345 dev = pdd->dev; 346 347 pdd = kfd_bind_process_to_device(dev, p); 348 if (IS_ERR(pdd)) { 349 err = -ESRCH; 350 goto err_bind_process; 351 } 352 353 if (q_properties.type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) { 354 int max_sdma_eng_id = kfd_get_num_sdma_engines(dev) + 355 kfd_get_num_xgmi_sdma_engines(dev) - 1; 356 357 if (q_properties.sdma_engine_id > max_sdma_eng_id) { 358 err = -EINVAL; 359 pr_err("sdma_engine_id %i exceeds maximum id of %i\n", 360 q_properties.sdma_engine_id, max_sdma_eng_id); 361 goto err_sdma_engine_id; 362 } 363 } 364 365 if (!pdd->qpd.proc_doorbells) { 366 err = kfd_alloc_process_doorbells(dev->kfd, pdd); 367 if (err) { 368 pr_debug("failed to allocate process doorbells\n"); 369 goto err_bind_process; 370 } 371 } 372 373 err = kfd_queue_acquire_buffers(pdd, &q_properties); 374 if (err) { 375 pr_debug("failed to acquire user queue buffers\n"); 376 goto err_acquire_queue_buf; 377 } 378 379 pr_debug("Creating queue for process pid %d on gpu 0x%x\n", 380 p->lead_thread->pid, 381 dev->id); 382 383 err = pqm_create_queue(&p->pqm, dev, &q_properties, &queue_id, 384 NULL, NULL, NULL, &doorbell_offset_in_process); 385 if (err != 0) 386 goto err_create_queue; 387 388 args->queue_id = queue_id; 389 390 391 /* Return gpu_id as doorbell offset for mmap usage */ 392 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 393 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 394 if (KFD_IS_SOC15(dev)) 395 /* On SOC15 ASICs, include the doorbell offset within the 396 * process doorbell frame, which is 2 pages. 397 */ 398 args->doorbell_offset |= doorbell_offset_in_process; 399 400 mutex_unlock(&p->mutex); 401 402 pr_debug("Queue id %d was created successfully\n", args->queue_id); 403 404 pr_debug("Ring buffer address == 0x%016llX\n", 405 args->ring_base_address); 406 407 pr_debug("Read ptr address == 0x%016llX\n", 408 args->read_pointer_address); 409 410 pr_debug("Write ptr address == 0x%016llX\n", 411 args->write_pointer_address); 412 413 kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0); 414 return 0; 415 416 err_create_queue: 417 kfd_queue_unref_bo_vas(pdd, &q_properties); 418 kfd_queue_release_buffers(pdd, &q_properties); 419 err_acquire_queue_buf: 420 err_sdma_engine_id: 421 err_bind_process: 422 err_pdd: 423 mutex_unlock(&p->mutex); 424 return err; 425 } 426 427 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 428 void *data) 429 { 430 int retval; 431 struct kfd_ioctl_destroy_queue_args *args = data; 432 433 pr_debug("Destroying queue id %d for process pid %d\n", 434 args->queue_id, 435 p->lead_thread->pid); 436 437 mutex_lock(&p->mutex); 438 439 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 440 441 mutex_unlock(&p->mutex); 442 return retval; 443 } 444 445 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 446 void *data) 447 { 448 int retval; 449 struct kfd_ioctl_update_queue_args *args = data; 450 struct queue_properties properties; 451 452 /* 453 * Repurpose queue percentage to accommodate new features: 454 * bit 0-7: queue percentage 455 * bit 8-15: pm4_target_xcc 456 */ 457 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 458 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 459 return -EINVAL; 460 } 461 462 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 463 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 464 return -EINVAL; 465 } 466 467 if ((args->ring_base_address) && 468 (!access_ok((const void __user *) args->ring_base_address, 469 sizeof(uint64_t)))) { 470 pr_err("Can't access ring base address\n"); 471 return -EFAULT; 472 } 473 474 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 475 pr_err("Ring size must be a power of 2 or 0\n"); 476 return -EINVAL; 477 } 478 479 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 480 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 481 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 482 } 483 484 properties.queue_address = args->ring_base_address; 485 properties.queue_size = args->ring_size; 486 properties.queue_percent = args->queue_percentage & 0xFF; 487 /* bit 8-15 are repurposed to be PM4 target XCC */ 488 properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 489 properties.priority = args->queue_priority; 490 491 pr_debug("Updating queue id %d for process pid %d\n", 492 args->queue_id, p->lead_thread->pid); 493 494 mutex_lock(&p->mutex); 495 496 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 497 498 mutex_unlock(&p->mutex); 499 500 return retval; 501 } 502 503 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 504 void *data) 505 { 506 int retval; 507 const int max_num_cus = 1024; 508 struct kfd_ioctl_set_cu_mask_args *args = data; 509 struct mqd_update_info minfo = {0}; 510 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 511 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 512 513 if ((args->num_cu_mask % 32) != 0) { 514 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 515 args->num_cu_mask); 516 return -EINVAL; 517 } 518 519 minfo.cu_mask.count = args->num_cu_mask; 520 if (minfo.cu_mask.count == 0) { 521 pr_debug("CU mask cannot be 0"); 522 return -EINVAL; 523 } 524 525 /* To prevent an unreasonably large CU mask size, set an arbitrary 526 * limit of max_num_cus bits. We can then just drop any CU mask bits 527 * past max_num_cus bits and just use the first max_num_cus bits. 528 */ 529 if (minfo.cu_mask.count > max_num_cus) { 530 pr_debug("CU mask cannot be greater than 1024 bits"); 531 minfo.cu_mask.count = max_num_cus; 532 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 533 } 534 535 minfo.cu_mask.ptr = memdup_user(cu_mask_ptr, cu_mask_size); 536 if (IS_ERR(minfo.cu_mask.ptr)) { 537 pr_debug("Could not copy CU mask from userspace"); 538 return PTR_ERR(minfo.cu_mask.ptr); 539 } 540 541 mutex_lock(&p->mutex); 542 543 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 544 545 mutex_unlock(&p->mutex); 546 547 kfree(minfo.cu_mask.ptr); 548 return retval; 549 } 550 551 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 552 struct kfd_process *p, void *data) 553 { 554 struct kfd_ioctl_get_queue_wave_state_args *args = data; 555 int r; 556 557 mutex_lock(&p->mutex); 558 559 r = pqm_get_wave_state(&p->pqm, args->queue_id, 560 (void __user *)args->ctl_stack_address, 561 &args->ctl_stack_used_size, 562 &args->save_area_used_size); 563 564 mutex_unlock(&p->mutex); 565 566 return r; 567 } 568 569 static int kfd_ioctl_set_memory_policy(struct file *filep, 570 struct kfd_process *p, void *data) 571 { 572 struct kfd_ioctl_set_memory_policy_args *args = data; 573 int err = 0; 574 struct kfd_process_device *pdd; 575 enum cache_policy default_policy, alternate_policy; 576 577 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 578 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 579 return -EINVAL; 580 } 581 582 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 583 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 584 return -EINVAL; 585 } 586 587 mutex_lock(&p->mutex); 588 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 589 if (!pdd) { 590 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 591 err = -EINVAL; 592 goto err_pdd; 593 } 594 595 pdd = kfd_bind_process_to_device(pdd->dev, p); 596 if (IS_ERR(pdd)) { 597 err = -ESRCH; 598 goto out; 599 } 600 601 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 602 ? cache_policy_coherent : cache_policy_noncoherent; 603 604 alternate_policy = 605 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 606 ? cache_policy_coherent : cache_policy_noncoherent; 607 608 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 609 &pdd->qpd, 610 default_policy, 611 alternate_policy, 612 (void __user *)args->alternate_aperture_base, 613 args->alternate_aperture_size, 614 args->misc_process_flag)) 615 err = -EINVAL; 616 617 out: 618 err_pdd: 619 mutex_unlock(&p->mutex); 620 621 return err; 622 } 623 624 static int kfd_ioctl_set_trap_handler(struct file *filep, 625 struct kfd_process *p, void *data) 626 { 627 struct kfd_ioctl_set_trap_handler_args *args = data; 628 int err = 0; 629 struct kfd_process_device *pdd; 630 631 mutex_lock(&p->mutex); 632 633 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 634 if (!pdd) { 635 err = -EINVAL; 636 goto err_pdd; 637 } 638 639 pdd = kfd_bind_process_to_device(pdd->dev, p); 640 if (IS_ERR(pdd)) { 641 err = -ESRCH; 642 goto out; 643 } 644 645 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 646 647 out: 648 err_pdd: 649 mutex_unlock(&p->mutex); 650 651 return err; 652 } 653 654 static int kfd_ioctl_dbg_register(struct file *filep, 655 struct kfd_process *p, void *data) 656 { 657 return -EPERM; 658 } 659 660 static int kfd_ioctl_dbg_unregister(struct file *filep, 661 struct kfd_process *p, void *data) 662 { 663 return -EPERM; 664 } 665 666 static int kfd_ioctl_dbg_address_watch(struct file *filep, 667 struct kfd_process *p, void *data) 668 { 669 return -EPERM; 670 } 671 672 /* Parse and generate fixed size data structure for wave control */ 673 static int kfd_ioctl_dbg_wave_control(struct file *filep, 674 struct kfd_process *p, void *data) 675 { 676 return -EPERM; 677 } 678 679 static int kfd_ioctl_get_clock_counters(struct file *filep, 680 struct kfd_process *p, void *data) 681 { 682 struct kfd_ioctl_get_clock_counters_args *args = data; 683 struct kfd_process_device *pdd; 684 685 mutex_lock(&p->mutex); 686 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 687 mutex_unlock(&p->mutex); 688 if (pdd) 689 /* Reading GPU clock counter from KGD */ 690 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 691 else 692 /* Node without GPU resource */ 693 args->gpu_clock_counter = 0; 694 695 /* No access to rdtsc. Using raw monotonic time */ 696 args->cpu_clock_counter = ktime_get_raw_ns(); 697 args->system_clock_counter = ktime_get_boottime_ns(); 698 699 /* Since the counter is in nano-seconds we use 1GHz frequency */ 700 args->system_clock_freq = 1000000000; 701 702 return 0; 703 } 704 705 706 static int kfd_ioctl_get_process_apertures(struct file *filp, 707 struct kfd_process *p, void *data) 708 { 709 struct kfd_ioctl_get_process_apertures_args *args = data; 710 struct kfd_process_device_apertures *pAperture; 711 int i; 712 713 dev_dbg(kfd_device, "get apertures for process pid %d", p->lead_thread->pid); 714 715 args->num_of_nodes = 0; 716 717 mutex_lock(&p->mutex); 718 /* Run over all pdd of the process */ 719 for (i = 0; i < p->n_pdds; i++) { 720 struct kfd_process_device *pdd = p->pdds[i]; 721 722 pAperture = 723 &args->process_apertures[args->num_of_nodes]; 724 pAperture->gpu_id = pdd->dev->id; 725 pAperture->lds_base = pdd->lds_base; 726 pAperture->lds_limit = pdd->lds_limit; 727 pAperture->gpuvm_base = pdd->gpuvm_base; 728 pAperture->gpuvm_limit = pdd->gpuvm_limit; 729 pAperture->scratch_base = pdd->scratch_base; 730 pAperture->scratch_limit = pdd->scratch_limit; 731 732 dev_dbg(kfd_device, 733 "node id %u\n", args->num_of_nodes); 734 dev_dbg(kfd_device, 735 "gpu id %u\n", pdd->dev->id); 736 dev_dbg(kfd_device, 737 "lds_base %llX\n", pdd->lds_base); 738 dev_dbg(kfd_device, 739 "lds_limit %llX\n", pdd->lds_limit); 740 dev_dbg(kfd_device, 741 "gpuvm_base %llX\n", pdd->gpuvm_base); 742 dev_dbg(kfd_device, 743 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 744 dev_dbg(kfd_device, 745 "scratch_base %llX\n", pdd->scratch_base); 746 dev_dbg(kfd_device, 747 "scratch_limit %llX\n", pdd->scratch_limit); 748 749 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 750 break; 751 } 752 mutex_unlock(&p->mutex); 753 754 return 0; 755 } 756 757 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 758 struct kfd_process *p, void *data) 759 { 760 struct kfd_ioctl_get_process_apertures_new_args *args = data; 761 struct kfd_process_device_apertures *pa; 762 int ret; 763 int i; 764 765 dev_dbg(kfd_device, "get apertures for process pid %d", 766 p->lead_thread->pid); 767 768 if (args->num_of_nodes == 0) { 769 /* Return number of nodes, so that user space can alloacate 770 * sufficient memory 771 */ 772 mutex_lock(&p->mutex); 773 args->num_of_nodes = p->n_pdds; 774 goto out_unlock; 775 } 776 777 if (args->num_of_nodes > kfd_topology_get_num_devices()) 778 return -EINVAL; 779 780 /* Fill in process-aperture information for all available 781 * nodes, but not more than args->num_of_nodes as that is 782 * the amount of memory allocated by user 783 */ 784 pa = kzalloc_objs(struct kfd_process_device_apertures, 785 args->num_of_nodes); 786 if (!pa) 787 return -ENOMEM; 788 789 mutex_lock(&p->mutex); 790 791 if (!p->n_pdds) { 792 args->num_of_nodes = 0; 793 kfree(pa); 794 goto out_unlock; 795 } 796 797 /* Run over all pdd of the process */ 798 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 799 struct kfd_process_device *pdd = p->pdds[i]; 800 801 pa[i].gpu_id = pdd->dev->id; 802 pa[i].lds_base = pdd->lds_base; 803 pa[i].lds_limit = pdd->lds_limit; 804 pa[i].gpuvm_base = pdd->gpuvm_base; 805 pa[i].gpuvm_limit = pdd->gpuvm_limit; 806 pa[i].scratch_base = pdd->scratch_base; 807 pa[i].scratch_limit = pdd->scratch_limit; 808 809 dev_dbg(kfd_device, 810 "gpu id %u\n", pdd->dev->id); 811 dev_dbg(kfd_device, 812 "lds_base %llX\n", pdd->lds_base); 813 dev_dbg(kfd_device, 814 "lds_limit %llX\n", pdd->lds_limit); 815 dev_dbg(kfd_device, 816 "gpuvm_base %llX\n", pdd->gpuvm_base); 817 dev_dbg(kfd_device, 818 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 819 dev_dbg(kfd_device, 820 "scratch_base %llX\n", pdd->scratch_base); 821 dev_dbg(kfd_device, 822 "scratch_limit %llX\n", pdd->scratch_limit); 823 } 824 mutex_unlock(&p->mutex); 825 826 args->num_of_nodes = i; 827 ret = copy_to_user( 828 (void __user *)args->kfd_process_device_apertures_ptr, 829 pa, 830 (i * sizeof(struct kfd_process_device_apertures))); 831 kfree(pa); 832 return ret ? -EFAULT : 0; 833 834 out_unlock: 835 mutex_unlock(&p->mutex); 836 return 0; 837 } 838 839 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 840 void *data) 841 { 842 struct kfd_ioctl_create_event_args *args = data; 843 int err; 844 845 /* For dGPUs the event page is allocated in user mode. The 846 * handle is passed to KFD with the first call to this IOCTL 847 * through the event_page_offset field. 848 */ 849 if (args->event_page_offset) { 850 mutex_lock(&p->mutex); 851 err = kfd_kmap_event_page(p, args->event_page_offset); 852 mutex_unlock(&p->mutex); 853 if (err) 854 return err; 855 } 856 857 err = kfd_event_create(filp, p, args->event_type, 858 args->auto_reset != 0, args->node_id, 859 &args->event_id, &args->event_trigger_data, 860 &args->event_page_offset, 861 &args->event_slot_index); 862 863 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 864 return err; 865 } 866 867 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 868 void *data) 869 { 870 struct kfd_ioctl_destroy_event_args *args = data; 871 872 return kfd_event_destroy(p, args->event_id); 873 } 874 875 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 876 void *data) 877 { 878 struct kfd_ioctl_set_event_args *args = data; 879 880 return kfd_set_event(p, args->event_id); 881 } 882 883 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 884 void *data) 885 { 886 struct kfd_ioctl_reset_event_args *args = data; 887 888 return kfd_reset_event(p, args->event_id); 889 } 890 891 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 892 void *data) 893 { 894 struct kfd_ioctl_wait_events_args *args = data; 895 896 return kfd_wait_on_events(p, args->num_events, 897 (void __user *)args->events_ptr, 898 (args->wait_for_all != 0), 899 &args->timeout, &args->wait_result); 900 } 901 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 902 struct kfd_process *p, void *data) 903 { 904 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 905 struct kfd_process_device *pdd; 906 struct kfd_node *dev; 907 long err; 908 909 mutex_lock(&p->mutex); 910 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 911 if (!pdd) { 912 err = -EINVAL; 913 goto err_pdd; 914 } 915 dev = pdd->dev; 916 917 pdd = kfd_bind_process_to_device(dev, p); 918 if (IS_ERR(pdd)) { 919 err = PTR_ERR(pdd); 920 goto bind_process_to_device_fail; 921 } 922 923 pdd->qpd.sh_hidden_private_base = args->va_addr; 924 925 mutex_unlock(&p->mutex); 926 927 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 928 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 929 dev->kfd2kgd->set_scratch_backing_va( 930 dev->adev, args->va_addr, pdd->qpd.vmid); 931 932 return 0; 933 934 bind_process_to_device_fail: 935 err_pdd: 936 mutex_unlock(&p->mutex); 937 return err; 938 } 939 940 static int kfd_ioctl_get_tile_config(struct file *filep, 941 struct kfd_process *p, void *data) 942 { 943 struct kfd_ioctl_get_tile_config_args *args = data; 944 struct kfd_process_device *pdd; 945 struct tile_config config; 946 int err = 0; 947 948 mutex_lock(&p->mutex); 949 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 950 mutex_unlock(&p->mutex); 951 if (!pdd) 952 return -EINVAL; 953 954 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 955 956 args->gb_addr_config = config.gb_addr_config; 957 args->num_banks = config.num_banks; 958 args->num_ranks = config.num_ranks; 959 960 if (args->num_tile_configs > config.num_tile_configs) 961 args->num_tile_configs = config.num_tile_configs; 962 err = copy_to_user((void __user *)args->tile_config_ptr, 963 config.tile_config_ptr, 964 args->num_tile_configs * sizeof(uint32_t)); 965 if (err) { 966 args->num_tile_configs = 0; 967 return -EFAULT; 968 } 969 970 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 971 args->num_macro_tile_configs = 972 config.num_macro_tile_configs; 973 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 974 config.macro_tile_config_ptr, 975 args->num_macro_tile_configs * sizeof(uint32_t)); 976 if (err) { 977 args->num_macro_tile_configs = 0; 978 return -EFAULT; 979 } 980 981 return 0; 982 } 983 984 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 985 void *data) 986 { 987 struct kfd_ioctl_acquire_vm_args *args = data; 988 struct kfd_process_device *pdd; 989 struct file *drm_file; 990 int ret; 991 992 drm_file = fget(args->drm_fd); 993 if (!drm_file) 994 return -EINVAL; 995 996 mutex_lock(&p->mutex); 997 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 998 if (!pdd) { 999 ret = -EINVAL; 1000 goto err_pdd; 1001 } 1002 1003 if (pdd->drm_file) { 1004 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 1005 goto err_drm_file; 1006 } 1007 1008 ret = kfd_process_device_init_vm(pdd, drm_file); 1009 if (ret) 1010 goto err_unlock; 1011 1012 /* On success, the PDD keeps the drm_file reference */ 1013 mutex_unlock(&p->mutex); 1014 1015 return 0; 1016 1017 err_unlock: 1018 err_pdd: 1019 err_drm_file: 1020 mutex_unlock(&p->mutex); 1021 fput(drm_file); 1022 return ret; 1023 } 1024 1025 bool kfd_dev_is_large_bar(struct kfd_node *dev) 1026 { 1027 if (dev->kfd->adev->debug_largebar) { 1028 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 1029 return true; 1030 } 1031 1032 if (dev->local_mem_info.local_mem_size_private == 0 && 1033 dev->local_mem_info.local_mem_size_public > 0) 1034 return true; 1035 1036 if (dev->local_mem_info.local_mem_size_public == 0 && 1037 dev->kfd->adev->gmc.is_app_apu) { 1038 pr_debug("APP APU, Consider like a large bar system\n"); 1039 return true; 1040 } 1041 1042 return false; 1043 } 1044 1045 static int kfd_ioctl_get_available_memory(struct file *filep, 1046 struct kfd_process *p, void *data) 1047 { 1048 struct kfd_ioctl_get_available_memory_args *args = data; 1049 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 1050 1051 if (!pdd) 1052 return -EINVAL; 1053 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev, 1054 pdd->dev->node_id); 1055 kfd_unlock_pdd(pdd); 1056 return 0; 1057 } 1058 1059 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 1060 struct kfd_process *p, void *data) 1061 { 1062 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 1063 struct kfd_process_device *pdd; 1064 void *mem; 1065 struct kfd_node *dev; 1066 int idr_handle; 1067 long err; 1068 uint64_t offset = args->mmap_offset; 1069 uint32_t flags = args->flags; 1070 1071 if (args->size == 0) 1072 return -EINVAL; 1073 1074 if (p->context_id != KFD_CONTEXT_ID_PRIMARY && (flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) { 1075 pr_debug("USERPTR is not supported on non-primary kfd_process\n"); 1076 1077 return -EOPNOTSUPP; 1078 } 1079 1080 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1081 /* Flush pending deferred work to avoid racing with deferred actions 1082 * from previous memory map changes (e.g. munmap). 1083 */ 1084 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1085 mutex_lock(&p->svms.lock); 1086 mmap_write_unlock(current->mm); 1087 1088 /* Skip a special case that allocates VRAM without VA, 1089 * VA will be invalid of 0. 1090 */ 1091 if (!(!args->va_addr && (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM)) && 1092 interval_tree_iter_first(&p->svms.objects, 1093 args->va_addr >> PAGE_SHIFT, 1094 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1095 pr_err("Address: 0x%llx already allocated by SVM\n", 1096 args->va_addr); 1097 mutex_unlock(&p->svms.lock); 1098 return -EADDRINUSE; 1099 } 1100 1101 /* When register user buffer check if it has been registered by svm by 1102 * buffer cpu virtual address. 1103 */ 1104 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) && 1105 interval_tree_iter_first(&p->svms.objects, 1106 args->mmap_offset >> PAGE_SHIFT, 1107 (args->mmap_offset + args->size - 1) >> PAGE_SHIFT)) { 1108 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n", 1109 args->mmap_offset); 1110 mutex_unlock(&p->svms.lock); 1111 return -EADDRINUSE; 1112 } 1113 1114 mutex_unlock(&p->svms.lock); 1115 #endif 1116 mutex_lock(&p->mutex); 1117 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1118 if (!pdd) { 1119 err = -EINVAL; 1120 goto err_pdd; 1121 } 1122 1123 dev = pdd->dev; 1124 1125 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1126 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1127 !kfd_dev_is_large_bar(dev)) { 1128 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1129 err = -EINVAL; 1130 goto err_large_bar; 1131 } 1132 1133 pdd = kfd_bind_process_to_device(dev, p); 1134 if (IS_ERR(pdd)) { 1135 err = PTR_ERR(pdd); 1136 goto err_unlock; 1137 } 1138 1139 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1140 if (args->size != kfd_doorbell_process_slice(dev->kfd)) { 1141 err = -EINVAL; 1142 goto err_unlock; 1143 } 1144 offset = kfd_get_process_doorbells(pdd); 1145 if (!offset) { 1146 err = -ENOMEM; 1147 goto err_unlock; 1148 } 1149 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1150 if (args->size != PAGE_SIZE) { 1151 err = -EINVAL; 1152 goto err_unlock; 1153 } 1154 offset = dev->adev->rmmio_remap.bus_addr; 1155 if (!offset || (PAGE_SIZE > 4096)) { 1156 err = -ENOMEM; 1157 goto err_unlock; 1158 } 1159 } 1160 1161 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1162 dev->adev, args->va_addr, args->size, 1163 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1164 flags, false); 1165 1166 if (err) 1167 goto err_unlock; 1168 1169 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1170 if (idr_handle < 0) { 1171 err = -EFAULT; 1172 goto err_free; 1173 } 1174 1175 /* Update the VRAM usage count */ 1176 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 1177 uint64_t size = args->size; 1178 1179 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) 1180 size >>= 1; 1181 atomic64_add(PAGE_ALIGN(size), &pdd->vram_usage); 1182 } 1183 1184 mutex_unlock(&p->mutex); 1185 1186 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1187 args->mmap_offset = offset; 1188 1189 /* MMIO is mapped through kfd device 1190 * Generate a kfd mmap offset 1191 */ 1192 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1193 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1194 | KFD_MMAP_GPU_ID(args->gpu_id); 1195 1196 return 0; 1197 1198 err_free: 1199 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1200 pdd->drm_priv, NULL); 1201 err_unlock: 1202 err_pdd: 1203 err_large_bar: 1204 mutex_unlock(&p->mutex); 1205 return err; 1206 } 1207 1208 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1209 struct kfd_process *p, void *data) 1210 { 1211 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1212 struct kfd_process_device *pdd; 1213 void *mem; 1214 int ret; 1215 uint64_t size = 0; 1216 1217 mutex_lock(&p->mutex); 1218 /* 1219 * Safeguard to prevent user space from freeing signal BO. 1220 * It will be freed at process termination. 1221 */ 1222 if (p->signal_handle && (p->signal_handle == args->handle)) { 1223 pr_err("Free signal BO is not allowed\n"); 1224 ret = -EPERM; 1225 goto err_unlock; 1226 } 1227 1228 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1229 if (!pdd) { 1230 pr_err("Process device data doesn't exist\n"); 1231 ret = -EINVAL; 1232 goto err_pdd; 1233 } 1234 1235 mem = kfd_process_device_translate_handle( 1236 pdd, GET_IDR_HANDLE(args->handle)); 1237 if (!mem) { 1238 ret = -EINVAL; 1239 goto err_unlock; 1240 } 1241 1242 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1243 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1244 1245 /* If freeing the buffer failed, leave the handle in place for 1246 * clean-up during process tear-down. 1247 */ 1248 if (!ret) 1249 kfd_process_device_remove_obj_handle( 1250 pdd, GET_IDR_HANDLE(args->handle)); 1251 1252 atomic64_sub(size, &pdd->vram_usage); 1253 1254 err_unlock: 1255 err_pdd: 1256 mutex_unlock(&p->mutex); 1257 return ret; 1258 } 1259 1260 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1261 struct kfd_process *p, void *data) 1262 { 1263 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1264 struct kfd_process_device *pdd, *peer_pdd; 1265 void *mem; 1266 struct kfd_node *dev; 1267 long err = 0; 1268 int i; 1269 uint32_t *devices_arr = NULL; 1270 1271 if (!args->n_devices) { 1272 pr_debug("Device IDs array empty\n"); 1273 return -EINVAL; 1274 } 1275 if (args->n_success > args->n_devices) { 1276 pr_debug("n_success exceeds n_devices\n"); 1277 return -EINVAL; 1278 } 1279 1280 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1281 GFP_KERNEL); 1282 if (!devices_arr) 1283 return -ENOMEM; 1284 1285 err = copy_from_user(devices_arr, 1286 (void __user *)args->device_ids_array_ptr, 1287 args->n_devices * sizeof(*devices_arr)); 1288 if (err != 0) { 1289 err = -EFAULT; 1290 goto copy_from_user_failed; 1291 } 1292 1293 mutex_lock(&p->mutex); 1294 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1295 if (!pdd) { 1296 err = -EINVAL; 1297 goto get_process_device_data_failed; 1298 } 1299 dev = pdd->dev; 1300 1301 pdd = kfd_bind_process_to_device(dev, p); 1302 if (IS_ERR(pdd)) { 1303 err = PTR_ERR(pdd); 1304 goto bind_process_to_device_failed; 1305 } 1306 1307 mem = kfd_process_device_translate_handle(pdd, 1308 GET_IDR_HANDLE(args->handle)); 1309 if (!mem) { 1310 err = -ENOMEM; 1311 goto get_mem_obj_from_handle_failed; 1312 } 1313 1314 for (i = args->n_success; i < args->n_devices; i++) { 1315 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1316 if (!peer_pdd) { 1317 pr_debug("Getting device by id failed for 0x%x\n", 1318 devices_arr[i]); 1319 err = -EINVAL; 1320 goto get_mem_obj_from_handle_failed; 1321 } 1322 1323 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1324 if (IS_ERR(peer_pdd)) { 1325 err = PTR_ERR(peer_pdd); 1326 goto get_mem_obj_from_handle_failed; 1327 } 1328 1329 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1330 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1331 peer_pdd->drm_priv); 1332 if (err) { 1333 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1334 1335 dev_err(dev->adev->dev, 1336 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1337 pci_domain_nr(pdev->bus), 1338 pdev->bus->number, 1339 PCI_SLOT(pdev->devfn), 1340 PCI_FUNC(pdev->devfn), 1341 ((struct kgd_mem *)mem)->domain); 1342 goto map_memory_to_gpu_failed; 1343 } 1344 args->n_success = i+1; 1345 } 1346 1347 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1348 if (err) { 1349 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1350 goto sync_memory_failed; 1351 } 1352 1353 mutex_unlock(&p->mutex); 1354 1355 /* Flush TLBs after waiting for the page table updates to complete */ 1356 for (i = 0; i < args->n_devices; i++) { 1357 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1358 if (WARN_ON_ONCE(!peer_pdd)) 1359 continue; 1360 kfd_flush_tlb(peer_pdd); 1361 } 1362 kfree(devices_arr); 1363 1364 return err; 1365 1366 get_process_device_data_failed: 1367 bind_process_to_device_failed: 1368 get_mem_obj_from_handle_failed: 1369 map_memory_to_gpu_failed: 1370 sync_memory_failed: 1371 mutex_unlock(&p->mutex); 1372 copy_from_user_failed: 1373 kfree(devices_arr); 1374 1375 return err; 1376 } 1377 1378 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1379 struct kfd_process *p, void *data) 1380 { 1381 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1382 struct kfd_process_device *pdd, *peer_pdd; 1383 void *mem; 1384 long err = 0; 1385 uint32_t *devices_arr = NULL, i; 1386 bool flush_tlb; 1387 1388 if (!args->n_devices) { 1389 pr_debug("Device IDs array empty\n"); 1390 return -EINVAL; 1391 } 1392 if (args->n_success > args->n_devices) { 1393 pr_debug("n_success exceeds n_devices\n"); 1394 return -EINVAL; 1395 } 1396 1397 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1398 GFP_KERNEL); 1399 if (!devices_arr) 1400 return -ENOMEM; 1401 1402 err = copy_from_user(devices_arr, 1403 (void __user *)args->device_ids_array_ptr, 1404 args->n_devices * sizeof(*devices_arr)); 1405 if (err != 0) { 1406 err = -EFAULT; 1407 goto copy_from_user_failed; 1408 } 1409 1410 mutex_lock(&p->mutex); 1411 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1412 if (!pdd) { 1413 err = -EINVAL; 1414 goto bind_process_to_device_failed; 1415 } 1416 1417 mem = kfd_process_device_translate_handle(pdd, 1418 GET_IDR_HANDLE(args->handle)); 1419 if (!mem) { 1420 err = -ENOMEM; 1421 goto get_mem_obj_from_handle_failed; 1422 } 1423 1424 for (i = args->n_success; i < args->n_devices; i++) { 1425 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1426 if (!peer_pdd) { 1427 err = -EINVAL; 1428 goto get_mem_obj_from_handle_failed; 1429 } 1430 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1431 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1432 if (err) { 1433 pr_debug("Failed to unmap from gpu %d/%d\n", i, args->n_devices); 1434 goto unmap_memory_from_gpu_failed; 1435 } 1436 args->n_success = i+1; 1437 } 1438 1439 flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd); 1440 if (flush_tlb) { 1441 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1442 (struct kgd_mem *) mem, true); 1443 if (err) { 1444 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1445 goto sync_memory_failed; 1446 } 1447 } 1448 1449 /* Flush TLBs after waiting for the page table updates to complete */ 1450 for (i = 0; i < args->n_devices; i++) { 1451 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1452 if (WARN_ON_ONCE(!peer_pdd)) 1453 continue; 1454 if (flush_tlb) 1455 kfd_flush_tlb(peer_pdd); 1456 1457 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */ 1458 err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv); 1459 if (err) 1460 goto sync_memory_failed; 1461 } 1462 1463 mutex_unlock(&p->mutex); 1464 1465 kfree(devices_arr); 1466 1467 return 0; 1468 1469 bind_process_to_device_failed: 1470 get_mem_obj_from_handle_failed: 1471 unmap_memory_from_gpu_failed: 1472 sync_memory_failed: 1473 mutex_unlock(&p->mutex); 1474 copy_from_user_failed: 1475 kfree(devices_arr); 1476 return err; 1477 } 1478 1479 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1480 struct kfd_process *p, void *data) 1481 { 1482 int retval; 1483 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1484 struct queue *q; 1485 struct kfd_node *dev; 1486 1487 mutex_lock(&p->mutex); 1488 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1489 1490 if (q) { 1491 dev = q->device; 1492 } else { 1493 retval = -EINVAL; 1494 goto out_unlock; 1495 } 1496 1497 if (!dev->gws) { 1498 retval = -ENODEV; 1499 goto out_unlock; 1500 } 1501 1502 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1503 retval = -ENODEV; 1504 goto out_unlock; 1505 } 1506 1507 if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) || 1508 kfd_dbg_has_cwsr_workaround(dev))) { 1509 retval = -EBUSY; 1510 goto out_unlock; 1511 } 1512 1513 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1514 mutex_unlock(&p->mutex); 1515 1516 args->first_gws = 0; 1517 return retval; 1518 1519 out_unlock: 1520 mutex_unlock(&p->mutex); 1521 return retval; 1522 } 1523 1524 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1525 struct kfd_process *p, void *data) 1526 { 1527 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1528 struct kfd_node *dev = NULL; 1529 struct amdgpu_device *dmabuf_adev; 1530 void *metadata_buffer = NULL; 1531 uint32_t flags; 1532 int8_t xcp_id; 1533 unsigned int i; 1534 int r; 1535 1536 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1537 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1538 if (dev && !kfd_devcgroup_check_permission(dev)) 1539 break; 1540 if (!dev) 1541 return -EINVAL; 1542 1543 if (args->metadata_ptr) { 1544 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL); 1545 if (!metadata_buffer) 1546 return -ENOMEM; 1547 } 1548 1549 /* Get dmabuf info from KGD */ 1550 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1551 &dmabuf_adev, &args->size, 1552 metadata_buffer, args->metadata_size, 1553 &args->metadata_size, &flags, &xcp_id); 1554 if (r) 1555 goto exit; 1556 1557 if (xcp_id >= 0) 1558 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; 1559 else 1560 args->gpu_id = dev->id; 1561 args->flags = flags; 1562 1563 /* Copy metadata buffer to user mode */ 1564 if (metadata_buffer) { 1565 r = copy_to_user((void __user *)args->metadata_ptr, 1566 metadata_buffer, args->metadata_size); 1567 if (r != 0) 1568 r = -EFAULT; 1569 } 1570 1571 exit: 1572 kfree(metadata_buffer); 1573 1574 return r; 1575 } 1576 1577 static int kfd_ioctl_import_dmabuf(struct file *filep, 1578 struct kfd_process *p, void *data) 1579 { 1580 struct kfd_ioctl_import_dmabuf_args *args = data; 1581 struct kfd_process_device *pdd; 1582 int idr_handle; 1583 uint64_t size; 1584 void *mem; 1585 int r; 1586 1587 mutex_lock(&p->mutex); 1588 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1589 if (!pdd) { 1590 r = -EINVAL; 1591 goto err_unlock; 1592 } 1593 1594 pdd = kfd_bind_process_to_device(pdd->dev, p); 1595 if (IS_ERR(pdd)) { 1596 r = PTR_ERR(pdd); 1597 goto err_unlock; 1598 } 1599 1600 r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd, 1601 args->va_addr, pdd->drm_priv, 1602 (struct kgd_mem **)&mem, &size, 1603 NULL); 1604 if (r) 1605 goto err_unlock; 1606 1607 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1608 if (idr_handle < 0) { 1609 r = -EFAULT; 1610 goto err_free; 1611 } 1612 1613 mutex_unlock(&p->mutex); 1614 1615 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1616 1617 return 0; 1618 1619 err_free: 1620 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1621 pdd->drm_priv, NULL); 1622 err_unlock: 1623 mutex_unlock(&p->mutex); 1624 return r; 1625 } 1626 1627 static int kfd_ioctl_export_dmabuf(struct file *filep, 1628 struct kfd_process *p, void *data) 1629 { 1630 struct kfd_ioctl_export_dmabuf_args *args = data; 1631 struct kfd_process_device *pdd; 1632 struct dma_buf *dmabuf; 1633 struct kfd_node *dev; 1634 void *mem; 1635 int ret = 0; 1636 1637 dev = kfd_device_by_id(GET_GPU_ID(args->handle)); 1638 if (!dev) 1639 return -EINVAL; 1640 1641 mutex_lock(&p->mutex); 1642 1643 pdd = kfd_get_process_device_data(dev, p); 1644 if (!pdd) { 1645 ret = -EINVAL; 1646 goto err_unlock; 1647 } 1648 1649 mem = kfd_process_device_translate_handle(pdd, 1650 GET_IDR_HANDLE(args->handle)); 1651 if (!mem) { 1652 ret = -EINVAL; 1653 goto err_unlock; 1654 } 1655 1656 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1657 mutex_unlock(&p->mutex); 1658 if (ret) 1659 goto err_out; 1660 1661 ret = dma_buf_fd(dmabuf, args->flags); 1662 if (ret < 0) { 1663 dma_buf_put(dmabuf); 1664 goto err_out; 1665 } 1666 /* dma_buf_fd assigns the reference count to the fd, no need to 1667 * put the reference here. 1668 */ 1669 args->dmabuf_fd = ret; 1670 1671 return 0; 1672 1673 err_unlock: 1674 mutex_unlock(&p->mutex); 1675 err_out: 1676 return ret; 1677 } 1678 1679 /* Handle requests for watching SMI events */ 1680 static int kfd_ioctl_smi_events(struct file *filep, 1681 struct kfd_process *p, void *data) 1682 { 1683 struct kfd_ioctl_smi_events_args *args = data; 1684 struct kfd_process_device *pdd; 1685 1686 mutex_lock(&p->mutex); 1687 1688 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1689 mutex_unlock(&p->mutex); 1690 if (!pdd) 1691 return -EINVAL; 1692 1693 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1694 } 1695 1696 static int kfd_ioctl_svm_validate(void *kdata, unsigned int usize) 1697 { 1698 struct kfd_ioctl_svm_args *args = kdata; 1699 size_t expected = struct_size(args, attrs, args->nattr); 1700 1701 if (expected == SIZE_MAX || usize < expected) 1702 return -EINVAL; 1703 return 0; 1704 } 1705 1706 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1707 1708 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1709 struct kfd_process *p, void *data) 1710 { 1711 struct kfd_ioctl_set_xnack_mode_args *args = data; 1712 int r = 0; 1713 1714 mutex_lock(&p->mutex); 1715 if (args->xnack_enabled >= 0) { 1716 if (!list_empty(&p->pqm.queues)) { 1717 pr_debug("Process has user queues running\n"); 1718 r = -EBUSY; 1719 goto out_unlock; 1720 } 1721 1722 if (p->xnack_enabled == args->xnack_enabled) 1723 goto out_unlock; 1724 1725 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) { 1726 r = -EPERM; 1727 goto out_unlock; 1728 } 1729 1730 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled); 1731 } else { 1732 args->xnack_enabled = p->xnack_enabled; 1733 } 1734 1735 out_unlock: 1736 mutex_unlock(&p->mutex); 1737 1738 return r; 1739 } 1740 1741 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1742 { 1743 struct kfd_ioctl_svm_args *args = data; 1744 int r = 0; 1745 1746 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 1747 pr_debug("SVM ioctl not supported on non-primary kfd process\n"); 1748 1749 return -EOPNOTSUPP; 1750 } 1751 1752 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1753 args->start_addr, args->size, args->op, args->nattr); 1754 1755 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1756 return -EINVAL; 1757 if (!args->start_addr || !args->size) 1758 return -EINVAL; 1759 1760 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1761 args->attrs); 1762 1763 return r; 1764 } 1765 #else 1766 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1767 struct kfd_process *p, void *data) 1768 { 1769 return -EPERM; 1770 } 1771 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1772 { 1773 return -EPERM; 1774 } 1775 #endif 1776 1777 static int kfd_ptl_control(struct kfd_process_device *pdd, bool enable) 1778 { 1779 struct amdgpu_device *adev = pdd->dev->adev; 1780 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1781 enum amdgpu_ptl_fmt pref_format1 = ptl->fmt1; 1782 enum amdgpu_ptl_fmt pref_format2 = ptl->fmt2; 1783 uint32_t ptl_state = enable ? 1 : 0; 1784 int ret; 1785 1786 if (!ptl->hw_supported) 1787 return -EOPNOTSUPP; 1788 1789 if (!pdd->dev->kfd2kgd || !pdd->dev->kfd2kgd->ptl_ctrl) 1790 return -EOPNOTSUPP; 1791 1792 ret = pdd->dev->kfd2kgd->ptl_ctrl(adev, PSP_PTL_PERF_MON_SET, 1793 &ptl_state, 1794 &pref_format1, 1795 &pref_format2); 1796 1797 return ret; 1798 } 1799 1800 int kfd_ptl_disable_request(struct kfd_process_device *pdd, 1801 struct kfd_process *p) 1802 { 1803 struct amdgpu_device *adev = pdd->dev->adev; 1804 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1805 int ret = 0; 1806 1807 mutex_lock(&ptl->mutex); 1808 1809 if (pdd->ptl_disable_req) 1810 goto out; 1811 1812 if (atomic_inc_return(&ptl->disable_ref) == 1) { 1813 ret = kfd_ptl_control(pdd, false); 1814 if (ret) { 1815 atomic_dec(&ptl->disable_ref); 1816 dev_warn(pdd->dev->adev->dev, 1817 "failed to disable PTL\n"); 1818 goto out; 1819 } 1820 } 1821 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1822 pdd->ptl_disable_req = true; 1823 1824 out: 1825 mutex_unlock(&ptl->mutex); 1826 return ret; 1827 } 1828 1829 int kfd_ptl_disable_release(struct kfd_process_device *pdd, 1830 struct kfd_process *p) 1831 { 1832 struct amdgpu_device *adev = pdd->dev->adev; 1833 struct amdgpu_ptl *ptl = &adev->psp.ptl; 1834 int ret = 0; 1835 1836 mutex_lock(&ptl->mutex); 1837 1838 if (!pdd->ptl_disable_req) 1839 goto out; 1840 1841 if (atomic_dec_return(&ptl->disable_ref) == 0) { 1842 clear_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1843 ret = kfd_ptl_control(pdd, true); 1844 if (ret) { 1845 atomic_inc(&ptl->disable_ref); 1846 set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap); 1847 dev_warn(adev->dev, "Failed to enable PTL on release: %d\n", ret); 1848 goto out; 1849 } 1850 } 1851 pdd->ptl_disable_req = false; 1852 1853 out: 1854 mutex_unlock(&ptl->mutex); 1855 return ret; 1856 } 1857 1858 static int kfd_profiler_ptl_control(struct kfd_process *p, 1859 struct kfd_ioctl_ptl_control *args) 1860 { 1861 struct kfd_process_device *pdd; 1862 int ret; 1863 1864 mutex_lock(&p->mutex); 1865 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1866 mutex_unlock(&p->mutex); 1867 1868 if (!pdd || !pdd->dev || !pdd->dev->kfd) 1869 return -EINVAL; 1870 1871 if (args->enable == 0) 1872 ret = kfd_ptl_disable_request(pdd, p); 1873 else 1874 ret = kfd_ptl_disable_release(pdd, p); 1875 1876 return ret; 1877 } 1878 1879 static int criu_checkpoint_process(struct kfd_process *p, 1880 uint8_t __user *user_priv_data, 1881 uint64_t *priv_offset) 1882 { 1883 struct kfd_criu_process_priv_data process_priv; 1884 int ret; 1885 1886 memset(&process_priv, 0, sizeof(process_priv)); 1887 1888 process_priv.version = KFD_CRIU_PRIV_VERSION; 1889 /* For CR, we don't consider negative xnack mode which is used for 1890 * querying without changing it, here 0 simply means disabled and 1 1891 * means enabled so retry for finding a valid PTE. 1892 */ 1893 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1894 1895 ret = copy_to_user(user_priv_data + *priv_offset, 1896 &process_priv, sizeof(process_priv)); 1897 1898 if (ret) { 1899 pr_err("Failed to copy process information to user\n"); 1900 ret = -EFAULT; 1901 } 1902 1903 *priv_offset += sizeof(process_priv); 1904 return ret; 1905 } 1906 1907 static int criu_checkpoint_devices(struct kfd_process *p, 1908 uint32_t num_devices, 1909 uint8_t __user *user_addr, 1910 uint8_t __user *user_priv_data, 1911 uint64_t *priv_offset) 1912 { 1913 struct kfd_criu_device_priv_data *device_priv = NULL; 1914 struct kfd_criu_device_bucket *device_buckets = NULL; 1915 int ret = 0, i; 1916 1917 device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL); 1918 if (!device_buckets) { 1919 ret = -ENOMEM; 1920 goto exit; 1921 } 1922 1923 device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL); 1924 if (!device_priv) { 1925 ret = -ENOMEM; 1926 goto exit; 1927 } 1928 1929 for (i = 0; i < num_devices; i++) { 1930 struct kfd_process_device *pdd = p->pdds[i]; 1931 1932 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1933 device_buckets[i].actual_gpu_id = pdd->dev->id; 1934 1935 /* 1936 * priv_data does not contain useful information for now and is reserved for 1937 * future use, so we do not set its contents. 1938 */ 1939 } 1940 1941 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1942 if (ret) { 1943 pr_err("Failed to copy device information to user\n"); 1944 ret = -EFAULT; 1945 goto exit; 1946 } 1947 1948 ret = copy_to_user(user_priv_data + *priv_offset, 1949 device_priv, 1950 num_devices * sizeof(*device_priv)); 1951 if (ret) { 1952 pr_err("Failed to copy device information to user\n"); 1953 ret = -EFAULT; 1954 } 1955 *priv_offset += num_devices * sizeof(*device_priv); 1956 1957 exit: 1958 kvfree(device_buckets); 1959 kvfree(device_priv); 1960 return ret; 1961 } 1962 1963 static uint32_t get_process_num_bos(struct kfd_process *p) 1964 { 1965 uint32_t num_of_bos = 0; 1966 int i; 1967 1968 /* Run over all PDDs of the process */ 1969 for (i = 0; i < p->n_pdds; i++) { 1970 struct kfd_process_device *pdd = p->pdds[i]; 1971 void *mem; 1972 int id; 1973 1974 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1975 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1976 1977 if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base) 1978 num_of_bos++; 1979 } 1980 } 1981 return num_of_bos; 1982 } 1983 1984 static int criu_get_prime_handle(struct kgd_mem *mem, 1985 int flags, u32 *shared_fd, 1986 struct file **file) 1987 { 1988 struct dma_buf *dmabuf; 1989 int ret; 1990 1991 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1992 if (ret) { 1993 pr_err("dmabuf export failed for the BO\n"); 1994 return ret; 1995 } 1996 1997 ret = get_unused_fd_flags(flags); 1998 if (ret < 0) { 1999 pr_err("dmabuf create fd failed, ret:%d\n", ret); 2000 goto out_free_dmabuf; 2001 } 2002 2003 *shared_fd = ret; 2004 *file = dmabuf->file; 2005 return 0; 2006 2007 out_free_dmabuf: 2008 dma_buf_put(dmabuf); 2009 return ret; 2010 } 2011 2012 static void commit_files(struct file **files, 2013 struct kfd_criu_bo_bucket *bo_buckets, 2014 unsigned int count, 2015 int err) 2016 { 2017 while (count--) { 2018 struct file *file = files[count]; 2019 2020 if (!file) 2021 continue; 2022 if (err) { 2023 fput(file); 2024 put_unused_fd(bo_buckets[count].dmabuf_fd); 2025 } else { 2026 fd_install(bo_buckets[count].dmabuf_fd, file); 2027 } 2028 } 2029 } 2030 2031 static int criu_checkpoint_bos(struct kfd_process *p, 2032 uint32_t num_bos, 2033 uint8_t __user *user_bos, 2034 uint8_t __user *user_priv_data, 2035 uint64_t *priv_offset) 2036 { 2037 struct kfd_criu_bo_bucket *bo_buckets; 2038 struct kfd_criu_bo_priv_data *bo_privs; 2039 struct file **files = NULL; 2040 int ret = 0, pdd_index, bo_index = 0, id; 2041 void *mem; 2042 2043 bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL); 2044 if (!bo_buckets) 2045 return -ENOMEM; 2046 2047 bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL); 2048 if (!bo_privs) { 2049 ret = -ENOMEM; 2050 goto exit; 2051 } 2052 2053 files = kvzalloc(num_bos * sizeof(struct file *), GFP_KERNEL); 2054 if (!files) { 2055 ret = -ENOMEM; 2056 goto exit; 2057 } 2058 2059 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 2060 struct kfd_process_device *pdd = p->pdds[pdd_index]; 2061 struct amdgpu_bo *dumper_bo; 2062 struct kgd_mem *kgd_mem; 2063 2064 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 2065 struct kfd_criu_bo_bucket *bo_bucket; 2066 struct kfd_criu_bo_priv_data *bo_priv; 2067 int i, dev_idx = 0; 2068 2069 kgd_mem = (struct kgd_mem *)mem; 2070 dumper_bo = kgd_mem->bo; 2071 2072 /* Skip checkpointing BOs that are used for Trap handler 2073 * code and state. Currently, these BOs have a VA that 2074 * is less GPUVM Base 2075 */ 2076 if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base) 2077 continue; 2078 2079 bo_bucket = &bo_buckets[bo_index]; 2080 bo_priv = &bo_privs[bo_index]; 2081 2082 bo_bucket->gpu_id = pdd->user_gpu_id; 2083 bo_bucket->addr = (uint64_t)kgd_mem->va; 2084 bo_bucket->size = amdgpu_bo_size(dumper_bo); 2085 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 2086 bo_priv->idr_handle = id; 2087 2088 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2089 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 2090 &bo_priv->user_addr); 2091 if (ret) { 2092 pr_err("Failed to obtain user address for user-pointer bo\n"); 2093 goto exit; 2094 } 2095 } 2096 if (bo_bucket->alloc_flags 2097 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2098 ret = criu_get_prime_handle(kgd_mem, 2099 bo_bucket->alloc_flags & 2100 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 2101 &bo_bucket->dmabuf_fd, &files[bo_index]); 2102 if (ret) 2103 goto exit; 2104 } else { 2105 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2106 } 2107 2108 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2109 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 2110 KFD_MMAP_GPU_ID(pdd->dev->id); 2111 else if (bo_bucket->alloc_flags & 2112 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 2113 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 2114 KFD_MMAP_GPU_ID(pdd->dev->id); 2115 else 2116 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 2117 2118 for (i = 0; i < p->n_pdds; i++) { 2119 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem)) 2120 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 2121 } 2122 2123 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 2124 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 2125 bo_bucket->size, 2126 bo_bucket->addr, 2127 bo_bucket->offset, 2128 bo_bucket->gpu_id, 2129 bo_bucket->alloc_flags, 2130 bo_priv->idr_handle); 2131 bo_index++; 2132 } 2133 } 2134 2135 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 2136 if (ret) { 2137 pr_err("Failed to copy BO information to user\n"); 2138 ret = -EFAULT; 2139 goto exit; 2140 } 2141 2142 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 2143 if (ret) { 2144 pr_err("Failed to copy BO priv information to user\n"); 2145 ret = -EFAULT; 2146 goto exit; 2147 } 2148 2149 *priv_offset += num_bos * sizeof(*bo_privs); 2150 2151 exit: 2152 commit_files(files, bo_buckets, bo_index, ret); 2153 kvfree(files); 2154 kvfree(bo_buckets); 2155 kvfree(bo_privs); 2156 return ret; 2157 } 2158 2159 static int criu_get_process_object_info(struct kfd_process *p, 2160 uint32_t *num_devices, 2161 uint32_t *num_bos, 2162 uint32_t *num_objects, 2163 uint64_t *objs_priv_size) 2164 { 2165 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 2166 uint32_t num_queues, num_events, num_svm_ranges; 2167 int ret; 2168 2169 *num_devices = p->n_pdds; 2170 *num_bos = get_process_num_bos(p); 2171 2172 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 2173 if (ret) 2174 return ret; 2175 2176 num_events = kfd_get_num_events(p); 2177 2178 svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 2179 2180 *num_objects = num_queues + num_events + num_svm_ranges; 2181 2182 if (objs_priv_size) { 2183 priv_size = sizeof(struct kfd_criu_process_priv_data); 2184 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 2185 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 2186 priv_size += queues_priv_data_size; 2187 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 2188 priv_size += svm_priv_data_size; 2189 *objs_priv_size = priv_size; 2190 } 2191 return 0; 2192 } 2193 2194 static int criu_checkpoint(struct file *filep, 2195 struct kfd_process *p, 2196 struct kfd_ioctl_criu_args *args) 2197 { 2198 int ret; 2199 uint32_t num_devices, num_bos, num_objects; 2200 uint64_t priv_size, priv_offset = 0, bo_priv_offset; 2201 2202 if (!args->devices || !args->bos || !args->priv_data) 2203 return -EINVAL; 2204 2205 mutex_lock(&p->mutex); 2206 2207 if (!p->n_pdds) { 2208 pr_err("No pdd for given process\n"); 2209 ret = -ENODEV; 2210 goto exit_unlock; 2211 } 2212 2213 /* Confirm all process queues are evicted */ 2214 if (!p->queues_paused) { 2215 pr_err("Cannot dump process when queues are not in evicted state\n"); 2216 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 2217 ret = -EINVAL; 2218 goto exit_unlock; 2219 } 2220 2221 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 2222 if (ret) 2223 goto exit_unlock; 2224 2225 if (num_devices != args->num_devices || 2226 num_bos != args->num_bos || 2227 num_objects != args->num_objects || 2228 priv_size != args->priv_data_size) { 2229 2230 ret = -EINVAL; 2231 goto exit_unlock; 2232 } 2233 2234 /* each function will store private data inside priv_data and adjust priv_offset */ 2235 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 2236 if (ret) 2237 goto exit_unlock; 2238 2239 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 2240 (uint8_t __user *)args->priv_data, &priv_offset); 2241 if (ret) 2242 goto exit_unlock; 2243 2244 /* Leave room for BOs in the private data. They need to be restored 2245 * before events, but we checkpoint them last to simplify the error 2246 * handling. 2247 */ 2248 bo_priv_offset = priv_offset; 2249 priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data); 2250 2251 if (num_objects) { 2252 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 2253 &priv_offset); 2254 if (ret) 2255 goto exit_unlock; 2256 2257 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 2258 &priv_offset); 2259 if (ret) 2260 goto exit_unlock; 2261 2262 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 2263 if (ret) 2264 goto exit_unlock; 2265 } 2266 2267 /* This must be the last thing in this function that can fail. 2268 * Otherwise we leak dmabuf file descriptors. 2269 */ 2270 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 2271 (uint8_t __user *)args->priv_data, &bo_priv_offset); 2272 2273 exit_unlock: 2274 mutex_unlock(&p->mutex); 2275 if (ret) 2276 pr_err("Failed to dump CRIU ret:%d\n", ret); 2277 else 2278 pr_debug("CRIU dump ret:%d\n", ret); 2279 2280 return ret; 2281 } 2282 2283 static int criu_restore_process(struct kfd_process *p, 2284 struct kfd_ioctl_criu_args *args, 2285 uint64_t *priv_offset, 2286 uint64_t max_priv_data_size) 2287 { 2288 int ret = 0; 2289 struct kfd_criu_process_priv_data process_priv; 2290 2291 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 2292 return -EINVAL; 2293 2294 ret = copy_from_user(&process_priv, 2295 (void __user *)(args->priv_data + *priv_offset), 2296 sizeof(process_priv)); 2297 if (ret) { 2298 pr_err("Failed to copy process private information from user\n"); 2299 ret = -EFAULT; 2300 goto exit; 2301 } 2302 *priv_offset += sizeof(process_priv); 2303 2304 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 2305 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2306 process_priv.version, KFD_CRIU_PRIV_VERSION); 2307 return -EINVAL; 2308 } 2309 2310 pr_debug("Setting XNACK mode\n"); 2311 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2312 pr_err("xnack mode cannot be set\n"); 2313 ret = -EPERM; 2314 goto exit; 2315 } else { 2316 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2317 p->xnack_enabled = process_priv.xnack_mode; 2318 } 2319 2320 exit: 2321 return ret; 2322 } 2323 2324 static int criu_restore_devices(struct kfd_process *p, 2325 struct kfd_ioctl_criu_args *args, 2326 uint64_t *priv_offset, 2327 uint64_t max_priv_data_size) 2328 { 2329 struct kfd_criu_device_bucket *device_buckets; 2330 struct kfd_criu_device_priv_data *device_privs; 2331 int ret = 0; 2332 uint32_t i; 2333 2334 if (args->num_devices != p->n_pdds) 2335 return -EINVAL; 2336 2337 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2338 return -EINVAL; 2339 2340 device_buckets = kmalloc_objs(*device_buckets, args->num_devices); 2341 if (!device_buckets) 2342 return -ENOMEM; 2343 2344 ret = copy_from_user(device_buckets, (void __user *)args->devices, 2345 args->num_devices * sizeof(*device_buckets)); 2346 if (ret) { 2347 pr_err("Failed to copy devices buckets from user\n"); 2348 ret = -EFAULT; 2349 goto exit; 2350 } 2351 2352 for (i = 0; i < args->num_devices; i++) { 2353 struct kfd_node *dev; 2354 struct kfd_process_device *pdd; 2355 struct file *drm_file; 2356 2357 /* device private data is not currently used */ 2358 2359 if (!device_buckets[i].user_gpu_id) { 2360 pr_err("Invalid user gpu_id\n"); 2361 ret = -EINVAL; 2362 goto exit; 2363 } 2364 2365 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2366 if (!dev) { 2367 pr_err("Failed to find device with gpu_id = %x\n", 2368 device_buckets[i].actual_gpu_id); 2369 ret = -EINVAL; 2370 goto exit; 2371 } 2372 2373 pdd = kfd_get_process_device_data(dev, p); 2374 if (!pdd) { 2375 pr_err("Failed to get pdd for gpu_id = %x\n", 2376 device_buckets[i].actual_gpu_id); 2377 ret = -EINVAL; 2378 goto exit; 2379 } 2380 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2381 2382 drm_file = fget(device_buckets[i].drm_fd); 2383 if (!drm_file) { 2384 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2385 device_buckets[i].drm_fd); 2386 ret = -EINVAL; 2387 goto exit; 2388 } 2389 2390 if (pdd->drm_file) { 2391 ret = -EINVAL; 2392 goto exit; 2393 } 2394 2395 /* create the vm using render nodes for kfd pdd */ 2396 if (kfd_process_device_init_vm(pdd, drm_file)) { 2397 pr_err("could not init vm for given pdd\n"); 2398 /* On success, the PDD keeps the drm_file reference */ 2399 fput(drm_file); 2400 ret = -EINVAL; 2401 goto exit; 2402 } 2403 /* 2404 * pdd now already has the vm bound to render node so below api won't create a new 2405 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2406 * for iommu v2 binding and runtime pm. 2407 */ 2408 pdd = kfd_bind_process_to_device(dev, p); 2409 if (IS_ERR(pdd)) { 2410 ret = PTR_ERR(pdd); 2411 goto exit; 2412 } 2413 2414 if (!pdd->qpd.proc_doorbells) { 2415 ret = kfd_alloc_process_doorbells(dev->kfd, pdd); 2416 if (ret) 2417 goto exit; 2418 } 2419 } 2420 2421 /* 2422 * We are not copying device private data from user as we are not using the data for now, 2423 * but we still adjust for its private data. 2424 */ 2425 *priv_offset += args->num_devices * sizeof(*device_privs); 2426 2427 exit: 2428 kfree(device_buckets); 2429 return ret; 2430 } 2431 2432 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2433 struct kfd_criu_bo_bucket *bo_bucket, 2434 struct kfd_criu_bo_priv_data *bo_priv, 2435 struct kgd_mem **kgd_mem) 2436 { 2437 int idr_handle; 2438 int ret; 2439 const bool criu_resume = true; 2440 u64 offset; 2441 2442 if (bo_priv->idr_handle > INT_MAX) 2443 return -EINVAL; 2444 2445 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2446 if (bo_bucket->size != 2447 kfd_doorbell_process_slice(pdd->dev->kfd)) 2448 return -EINVAL; 2449 2450 offset = kfd_get_process_doorbells(pdd); 2451 if (!offset) 2452 return -ENOMEM; 2453 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2454 /* MMIO BOs need remapped bus address */ 2455 if (bo_bucket->size != PAGE_SIZE) { 2456 pr_err("Invalid page size\n"); 2457 return -EINVAL; 2458 } 2459 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2460 if (!offset || (PAGE_SIZE > 4096)) { 2461 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2462 return -ENOMEM; 2463 } 2464 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2465 offset = bo_priv->user_addr; 2466 } 2467 /* Create the BO */ 2468 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2469 bo_bucket->size, pdd->drm_priv, kgd_mem, 2470 &offset, bo_bucket->alloc_flags, criu_resume); 2471 if (ret) { 2472 pr_err("Could not create the BO\n"); 2473 return ret; 2474 } 2475 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2476 bo_bucket->size, bo_bucket->addr, offset); 2477 2478 /* Restore previous IDR handle */ 2479 pr_debug("Restoring old IDR handle for the BO"); 2480 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2481 bo_priv->idr_handle + 1, GFP_KERNEL); 2482 2483 if (idr_handle < 0) { 2484 pr_err("Could not allocate idr\n"); 2485 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2486 NULL); 2487 return -ENOMEM; 2488 } 2489 2490 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2491 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2492 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2493 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2494 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2495 bo_bucket->restored_offset = offset; 2496 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2497 bo_bucket->restored_offset = offset; 2498 /* Update the VRAM usage count */ 2499 atomic64_add(bo_bucket->size, &pdd->vram_usage); 2500 } 2501 return 0; 2502 } 2503 2504 static int criu_restore_bo(struct kfd_process *p, 2505 struct kfd_criu_bo_bucket *bo_bucket, 2506 struct kfd_criu_bo_priv_data *bo_priv, 2507 struct file **file) 2508 { 2509 struct kfd_process_device *pdd; 2510 struct kgd_mem *kgd_mem; 2511 int ret; 2512 int j; 2513 2514 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2515 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2516 bo_priv->idr_handle); 2517 2518 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2519 if (!pdd) { 2520 pr_err("Failed to get pdd\n"); 2521 return -ENODEV; 2522 } 2523 2524 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2525 if (ret) 2526 return ret; 2527 2528 /* now map these BOs to GPU/s */ 2529 for (j = 0; j < p->n_pdds; j++) { 2530 struct kfd_node *peer; 2531 struct kfd_process_device *peer_pdd; 2532 2533 if (!bo_priv->mapped_gpuids[j]) 2534 break; 2535 2536 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2537 if (!peer_pdd) 2538 return -EINVAL; 2539 2540 peer = peer_pdd->dev; 2541 2542 peer_pdd = kfd_bind_process_to_device(peer, p); 2543 if (IS_ERR(peer_pdd)) 2544 return PTR_ERR(peer_pdd); 2545 2546 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2547 peer_pdd->drm_priv); 2548 if (ret) { 2549 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2550 return ret; 2551 } 2552 } 2553 2554 pr_debug("map memory was successful for the BO\n"); 2555 /* create the dmabuf object and export the bo */ 2556 if (bo_bucket->alloc_flags 2557 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2558 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR, 2559 &bo_bucket->dmabuf_fd, file); 2560 if (ret) 2561 return ret; 2562 } else { 2563 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2564 } 2565 2566 return 0; 2567 } 2568 2569 static int criu_restore_bos(struct kfd_process *p, 2570 struct kfd_ioctl_criu_args *args, 2571 uint64_t *priv_offset, 2572 uint64_t max_priv_data_size) 2573 { 2574 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2575 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2576 struct file **files = NULL; 2577 int ret = 0; 2578 uint32_t i = 0; 2579 2580 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2581 return -EINVAL; 2582 2583 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2584 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2585 2586 bo_buckets = kvmalloc_objs(*bo_buckets, args->num_bos); 2587 if (!bo_buckets) 2588 return -ENOMEM; 2589 2590 files = kvzalloc(args->num_bos * sizeof(struct file *), GFP_KERNEL); 2591 if (!files) { 2592 ret = -ENOMEM; 2593 goto exit; 2594 } 2595 2596 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2597 args->num_bos * sizeof(*bo_buckets)); 2598 if (ret) { 2599 pr_err("Failed to copy BOs information from user\n"); 2600 ret = -EFAULT; 2601 goto exit; 2602 } 2603 2604 bo_privs = kvmalloc_objs(*bo_privs, args->num_bos); 2605 if (!bo_privs) { 2606 ret = -ENOMEM; 2607 goto exit; 2608 } 2609 2610 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2611 args->num_bos * sizeof(*bo_privs)); 2612 if (ret) { 2613 pr_err("Failed to copy BOs information from user\n"); 2614 ret = -EFAULT; 2615 goto exit; 2616 } 2617 *priv_offset += args->num_bos * sizeof(*bo_privs); 2618 2619 /* Create and map new BOs */ 2620 for (; i < args->num_bos; i++) { 2621 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i], &files[i]); 2622 if (ret) { 2623 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2624 goto exit; 2625 } 2626 } /* done */ 2627 2628 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2629 ret = copy_to_user((void __user *)args->bos, 2630 bo_buckets, 2631 (args->num_bos * sizeof(*bo_buckets))); 2632 if (ret) 2633 ret = -EFAULT; 2634 2635 exit: 2636 commit_files(files, bo_buckets, i, ret); 2637 kvfree(files); 2638 kvfree(bo_buckets); 2639 kvfree(bo_privs); 2640 return ret; 2641 } 2642 2643 static int criu_restore_objects(struct file *filep, 2644 struct kfd_process *p, 2645 struct kfd_ioctl_criu_args *args, 2646 uint64_t *priv_offset, 2647 uint64_t max_priv_data_size) 2648 { 2649 int ret = 0; 2650 uint32_t i; 2651 2652 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2653 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2654 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2655 2656 for (i = 0; i < args->num_objects; i++) { 2657 uint32_t object_type; 2658 2659 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2660 pr_err("Invalid private data size\n"); 2661 return -EINVAL; 2662 } 2663 2664 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2665 if (ret) { 2666 pr_err("Failed to copy private information from user\n"); 2667 goto exit; 2668 } 2669 2670 switch (object_type) { 2671 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2672 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2673 priv_offset, max_priv_data_size); 2674 if (ret) 2675 goto exit; 2676 break; 2677 case KFD_CRIU_OBJECT_TYPE_EVENT: 2678 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2679 priv_offset, max_priv_data_size); 2680 if (ret) 2681 goto exit; 2682 break; 2683 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2684 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2685 priv_offset, max_priv_data_size); 2686 if (ret) 2687 goto exit; 2688 break; 2689 default: 2690 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2691 ret = -EINVAL; 2692 goto exit; 2693 } 2694 } 2695 exit: 2696 return ret; 2697 } 2698 2699 static int criu_restore(struct file *filep, 2700 struct kfd_process *p, 2701 struct kfd_ioctl_criu_args *args) 2702 { 2703 uint64_t priv_offset = 0; 2704 int ret = 0; 2705 2706 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2707 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2708 2709 if ((args->num_bos > 0 && !args->bos) || !args->devices || !args->priv_data || 2710 !args->priv_data_size || !args->num_devices) 2711 return -EINVAL; 2712 2713 mutex_lock(&p->mutex); 2714 2715 /* 2716 * Set the process to evicted state to avoid running any new queues before all the memory 2717 * mappings are ready. 2718 */ 2719 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE); 2720 if (ret) 2721 goto exit_unlock; 2722 2723 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2724 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2725 if (ret) 2726 goto exit_unlock; 2727 2728 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2729 if (ret) 2730 goto exit_unlock; 2731 2732 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2733 if (ret) 2734 goto exit_unlock; 2735 2736 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2737 if (ret) 2738 goto exit_unlock; 2739 2740 if (priv_offset != args->priv_data_size) { 2741 pr_err("Invalid private data size\n"); 2742 ret = -EINVAL; 2743 } 2744 2745 exit_unlock: 2746 mutex_unlock(&p->mutex); 2747 if (ret) 2748 pr_err("Failed to restore CRIU ret:%d\n", ret); 2749 else 2750 pr_debug("CRIU restore successful\n"); 2751 2752 return ret; 2753 } 2754 2755 static int criu_unpause(struct file *filep, 2756 struct kfd_process *p, 2757 struct kfd_ioctl_criu_args *args) 2758 { 2759 int ret; 2760 2761 mutex_lock(&p->mutex); 2762 2763 if (!p->queues_paused) { 2764 mutex_unlock(&p->mutex); 2765 return -EINVAL; 2766 } 2767 2768 ret = kfd_process_restore_queues(p); 2769 if (ret) 2770 pr_err("Failed to unpause queues ret:%d\n", ret); 2771 else 2772 p->queues_paused = false; 2773 2774 mutex_unlock(&p->mutex); 2775 2776 return ret; 2777 } 2778 2779 static int criu_resume(struct file *filep, 2780 struct kfd_process *p, 2781 struct kfd_ioctl_criu_args *args) 2782 { 2783 struct kfd_process *target = NULL; 2784 struct pid *pid = NULL; 2785 int ret = 0; 2786 2787 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2788 args->pid); 2789 2790 pid = find_get_pid(args->pid); 2791 if (!pid) { 2792 pr_err("Cannot find pid info for %i\n", args->pid); 2793 return -ESRCH; 2794 } 2795 2796 pr_debug("calling kfd_lookup_process_by_pid\n"); 2797 target = kfd_lookup_process_by_pid(pid); 2798 2799 put_pid(pid); 2800 2801 if (!target) { 2802 pr_debug("Cannot find process info for %i\n", args->pid); 2803 return -ESRCH; 2804 } 2805 2806 mutex_lock(&target->mutex); 2807 ret = kfd_criu_resume_svm(target); 2808 if (ret) { 2809 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2810 goto exit; 2811 } 2812 2813 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2814 if (ret) 2815 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2816 2817 exit: 2818 mutex_unlock(&target->mutex); 2819 2820 kfd_unref_process(target); 2821 return ret; 2822 } 2823 2824 static int criu_process_info(struct file *filep, 2825 struct kfd_process *p, 2826 struct kfd_ioctl_criu_args *args) 2827 { 2828 int ret = 0; 2829 2830 mutex_lock(&p->mutex); 2831 2832 if (!p->n_pdds) { 2833 pr_err("No pdd for given process\n"); 2834 ret = -ENODEV; 2835 goto err_unlock; 2836 } 2837 2838 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT); 2839 if (ret) 2840 goto err_unlock; 2841 2842 p->queues_paused = true; 2843 2844 args->pid = task_pid_nr_ns(p->lead_thread, 2845 task_active_pid_ns(p->lead_thread)); 2846 2847 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2848 &args->num_objects, &args->priv_data_size); 2849 if (ret) 2850 goto err_unlock; 2851 2852 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2853 args->num_devices, args->num_bos, args->num_objects, 2854 args->priv_data_size); 2855 2856 err_unlock: 2857 if (ret) { 2858 kfd_process_restore_queues(p); 2859 p->queues_paused = false; 2860 } 2861 mutex_unlock(&p->mutex); 2862 return ret; 2863 } 2864 2865 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2866 { 2867 struct kfd_ioctl_criu_args *args = data; 2868 int ret; 2869 2870 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2871 switch (args->op) { 2872 case KFD_CRIU_OP_PROCESS_INFO: 2873 ret = criu_process_info(filep, p, args); 2874 break; 2875 case KFD_CRIU_OP_CHECKPOINT: 2876 ret = criu_checkpoint(filep, p, args); 2877 break; 2878 case KFD_CRIU_OP_UNPAUSE: 2879 ret = criu_unpause(filep, p, args); 2880 break; 2881 case KFD_CRIU_OP_RESTORE: 2882 ret = criu_restore(filep, p, args); 2883 break; 2884 case KFD_CRIU_OP_RESUME: 2885 ret = criu_resume(filep, p, args); 2886 break; 2887 default: 2888 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2889 ret = -EINVAL; 2890 break; 2891 } 2892 2893 if (ret) 2894 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2895 2896 return ret; 2897 } 2898 2899 static int runtime_enable(struct kfd_process *p, uint64_t r_debug, 2900 bool enable_ttmp_setup) 2901 { 2902 int i = 0, ret = 0; 2903 2904 if (p->is_runtime_retry) 2905 goto retry; 2906 2907 if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 2908 return -EBUSY; 2909 2910 for (i = 0; i < p->n_pdds; i++) { 2911 struct kfd_process_device *pdd = p->pdds[i]; 2912 2913 if (pdd->qpd.queue_count) 2914 return -EEXIST; 2915 2916 /* 2917 * Setup TTMPs by default. 2918 * Note that this call must remain here for MES ADD QUEUE to 2919 * skip_process_ctx_clear unconditionally as the first call to 2920 * SET_SHADER_DEBUGGER clears any stale process context data 2921 * saved in MES. 2922 */ 2923 if (pdd->dev->kfd->shared_resources.enable_mes) { 2924 ret = kfd_dbg_set_mes_debug_mode( 2925 pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2926 if (ret) 2927 return ret; 2928 } 2929 } 2930 2931 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 2932 p->runtime_info.r_debug = r_debug; 2933 p->runtime_info.ttmp_setup = enable_ttmp_setup; 2934 2935 if (p->runtime_info.ttmp_setup) { 2936 for (i = 0; i < p->n_pdds; i++) { 2937 struct kfd_process_device *pdd = p->pdds[i]; 2938 2939 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) { 2940 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 2941 pdd->dev->kfd2kgd->enable_debug_trap( 2942 pdd->dev->adev, 2943 true, 2944 pdd->dev->vm_info.last_vmid_kfd); 2945 } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2946 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 2947 pdd->dev->adev, 2948 false, 2949 0); 2950 } 2951 } 2952 } 2953 2954 retry: 2955 if (p->debug_trap_enabled) { 2956 if (!p->is_runtime_retry) { 2957 kfd_dbg_trap_activate(p); 2958 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2959 p, NULL, 0, false, NULL, 0); 2960 } 2961 2962 mutex_unlock(&p->mutex); 2963 ret = down_interruptible(&p->runtime_enable_sema); 2964 mutex_lock(&p->mutex); 2965 2966 p->is_runtime_retry = !!ret; 2967 } 2968 2969 return ret; 2970 } 2971 2972 static int runtime_disable(struct kfd_process *p) 2973 { 2974 int i = 0, ret = 0; 2975 bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED; 2976 2977 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED; 2978 p->runtime_info.r_debug = 0; 2979 2980 if (p->debug_trap_enabled) { 2981 if (was_enabled) 2982 kfd_dbg_trap_deactivate(p, false, 0); 2983 2984 if (!p->is_runtime_retry) 2985 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2986 p, NULL, 0, false, NULL, 0); 2987 2988 mutex_unlock(&p->mutex); 2989 ret = down_interruptible(&p->runtime_enable_sema); 2990 mutex_lock(&p->mutex); 2991 2992 p->is_runtime_retry = !!ret; 2993 if (ret) 2994 return ret; 2995 } 2996 2997 if (was_enabled && p->runtime_info.ttmp_setup) { 2998 for (i = 0; i < p->n_pdds; i++) { 2999 struct kfd_process_device *pdd = p->pdds[i]; 3000 3001 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) 3002 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 3003 } 3004 } 3005 3006 p->runtime_info.ttmp_setup = false; 3007 3008 /* disable ttmp setup */ 3009 for (i = 0; i < p->n_pdds; i++) { 3010 struct kfd_process_device *pdd = p->pdds[i]; 3011 int last_err = 0; 3012 3013 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 3014 pdd->spi_dbg_override = 3015 pdd->dev->kfd2kgd->disable_debug_trap( 3016 pdd->dev->adev, 3017 false, 3018 pdd->dev->vm_info.last_vmid_kfd); 3019 3020 if (!pdd->dev->kfd->shared_resources.enable_mes) 3021 last_err = debug_refresh_runlist(pdd->dev->dqm); 3022 else 3023 last_err = kfd_dbg_set_mes_debug_mode(pdd, 3024 !kfd_dbg_has_cwsr_workaround(pdd->dev)); 3025 3026 if (last_err) 3027 ret = last_err; 3028 } 3029 } 3030 3031 return ret; 3032 } 3033 3034 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data) 3035 { 3036 struct kfd_ioctl_runtime_enable_args *args = data; 3037 int r; 3038 3039 mutex_lock(&p->mutex); 3040 3041 if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK) 3042 r = runtime_enable(p, args->r_debug, 3043 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK)); 3044 else 3045 r = runtime_disable(p); 3046 3047 mutex_unlock(&p->mutex); 3048 3049 return r; 3050 } 3051 3052 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data) 3053 { 3054 struct kfd_ioctl_dbg_trap_args *args = data; 3055 struct task_struct *thread = NULL; 3056 struct mm_struct *mm = NULL; 3057 struct pid *pid = NULL; 3058 struct kfd_process *target = NULL; 3059 struct kfd_process_device *pdd = NULL; 3060 int r = 0; 3061 3062 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) { 3063 pr_debug("Set debug trap ioctl can not be invoked on non-primary kfd process\n"); 3064 3065 return -EOPNOTSUPP; 3066 } 3067 3068 if (sched_policy == KFD_SCHED_POLICY_NO_HWS) { 3069 pr_err("Debugging does not support sched_policy %i", sched_policy); 3070 return -EINVAL; 3071 } 3072 3073 pid = find_get_pid(args->pid); 3074 if (!pid) { 3075 pr_debug("Cannot find pid info for %i\n", args->pid); 3076 r = -ESRCH; 3077 goto out; 3078 } 3079 3080 thread = get_pid_task(pid, PIDTYPE_PID); 3081 if (!thread) { 3082 r = -ESRCH; 3083 goto out; 3084 } 3085 3086 mm = get_task_mm(thread); 3087 if (!mm) { 3088 r = -ESRCH; 3089 goto out; 3090 } 3091 3092 if (args->op == KFD_IOC_DBG_TRAP_ENABLE) { 3093 bool create_process; 3094 3095 rcu_read_lock(); 3096 create_process = thread && thread != current && ptrace_parent(thread) == current; 3097 rcu_read_unlock(); 3098 3099 target = create_process ? kfd_create_process(thread) : 3100 kfd_lookup_process_by_pid(pid); 3101 } else { 3102 target = kfd_lookup_process_by_pid(pid); 3103 } 3104 3105 if (IS_ERR_OR_NULL(target)) { 3106 pr_debug("Cannot find process PID %i to debug\n", args->pid); 3107 r = target ? PTR_ERR(target) : -ESRCH; 3108 target = NULL; 3109 goto out; 3110 } 3111 3112 if (target->context_id != KFD_CONTEXT_ID_PRIMARY) { 3113 pr_debug("Set debug trap ioctl not supported on non-primary kfd process\n"); 3114 r = -EOPNOTSUPP; 3115 goto out; 3116 } 3117 3118 /* Check if target is still PTRACED. */ 3119 rcu_read_lock(); 3120 if (target != p && args->op != KFD_IOC_DBG_TRAP_DISABLE 3121 && ptrace_parent(target->lead_thread) != current) { 3122 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid); 3123 r = -EPERM; 3124 } 3125 rcu_read_unlock(); 3126 3127 if (r) 3128 goto out; 3129 3130 mutex_lock(&target->mutex); 3131 3132 if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) { 3133 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op); 3134 r = -EINVAL; 3135 goto unlock_out; 3136 } 3137 3138 if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED && 3139 (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE || 3140 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE || 3141 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES || 3142 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES || 3143 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3144 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH || 3145 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) { 3146 r = -EPERM; 3147 goto unlock_out; 3148 } 3149 3150 if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 3151 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) { 3152 int user_gpu_id = kfd_process_get_user_gpu_id(target, 3153 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ? 3154 args->set_node_address_watch.gpu_id : 3155 args->clear_node_address_watch.gpu_id); 3156 3157 pdd = kfd_process_device_data_by_id(target, user_gpu_id); 3158 if (user_gpu_id == -EINVAL || !pdd) { 3159 r = -ENODEV; 3160 goto unlock_out; 3161 } 3162 } 3163 3164 switch (args->op) { 3165 case KFD_IOC_DBG_TRAP_ENABLE: 3166 if (target != p) 3167 target->debugger_process = p; 3168 3169 r = kfd_dbg_trap_enable(target, 3170 args->enable.dbg_fd, 3171 (void __user *)args->enable.rinfo_ptr, 3172 &args->enable.rinfo_size); 3173 if (!r) 3174 target->exception_enable_mask = args->enable.exception_mask; 3175 3176 break; 3177 case KFD_IOC_DBG_TRAP_DISABLE: 3178 r = kfd_dbg_trap_disable(target); 3179 break; 3180 case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT: 3181 r = kfd_dbg_send_exception_to_runtime(target, 3182 args->send_runtime_event.gpu_id, 3183 args->send_runtime_event.queue_id, 3184 args->send_runtime_event.exception_mask); 3185 break; 3186 case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED: 3187 kfd_dbg_set_enabled_debug_exception_mask(target, 3188 args->set_exceptions_enabled.exception_mask); 3189 break; 3190 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: 3191 r = kfd_dbg_trap_set_wave_launch_override(target, 3192 args->launch_override.override_mode, 3193 args->launch_override.enable_mask, 3194 args->launch_override.support_request_mask, 3195 &args->launch_override.enable_mask, 3196 &args->launch_override.support_request_mask); 3197 break; 3198 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: 3199 r = kfd_dbg_trap_set_wave_launch_mode(target, 3200 args->launch_mode.launch_mode); 3201 break; 3202 case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES: 3203 r = suspend_queues(target, 3204 args->suspend_queues.num_queues, 3205 args->suspend_queues.grace_period, 3206 args->suspend_queues.exception_mask, 3207 (uint32_t *)args->suspend_queues.queue_array_ptr); 3208 3209 break; 3210 case KFD_IOC_DBG_TRAP_RESUME_QUEUES: 3211 r = resume_queues(target, args->resume_queues.num_queues, 3212 (uint32_t *)args->resume_queues.queue_array_ptr); 3213 break; 3214 case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH: 3215 r = kfd_dbg_trap_set_dev_address_watch(pdd, 3216 args->set_node_address_watch.address, 3217 args->set_node_address_watch.mask, 3218 &args->set_node_address_watch.id, 3219 args->set_node_address_watch.mode); 3220 break; 3221 case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH: 3222 r = kfd_dbg_trap_clear_dev_address_watch(pdd, 3223 args->clear_node_address_watch.id); 3224 break; 3225 case KFD_IOC_DBG_TRAP_SET_FLAGS: 3226 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags); 3227 break; 3228 case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT: 3229 r = kfd_dbg_ev_query_debug_event(target, 3230 &args->query_debug_event.queue_id, 3231 &args->query_debug_event.gpu_id, 3232 args->query_debug_event.exception_mask, 3233 &args->query_debug_event.exception_mask); 3234 break; 3235 case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO: 3236 r = kfd_dbg_trap_query_exception_info(target, 3237 args->query_exception_info.source_id, 3238 args->query_exception_info.exception_code, 3239 args->query_exception_info.clear_exception, 3240 (void __user *)args->query_exception_info.info_ptr, 3241 &args->query_exception_info.info_size); 3242 break; 3243 case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT: 3244 r = pqm_get_queue_snapshot(&target->pqm, 3245 args->queue_snapshot.exception_mask, 3246 (void __user *)args->queue_snapshot.snapshot_buf_ptr, 3247 &args->queue_snapshot.num_queues, 3248 &args->queue_snapshot.entry_size); 3249 break; 3250 case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT: 3251 r = kfd_dbg_trap_device_snapshot(target, 3252 args->device_snapshot.exception_mask, 3253 (void __user *)args->device_snapshot.snapshot_buf_ptr, 3254 &args->device_snapshot.num_devices, 3255 &args->device_snapshot.entry_size); 3256 break; 3257 default: 3258 pr_err("Invalid option: %i\n", args->op); 3259 r = -EINVAL; 3260 } 3261 3262 unlock_out: 3263 mutex_unlock(&target->mutex); 3264 3265 out: 3266 if (thread) 3267 put_task_struct(thread); 3268 3269 if (mm) 3270 mmput(mm); 3271 3272 if (pid) 3273 put_pid(pid); 3274 3275 if (target) 3276 kfd_unref_process(target); 3277 3278 return r; 3279 } 3280 3281 /* userspace programs need to invoke this ioctl explicitly on a FD to 3282 * create a secondary kfd_process which replacing its primary kfd_process 3283 */ 3284 static int kfd_ioctl_create_process(struct file *filep, struct kfd_process *p, void *data) 3285 { 3286 struct kfd_process *process; 3287 int ret; 3288 3289 if (!filep->private_data || !p) 3290 return -EINVAL; 3291 3292 /* Each FD owns only one kfd_process */ 3293 if (p->context_id != KFD_CONTEXT_ID_PRIMARY) 3294 return -EINVAL; 3295 3296 mutex_lock(&kfd_processes_mutex); 3297 if (p != filep->private_data) { 3298 mutex_unlock(&kfd_processes_mutex); 3299 return -EINVAL; 3300 } 3301 3302 process = create_process(current, false); 3303 if (IS_ERR(process)) { 3304 mutex_unlock(&kfd_processes_mutex); 3305 return PTR_ERR(process); 3306 } 3307 3308 filep->private_data = process; 3309 mutex_unlock(&kfd_processes_mutex); 3310 3311 ret = kfd_create_process_sysfs(process); 3312 if (ret) 3313 pr_warn("Failed to create sysfs entry for the kfd_process"); 3314 3315 /* Each open() increases kref of the primary kfd_process, 3316 * so we need to reduce it here when we create a new secondary process replacing it 3317 */ 3318 kfd_unref_process(p); 3319 3320 return 0; 3321 } 3322 3323 static inline uint32_t profile_lock_device(struct kfd_process *p, 3324 uint32_t gpu_id, uint32_t op) 3325 { 3326 struct kfd_process_device *pdd; 3327 struct kfd_dev *kfd; 3328 int status = -EINVAL; 3329 struct amdgpu_ptl *ptl; 3330 3331 if (!p) 3332 return -EINVAL; 3333 3334 mutex_lock(&p->mutex); 3335 pdd = kfd_process_device_data_by_id(p, gpu_id); 3336 mutex_unlock(&p->mutex); 3337 3338 if (!pdd || !pdd->dev || !pdd->dev->kfd) 3339 return -EINVAL; 3340 3341 kfd = pdd->dev->kfd; 3342 ptl = &pdd->dev->adev->psp.ptl; 3343 3344 mutex_lock(&kfd->profiler_lock); 3345 if (op == 1) { 3346 if (!kfd->profiler_process) { 3347 kfd->profiler_process = p; 3348 status = 0; 3349 mutex_unlock(&kfd->profiler_lock); 3350 if (ptl->hw_supported) { 3351 status = kfd_ptl_disable_request(pdd, p); 3352 if (status != 0) 3353 dev_err(kfd_device, 3354 "Failed to lock device %d for profiling, error %d\n", 3355 gpu_id, status); 3356 } 3357 return status; 3358 } else if (kfd->profiler_process == p) { 3359 status = -EALREADY; 3360 } else { 3361 status = -EBUSY; 3362 } 3363 } else if (op == 0 && kfd->profiler_process == p) { 3364 kfd->profiler_process = NULL; 3365 status = 0; 3366 mutex_unlock(&kfd->profiler_lock); 3367 3368 if (ptl->hw_supported) { 3369 status = kfd_ptl_disable_release(pdd, p); 3370 if (status) 3371 dev_err(kfd_device, 3372 "Failed to unlock device %d for profiling, error %d\n", 3373 gpu_id, status); 3374 } 3375 return status; 3376 } 3377 mutex_unlock(&kfd->profiler_lock); 3378 3379 return status; 3380 } 3381 3382 static inline int kfd_profiler_pmc(struct kfd_process *p, 3383 struct kfd_ioctl_pmc_settings *args) 3384 { 3385 struct kfd_process_device *pdd; 3386 struct device_queue_manager *dqm; 3387 int status; 3388 3389 /* Check if we have the correct permissions. */ 3390 if (!perfmon_capable()) 3391 return -EPERM; 3392 3393 /* Lock/Unlock the device based on the parameter given in OP */ 3394 status = profile_lock_device(p, args->gpu_id, args->lock); 3395 if (status != 0) 3396 return status; 3397 3398 /* Enable/disable perfcount if requested */ 3399 mutex_lock(&p->mutex); 3400 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 3401 dqm = pdd->dev->dqm; 3402 mutex_unlock(&p->mutex); 3403 3404 dqm->ops.set_perfcount(dqm, args->perfcount_enable); 3405 return status; 3406 } 3407 3408 static int kfd_ioctl_profiler(struct file *filep, struct kfd_process *p, void *data) 3409 { 3410 struct kfd_ioctl_profiler_args *args = data; 3411 3412 switch (args->op) { 3413 case KFD_IOC_PROFILER_VERSION: 3414 args->version = KFD_IOC_PROFILER_VERSION_NUM; 3415 return 0; 3416 case KFD_IOC_PROFILER_PMC: 3417 return kfd_profiler_pmc(p, &args->pmc); 3418 case KFD_IOC_PROFILER_PTL_CONTROL: 3419 return kfd_profiler_ptl_control(p, &args->ptl); 3420 } 3421 return -EINVAL; 3422 } 3423 3424 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 3425 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3426 .validate = NULL, .cmd_drv = 0, .name = #ioctl} 3427 3428 #define AMDKFD_IOCTL_DEF_V(ioctl, _func, _validate, _flags) \ 3429 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3430 .validate = _validate, .cmd_drv = 0, .name = #ioctl} 3431 3432 /** Ioctl table */ 3433 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 3434 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 3435 kfd_ioctl_get_version, 0), 3436 3437 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 3438 kfd_ioctl_create_queue, 0), 3439 3440 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 3441 kfd_ioctl_destroy_queue, 0), 3442 3443 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 3444 kfd_ioctl_set_memory_policy, 0), 3445 3446 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 3447 kfd_ioctl_get_clock_counters, 0), 3448 3449 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 3450 kfd_ioctl_get_process_apertures, 0), 3451 3452 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 3453 kfd_ioctl_update_queue, 0), 3454 3455 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 3456 kfd_ioctl_create_event, 0), 3457 3458 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 3459 kfd_ioctl_destroy_event, 0), 3460 3461 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 3462 kfd_ioctl_set_event, 0), 3463 3464 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 3465 kfd_ioctl_reset_event, 0), 3466 3467 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 3468 kfd_ioctl_wait_events, 0), 3469 3470 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 3471 kfd_ioctl_dbg_register, 0), 3472 3473 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 3474 kfd_ioctl_dbg_unregister, 0), 3475 3476 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 3477 kfd_ioctl_dbg_address_watch, 0), 3478 3479 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 3480 kfd_ioctl_dbg_wave_control, 0), 3481 3482 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 3483 kfd_ioctl_set_scratch_backing_va, 0), 3484 3485 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 3486 kfd_ioctl_get_tile_config, 0), 3487 3488 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 3489 kfd_ioctl_set_trap_handler, 0), 3490 3491 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 3492 kfd_ioctl_get_process_apertures_new, 0), 3493 3494 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 3495 kfd_ioctl_acquire_vm, 0), 3496 3497 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 3498 kfd_ioctl_alloc_memory_of_gpu, 0), 3499 3500 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 3501 kfd_ioctl_free_memory_of_gpu, 0), 3502 3503 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 3504 kfd_ioctl_map_memory_to_gpu, 0), 3505 3506 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 3507 kfd_ioctl_unmap_memory_from_gpu, 0), 3508 3509 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 3510 kfd_ioctl_set_cu_mask, 0), 3511 3512 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 3513 kfd_ioctl_get_queue_wave_state, 0), 3514 3515 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 3516 kfd_ioctl_get_dmabuf_info, 0), 3517 3518 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 3519 kfd_ioctl_import_dmabuf, 0), 3520 3521 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 3522 kfd_ioctl_alloc_queue_gws, 0), 3523 3524 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 3525 kfd_ioctl_smi_events, 0), 3526 3527 AMDKFD_IOCTL_DEF_V(AMDKFD_IOC_SVM, kfd_ioctl_svm, 3528 kfd_ioctl_svm_validate, 0), 3529 3530 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 3531 kfd_ioctl_set_xnack_mode, 0), 3532 3533 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 3534 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 3535 3536 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 3537 kfd_ioctl_get_available_memory, 0), 3538 3539 AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF, 3540 kfd_ioctl_export_dmabuf, 0), 3541 3542 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE, 3543 kfd_ioctl_runtime_enable, 0), 3544 3545 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP, 3546 kfd_ioctl_set_debug_trap, 0), 3547 3548 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_PROCESS, 3549 kfd_ioctl_create_process, 0), 3550 3551 AMDKFD_IOCTL_DEF(AMDKFD_IOC_PROFILER, 3552 kfd_ioctl_profiler, 0), 3553 }; 3554 3555 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 3556 3557 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 3558 { 3559 struct kfd_process *process; 3560 amdkfd_ioctl_t *func; 3561 const struct amdkfd_ioctl_desc *ioctl = NULL; 3562 unsigned int nr = _IOC_NR(cmd); 3563 char stack_kdata[128]; 3564 char *kdata = NULL; 3565 unsigned int usize, asize; 3566 int retcode = -EINVAL; 3567 bool ptrace_attached = false; 3568 3569 if (nr >= AMDKFD_CORE_IOCTL_COUNT) { 3570 retcode = -ENOTTY; 3571 goto err_i1; 3572 } 3573 3574 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 3575 u32 amdkfd_size; 3576 3577 ioctl = &amdkfd_ioctls[nr]; 3578 3579 amdkfd_size = _IOC_SIZE(ioctl->cmd); 3580 usize = asize = _IOC_SIZE(cmd); 3581 if (amdkfd_size > asize) 3582 asize = amdkfd_size; 3583 3584 cmd = ioctl->cmd; 3585 } else { 3586 retcode = -ENOTTY; 3587 goto err_i1; 3588 } 3589 3590 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 3591 3592 /* Get the process struct from the filep. Only the process 3593 * that opened /dev/kfd can use the file descriptor. Child 3594 * processes need to create their own KFD device context. 3595 */ 3596 process = filep->private_data; 3597 3598 rcu_read_lock(); 3599 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 3600 ptrace_parent(process->lead_thread) == current) 3601 ptrace_attached = true; 3602 rcu_read_unlock(); 3603 3604 if (process->lead_thread != current->group_leader 3605 && !ptrace_attached) { 3606 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 3607 retcode = -EBADF; 3608 goto err_i1; 3609 } 3610 3611 /* Do not trust userspace, use our own definition */ 3612 func = ioctl->func; 3613 3614 if (unlikely(!func)) { 3615 dev_dbg(kfd_device, "no function\n"); 3616 retcode = -EINVAL; 3617 goto err_i1; 3618 } 3619 3620 /* 3621 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 3622 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 3623 * more priviledged access. 3624 */ 3625 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 3626 if (!capable(CAP_CHECKPOINT_RESTORE) && 3627 !capable(CAP_SYS_ADMIN)) { 3628 retcode = -EACCES; 3629 goto err_i1; 3630 } 3631 } 3632 3633 if (cmd & (IOC_IN | IOC_OUT)) { 3634 if (asize <= sizeof(stack_kdata)) { 3635 kdata = stack_kdata; 3636 } else { 3637 kdata = kmalloc(asize, GFP_KERNEL); 3638 if (!kdata) { 3639 retcode = -ENOMEM; 3640 goto err_i1; 3641 } 3642 } 3643 if (asize > usize) 3644 memset(kdata + usize, 0, asize - usize); 3645 } 3646 3647 if (cmd & IOC_IN) { 3648 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 3649 retcode = -EFAULT; 3650 goto err_i1; 3651 } 3652 } else if (cmd & IOC_OUT) { 3653 memset(kdata, 0, usize); 3654 } 3655 3656 if (ioctl->validate) { 3657 retcode = ioctl->validate(kdata, usize); 3658 if (retcode) 3659 goto err_i1; 3660 } 3661 3662 retcode = func(filep, process, kdata); 3663 3664 if (cmd & IOC_OUT) 3665 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 3666 retcode = -EFAULT; 3667 3668 err_i1: 3669 if (!ioctl) 3670 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 3671 task_pid_nr(current), cmd, nr); 3672 3673 if (kdata != stack_kdata) 3674 kfree(kdata); 3675 3676 if (retcode) 3677 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 3678 nr, arg, retcode); 3679 3680 return retcode; 3681 } 3682 3683 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, 3684 struct vm_area_struct *vma) 3685 { 3686 phys_addr_t address; 3687 3688 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 3689 return -EINVAL; 3690 3691 if (PAGE_SIZE > 4096) 3692 return -EINVAL; 3693 3694 address = dev->adev->rmmio_remap.bus_addr; 3695 3696 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 3697 VM_DONTDUMP | VM_PFNMAP); 3698 3699 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 3700 3701 pr_debug("process pid %d mapping mmio page\n" 3702 " target user address == 0x%08llX\n" 3703 " physical address == 0x%08llX\n" 3704 " vm_flags == 0x%04lX\n" 3705 " size == 0x%04lX\n", 3706 process->lead_thread->pid, (unsigned long long) vma->vm_start, 3707 address, vma->vm_flags, PAGE_SIZE); 3708 3709 return io_remap_pfn_range(vma, 3710 vma->vm_start, 3711 address >> PAGE_SHIFT, 3712 PAGE_SIZE, 3713 vma->vm_page_prot); 3714 } 3715 3716 3717 static int kfd_mmap(struct file *filep, struct vm_area_struct *vma) 3718 { 3719 struct kfd_process *process; 3720 struct kfd_node *dev = NULL; 3721 unsigned long mmap_offset; 3722 unsigned int gpu_id; 3723 3724 process = filep->private_data; 3725 if (!process) 3726 return -ESRCH; 3727 3728 if (process->lead_thread != current->group_leader) 3729 return -EBADF; 3730 3731 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 3732 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 3733 if (gpu_id) 3734 dev = kfd_device_by_id(gpu_id); 3735 3736 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 3737 case KFD_MMAP_TYPE_DOORBELL: 3738 if (!dev) 3739 return -ENODEV; 3740 return kfd_doorbell_mmap(dev, process, vma); 3741 3742 case KFD_MMAP_TYPE_EVENTS: 3743 return kfd_event_mmap(process, vma); 3744 3745 case KFD_MMAP_TYPE_RESERVED_MEM: 3746 pr_warn("KFD_MMAP_TYPE_RESERVED_MEM is no longer supported\n"); 3747 return -EINVAL; 3748 case KFD_MMAP_TYPE_MMIO: 3749 if (!dev) 3750 return -ENODEV; 3751 return kfd_mmio_mmap(dev, process, vma); 3752 } 3753 3754 return -EFAULT; 3755 } 3756