xref: /linux/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Copyright 2014-2022 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #include <linux/capability.h>
25 #include <linux/device.h>
26 #include <linux/err.h>
27 #include <linux/fs.h>
28 #include <linux/file.h>
29 #include <linux/overflow.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/uaccess.h>
33 #include <linux/compat.h>
34 #include <uapi/linux/kfd_ioctl.h>
35 #include <linux/time.h>
36 #include <linux/mm.h>
37 #include <linux/mman.h>
38 #include <linux/ptrace.h>
39 #include <linux/dma-buf.h>
40 #include <linux/processor.h>
41 #include "kfd_priv.h"
42 #include "kfd_device_queue_manager.h"
43 #include "kfd_svm.h"
44 #include "amdgpu_amdkfd.h"
45 #include "kfd_smi_events.h"
46 #include "amdgpu_dma_buf.h"
47 #include "kfd_debug.h"
48 #include "amdgpu_ptl.h"
49 
50 static long kfd_ioctl(struct file *, unsigned int, unsigned long);
51 static int kfd_open(struct inode *, struct file *);
52 static int kfd_release(struct inode *, struct file *);
53 static int kfd_mmap(struct file *, struct vm_area_struct *);
54 
55 static const char kfd_dev_name[] = "kfd";
56 
57 static const struct file_operations kfd_fops = {
58 	.owner = THIS_MODULE,
59 	.unlocked_ioctl = kfd_ioctl,
60 	.compat_ioctl = compat_ptr_ioctl,
61 	.open = kfd_open,
62 	.release = kfd_release,
63 	.mmap = kfd_mmap,
64 };
65 
66 static int kfd_char_dev_major = -1;
67 struct device *kfd_device;
68 static const struct class kfd_class = {
69 	.name = kfd_dev_name,
70 };
71 
72 /*
73  * Cache the address space of the chardev on first open so that the reset
74  * path can drop all userspace mappings of doorbell and MMIO ranges via
75  * unmap_mapping_range().
76  */
77 static struct address_space *kfd_dev_mapping;
78 
79 void kfd_dev_unmap_mapping_range(loff_t const holebegin, loff_t const holelen)
80 {
81 	struct address_space *mapping = READ_ONCE(kfd_dev_mapping);
82 
83 	if (mapping)
84 		unmap_mapping_range(mapping, holebegin, holelen, 1);
85 }
86 
87 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id)
88 {
89 	struct kfd_process_device *pdd;
90 
91 	mutex_lock(&p->mutex);
92 	pdd = kfd_process_device_data_by_id(p, gpu_id);
93 
94 	if (pdd)
95 		return pdd;
96 
97 	mutex_unlock(&p->mutex);
98 	return NULL;
99 }
100 
101 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd)
102 {
103 	mutex_unlock(&pdd->process->mutex);
104 }
105 
106 int kfd_chardev_init(void)
107 {
108 	int err = 0;
109 
110 	kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops);
111 	err = kfd_char_dev_major;
112 	if (err < 0)
113 		goto err_register_chrdev;
114 
115 	err = class_register(&kfd_class);
116 	if (err)
117 		goto err_class_create;
118 
119 	kfd_device = device_create(&kfd_class, NULL,
120 				   MKDEV(kfd_char_dev_major, 0),
121 				   NULL, kfd_dev_name);
122 	err = PTR_ERR(kfd_device);
123 	if (IS_ERR(kfd_device))
124 		goto err_device_create;
125 
126 	return 0;
127 
128 err_device_create:
129 	class_unregister(&kfd_class);
130 err_class_create:
131 	unregister_chrdev(kfd_char_dev_major, kfd_dev_name);
132 err_register_chrdev:
133 	return err;
134 }
135 
136 void kfd_chardev_exit(void)
137 {
138 	device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0));
139 	class_unregister(&kfd_class);
140 	unregister_chrdev(kfd_char_dev_major, kfd_dev_name);
141 	kfd_device = NULL;
142 }
143 
144 
145 static int kfd_open(struct inode *inode, struct file *filep)
146 {
147 	struct kfd_process *process;
148 	bool is_32bit_user_mode;
149 
150 	if (iminor(inode) != 0)
151 		return -ENODEV;
152 
153 	/*
154 	 * /dev/kfd is a single chardev so all opens share one inode. Cache
155 	 * its address_space on the first open for use by the reset path.
156 	 */
157 	if (!READ_ONCE(kfd_dev_mapping))
158 		cmpxchg(&kfd_dev_mapping, NULL, inode->i_mapping);
159 
160 	is_32bit_user_mode = in_compat_syscall();
161 
162 	if (is_32bit_user_mode) {
163 		dev_warn(kfd_device,
164 			"Process %d (32-bit) failed to open /dev/kfd\n"
165 			"32-bit processes are not supported by amdkfd\n",
166 			current->pid);
167 		return -EPERM;
168 	}
169 
170 	process = kfd_create_process(current);
171 	if (IS_ERR(process))
172 		return PTR_ERR(process);
173 
174 	/* filep now owns the reference returned by kfd_create_process */
175 	filep->private_data = process;
176 
177 	dev_dbg(kfd_device, "process pid %d opened kfd node, compat mode (32 bit) - %d\n",
178 		process->lead_thread->pid, process->is_32bit_user_mode);
179 
180 	return 0;
181 }
182 
183 static int kfd_release(struct inode *inode, struct file *filep)
184 {
185 	struct kfd_process *process = filep->private_data;
186 
187 	if (!process)
188 		return 0;
189 
190 	if (process->context_id != KFD_CONTEXT_ID_PRIMARY)
191 		kfd_process_notifier_release_internal(process);
192 
193 	kfd_unref_process(process);
194 
195 	return 0;
196 }
197 
198 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
199 					void *data)
200 {
201 	struct kfd_ioctl_get_version_args *args = data;
202 
203 	args->major_version = KFD_IOCTL_MAJOR_VERSION;
204 	args->minor_version = KFD_IOCTL_MINOR_VERSION;
205 
206 	return 0;
207 }
208 
209 static int set_queue_properties_from_user(struct queue_properties *q_properties,
210 				struct kfd_ioctl_create_queue_args *args)
211 {
212 	/*
213 	 * Repurpose queue percentage to accommodate new features:
214 	 * bit 0-7: queue percentage
215 	 * bit 8-15: pm4_target_xcc
216 	 */
217 	if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) {
218 		pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
219 		return -EINVAL;
220 	}
221 
222 	if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) {
223 		pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
224 		return -EINVAL;
225 	}
226 
227 	if ((args->ring_base_address) &&
228 		(!access_ok((const void __user *) args->ring_base_address,
229 			sizeof(uint64_t)))) {
230 		pr_err("Can't access ring base address\n");
231 		return -EFAULT;
232 	}
233 
234 	if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {
235 		pr_err("Ring size must be a power of 2 or 0\n");
236 		return -EINVAL;
237 	}
238 
239 	if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) {
240 		args->ring_size = KFD_MIN_QUEUE_RING_SIZE;
241 		pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE");
242 	}
243 
244 	if ((args->metadata_ring_size != 0) && !is_power_of_2(args->metadata_ring_size)) {
245 		pr_err("Metadata ring size must be a power of 2 or 0\n");
246 		return -EINVAL;
247 	}
248 
249 	if (!access_ok((const void __user *) args->read_pointer_address,
250 			sizeof(uint32_t))) {
251 		pr_err("Can't access read pointer\n");
252 		return -EFAULT;
253 	}
254 
255 	if (!access_ok((const void __user *) args->write_pointer_address,
256 			sizeof(uint32_t))) {
257 		pr_err("Can't access write pointer\n");
258 		return -EFAULT;
259 	}
260 
261 	if (args->eop_buffer_address &&
262 		!access_ok((const void __user *) args->eop_buffer_address,
263 			sizeof(uint32_t))) {
264 		pr_debug("Can't access eop buffer");
265 		return -EFAULT;
266 	}
267 
268 	if (args->ctx_save_restore_address &&
269 		!access_ok((const void __user *) args->ctx_save_restore_address,
270 			sizeof(uint32_t))) {
271 		pr_debug("Can't access ctx save restore buffer");
272 		return -EFAULT;
273 	}
274 
275 	q_properties->is_interop = false;
276 	q_properties->is_gws = false;
277 	q_properties->queue_percent = args->queue_percentage & 0xFF;
278 	/* bit 8-15 are repurposed to be PM4 target XCC */
279 	q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF;
280 	q_properties->priority = args->queue_priority;
281 	q_properties->queue_address = args->ring_base_address;
282 	q_properties->queue_size = args->ring_size;
283 	if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL)
284 		q_properties->metadata_queue_size = args->metadata_ring_size;
285 
286 	q_properties->read_ptr = (void __user *)args->read_pointer_address;
287 	q_properties->write_ptr = (void __user *)args->write_pointer_address;
288 	q_properties->eop_ring_buffer_address = args->eop_buffer_address;
289 	q_properties->eop_ring_buffer_size = args->eop_buffer_size;
290 	q_properties->ctx_save_restore_area_address =
291 			args->ctx_save_restore_address;
292 	q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size;
293 	q_properties->ctl_stack_size = args->ctl_stack_size;
294 	q_properties->sdma_engine_id = args->sdma_engine_id;
295 	if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE ||
296 		args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL)
297 		q_properties->type = KFD_QUEUE_TYPE_COMPUTE;
298 	else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA)
299 		q_properties->type = KFD_QUEUE_TYPE_SDMA;
300 	else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI)
301 		q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI;
302 	else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID)
303 		q_properties->type = KFD_QUEUE_TYPE_SDMA_BY_ENG_ID;
304 	else
305 		return -ENOTSUPP;
306 
307 	if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL)
308 		q_properties->format = KFD_QUEUE_FORMAT_AQL;
309 	else
310 		q_properties->format = KFD_QUEUE_FORMAT_PM4;
311 
312 	pr_debug("Queue Percentage: %d, %d\n",
313 			q_properties->queue_percent, args->queue_percentage);
314 
315 	pr_debug("Queue Priority: %d, %d\n",
316 			q_properties->priority, args->queue_priority);
317 
318 	pr_debug("Queue Address: 0x%llX, 0x%llX\n",
319 			q_properties->queue_address, args->ring_base_address);
320 
321 	pr_debug("Queue Size: 0x%llX, %u\n",
322 			q_properties->queue_size, args->ring_size);
323 
324 	pr_debug("Queue r/w Pointers: %px, %px\n",
325 			q_properties->read_ptr,
326 			q_properties->write_ptr);
327 
328 	pr_debug("Queue Format: %d\n", q_properties->format);
329 
330 	pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address);
331 
332 	pr_debug("Queue CTX save area: 0x%llX\n",
333 			q_properties->ctx_save_restore_area_address);
334 
335 	return 0;
336 }
337 
338 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
339 					void *data)
340 {
341 	struct kfd_ioctl_create_queue_args *args = data;
342 	struct kfd_node *dev;
343 	int err = 0;
344 	unsigned int queue_id;
345 	struct kfd_process_device *pdd;
346 	struct queue_properties q_properties;
347 	uint32_t doorbell_offset_in_process = 0;
348 
349 	memset(&q_properties, 0, sizeof(struct queue_properties));
350 
351 	pr_debug("Creating queue ioctl\n");
352 
353 	err = set_queue_properties_from_user(&q_properties, args);
354 	if (err)
355 		return err;
356 
357 	pr_debug("Looking for gpu id 0x%x\n", args->gpu_id);
358 
359 	mutex_lock(&p->mutex);
360 
361 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
362 	if (!pdd) {
363 		pr_debug("Could not find gpu id 0x%x\n", args->gpu_id);
364 		err = -EINVAL;
365 		goto err_pdd;
366 	}
367 	dev = pdd->dev;
368 
369 	pdd = kfd_bind_process_to_device(dev, p);
370 	if (IS_ERR(pdd)) {
371 		err = -ESRCH;
372 		goto err_bind_process;
373 	}
374 
375 	if (q_properties.type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) {
376 		int max_sdma_eng_id = kfd_get_num_sdma_engines(dev) +
377 				      kfd_get_num_xgmi_sdma_engines(dev) - 1;
378 
379 		if (q_properties.sdma_engine_id > max_sdma_eng_id) {
380 			err = -EINVAL;
381 			pr_err("sdma_engine_id %i exceeds maximum id of %i\n",
382 			       q_properties.sdma_engine_id, max_sdma_eng_id);
383 			goto err_sdma_engine_id;
384 		}
385 	}
386 
387 	if (!pdd->qpd.proc_doorbells) {
388 		err = kfd_alloc_process_doorbells(dev->kfd, pdd);
389 		if (err) {
390 			pr_debug("failed to allocate process doorbells\n");
391 			goto err_bind_process;
392 		}
393 	}
394 
395 	err = kfd_queue_acquire_buffers(pdd, &q_properties);
396 	if (err) {
397 		pr_debug("failed to acquire user queue buffers\n");
398 		goto err_acquire_queue_buf;
399 	}
400 
401 	pr_debug("Creating queue for process pid %d on gpu 0x%x\n",
402 			p->lead_thread->pid,
403 			dev->id);
404 
405 	err = pqm_create_queue(&p->pqm, dev, &q_properties, &queue_id,
406 			NULL, NULL, NULL, &doorbell_offset_in_process);
407 	if (err != 0)
408 		goto err_create_queue;
409 
410 	args->queue_id = queue_id;
411 
412 
413 	/* Return gpu_id as doorbell offset for mmap usage */
414 	args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL;
415 	args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id);
416 	if (KFD_IS_SOC15(dev))
417 		/* On SOC15 ASICs, include the doorbell offset within the
418 		 * process doorbell frame, which is 2 pages.
419 		 */
420 		args->doorbell_offset |= doorbell_offset_in_process;
421 
422 	mutex_unlock(&p->mutex);
423 
424 	pr_debug("Queue id %d was created successfully\n", args->queue_id);
425 
426 	pr_debug("Ring buffer address == 0x%016llX\n",
427 			args->ring_base_address);
428 
429 	pr_debug("Read ptr address    == 0x%016llX\n",
430 			args->read_pointer_address);
431 
432 	pr_debug("Write ptr address   == 0x%016llX\n",
433 			args->write_pointer_address);
434 
435 	kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0);
436 	return 0;
437 
438 err_create_queue:
439 	kfd_queue_unref_bo_vas(pdd, &q_properties);
440 	kfd_queue_release_buffers(pdd, &q_properties);
441 err_acquire_queue_buf:
442 err_sdma_engine_id:
443 err_bind_process:
444 err_pdd:
445 	mutex_unlock(&p->mutex);
446 	return err;
447 }
448 
449 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p,
450 					void *data)
451 {
452 	int retval;
453 	struct kfd_ioctl_destroy_queue_args *args = data;
454 
455 	pr_debug("Destroying queue id %d for process pid %d\n",
456 				args->queue_id,
457 				p->lead_thread->pid);
458 
459 	mutex_lock(&p->mutex);
460 
461 	retval = pqm_destroy_queue(&p->pqm, args->queue_id);
462 
463 	mutex_unlock(&p->mutex);
464 	return retval;
465 }
466 
467 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p,
468 					void *data)
469 {
470 	int retval;
471 	struct kfd_ioctl_update_queue_args *args = data;
472 	struct queue_properties properties;
473 
474 	/*
475 	 * Repurpose queue percentage to accommodate new features:
476 	 * bit 0-7: queue percentage
477 	 * bit 8-15: pm4_target_xcc
478 	 */
479 	if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) {
480 		pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
481 		return -EINVAL;
482 	}
483 
484 	if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) {
485 		pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
486 		return -EINVAL;
487 	}
488 
489 	if ((args->ring_base_address) &&
490 		(!access_ok((const void __user *) args->ring_base_address,
491 			sizeof(uint64_t)))) {
492 		pr_err("Can't access ring base address\n");
493 		return -EFAULT;
494 	}
495 
496 	if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {
497 		pr_err("Ring size must be a power of 2 or 0\n");
498 		return -EINVAL;
499 	}
500 
501 	if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) {
502 		args->ring_size = KFD_MIN_QUEUE_RING_SIZE;
503 		pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE");
504 	}
505 
506 	properties.queue_address = args->ring_base_address;
507 	properties.queue_size = args->ring_size;
508 	properties.queue_percent = args->queue_percentage & 0xFF;
509 	/* bit 8-15 are repurposed to be PM4 target XCC */
510 	properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF;
511 	properties.priority = args->queue_priority;
512 
513 	pr_debug("Updating queue id %d for process pid %d\n",
514 			args->queue_id, p->lead_thread->pid);
515 
516 	mutex_lock(&p->mutex);
517 
518 	retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties);
519 
520 	mutex_unlock(&p->mutex);
521 
522 	return retval;
523 }
524 
525 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p,
526 					void *data)
527 {
528 	int retval;
529 	const int max_num_cus = 1024;
530 	struct kfd_ioctl_set_cu_mask_args *args = data;
531 	struct mqd_update_info minfo = {0};
532 	uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr;
533 	size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32);
534 
535 	if ((args->num_cu_mask % 32) != 0) {
536 		pr_debug("num_cu_mask 0x%x must be a multiple of 32",
537 				args->num_cu_mask);
538 		return -EINVAL;
539 	}
540 
541 	minfo.cu_mask.count = args->num_cu_mask;
542 	if (minfo.cu_mask.count == 0) {
543 		pr_debug("CU mask cannot be 0");
544 		return -EINVAL;
545 	}
546 
547 	/* To prevent an unreasonably large CU mask size, set an arbitrary
548 	 * limit of max_num_cus bits.  We can then just drop any CU mask bits
549 	 * past max_num_cus bits and just use the first max_num_cus bits.
550 	 */
551 	if (minfo.cu_mask.count > max_num_cus) {
552 		pr_debug("CU mask cannot be greater than 1024 bits");
553 		minfo.cu_mask.count = max_num_cus;
554 		cu_mask_size = sizeof(uint32_t) * (max_num_cus/32);
555 	}
556 
557 	minfo.cu_mask.ptr = memdup_user(cu_mask_ptr, cu_mask_size);
558 	if (IS_ERR(minfo.cu_mask.ptr)) {
559 		pr_debug("Could not copy CU mask from userspace");
560 		return PTR_ERR(minfo.cu_mask.ptr);
561 	}
562 
563 	mutex_lock(&p->mutex);
564 
565 	retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo);
566 
567 	mutex_unlock(&p->mutex);
568 
569 	kfree(minfo.cu_mask.ptr);
570 	return retval;
571 }
572 
573 static int kfd_ioctl_get_queue_wave_state(struct file *filep,
574 					  struct kfd_process *p, void *data)
575 {
576 	struct kfd_ioctl_get_queue_wave_state_args *args = data;
577 	int r;
578 
579 	mutex_lock(&p->mutex);
580 
581 	r = pqm_get_wave_state(&p->pqm, args->queue_id,
582 			       (void __user *)args->ctl_stack_address,
583 			       &args->ctl_stack_used_size,
584 			       &args->save_area_used_size);
585 
586 	mutex_unlock(&p->mutex);
587 
588 	return r;
589 }
590 
591 static int kfd_ioctl_set_memory_policy(struct file *filep,
592 					struct kfd_process *p, void *data)
593 {
594 	struct kfd_ioctl_set_memory_policy_args *args = data;
595 	int err = 0;
596 	struct kfd_process_device *pdd;
597 	enum cache_policy default_policy, alternate_policy;
598 
599 	if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT
600 	    && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
601 		return -EINVAL;
602 	}
603 
604 	if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT
605 	    && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
606 		return -EINVAL;
607 	}
608 
609 	mutex_lock(&p->mutex);
610 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
611 	if (!pdd) {
612 		pr_debug("Could not find gpu id 0x%x\n", args->gpu_id);
613 		err = -EINVAL;
614 		goto err_pdd;
615 	}
616 
617 	pdd = kfd_bind_process_to_device(pdd->dev, p);
618 	if (IS_ERR(pdd)) {
619 		err = -ESRCH;
620 		goto out;
621 	}
622 
623 	default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT)
624 			 ? cache_policy_coherent : cache_policy_noncoherent;
625 
626 	alternate_policy =
627 		(args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
628 		   ? cache_policy_coherent : cache_policy_noncoherent;
629 
630 	if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm,
631 				&pdd->qpd,
632 				default_policy,
633 				alternate_policy,
634 				(void __user *)args->alternate_aperture_base,
635 				args->alternate_aperture_size,
636 				args->misc_process_flag))
637 		err = -EINVAL;
638 
639 out:
640 err_pdd:
641 	mutex_unlock(&p->mutex);
642 
643 	return err;
644 }
645 
646 static int kfd_ioctl_set_trap_handler(struct file *filep,
647 					struct kfd_process *p, void *data)
648 {
649 	struct kfd_ioctl_set_trap_handler_args *args = data;
650 	int err = 0;
651 	struct kfd_process_device *pdd;
652 
653 	mutex_lock(&p->mutex);
654 
655 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
656 	if (!pdd) {
657 		err = -EINVAL;
658 		goto err_pdd;
659 	}
660 
661 	pdd = kfd_bind_process_to_device(pdd->dev, p);
662 	if (IS_ERR(pdd)) {
663 		err = -ESRCH;
664 		goto out;
665 	}
666 
667 	kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr);
668 
669 out:
670 err_pdd:
671 	mutex_unlock(&p->mutex);
672 
673 	return err;
674 }
675 
676 static int kfd_ioctl_dbg_register(struct file *filep,
677 				struct kfd_process *p, void *data)
678 {
679 	return -EPERM;
680 }
681 
682 static int kfd_ioctl_dbg_unregister(struct file *filep,
683 				struct kfd_process *p, void *data)
684 {
685 	return -EPERM;
686 }
687 
688 static int kfd_ioctl_dbg_address_watch(struct file *filep,
689 					struct kfd_process *p, void *data)
690 {
691 	return -EPERM;
692 }
693 
694 /* Parse and generate fixed size data structure for wave control */
695 static int kfd_ioctl_dbg_wave_control(struct file *filep,
696 					struct kfd_process *p, void *data)
697 {
698 	return -EPERM;
699 }
700 
701 static int kfd_ioctl_get_clock_counters(struct file *filep,
702 				struct kfd_process *p, void *data)
703 {
704 	struct kfd_ioctl_get_clock_counters_args *args = data;
705 	struct kfd_process_device *pdd;
706 
707 	mutex_lock(&p->mutex);
708 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
709 	mutex_unlock(&p->mutex);
710 	if (pdd)
711 		/* Reading GPU clock counter from KGD */
712 		args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev);
713 	else
714 		/* Node without GPU resource */
715 		args->gpu_clock_counter = 0;
716 
717 	/* No access to rdtsc. Using raw monotonic time */
718 	args->cpu_clock_counter = ktime_get_raw_ns();
719 	args->system_clock_counter = ktime_get_boottime_ns();
720 
721 	/* Since the counter is in nano-seconds we use 1GHz frequency */
722 	args->system_clock_freq = 1000000000;
723 
724 	return 0;
725 }
726 
727 
728 static int kfd_ioctl_get_process_apertures(struct file *filp,
729 				struct kfd_process *p, void *data)
730 {
731 	struct kfd_ioctl_get_process_apertures_args *args = data;
732 	struct kfd_process_device_apertures *pAperture;
733 	int i;
734 
735 	dev_dbg(kfd_device, "get apertures for process pid %d", p->lead_thread->pid);
736 
737 	args->num_of_nodes = 0;
738 
739 	mutex_lock(&p->mutex);
740 	/* Run over all pdd of the process */
741 	for (i = 0; i < p->n_pdds; i++) {
742 		struct kfd_process_device *pdd = p->pdds[i];
743 
744 		pAperture =
745 			&args->process_apertures[args->num_of_nodes];
746 		pAperture->gpu_id = pdd->dev->id;
747 		pAperture->lds_base = pdd->lds_base;
748 		pAperture->lds_limit = pdd->lds_limit;
749 		pAperture->gpuvm_base = pdd->gpuvm_base;
750 		pAperture->gpuvm_limit = pdd->gpuvm_limit;
751 		pAperture->scratch_base = pdd->scratch_base;
752 		pAperture->scratch_limit = pdd->scratch_limit;
753 
754 		dev_dbg(kfd_device,
755 			"node id %u\n", args->num_of_nodes);
756 		dev_dbg(kfd_device,
757 			"gpu id %u\n", pdd->dev->id);
758 		dev_dbg(kfd_device,
759 			"lds_base %llX\n", pdd->lds_base);
760 		dev_dbg(kfd_device,
761 			"lds_limit %llX\n", pdd->lds_limit);
762 		dev_dbg(kfd_device,
763 			"gpuvm_base %llX\n", pdd->gpuvm_base);
764 		dev_dbg(kfd_device,
765 			"gpuvm_limit %llX\n", pdd->gpuvm_limit);
766 		dev_dbg(kfd_device,
767 			"scratch_base %llX\n", pdd->scratch_base);
768 		dev_dbg(kfd_device,
769 			"scratch_limit %llX\n", pdd->scratch_limit);
770 
771 		if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS)
772 			break;
773 	}
774 	mutex_unlock(&p->mutex);
775 
776 	return 0;
777 }
778 
779 static int kfd_ioctl_get_process_apertures_new(struct file *filp,
780 				struct kfd_process *p, void *data)
781 {
782 	struct kfd_ioctl_get_process_apertures_new_args *args = data;
783 	struct kfd_process_device_apertures *pa;
784 	int ret;
785 	int i;
786 
787 	dev_dbg(kfd_device, "get apertures for process pid %d",
788 			p->lead_thread->pid);
789 
790 	if (args->num_of_nodes == 0) {
791 		/* Return number of nodes, so that user space can alloacate
792 		 * sufficient memory
793 		 */
794 		mutex_lock(&p->mutex);
795 		args->num_of_nodes = p->n_pdds;
796 		goto out_unlock;
797 	}
798 
799 	if (args->num_of_nodes > kfd_topology_get_num_devices())
800 		return -EINVAL;
801 
802 	/* Fill in process-aperture information for all available
803 	 * nodes, but not more than args->num_of_nodes as that is
804 	 * the amount of memory allocated by user
805 	 */
806 	pa = kzalloc_objs(struct kfd_process_device_apertures,
807 			  args->num_of_nodes);
808 	if (!pa)
809 		return -ENOMEM;
810 
811 	mutex_lock(&p->mutex);
812 
813 	if (!p->n_pdds) {
814 		args->num_of_nodes = 0;
815 		kfree(pa);
816 		goto out_unlock;
817 	}
818 
819 	/* Run over all pdd of the process */
820 	for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) {
821 		struct kfd_process_device *pdd = p->pdds[i];
822 
823 		pa[i].gpu_id = pdd->dev->id;
824 		pa[i].lds_base = pdd->lds_base;
825 		pa[i].lds_limit = pdd->lds_limit;
826 		pa[i].gpuvm_base = pdd->gpuvm_base;
827 		pa[i].gpuvm_limit = pdd->gpuvm_limit;
828 		pa[i].scratch_base = pdd->scratch_base;
829 		pa[i].scratch_limit = pdd->scratch_limit;
830 
831 		dev_dbg(kfd_device,
832 			"gpu id %u\n", pdd->dev->id);
833 		dev_dbg(kfd_device,
834 			"lds_base %llX\n", pdd->lds_base);
835 		dev_dbg(kfd_device,
836 			"lds_limit %llX\n", pdd->lds_limit);
837 		dev_dbg(kfd_device,
838 			"gpuvm_base %llX\n", pdd->gpuvm_base);
839 		dev_dbg(kfd_device,
840 			"gpuvm_limit %llX\n", pdd->gpuvm_limit);
841 		dev_dbg(kfd_device,
842 			"scratch_base %llX\n", pdd->scratch_base);
843 		dev_dbg(kfd_device,
844 			"scratch_limit %llX\n", pdd->scratch_limit);
845 	}
846 	mutex_unlock(&p->mutex);
847 
848 	args->num_of_nodes = i;
849 	ret = copy_to_user(
850 			(void __user *)args->kfd_process_device_apertures_ptr,
851 			pa,
852 			(i * sizeof(struct kfd_process_device_apertures)));
853 	kfree(pa);
854 	return ret ? -EFAULT : 0;
855 
856 out_unlock:
857 	mutex_unlock(&p->mutex);
858 	return 0;
859 }
860 
861 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p,
862 					void *data)
863 {
864 	struct kfd_ioctl_create_event_args *args = data;
865 	int err;
866 
867 	/* For dGPUs the event page is allocated in user mode. The
868 	 * handle is passed to KFD with the first call to this IOCTL
869 	 * through the event_page_offset field.
870 	 */
871 	if (args->event_page_offset) {
872 		mutex_lock(&p->mutex);
873 		err = kfd_kmap_event_page(p, args->event_page_offset);
874 		mutex_unlock(&p->mutex);
875 		if (err)
876 			return err;
877 	}
878 
879 	err = kfd_event_create(filp, p, args->event_type,
880 				args->auto_reset != 0, args->node_id,
881 				&args->event_id, &args->event_trigger_data,
882 				&args->event_page_offset,
883 				&args->event_slot_index);
884 
885 	pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__);
886 	return err;
887 }
888 
889 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p,
890 					void *data)
891 {
892 	struct kfd_ioctl_destroy_event_args *args = data;
893 
894 	return kfd_event_destroy(p, args->event_id);
895 }
896 
897 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p,
898 				void *data)
899 {
900 	struct kfd_ioctl_set_event_args *args = data;
901 
902 	return kfd_set_event(p, args->event_id);
903 }
904 
905 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p,
906 				void *data)
907 {
908 	struct kfd_ioctl_reset_event_args *args = data;
909 
910 	return kfd_reset_event(p, args->event_id);
911 }
912 
913 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p,
914 				void *data)
915 {
916 	struct kfd_ioctl_wait_events_args *args = data;
917 
918 	return kfd_wait_on_events(p, args->num_events,
919 			(void __user *)args->events_ptr,
920 			(args->wait_for_all != 0),
921 			&args->timeout, &args->wait_result);
922 }
923 static int kfd_ioctl_set_scratch_backing_va(struct file *filep,
924 					struct kfd_process *p, void *data)
925 {
926 	struct kfd_ioctl_set_scratch_backing_va_args *args = data;
927 	struct kfd_process_device *pdd;
928 	struct kfd_node *dev;
929 	long err;
930 
931 	mutex_lock(&p->mutex);
932 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
933 	if (!pdd) {
934 		err = -EINVAL;
935 		goto err_pdd;
936 	}
937 	dev = pdd->dev;
938 
939 	pdd = kfd_bind_process_to_device(dev, p);
940 	if (IS_ERR(pdd)) {
941 		err = PTR_ERR(pdd);
942 		goto bind_process_to_device_fail;
943 	}
944 
945 	pdd->qpd.sh_hidden_private_base = args->va_addr;
946 
947 	mutex_unlock(&p->mutex);
948 
949 	if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS &&
950 	    pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va)
951 		dev->kfd2kgd->set_scratch_backing_va(
952 			dev->adev, args->va_addr, pdd->qpd.vmid);
953 
954 	return 0;
955 
956 bind_process_to_device_fail:
957 err_pdd:
958 	mutex_unlock(&p->mutex);
959 	return err;
960 }
961 
962 static int kfd_ioctl_get_tile_config(struct file *filep,
963 		struct kfd_process *p, void *data)
964 {
965 	struct kfd_ioctl_get_tile_config_args *args = data;
966 	struct kfd_process_device *pdd;
967 	struct tile_config config;
968 	int err = 0;
969 
970 	mutex_lock(&p->mutex);
971 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
972 	mutex_unlock(&p->mutex);
973 	if (!pdd)
974 		return -EINVAL;
975 
976 	amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config);
977 
978 	args->gb_addr_config = config.gb_addr_config;
979 	args->num_banks = config.num_banks;
980 	args->num_ranks = config.num_ranks;
981 
982 	if (args->num_tile_configs > config.num_tile_configs)
983 		args->num_tile_configs = config.num_tile_configs;
984 	err = copy_to_user((void __user *)args->tile_config_ptr,
985 			config.tile_config_ptr,
986 			args->num_tile_configs * sizeof(uint32_t));
987 	if (err) {
988 		args->num_tile_configs = 0;
989 		return -EFAULT;
990 	}
991 
992 	if (args->num_macro_tile_configs > config.num_macro_tile_configs)
993 		args->num_macro_tile_configs =
994 				config.num_macro_tile_configs;
995 	err = copy_to_user((void __user *)args->macro_tile_config_ptr,
996 			config.macro_tile_config_ptr,
997 			args->num_macro_tile_configs * sizeof(uint32_t));
998 	if (err) {
999 		args->num_macro_tile_configs = 0;
1000 		return -EFAULT;
1001 	}
1002 
1003 	return 0;
1004 }
1005 
1006 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p,
1007 				void *data)
1008 {
1009 	struct kfd_ioctl_acquire_vm_args *args = data;
1010 	struct kfd_process_device *pdd;
1011 	struct file *drm_file;
1012 	int ret;
1013 
1014 	drm_file = fget(args->drm_fd);
1015 	if (!drm_file)
1016 		return -EINVAL;
1017 
1018 	mutex_lock(&p->mutex);
1019 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1020 	if (!pdd) {
1021 		ret = -EINVAL;
1022 		goto err_pdd;
1023 	}
1024 
1025 	if (pdd->drm_file) {
1026 		ret = pdd->drm_file == drm_file ? 0 : -EBUSY;
1027 		goto err_drm_file;
1028 	}
1029 
1030 	ret = kfd_process_device_init_vm(pdd, drm_file);
1031 	if (ret)
1032 		goto err_unlock;
1033 
1034 	/* On success, the PDD keeps the drm_file reference */
1035 	mutex_unlock(&p->mutex);
1036 
1037 	return 0;
1038 
1039 err_unlock:
1040 err_pdd:
1041 err_drm_file:
1042 	mutex_unlock(&p->mutex);
1043 	fput(drm_file);
1044 	return ret;
1045 }
1046 
1047 bool kfd_dev_is_large_bar(struct kfd_node *dev)
1048 {
1049 	if (dev->kfd->adev->debug_largebar) {
1050 		pr_debug("Simulate large-bar allocation on non large-bar machine\n");
1051 		return true;
1052 	}
1053 
1054 	if (dev->local_mem_info.local_mem_size_private == 0 &&
1055 	    dev->local_mem_info.local_mem_size_public > 0)
1056 		return true;
1057 
1058 	if (dev->local_mem_info.local_mem_size_public == 0 &&
1059 	    dev->kfd->adev->gmc.is_app_apu) {
1060 		pr_debug("APP APU, Consider like a large bar system\n");
1061 		return true;
1062 	}
1063 
1064 	return false;
1065 }
1066 
1067 static int kfd_ioctl_get_available_memory(struct file *filep,
1068 					  struct kfd_process *p, void *data)
1069 {
1070 	struct kfd_ioctl_get_available_memory_args *args = data;
1071 	struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id);
1072 
1073 	if (!pdd)
1074 		return -EINVAL;
1075 	args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev,
1076 							pdd->dev->node_id);
1077 	kfd_unlock_pdd(pdd);
1078 	return 0;
1079 }
1080 
1081 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
1082 					struct kfd_process *p, void *data)
1083 {
1084 	struct kfd_ioctl_alloc_memory_of_gpu_args *args = data;
1085 	struct kfd_process_device *pdd;
1086 	void *mem;
1087 	struct kfd_node *dev;
1088 	int idr_handle;
1089 	long err;
1090 	uint64_t offset = args->mmap_offset;
1091 	uint32_t flags = args->flags;
1092 
1093 	if (args->size == 0)
1094 		return -EINVAL;
1095 
1096 	if (p->context_id != KFD_CONTEXT_ID_PRIMARY && (flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR)) {
1097 		pr_debug("USERPTR is not supported on non-primary kfd_process\n");
1098 
1099 		return -EOPNOTSUPP;
1100 	}
1101 
1102 #if IS_ENABLED(CONFIG_HSA_AMD_SVM)
1103 	/* Flush pending deferred work to avoid racing with deferred actions
1104 	 * from previous memory map changes (e.g. munmap).
1105 	 */
1106 	svm_range_list_lock_and_flush_work(&p->svms, current->mm);
1107 	mutex_lock(&p->svms.lock);
1108 	mmap_write_unlock(current->mm);
1109 
1110 	/* Skip a special case that allocates VRAM without VA,
1111 	 * VA will be invalid of 0.
1112 	 */
1113 	if (!(!args->va_addr && (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM)) &&
1114 	    interval_tree_iter_first(&p->svms.objects,
1115 				     args->va_addr >> PAGE_SHIFT,
1116 				     (args->va_addr + args->size - 1) >> PAGE_SHIFT)) {
1117 		pr_err("Address: 0x%llx already allocated by SVM\n",
1118 			args->va_addr);
1119 		mutex_unlock(&p->svms.lock);
1120 		return -EADDRINUSE;
1121 	}
1122 
1123 	/* When register user buffer check if it has been registered by svm by
1124 	 * buffer cpu virtual address.
1125 	 */
1126 	if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) &&
1127 	    interval_tree_iter_first(&p->svms.objects,
1128 				     args->mmap_offset >> PAGE_SHIFT,
1129 				     (args->mmap_offset  + args->size - 1) >> PAGE_SHIFT)) {
1130 		pr_err("User Buffer Address: 0x%llx already allocated by SVM\n",
1131 			args->mmap_offset);
1132 		mutex_unlock(&p->svms.lock);
1133 		return -EADDRINUSE;
1134 	}
1135 
1136 	mutex_unlock(&p->svms.lock);
1137 #endif
1138 	mutex_lock(&p->mutex);
1139 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1140 	if (!pdd) {
1141 		err = -EINVAL;
1142 		goto err_pdd;
1143 	}
1144 
1145 	dev = pdd->dev;
1146 
1147 	if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) &&
1148 		(flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) &&
1149 		!kfd_dev_is_large_bar(dev)) {
1150 		pr_err("Alloc host visible vram on small bar is not allowed\n");
1151 		err = -EINVAL;
1152 		goto err_large_bar;
1153 	}
1154 
1155 	pdd = kfd_bind_process_to_device(dev, p);
1156 	if (IS_ERR(pdd)) {
1157 		err = PTR_ERR(pdd);
1158 		goto err_unlock;
1159 	}
1160 
1161 	if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) {
1162 		if (args->size != kfd_doorbell_process_slice(dev->kfd)) {
1163 			err = -EINVAL;
1164 			goto err_unlock;
1165 		}
1166 		offset = kfd_get_process_doorbells(pdd);
1167 		if (!offset) {
1168 			err = -ENOMEM;
1169 			goto err_unlock;
1170 		}
1171 	} else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
1172 		if (args->size != PAGE_SIZE) {
1173 			err = -EINVAL;
1174 			goto err_unlock;
1175 		}
1176 		offset = dev->adev->rmmio_remap.bus_addr;
1177 		if (!offset || (PAGE_SIZE > 4096)) {
1178 			err = -ENOMEM;
1179 			goto err_unlock;
1180 		}
1181 	}
1182 
1183 	err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
1184 		dev->adev, args->va_addr, args->size,
1185 		pdd->drm_priv, (struct kgd_mem **) &mem, &offset,
1186 		flags, false);
1187 
1188 	if (err)
1189 		goto err_unlock;
1190 
1191 	idr_handle = kfd_process_device_create_obj_handle(pdd, mem);
1192 	if (idr_handle < 0) {
1193 		err = -EFAULT;
1194 		goto err_free;
1195 	}
1196 
1197 	/* Update the VRAM usage count */
1198 	if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
1199 		uint64_t size = args->size;
1200 
1201 		if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM)
1202 			size >>= 1;
1203 		atomic64_add(PAGE_ALIGN(size), &pdd->vram_usage);
1204 	}
1205 
1206 	mutex_unlock(&p->mutex);
1207 
1208 	args->handle = MAKE_HANDLE(args->gpu_id, idr_handle);
1209 	args->mmap_offset = offset;
1210 
1211 	/* MMIO is mapped through kfd device
1212 	 * Generate a kfd mmap offset
1213 	 */
1214 	if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)
1215 		args->mmap_offset = KFD_MMAP_TYPE_MMIO
1216 					| KFD_MMAP_GPU_ID(args->gpu_id);
1217 
1218 	return 0;
1219 
1220 err_free:
1221 	amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem,
1222 					       pdd->drm_priv, NULL);
1223 err_unlock:
1224 err_pdd:
1225 err_large_bar:
1226 	mutex_unlock(&p->mutex);
1227 	return err;
1228 }
1229 
1230 static int kfd_ioctl_free_memory_of_gpu(struct file *filep,
1231 					struct kfd_process *p, void *data)
1232 {
1233 	struct kfd_ioctl_free_memory_of_gpu_args *args = data;
1234 	struct kfd_process_device *pdd;
1235 	void *mem;
1236 	int ret;
1237 	uint64_t size = 0;
1238 
1239 	mutex_lock(&p->mutex);
1240 	/*
1241 	 * Safeguard to prevent user space from freeing signal BO.
1242 	 * It will be freed at process termination.
1243 	 */
1244 	if (p->signal_handle && (p->signal_handle == args->handle)) {
1245 		pr_err("Free signal BO is not allowed\n");
1246 		ret = -EPERM;
1247 		goto err_unlock;
1248 	}
1249 
1250 	pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1251 	if (!pdd) {
1252 		pr_err("Process device data doesn't exist\n");
1253 		ret = -EINVAL;
1254 		goto err_pdd;
1255 	}
1256 
1257 	mem = kfd_process_device_translate_handle(
1258 		pdd, GET_IDR_HANDLE(args->handle));
1259 	if (!mem) {
1260 		ret = -EINVAL;
1261 		goto err_unlock;
1262 	}
1263 
1264 	ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev,
1265 				(struct kgd_mem *)mem, pdd->drm_priv, &size);
1266 
1267 	/* If freeing the buffer failed, leave the handle in place for
1268 	 * clean-up during process tear-down.
1269 	 */
1270 	if (!ret)
1271 		kfd_process_device_remove_obj_handle(
1272 			pdd, GET_IDR_HANDLE(args->handle));
1273 
1274 	atomic64_sub(size, &pdd->vram_usage);
1275 
1276 err_unlock:
1277 err_pdd:
1278 	mutex_unlock(&p->mutex);
1279 	return ret;
1280 }
1281 
1282 static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
1283 					struct kfd_process *p, void *data)
1284 {
1285 	struct kfd_ioctl_map_memory_to_gpu_args *args = data;
1286 	struct kfd_process_device *pdd, *peer_pdd;
1287 	void *mem;
1288 	struct kfd_node *dev;
1289 	long err = 0;
1290 	int i;
1291 	uint32_t *devices_arr = NULL;
1292 
1293 	if (!args->n_devices) {
1294 		pr_debug("Device IDs array empty\n");
1295 		return -EINVAL;
1296 	}
1297 	if (args->n_success > args->n_devices) {
1298 		pr_debug("n_success exceeds n_devices\n");
1299 		return -EINVAL;
1300 	}
1301 
1302 	devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr),
1303 				    GFP_KERNEL);
1304 	if (!devices_arr)
1305 		return -ENOMEM;
1306 
1307 	err = copy_from_user(devices_arr,
1308 			     (void __user *)args->device_ids_array_ptr,
1309 			     args->n_devices * sizeof(*devices_arr));
1310 	if (err != 0) {
1311 		err = -EFAULT;
1312 		goto copy_from_user_failed;
1313 	}
1314 
1315 	mutex_lock(&p->mutex);
1316 	pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1317 	if (!pdd) {
1318 		err = -EINVAL;
1319 		goto get_process_device_data_failed;
1320 	}
1321 	dev = pdd->dev;
1322 
1323 	pdd = kfd_bind_process_to_device(dev, p);
1324 	if (IS_ERR(pdd)) {
1325 		err = PTR_ERR(pdd);
1326 		goto bind_process_to_device_failed;
1327 	}
1328 
1329 	mem = kfd_process_device_translate_handle(pdd,
1330 						GET_IDR_HANDLE(args->handle));
1331 	if (!mem) {
1332 		err = -ENOMEM;
1333 		goto get_mem_obj_from_handle_failed;
1334 	}
1335 
1336 	for (i = args->n_success; i < args->n_devices; i++) {
1337 		peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1338 		if (!peer_pdd) {
1339 			pr_debug("Getting device by id failed for 0x%x\n",
1340 				 devices_arr[i]);
1341 			err = -EINVAL;
1342 			goto get_mem_obj_from_handle_failed;
1343 		}
1344 
1345 		peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p);
1346 		if (IS_ERR(peer_pdd)) {
1347 			err = PTR_ERR(peer_pdd);
1348 			goto get_mem_obj_from_handle_failed;
1349 		}
1350 
1351 		err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
1352 			peer_pdd->dev->adev, (struct kgd_mem *)mem,
1353 			peer_pdd->drm_priv);
1354 		if (err) {
1355 			struct pci_dev *pdev = peer_pdd->dev->adev->pdev;
1356 
1357 			dev_err(dev->adev->dev,
1358 			       "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n",
1359 			       pci_domain_nr(pdev->bus),
1360 			       pdev->bus->number,
1361 			       PCI_SLOT(pdev->devfn),
1362 			       PCI_FUNC(pdev->devfn),
1363 			       ((struct kgd_mem *)mem)->domain);
1364 			goto map_memory_to_gpu_failed;
1365 		}
1366 		args->n_success = i+1;
1367 	}
1368 
1369 	err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true);
1370 	if (err) {
1371 		pr_debug("Sync memory failed, wait interrupted by user signal\n");
1372 		goto sync_memory_failed;
1373 	}
1374 
1375 	mutex_unlock(&p->mutex);
1376 
1377 	/* Flush TLBs after waiting for the page table updates to complete */
1378 	for (i = 0; i < args->n_devices; i++) {
1379 		peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1380 		if (WARN_ON_ONCE(!peer_pdd))
1381 			continue;
1382 		kfd_flush_tlb(peer_pdd);
1383 	}
1384 	kfree(devices_arr);
1385 
1386 	return err;
1387 
1388 get_process_device_data_failed:
1389 bind_process_to_device_failed:
1390 get_mem_obj_from_handle_failed:
1391 map_memory_to_gpu_failed:
1392 sync_memory_failed:
1393 	mutex_unlock(&p->mutex);
1394 copy_from_user_failed:
1395 	kfree(devices_arr);
1396 
1397 	return err;
1398 }
1399 
1400 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
1401 					struct kfd_process *p, void *data)
1402 {
1403 	struct kfd_ioctl_unmap_memory_from_gpu_args *args = data;
1404 	struct kfd_process_device *pdd, *peer_pdd;
1405 	void *mem;
1406 	long err = 0;
1407 	uint32_t *devices_arr = NULL, i;
1408 	bool flush_tlb;
1409 
1410 	if (!args->n_devices) {
1411 		pr_debug("Device IDs array empty\n");
1412 		return -EINVAL;
1413 	}
1414 	if (args->n_success > args->n_devices) {
1415 		pr_debug("n_success exceeds n_devices\n");
1416 		return -EINVAL;
1417 	}
1418 
1419 	devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr),
1420 				    GFP_KERNEL);
1421 	if (!devices_arr)
1422 		return -ENOMEM;
1423 
1424 	err = copy_from_user(devices_arr,
1425 			     (void __user *)args->device_ids_array_ptr,
1426 			     args->n_devices * sizeof(*devices_arr));
1427 	if (err != 0) {
1428 		err = -EFAULT;
1429 		goto copy_from_user_failed;
1430 	}
1431 
1432 	mutex_lock(&p->mutex);
1433 	pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1434 	if (!pdd) {
1435 		err = -EINVAL;
1436 		goto bind_process_to_device_failed;
1437 	}
1438 
1439 	mem = kfd_process_device_translate_handle(pdd,
1440 						GET_IDR_HANDLE(args->handle));
1441 	if (!mem) {
1442 		err = -ENOMEM;
1443 		goto get_mem_obj_from_handle_failed;
1444 	}
1445 
1446 	for (i = args->n_success; i < args->n_devices; i++) {
1447 		peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1448 		if (!peer_pdd) {
1449 			err = -EINVAL;
1450 			goto get_mem_obj_from_handle_failed;
1451 		}
1452 		err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
1453 			peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv);
1454 		if (err) {
1455 			pr_debug("Failed to unmap from gpu %d/%d\n", i, args->n_devices);
1456 			goto unmap_memory_from_gpu_failed;
1457 		}
1458 		args->n_success = i+1;
1459 	}
1460 
1461 	flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd);
1462 	if (flush_tlb) {
1463 		err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev,
1464 				(struct kgd_mem *) mem, true);
1465 		if (err) {
1466 			pr_debug("Sync memory failed, wait interrupted by user signal\n");
1467 			goto sync_memory_failed;
1468 		}
1469 	}
1470 
1471 	/* Flush TLBs after waiting for the page table updates to complete */
1472 	for (i = 0; i < args->n_devices; i++) {
1473 		peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1474 		if (WARN_ON_ONCE(!peer_pdd))
1475 			continue;
1476 		if (flush_tlb)
1477 			kfd_flush_tlb(peer_pdd);
1478 
1479 		/* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */
1480 		err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);
1481 		if (err)
1482 			goto sync_memory_failed;
1483 	}
1484 
1485 	mutex_unlock(&p->mutex);
1486 
1487 	kfree(devices_arr);
1488 
1489 	return 0;
1490 
1491 bind_process_to_device_failed:
1492 get_mem_obj_from_handle_failed:
1493 unmap_memory_from_gpu_failed:
1494 sync_memory_failed:
1495 	mutex_unlock(&p->mutex);
1496 copy_from_user_failed:
1497 	kfree(devices_arr);
1498 	return err;
1499 }
1500 
1501 static int kfd_ioctl_alloc_queue_gws(struct file *filep,
1502 		struct kfd_process *p, void *data)
1503 {
1504 	int retval;
1505 	struct kfd_ioctl_alloc_queue_gws_args *args = data;
1506 	struct queue *q;
1507 	struct kfd_node *dev;
1508 
1509 	mutex_lock(&p->mutex);
1510 	q = pqm_get_user_queue(&p->pqm, args->queue_id);
1511 
1512 	if (q) {
1513 		dev = q->device;
1514 	} else {
1515 		retval = -EINVAL;
1516 		goto out_unlock;
1517 	}
1518 
1519 	if (!dev->gws) {
1520 		retval = -ENODEV;
1521 		goto out_unlock;
1522 	}
1523 
1524 	if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) {
1525 		retval = -ENODEV;
1526 		goto out_unlock;
1527 	}
1528 
1529 	if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) ||
1530 				      kfd_dbg_has_cwsr_workaround(dev))) {
1531 		retval = -EBUSY;
1532 		goto out_unlock;
1533 	}
1534 
1535 	retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL);
1536 	mutex_unlock(&p->mutex);
1537 
1538 	args->first_gws = 0;
1539 	return retval;
1540 
1541 out_unlock:
1542 	mutex_unlock(&p->mutex);
1543 	return retval;
1544 }
1545 
1546 static int kfd_ioctl_get_dmabuf_info(struct file *filep,
1547 		struct kfd_process *p, void *data)
1548 {
1549 	struct kfd_ioctl_get_dmabuf_info_args *args = data;
1550 	struct kfd_node *dev = NULL;
1551 	struct amdgpu_device *dmabuf_adev;
1552 	void *metadata_buffer = NULL;
1553 	uint32_t flags;
1554 	int8_t xcp_id;
1555 	unsigned int i;
1556 	int r;
1557 
1558 	/* Find a KFD GPU device that supports the get_dmabuf_info query */
1559 	for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++)
1560 		if (dev && !kfd_devcgroup_check_permission(dev))
1561 			break;
1562 	if (!dev)
1563 		return -EINVAL;
1564 
1565 	if (args->metadata_ptr) {
1566 		metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL);
1567 		if (!metadata_buffer)
1568 			return -ENOMEM;
1569 	}
1570 
1571 	/* Get dmabuf info from KGD */
1572 	r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd,
1573 					  &dmabuf_adev, &args->size,
1574 					  metadata_buffer, args->metadata_size,
1575 					  &args->metadata_size, &flags, &xcp_id);
1576 	if (r)
1577 		goto exit;
1578 
1579 	if (xcp_id >= 0)
1580 		args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id;
1581 	else
1582 		args->gpu_id = dev->id;
1583 	args->flags = flags;
1584 
1585 	/* Copy metadata buffer to user mode */
1586 	if (metadata_buffer) {
1587 		r = copy_to_user((void __user *)args->metadata_ptr,
1588 				 metadata_buffer, args->metadata_size);
1589 		if (r != 0)
1590 			r = -EFAULT;
1591 	}
1592 
1593 exit:
1594 	kfree(metadata_buffer);
1595 
1596 	return r;
1597 }
1598 
1599 static int kfd_ioctl_import_dmabuf(struct file *filep,
1600 				   struct kfd_process *p, void *data)
1601 {
1602 	struct kfd_ioctl_import_dmabuf_args *args = data;
1603 	struct kfd_process_device *pdd;
1604 	int idr_handle;
1605 	uint64_t size;
1606 	void *mem;
1607 	int r;
1608 
1609 	mutex_lock(&p->mutex);
1610 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1611 	if (!pdd) {
1612 		r = -EINVAL;
1613 		goto err_unlock;
1614 	}
1615 
1616 	pdd = kfd_bind_process_to_device(pdd->dev, p);
1617 	if (IS_ERR(pdd)) {
1618 		r = PTR_ERR(pdd);
1619 		goto err_unlock;
1620 	}
1621 
1622 	r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd,
1623 						 args->va_addr, pdd->drm_priv,
1624 						 (struct kgd_mem **)&mem, &size,
1625 						 NULL);
1626 	if (r)
1627 		goto err_unlock;
1628 
1629 	idr_handle = kfd_process_device_create_obj_handle(pdd, mem);
1630 	if (idr_handle < 0) {
1631 		r = -EFAULT;
1632 		goto err_free;
1633 	}
1634 
1635 	mutex_unlock(&p->mutex);
1636 
1637 	args->handle = MAKE_HANDLE(args->gpu_id, idr_handle);
1638 
1639 	return 0;
1640 
1641 err_free:
1642 	amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem,
1643 					       pdd->drm_priv, NULL);
1644 err_unlock:
1645 	mutex_unlock(&p->mutex);
1646 	return r;
1647 }
1648 
1649 static int kfd_ioctl_export_dmabuf(struct file *filep,
1650 				   struct kfd_process *p, void *data)
1651 {
1652 	struct kfd_ioctl_export_dmabuf_args *args = data;
1653 	struct kfd_process_device *pdd;
1654 	struct dma_buf *dmabuf;
1655 	struct kfd_node *dev;
1656 	void *mem;
1657 	int ret = 0;
1658 
1659 	dev = kfd_device_by_id(GET_GPU_ID(args->handle));
1660 	if (!dev)
1661 		return -EINVAL;
1662 
1663 	mutex_lock(&p->mutex);
1664 
1665 	pdd = kfd_get_process_device_data(dev, p);
1666 	if (!pdd) {
1667 		ret = -EINVAL;
1668 		goto err_unlock;
1669 	}
1670 
1671 	mem = kfd_process_device_translate_handle(pdd,
1672 						GET_IDR_HANDLE(args->handle));
1673 	if (!mem) {
1674 		ret = -EINVAL;
1675 		goto err_unlock;
1676 	}
1677 
1678 	ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);
1679 	mutex_unlock(&p->mutex);
1680 	if (ret)
1681 		goto err_out;
1682 
1683 	ret = dma_buf_fd(dmabuf, args->flags);
1684 	if (ret < 0) {
1685 		dma_buf_put(dmabuf);
1686 		goto err_out;
1687 	}
1688 	/* dma_buf_fd assigns the reference count to the fd, no need to
1689 	 * put the reference here.
1690 	 */
1691 	args->dmabuf_fd = ret;
1692 
1693 	return 0;
1694 
1695 err_unlock:
1696 	mutex_unlock(&p->mutex);
1697 err_out:
1698 	return ret;
1699 }
1700 
1701 /* Handle requests for watching SMI events */
1702 static int kfd_ioctl_smi_events(struct file *filep,
1703 				struct kfd_process *p, void *data)
1704 {
1705 	struct kfd_ioctl_smi_events_args *args = data;
1706 	struct kfd_process_device *pdd;
1707 
1708 	mutex_lock(&p->mutex);
1709 
1710 	pdd = kfd_process_device_data_by_id(p, args->gpuid);
1711 	mutex_unlock(&p->mutex);
1712 	if (!pdd)
1713 		return -EINVAL;
1714 
1715 	return kfd_smi_event_open(pdd->dev, &args->anon_fd);
1716 }
1717 
1718 static int kfd_ioctl_svm_validate(void *kdata, unsigned int usize)
1719 {
1720 	struct kfd_ioctl_svm_args *args = kdata;
1721 	size_t expected = struct_size(args, attrs, args->nattr);
1722 
1723 	if (expected == SIZE_MAX || usize < expected)
1724 		return -EINVAL;
1725 	return 0;
1726 }
1727 
1728 #if IS_ENABLED(CONFIG_HSA_AMD_SVM)
1729 
1730 static int kfd_ioctl_set_xnack_mode(struct file *filep,
1731 				    struct kfd_process *p, void *data)
1732 {
1733 	struct kfd_ioctl_set_xnack_mode_args *args = data;
1734 	int r = 0;
1735 
1736 	mutex_lock(&p->mutex);
1737 	if (args->xnack_enabled >= 0) {
1738 		if (!list_empty(&p->pqm.queues)) {
1739 			pr_debug("Process has user queues running\n");
1740 			r = -EBUSY;
1741 			goto out_unlock;
1742 		}
1743 
1744 		if (p->xnack_enabled == args->xnack_enabled)
1745 			goto out_unlock;
1746 
1747 		if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) {
1748 			r = -EPERM;
1749 			goto out_unlock;
1750 		}
1751 
1752 		r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled);
1753 	} else {
1754 		args->xnack_enabled = p->xnack_enabled;
1755 	}
1756 
1757 out_unlock:
1758 	mutex_unlock(&p->mutex);
1759 
1760 	return r;
1761 }
1762 
1763 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data)
1764 {
1765 	struct kfd_ioctl_svm_args *args = data;
1766 	int r = 0;
1767 
1768 	if (p->context_id != KFD_CONTEXT_ID_PRIMARY) {
1769 		pr_debug("SVM ioctl not supported on non-primary kfd process\n");
1770 
1771 		return -EOPNOTSUPP;
1772 	}
1773 
1774 	pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n",
1775 		 args->start_addr, args->size, args->op, args->nattr);
1776 
1777 	if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK))
1778 		return -EINVAL;
1779 	if (!args->start_addr || !args->size)
1780 		return -EINVAL;
1781 
1782 	r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr,
1783 		      args->attrs);
1784 
1785 	return r;
1786 }
1787 #else
1788 static int kfd_ioctl_set_xnack_mode(struct file *filep,
1789 				    struct kfd_process *p, void *data)
1790 {
1791 	return -EPERM;
1792 }
1793 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data)
1794 {
1795 	return -EPERM;
1796 }
1797 #endif
1798 
1799 static int kfd_ptl_control(struct kfd_process_device *pdd, bool enable)
1800 {
1801 	struct amdgpu_device *adev = pdd->dev->adev;
1802 	struct amdgpu_ptl *ptl = &adev->psp.ptl;
1803 	enum amdgpu_ptl_fmt pref_format1 = ptl->fmt1;
1804 	enum amdgpu_ptl_fmt pref_format2 = ptl->fmt2;
1805 	uint32_t ptl_state = enable ? 1 : 0;
1806 	int ret;
1807 
1808 	if (!ptl->hw_supported)
1809 		return -EOPNOTSUPP;
1810 
1811 	if (!pdd->dev->kfd2kgd || !pdd->dev->kfd2kgd->ptl_ctrl)
1812 		return -EOPNOTSUPP;
1813 
1814 	ret = pdd->dev->kfd2kgd->ptl_ctrl(adev, PSP_PTL_PERF_MON_SET,
1815 					  &ptl_state,
1816 					  &pref_format1,
1817 					  &pref_format2);
1818 
1819 	return ret;
1820 }
1821 
1822 int kfd_ptl_disable_request(struct kfd_process_device *pdd,
1823 		struct kfd_process *p)
1824 {
1825 	struct amdgpu_device *adev = pdd->dev->adev;
1826 	struct amdgpu_ptl *ptl = &adev->psp.ptl;
1827 	int ret = 0;
1828 
1829 	mutex_lock(&ptl->mutex);
1830 
1831 	if (pdd->ptl_disable_req)
1832 		goto out;
1833 
1834 	if (atomic_inc_return(&ptl->disable_ref) == 1) {
1835 		ret = kfd_ptl_control(pdd, false);
1836 		if (ret) {
1837 			atomic_dec(&ptl->disable_ref);
1838 			dev_warn(pdd->dev->adev->dev,
1839 					"failed to disable PTL\n");
1840 			goto out;
1841 		}
1842 	}
1843 	set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
1844 	pdd->ptl_disable_req = true;
1845 
1846 out:
1847 	mutex_unlock(&ptl->mutex);
1848 	return ret;
1849 }
1850 
1851 int kfd_ptl_disable_release(struct kfd_process_device *pdd,
1852 		struct kfd_process *p)
1853 {
1854 	struct amdgpu_device *adev = pdd->dev->adev;
1855 	struct amdgpu_ptl *ptl = &adev->psp.ptl;
1856 	int ret = 0;
1857 
1858 	mutex_lock(&ptl->mutex);
1859 
1860 	if (!pdd->ptl_disable_req)
1861 		goto out;
1862 
1863 	if (atomic_dec_return(&ptl->disable_ref) == 0) {
1864 		clear_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
1865 		ret = kfd_ptl_control(pdd, true);
1866 		if (ret) {
1867 			atomic_inc(&ptl->disable_ref);
1868 			set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
1869 			dev_warn(adev->dev, "Failed to enable PTL on release: %d\n", ret);
1870 			goto out;
1871 		}
1872 	}
1873 	pdd->ptl_disable_req = false;
1874 
1875 out:
1876 	mutex_unlock(&ptl->mutex);
1877 	return ret;
1878 }
1879 
1880 static int kfd_profiler_ptl_control(struct kfd_process *p,
1881 		struct kfd_ioctl_ptl_control *args)
1882 {
1883 	struct kfd_process_device *pdd;
1884 	int ret;
1885 
1886 	mutex_lock(&p->mutex);
1887 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1888 	mutex_unlock(&p->mutex);
1889 
1890 	if (!pdd || !pdd->dev || !pdd->dev->kfd)
1891 		return -EINVAL;
1892 
1893 	if (args->enable == 0)
1894 		ret = kfd_ptl_disable_request(pdd, p);
1895 	else
1896 		ret = kfd_ptl_disable_release(pdd, p);
1897 
1898 	return ret;
1899 }
1900 
1901 static int criu_checkpoint_process(struct kfd_process *p,
1902 			     uint8_t __user *user_priv_data,
1903 			     uint64_t *priv_offset)
1904 {
1905 	struct kfd_criu_process_priv_data process_priv;
1906 	int ret;
1907 
1908 	memset(&process_priv, 0, sizeof(process_priv));
1909 
1910 	process_priv.version = KFD_CRIU_PRIV_VERSION;
1911 	/* For CR, we don't consider negative xnack mode which is used for
1912 	 * querying without changing it, here 0 simply means disabled and 1
1913 	 * means enabled so retry for finding a valid PTE.
1914 	 */
1915 	process_priv.xnack_mode = p->xnack_enabled ? 1 : 0;
1916 
1917 	ret = copy_to_user(user_priv_data + *priv_offset,
1918 				&process_priv, sizeof(process_priv));
1919 
1920 	if (ret) {
1921 		pr_err("Failed to copy process information to user\n");
1922 		ret = -EFAULT;
1923 	}
1924 
1925 	*priv_offset += sizeof(process_priv);
1926 	return ret;
1927 }
1928 
1929 static int criu_checkpoint_devices(struct kfd_process *p,
1930 			     uint32_t num_devices,
1931 			     uint8_t __user *user_addr,
1932 			     uint8_t __user *user_priv_data,
1933 			     uint64_t *priv_offset)
1934 {
1935 	struct kfd_criu_device_priv_data *device_priv = NULL;
1936 	struct kfd_criu_device_bucket *device_buckets = NULL;
1937 	int ret = 0, i;
1938 
1939 	device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL);
1940 	if (!device_buckets) {
1941 		ret = -ENOMEM;
1942 		goto exit;
1943 	}
1944 
1945 	device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL);
1946 	if (!device_priv) {
1947 		ret = -ENOMEM;
1948 		goto exit;
1949 	}
1950 
1951 	for (i = 0; i < num_devices; i++) {
1952 		struct kfd_process_device *pdd = p->pdds[i];
1953 
1954 		device_buckets[i].user_gpu_id = pdd->user_gpu_id;
1955 		device_buckets[i].actual_gpu_id = pdd->dev->id;
1956 
1957 		/*
1958 		 * priv_data does not contain useful information for now and is reserved for
1959 		 * future use, so we do not set its contents.
1960 		 */
1961 	}
1962 
1963 	ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets));
1964 	if (ret) {
1965 		pr_err("Failed to copy device information to user\n");
1966 		ret = -EFAULT;
1967 		goto exit;
1968 	}
1969 
1970 	ret = copy_to_user(user_priv_data + *priv_offset,
1971 			   device_priv,
1972 			   num_devices * sizeof(*device_priv));
1973 	if (ret) {
1974 		pr_err("Failed to copy device information to user\n");
1975 		ret = -EFAULT;
1976 	}
1977 	*priv_offset += num_devices * sizeof(*device_priv);
1978 
1979 exit:
1980 	kvfree(device_buckets);
1981 	kvfree(device_priv);
1982 	return ret;
1983 }
1984 
1985 static uint32_t get_process_num_bos(struct kfd_process *p)
1986 {
1987 	uint32_t num_of_bos = 0;
1988 	int i;
1989 
1990 	/* Run over all PDDs of the process */
1991 	for (i = 0; i < p->n_pdds; i++) {
1992 		struct kfd_process_device *pdd = p->pdds[i];
1993 		void *mem;
1994 		int id;
1995 
1996 		idr_for_each_entry(&pdd->alloc_idr, mem, id) {
1997 			struct kgd_mem *kgd_mem = (struct kgd_mem *)mem;
1998 
1999 			if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base)
2000 				num_of_bos++;
2001 		}
2002 	}
2003 	return num_of_bos;
2004 }
2005 
2006 static int criu_get_prime_handle(struct kgd_mem *mem,
2007 				 int flags, u32 *shared_fd,
2008 				 struct file **file)
2009 {
2010 	struct dma_buf *dmabuf;
2011 	int ret;
2012 
2013 	ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);
2014 	if (ret) {
2015 		pr_err("dmabuf export failed for the BO\n");
2016 		return ret;
2017 	}
2018 
2019 	ret = get_unused_fd_flags(flags);
2020 	if (ret < 0) {
2021 		pr_err("dmabuf create fd failed, ret:%d\n", ret);
2022 		goto out_free_dmabuf;
2023 	}
2024 
2025 	*shared_fd = ret;
2026 	*file = dmabuf->file;
2027 	return 0;
2028 
2029 out_free_dmabuf:
2030 	dma_buf_put(dmabuf);
2031 	return ret;
2032 }
2033 
2034 static void commit_files(struct file **files,
2035 			 struct kfd_criu_bo_bucket *bo_buckets,
2036 			 unsigned int count,
2037 			 int err)
2038 {
2039 	while (count--) {
2040 		struct file *file = files[count];
2041 
2042 		if (!file)
2043 			continue;
2044 		if (err) {
2045 			fput(file);
2046 			put_unused_fd(bo_buckets[count].dmabuf_fd);
2047 		} else {
2048 			fd_install(bo_buckets[count].dmabuf_fd, file);
2049 		}
2050 	}
2051 }
2052 
2053 static int criu_checkpoint_bos(struct kfd_process *p,
2054 			       uint32_t num_bos,
2055 			       uint8_t __user *user_bos,
2056 			       uint8_t __user *user_priv_data,
2057 			       uint64_t *priv_offset)
2058 {
2059 	struct kfd_criu_bo_bucket *bo_buckets;
2060 	struct kfd_criu_bo_priv_data *bo_privs;
2061 	struct file **files = NULL;
2062 	int ret = 0, pdd_index, bo_index = 0, id;
2063 	void *mem;
2064 
2065 	bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL);
2066 	if (!bo_buckets)
2067 		return -ENOMEM;
2068 
2069 	bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL);
2070 	if (!bo_privs) {
2071 		ret = -ENOMEM;
2072 		goto exit;
2073 	}
2074 
2075 	files = kvzalloc(num_bos * sizeof(struct file *), GFP_KERNEL);
2076 	if (!files) {
2077 		ret = -ENOMEM;
2078 		goto exit;
2079 	}
2080 
2081 	for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) {
2082 		struct kfd_process_device *pdd = p->pdds[pdd_index];
2083 		struct amdgpu_bo *dumper_bo;
2084 		struct kgd_mem *kgd_mem;
2085 
2086 		idr_for_each_entry(&pdd->alloc_idr, mem, id) {
2087 			struct kfd_criu_bo_bucket *bo_bucket;
2088 			struct kfd_criu_bo_priv_data *bo_priv;
2089 			int i, dev_idx = 0;
2090 
2091 			kgd_mem = (struct kgd_mem *)mem;
2092 			dumper_bo = kgd_mem->bo;
2093 
2094 			/* Skip checkpointing BOs that are used for Trap handler
2095 			 * code and state. Currently, these BOs have a VA that
2096 			 * is less GPUVM Base
2097 			 */
2098 			if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base)
2099 				continue;
2100 
2101 			bo_bucket = &bo_buckets[bo_index];
2102 			bo_priv = &bo_privs[bo_index];
2103 
2104 			bo_bucket->gpu_id = pdd->user_gpu_id;
2105 			bo_bucket->addr = (uint64_t)kgd_mem->va;
2106 			bo_bucket->size = amdgpu_bo_size(dumper_bo);
2107 			bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags;
2108 			bo_priv->idr_handle = id;
2109 
2110 			if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) {
2111 				ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo,
2112 								&bo_priv->user_addr);
2113 				if (ret) {
2114 					pr_err("Failed to obtain user address for user-pointer bo\n");
2115 					goto exit;
2116 				}
2117 			}
2118 			if (bo_bucket->alloc_flags
2119 			    & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
2120 				ret = criu_get_prime_handle(kgd_mem,
2121 						bo_bucket->alloc_flags &
2122 						KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0,
2123 						&bo_bucket->dmabuf_fd, &files[bo_index]);
2124 				if (ret)
2125 					goto exit;
2126 			} else {
2127 				bo_bucket->dmabuf_fd = KFD_INVALID_FD;
2128 			}
2129 
2130 			if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL)
2131 				bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL |
2132 					KFD_MMAP_GPU_ID(pdd->dev->id);
2133 			else if (bo_bucket->alloc_flags &
2134 				KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)
2135 				bo_bucket->offset = KFD_MMAP_TYPE_MMIO |
2136 					KFD_MMAP_GPU_ID(pdd->dev->id);
2137 			else
2138 				bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo);
2139 
2140 			for (i = 0; i < p->n_pdds; i++) {
2141 				if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem))
2142 					bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id;
2143 			}
2144 
2145 			pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n"
2146 					"gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x",
2147 					bo_bucket->size,
2148 					bo_bucket->addr,
2149 					bo_bucket->offset,
2150 					bo_bucket->gpu_id,
2151 					bo_bucket->alloc_flags,
2152 					bo_priv->idr_handle);
2153 			bo_index++;
2154 		}
2155 	}
2156 
2157 	ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets));
2158 	if (ret) {
2159 		pr_err("Failed to copy BO information to user\n");
2160 		ret = -EFAULT;
2161 		goto exit;
2162 	}
2163 
2164 	ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs));
2165 	if (ret) {
2166 		pr_err("Failed to copy BO priv information to user\n");
2167 		ret = -EFAULT;
2168 		goto exit;
2169 	}
2170 
2171 	*priv_offset += num_bos * sizeof(*bo_privs);
2172 
2173 exit:
2174 	commit_files(files, bo_buckets, bo_index, ret);
2175 	kvfree(files);
2176 	kvfree(bo_buckets);
2177 	kvfree(bo_privs);
2178 	return ret;
2179 }
2180 
2181 static int criu_get_process_object_info(struct kfd_process *p,
2182 					uint32_t *num_devices,
2183 					uint32_t *num_bos,
2184 					uint32_t *num_objects,
2185 					uint64_t *objs_priv_size)
2186 {
2187 	uint64_t queues_priv_data_size, svm_priv_data_size, priv_size;
2188 	uint32_t num_queues, num_events, num_svm_ranges;
2189 	int ret;
2190 
2191 	*num_devices = p->n_pdds;
2192 	*num_bos = get_process_num_bos(p);
2193 
2194 	ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size);
2195 	if (ret)
2196 		return ret;
2197 
2198 	num_events = kfd_get_num_events(p);
2199 
2200 	svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size);
2201 
2202 	*num_objects = num_queues + num_events + num_svm_ranges;
2203 
2204 	if (objs_priv_size) {
2205 		priv_size = sizeof(struct kfd_criu_process_priv_data);
2206 		priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data);
2207 		priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data);
2208 		priv_size += queues_priv_data_size;
2209 		priv_size += num_events * sizeof(struct kfd_criu_event_priv_data);
2210 		priv_size += svm_priv_data_size;
2211 		*objs_priv_size = priv_size;
2212 	}
2213 	return 0;
2214 }
2215 
2216 static int criu_checkpoint(struct file *filep,
2217 			   struct kfd_process *p,
2218 			   struct kfd_ioctl_criu_args *args)
2219 {
2220 	int ret;
2221 	uint32_t num_devices, num_bos, num_objects;
2222 	uint64_t priv_size, priv_offset = 0, bo_priv_offset;
2223 
2224 	if (!args->devices || !args->bos || !args->priv_data)
2225 		return -EINVAL;
2226 
2227 	mutex_lock(&p->mutex);
2228 
2229 	if (!p->n_pdds) {
2230 		pr_err("No pdd for given process\n");
2231 		ret = -ENODEV;
2232 		goto exit_unlock;
2233 	}
2234 
2235 	/* Confirm all process queues are evicted */
2236 	if (!p->queues_paused) {
2237 		pr_err("Cannot dump process when queues are not in evicted state\n");
2238 		/* CRIU plugin did not call op PROCESS_INFO before checkpointing */
2239 		ret = -EINVAL;
2240 		goto exit_unlock;
2241 	}
2242 
2243 	ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size);
2244 	if (ret)
2245 		goto exit_unlock;
2246 
2247 	if (num_devices != args->num_devices ||
2248 	    num_bos != args->num_bos ||
2249 	    num_objects != args->num_objects ||
2250 	    priv_size != args->priv_data_size) {
2251 
2252 		ret = -EINVAL;
2253 		goto exit_unlock;
2254 	}
2255 
2256 	/* each function will store private data inside priv_data and adjust priv_offset */
2257 	ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset);
2258 	if (ret)
2259 		goto exit_unlock;
2260 
2261 	ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices,
2262 				(uint8_t __user *)args->priv_data, &priv_offset);
2263 	if (ret)
2264 		goto exit_unlock;
2265 
2266 	/* Leave room for BOs in the private data. They need to be restored
2267 	 * before events, but we checkpoint them last to simplify the error
2268 	 * handling.
2269 	 */
2270 	bo_priv_offset = priv_offset;
2271 	priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data);
2272 
2273 	if (num_objects) {
2274 		ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data,
2275 						 &priv_offset);
2276 		if (ret)
2277 			goto exit_unlock;
2278 
2279 		ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data,
2280 						 &priv_offset);
2281 		if (ret)
2282 			goto exit_unlock;
2283 
2284 		ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset);
2285 		if (ret)
2286 			goto exit_unlock;
2287 	}
2288 
2289 	/* This must be the last thing in this function that can fail.
2290 	 * Otherwise we leak dmabuf file descriptors.
2291 	 */
2292 	ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos,
2293 			   (uint8_t __user *)args->priv_data, &bo_priv_offset);
2294 
2295 exit_unlock:
2296 	mutex_unlock(&p->mutex);
2297 	if (ret)
2298 		pr_err("Failed to dump CRIU ret:%d\n", ret);
2299 	else
2300 		pr_debug("CRIU dump ret:%d\n", ret);
2301 
2302 	return ret;
2303 }
2304 
2305 static int criu_restore_process(struct kfd_process *p,
2306 				struct kfd_ioctl_criu_args *args,
2307 				uint64_t *priv_offset,
2308 				uint64_t max_priv_data_size)
2309 {
2310 	int ret = 0;
2311 	struct kfd_criu_process_priv_data process_priv;
2312 
2313 	if (*priv_offset + sizeof(process_priv) > max_priv_data_size)
2314 		return -EINVAL;
2315 
2316 	ret = copy_from_user(&process_priv,
2317 				(void __user *)(args->priv_data + *priv_offset),
2318 				sizeof(process_priv));
2319 	if (ret) {
2320 		pr_err("Failed to copy process private information from user\n");
2321 		ret = -EFAULT;
2322 		goto exit;
2323 	}
2324 	*priv_offset += sizeof(process_priv);
2325 
2326 	if (process_priv.version != KFD_CRIU_PRIV_VERSION) {
2327 		pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n",
2328 			process_priv.version, KFD_CRIU_PRIV_VERSION);
2329 		return -EINVAL;
2330 	}
2331 
2332 	pr_debug("Setting XNACK mode\n");
2333 	if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) {
2334 		pr_err("xnack mode cannot be set\n");
2335 		ret = -EPERM;
2336 		goto exit;
2337 	} else {
2338 		pr_debug("set xnack mode: %d\n", process_priv.xnack_mode);
2339 		p->xnack_enabled = process_priv.xnack_mode;
2340 	}
2341 
2342 exit:
2343 	return ret;
2344 }
2345 
2346 static int criu_restore_devices(struct kfd_process *p,
2347 				struct kfd_ioctl_criu_args *args,
2348 				uint64_t *priv_offset,
2349 				uint64_t max_priv_data_size)
2350 {
2351 	struct kfd_criu_device_bucket *device_buckets;
2352 	struct kfd_criu_device_priv_data *device_privs;
2353 	int ret = 0;
2354 	uint32_t i;
2355 
2356 	if (args->num_devices != p->n_pdds)
2357 		return -EINVAL;
2358 
2359 	if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size)
2360 		return -EINVAL;
2361 
2362 	device_buckets = kmalloc_objs(*device_buckets, args->num_devices);
2363 	if (!device_buckets)
2364 		return -ENOMEM;
2365 
2366 	ret = copy_from_user(device_buckets, (void __user *)args->devices,
2367 				args->num_devices * sizeof(*device_buckets));
2368 	if (ret) {
2369 		pr_err("Failed to copy devices buckets from user\n");
2370 		ret = -EFAULT;
2371 		goto exit;
2372 	}
2373 
2374 	for (i = 0; i < args->num_devices; i++) {
2375 		struct kfd_node *dev;
2376 		struct kfd_process_device *pdd;
2377 		struct file *drm_file;
2378 
2379 		/* device private data is not currently used */
2380 
2381 		if (!device_buckets[i].user_gpu_id) {
2382 			pr_err("Invalid user gpu_id\n");
2383 			ret = -EINVAL;
2384 			goto exit;
2385 		}
2386 
2387 		dev = kfd_device_by_id(device_buckets[i].actual_gpu_id);
2388 		if (!dev) {
2389 			pr_err("Failed to find device with gpu_id = %x\n",
2390 				device_buckets[i].actual_gpu_id);
2391 			ret = -EINVAL;
2392 			goto exit;
2393 		}
2394 
2395 		pdd = kfd_get_process_device_data(dev, p);
2396 		if (!pdd) {
2397 			pr_err("Failed to get pdd for gpu_id = %x\n",
2398 					device_buckets[i].actual_gpu_id);
2399 			ret = -EINVAL;
2400 			goto exit;
2401 		}
2402 
2403 		if (pdd->drm_file) {
2404 			ret = -EINVAL;
2405 			goto exit;
2406 		}
2407 		pdd->user_gpu_id = device_buckets[i].user_gpu_id;
2408 
2409 		drm_file = fget(device_buckets[i].drm_fd);
2410 		if (!drm_file) {
2411 			pr_err("Invalid render node file descriptor sent from plugin (%d)\n",
2412 				device_buckets[i].drm_fd);
2413 			ret = -EINVAL;
2414 			goto exit;
2415 		}
2416 
2417 		/* create the vm using render nodes for kfd pdd */
2418 		if (kfd_process_device_init_vm(pdd, drm_file)) {
2419 			pr_err("could not init vm for given pdd\n");
2420 			/* On success, the PDD keeps the drm_file reference */
2421 			fput(drm_file);
2422 			ret = -EINVAL;
2423 			goto exit;
2424 		}
2425 		/*
2426 		 * pdd now already has the vm bound to render node so below api won't create a new
2427 		 * exclusive kfd mapping but use existing one with renderDXXX but is still needed
2428 		 * for iommu v2 binding  and runtime pm.
2429 		 */
2430 		pdd = kfd_bind_process_to_device(dev, p);
2431 		if (IS_ERR(pdd)) {
2432 			ret = PTR_ERR(pdd);
2433 			goto exit;
2434 		}
2435 
2436 		if (!pdd->qpd.proc_doorbells) {
2437 			ret = kfd_alloc_process_doorbells(dev->kfd, pdd);
2438 			if (ret)
2439 				goto exit;
2440 		}
2441 	}
2442 
2443 	/*
2444 	 * We are not copying device private data from user as we are not using the data for now,
2445 	 * but we still adjust for its private data.
2446 	 */
2447 	*priv_offset += args->num_devices * sizeof(*device_privs);
2448 
2449 exit:
2450 	kfree(device_buckets);
2451 	return ret;
2452 }
2453 
2454 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd,
2455 				      struct kfd_criu_bo_bucket *bo_bucket,
2456 				      struct kfd_criu_bo_priv_data *bo_priv,
2457 				      struct kgd_mem **kgd_mem)
2458 {
2459 	int idr_handle;
2460 	int ret;
2461 	const bool criu_resume = true;
2462 	u64 offset;
2463 
2464 	if (bo_priv->idr_handle > INT_MAX)
2465 		return -EINVAL;
2466 
2467 	if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) {
2468 		if (bo_bucket->size !=
2469 				kfd_doorbell_process_slice(pdd->dev->kfd))
2470 			return -EINVAL;
2471 
2472 		offset = kfd_get_process_doorbells(pdd);
2473 		if (!offset)
2474 			return -ENOMEM;
2475 	} else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
2476 		/* MMIO BOs need remapped bus address */
2477 		if (bo_bucket->size != PAGE_SIZE) {
2478 			pr_err("Invalid page size\n");
2479 			return -EINVAL;
2480 		}
2481 		offset = pdd->dev->adev->rmmio_remap.bus_addr;
2482 		if (!offset || (PAGE_SIZE > 4096)) {
2483 			pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");
2484 			return -ENOMEM;
2485 		}
2486 	} else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) {
2487 		offset = bo_priv->user_addr;
2488 	}
2489 	/* Create the BO */
2490 	ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr,
2491 						      bo_bucket->size, pdd->drm_priv, kgd_mem,
2492 						      &offset, bo_bucket->alloc_flags, criu_resume);
2493 	if (ret) {
2494 		pr_err("Could not create the BO\n");
2495 		return ret;
2496 	}
2497 	pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n",
2498 		 bo_bucket->size, bo_bucket->addr, offset);
2499 
2500 	/* Restore previous IDR handle */
2501 	pr_debug("Restoring old IDR handle for the BO");
2502 	idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle,
2503 			       bo_priv->idr_handle + 1, GFP_KERNEL);
2504 
2505 	if (idr_handle < 0) {
2506 		pr_err("Could not allocate idr\n");
2507 		amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv,
2508 						       NULL);
2509 		return -ENOMEM;
2510 	}
2511 
2512 	if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL)
2513 		bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id);
2514 	if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
2515 		bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id);
2516 	} else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) {
2517 		bo_bucket->restored_offset = offset;
2518 	} else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
2519 		bo_bucket->restored_offset = offset;
2520 		/* Update the VRAM usage count */
2521 		atomic64_add(bo_bucket->size, &pdd->vram_usage);
2522 	}
2523 	return 0;
2524 }
2525 
2526 static int criu_restore_bo(struct kfd_process *p,
2527 			   struct kfd_criu_bo_bucket *bo_bucket,
2528 			   struct kfd_criu_bo_priv_data *bo_priv,
2529 			   struct file **file)
2530 {
2531 	struct kfd_process_device *pdd;
2532 	struct kgd_mem *kgd_mem;
2533 	int ret;
2534 	int j;
2535 
2536 	pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n",
2537 		 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags,
2538 		 bo_priv->idr_handle);
2539 
2540 	pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id);
2541 	if (!pdd) {
2542 		pr_err("Failed to get pdd\n");
2543 		return -ENODEV;
2544 	}
2545 
2546 	ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem);
2547 	if (ret)
2548 		return ret;
2549 
2550 	/* now map these BOs to GPU/s */
2551 	for (j = 0; j < p->n_pdds; j++) {
2552 		struct kfd_node *peer;
2553 		struct kfd_process_device *peer_pdd;
2554 
2555 		if (!bo_priv->mapped_gpuids[j])
2556 			break;
2557 
2558 		peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]);
2559 		if (!peer_pdd)
2560 			return -EINVAL;
2561 
2562 		peer = peer_pdd->dev;
2563 
2564 		peer_pdd = kfd_bind_process_to_device(peer, p);
2565 		if (IS_ERR(peer_pdd))
2566 			return PTR_ERR(peer_pdd);
2567 
2568 		ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem,
2569 							    peer_pdd->drm_priv);
2570 		if (ret) {
2571 			pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds);
2572 			return ret;
2573 		}
2574 	}
2575 
2576 	pr_debug("map memory was successful for the BO\n");
2577 	/* create the dmabuf object and export the bo */
2578 	if (bo_bucket->alloc_flags
2579 	    & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
2580 		ret = criu_get_prime_handle(kgd_mem, DRM_RDWR,
2581 					    &bo_bucket->dmabuf_fd, file);
2582 		if (ret)
2583 			return ret;
2584 	} else {
2585 		bo_bucket->dmabuf_fd = KFD_INVALID_FD;
2586 	}
2587 
2588 	return 0;
2589 }
2590 
2591 static int criu_restore_bos(struct kfd_process *p,
2592 			    struct kfd_ioctl_criu_args *args,
2593 			    uint64_t *priv_offset,
2594 			    uint64_t max_priv_data_size)
2595 {
2596 	struct kfd_criu_bo_bucket *bo_buckets = NULL;
2597 	struct kfd_criu_bo_priv_data *bo_privs = NULL;
2598 	struct file **files = NULL;
2599 	int ret = 0;
2600 	uint32_t i = 0;
2601 
2602 	if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size)
2603 		return -EINVAL;
2604 
2605 	/* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */
2606 	amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info);
2607 
2608 	bo_buckets = kvmalloc_objs(*bo_buckets, args->num_bos);
2609 	if (!bo_buckets)
2610 		return -ENOMEM;
2611 
2612 	files = kvzalloc(args->num_bos * sizeof(struct file *), GFP_KERNEL);
2613 	if (!files) {
2614 		ret = -ENOMEM;
2615 		goto exit;
2616 	}
2617 
2618 	ret = copy_from_user(bo_buckets, (void __user *)args->bos,
2619 			     args->num_bos * sizeof(*bo_buckets));
2620 	if (ret) {
2621 		pr_err("Failed to copy BOs information from user\n");
2622 		ret = -EFAULT;
2623 		goto exit;
2624 	}
2625 
2626 	bo_privs = kvmalloc_objs(*bo_privs, args->num_bos);
2627 	if (!bo_privs) {
2628 		ret = -ENOMEM;
2629 		goto exit;
2630 	}
2631 
2632 	ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset,
2633 			     args->num_bos * sizeof(*bo_privs));
2634 	if (ret) {
2635 		pr_err("Failed to copy BOs information from user\n");
2636 		ret = -EFAULT;
2637 		goto exit;
2638 	}
2639 	*priv_offset += args->num_bos * sizeof(*bo_privs);
2640 
2641 	/* Create and map new BOs */
2642 	for (; i < args->num_bos; i++) {
2643 		ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i], &files[i]);
2644 		if (ret) {
2645 			pr_debug("Failed to restore BO[%d] ret%d\n", i, ret);
2646 			goto exit;
2647 		}
2648 	} /* done */
2649 
2650 	/* Copy only the buckets back so user can read bo_buckets[N].restored_offset */
2651 	ret = copy_to_user((void __user *)args->bos,
2652 				bo_buckets,
2653 				(args->num_bos * sizeof(*bo_buckets)));
2654 	if (ret)
2655 		ret = -EFAULT;
2656 
2657 exit:
2658 	commit_files(files, bo_buckets, i, ret);
2659 	kvfree(files);
2660 	kvfree(bo_buckets);
2661 	kvfree(bo_privs);
2662 	return ret;
2663 }
2664 
2665 static int criu_restore_objects(struct file *filep,
2666 				struct kfd_process *p,
2667 				struct kfd_ioctl_criu_args *args,
2668 				uint64_t *priv_offset,
2669 				uint64_t max_priv_data_size)
2670 {
2671 	int ret = 0;
2672 	uint32_t i;
2673 
2674 	BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type));
2675 	BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type));
2676 	BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type));
2677 
2678 	for (i = 0; i < args->num_objects; i++) {
2679 		uint32_t object_type;
2680 
2681 		if (*priv_offset + sizeof(object_type) > max_priv_data_size) {
2682 			pr_err("Invalid private data size\n");
2683 			return -EINVAL;
2684 		}
2685 
2686 		ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset));
2687 		if (ret) {
2688 			pr_err("Failed to copy private information from user\n");
2689 			goto exit;
2690 		}
2691 
2692 		switch (object_type) {
2693 		case KFD_CRIU_OBJECT_TYPE_QUEUE:
2694 			ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data,
2695 						     priv_offset, max_priv_data_size);
2696 			if (ret)
2697 				goto exit;
2698 			break;
2699 		case KFD_CRIU_OBJECT_TYPE_EVENT:
2700 			ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data,
2701 						     priv_offset, max_priv_data_size);
2702 			if (ret)
2703 				goto exit;
2704 			break;
2705 		case KFD_CRIU_OBJECT_TYPE_SVM_RANGE:
2706 			ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data,
2707 						     priv_offset, max_priv_data_size);
2708 			if (ret)
2709 				goto exit;
2710 			break;
2711 		default:
2712 			pr_err("Invalid object type:%u at index:%d\n", object_type, i);
2713 			ret = -EINVAL;
2714 			goto exit;
2715 		}
2716 	}
2717 exit:
2718 	return ret;
2719 }
2720 
2721 static int criu_restore(struct file *filep,
2722 			struct kfd_process *p,
2723 			struct kfd_ioctl_criu_args *args)
2724 {
2725 	uint64_t priv_offset = 0;
2726 	int ret = 0;
2727 
2728 	pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n",
2729 		 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size);
2730 
2731 	if ((args->num_bos > 0 && !args->bos) || !args->devices || !args->priv_data ||
2732 	    !args->priv_data_size || !args->num_devices)
2733 		return -EINVAL;
2734 
2735 	mutex_lock(&p->mutex);
2736 
2737 	/*
2738 	 * Set the process to evicted state to avoid running any new queues before all the memory
2739 	 * mappings are ready.
2740 	 */
2741 	ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE);
2742 	if (ret)
2743 		goto exit_unlock;
2744 
2745 	/* Each function will adjust priv_offset based on how many bytes they consumed */
2746 	ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size);
2747 	if (ret)
2748 		goto exit_unlock;
2749 
2750 	ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size);
2751 	if (ret)
2752 		goto exit_unlock;
2753 
2754 	ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size);
2755 	if (ret)
2756 		goto exit_unlock;
2757 
2758 	ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size);
2759 	if (ret)
2760 		goto exit_unlock;
2761 
2762 	if (priv_offset != args->priv_data_size) {
2763 		pr_err("Invalid private data size\n");
2764 		ret = -EINVAL;
2765 	}
2766 
2767 exit_unlock:
2768 	mutex_unlock(&p->mutex);
2769 	if (ret)
2770 		pr_err("Failed to restore CRIU ret:%d\n", ret);
2771 	else
2772 		pr_debug("CRIU restore successful\n");
2773 
2774 	return ret;
2775 }
2776 
2777 static int criu_unpause(struct file *filep,
2778 			struct kfd_process *p,
2779 			struct kfd_ioctl_criu_args *args)
2780 {
2781 	int ret;
2782 
2783 	mutex_lock(&p->mutex);
2784 
2785 	if (!p->queues_paused) {
2786 		mutex_unlock(&p->mutex);
2787 		return -EINVAL;
2788 	}
2789 
2790 	ret = kfd_process_restore_queues(p);
2791 	if (ret)
2792 		pr_err("Failed to unpause queues ret:%d\n", ret);
2793 	else
2794 		p->queues_paused = false;
2795 
2796 	mutex_unlock(&p->mutex);
2797 
2798 	return ret;
2799 }
2800 
2801 static int criu_resume(struct file *filep,
2802 			struct kfd_process *p,
2803 			struct kfd_ioctl_criu_args *args)
2804 {
2805 	struct kfd_process *target = NULL;
2806 	struct pid *pid = NULL;
2807 	int ret = 0;
2808 
2809 	pr_debug("Inside %s, target pid for criu restore: %d\n", __func__,
2810 		 args->pid);
2811 
2812 	pid = find_get_pid(args->pid);
2813 	if (!pid) {
2814 		pr_err("Cannot find pid info for %i\n", args->pid);
2815 		return -ESRCH;
2816 	}
2817 
2818 	pr_debug("calling kfd_lookup_process_by_pid\n");
2819 	target = kfd_lookup_process_by_pid(pid);
2820 
2821 	put_pid(pid);
2822 
2823 	if (!target) {
2824 		pr_debug("Cannot find process info for %i\n", args->pid);
2825 		return -ESRCH;
2826 	}
2827 
2828 	mutex_lock(&target->mutex);
2829 	ret = kfd_criu_resume_svm(target);
2830 	if (ret) {
2831 		pr_err("kfd_criu_resume_svm failed for %i\n", args->pid);
2832 		goto exit;
2833 	}
2834 
2835 	ret =  amdgpu_amdkfd_criu_resume(target->kgd_process_info);
2836 	if (ret)
2837 		pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid);
2838 
2839 exit:
2840 	mutex_unlock(&target->mutex);
2841 
2842 	kfd_unref_process(target);
2843 	return ret;
2844 }
2845 
2846 static int criu_process_info(struct file *filep,
2847 				struct kfd_process *p,
2848 				struct kfd_ioctl_criu_args *args)
2849 {
2850 	int ret = 0;
2851 
2852 	mutex_lock(&p->mutex);
2853 
2854 	if (!p->n_pdds) {
2855 		pr_err("No pdd for given process\n");
2856 		ret = -ENODEV;
2857 		goto err_unlock;
2858 	}
2859 
2860 	ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT);
2861 	if (ret)
2862 		goto err_unlock;
2863 
2864 	p->queues_paused = true;
2865 
2866 	args->pid = task_pid_nr_ns(p->lead_thread,
2867 					task_active_pid_ns(p->lead_thread));
2868 
2869 	ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos,
2870 					   &args->num_objects, &args->priv_data_size);
2871 	if (ret)
2872 		goto err_unlock;
2873 
2874 	dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n",
2875 				args->num_devices, args->num_bos, args->num_objects,
2876 				args->priv_data_size);
2877 
2878 err_unlock:
2879 	if (ret) {
2880 		kfd_process_restore_queues(p);
2881 		p->queues_paused = false;
2882 	}
2883 	mutex_unlock(&p->mutex);
2884 	return ret;
2885 }
2886 
2887 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data)
2888 {
2889 	struct kfd_ioctl_criu_args *args = data;
2890 	int ret;
2891 
2892 	dev_dbg(kfd_device, "CRIU operation: %d\n", args->op);
2893 	switch (args->op) {
2894 	case KFD_CRIU_OP_PROCESS_INFO:
2895 		ret = criu_process_info(filep, p, args);
2896 		break;
2897 	case KFD_CRIU_OP_CHECKPOINT:
2898 		ret = criu_checkpoint(filep, p, args);
2899 		break;
2900 	case KFD_CRIU_OP_UNPAUSE:
2901 		ret = criu_unpause(filep, p, args);
2902 		break;
2903 	case KFD_CRIU_OP_RESTORE:
2904 		ret = criu_restore(filep, p, args);
2905 		break;
2906 	case KFD_CRIU_OP_RESUME:
2907 		ret = criu_resume(filep, p, args);
2908 		break;
2909 	default:
2910 		dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op);
2911 		ret = -EINVAL;
2912 		break;
2913 	}
2914 
2915 	if (ret)
2916 		dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret);
2917 
2918 	return ret;
2919 }
2920 
2921 static int runtime_enable(struct kfd_process *p, uint64_t r_debug,
2922 			bool enable_ttmp_setup)
2923 {
2924 	int i = 0, ret = 0;
2925 
2926 	if (p->is_runtime_retry)
2927 		goto retry;
2928 
2929 	if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED)
2930 		return -EBUSY;
2931 
2932 	for (i = 0; i < p->n_pdds; i++) {
2933 		struct kfd_process_device *pdd = p->pdds[i];
2934 
2935 		if (pdd->qpd.queue_count)
2936 			return -EEXIST;
2937 
2938 		/*
2939 		 * Setup TTMPs by default.
2940 		 * Note that this call must remain here for MES ADD QUEUE to
2941 		 * skip_process_ctx_clear unconditionally as the first call to
2942 		 * SET_SHADER_DEBUGGER clears any stale process context data
2943 		 * saved in MES.
2944 		 */
2945 		if (pdd->dev->kfd->shared_resources.enable_mes) {
2946 			ret = kfd_dbg_set_mes_debug_mode(
2947 				pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev));
2948 			if (ret)
2949 				return ret;
2950 		}
2951 	}
2952 
2953 	p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED;
2954 	p->runtime_info.r_debug = r_debug;
2955 	p->runtime_info.ttmp_setup = enable_ttmp_setup;
2956 
2957 	if (p->runtime_info.ttmp_setup) {
2958 		for (i = 0; i < p->n_pdds; i++) {
2959 			struct kfd_process_device *pdd = p->pdds[i];
2960 
2961 			if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) {
2962 				amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
2963 				pdd->dev->kfd2kgd->enable_debug_trap(
2964 						pdd->dev->adev,
2965 						true,
2966 						pdd->dev->vm_info.last_vmid_kfd);
2967 			} else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) {
2968 				pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap(
2969 						pdd->dev->adev,
2970 						false,
2971 						0);
2972 			}
2973 		}
2974 	}
2975 
2976 retry:
2977 	if (p->debug_trap_enabled) {
2978 		if (!p->is_runtime_retry) {
2979 			kfd_dbg_trap_activate(p);
2980 			kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME),
2981 					p, NULL, 0, false, NULL, 0);
2982 		}
2983 
2984 		mutex_unlock(&p->mutex);
2985 		ret = down_interruptible(&p->runtime_enable_sema);
2986 		mutex_lock(&p->mutex);
2987 
2988 		p->is_runtime_retry = !!ret;
2989 	}
2990 
2991 	return ret;
2992 }
2993 
2994 static int runtime_disable(struct kfd_process *p)
2995 {
2996 	int i = 0, ret = 0;
2997 	bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED;
2998 
2999 	p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED;
3000 	p->runtime_info.r_debug = 0;
3001 
3002 	if (p->debug_trap_enabled) {
3003 		if (was_enabled)
3004 			kfd_dbg_trap_deactivate(p, false, 0);
3005 
3006 		if (!p->is_runtime_retry)
3007 			kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME),
3008 					p, NULL, 0, false, NULL, 0);
3009 
3010 		mutex_unlock(&p->mutex);
3011 		ret = down_interruptible(&p->runtime_enable_sema);
3012 		mutex_lock(&p->mutex);
3013 
3014 		p->is_runtime_retry = !!ret;
3015 		if (ret)
3016 			return ret;
3017 	}
3018 
3019 	if (was_enabled && p->runtime_info.ttmp_setup) {
3020 		for (i = 0; i < p->n_pdds; i++) {
3021 			struct kfd_process_device *pdd = p->pdds[i];
3022 
3023 			if (!kfd_dbg_is_rlc_restore_supported(pdd->dev))
3024 				amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
3025 		}
3026 	}
3027 
3028 	p->runtime_info.ttmp_setup = false;
3029 
3030 	/* disable ttmp setup */
3031 	for (i = 0; i < p->n_pdds; i++) {
3032 		struct kfd_process_device *pdd = p->pdds[i];
3033 		int last_err = 0;
3034 
3035 		if (kfd_dbg_is_per_vmid_supported(pdd->dev)) {
3036 			pdd->spi_dbg_override =
3037 					pdd->dev->kfd2kgd->disable_debug_trap(
3038 					pdd->dev->adev,
3039 					false,
3040 					pdd->dev->vm_info.last_vmid_kfd);
3041 
3042 			if (!pdd->dev->kfd->shared_resources.enable_mes)
3043 				last_err = debug_refresh_runlist(pdd->dev->dqm);
3044 			else
3045 				last_err = kfd_dbg_set_mes_debug_mode(pdd,
3046 							   !kfd_dbg_has_cwsr_workaround(pdd->dev));
3047 
3048 			if (last_err)
3049 				ret = last_err;
3050 		}
3051 	}
3052 
3053 	return ret;
3054 }
3055 
3056 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data)
3057 {
3058 	struct kfd_ioctl_runtime_enable_args *args = data;
3059 	int r;
3060 
3061 	mutex_lock(&p->mutex);
3062 
3063 	if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK)
3064 		r = runtime_enable(p, args->r_debug,
3065 				!!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK));
3066 	else
3067 		r = runtime_disable(p);
3068 
3069 	mutex_unlock(&p->mutex);
3070 
3071 	return r;
3072 }
3073 
3074 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data)
3075 {
3076 	struct kfd_ioctl_dbg_trap_args *args = data;
3077 	struct task_struct *thread = NULL;
3078 	struct mm_struct *mm = NULL;
3079 	struct pid *pid = NULL;
3080 	struct kfd_process *target = NULL;
3081 	struct kfd_process_device *pdd = NULL;
3082 	int r = 0;
3083 
3084 	if (p->context_id != KFD_CONTEXT_ID_PRIMARY) {
3085 		pr_debug("Set debug trap ioctl can not be invoked on non-primary kfd process\n");
3086 
3087 		return -EOPNOTSUPP;
3088 	}
3089 
3090 	if (sched_policy == KFD_SCHED_POLICY_NO_HWS) {
3091 		pr_err("Debugging does not support sched_policy %i", sched_policy);
3092 		return -EINVAL;
3093 	}
3094 
3095 	pid = find_get_pid(args->pid);
3096 	if (!pid) {
3097 		pr_debug("Cannot find pid info for %i\n", args->pid);
3098 		r = -ESRCH;
3099 		goto out;
3100 	}
3101 
3102 	thread = get_pid_task(pid, PIDTYPE_PID);
3103 	if (!thread) {
3104 		r = -ESRCH;
3105 		goto out;
3106 	}
3107 
3108 	mm = get_task_mm(thread);
3109 	if (!mm) {
3110 		r = -ESRCH;
3111 		goto out;
3112 	}
3113 
3114 	if (args->op == KFD_IOC_DBG_TRAP_ENABLE) {
3115 		bool create_process;
3116 
3117 		rcu_read_lock();
3118 		create_process = thread && thread != current && ptrace_parent(thread) == current;
3119 		rcu_read_unlock();
3120 
3121 		target = create_process ? kfd_create_process(thread) :
3122 					kfd_lookup_process_by_pid(pid);
3123 	} else {
3124 		target = kfd_lookup_process_by_pid(pid);
3125 	}
3126 
3127 	if (IS_ERR_OR_NULL(target)) {
3128 		pr_debug("Cannot find process PID %i to debug\n", args->pid);
3129 		r = target ? PTR_ERR(target) : -ESRCH;
3130 		target = NULL;
3131 		goto out;
3132 	}
3133 
3134 	if (target->context_id != KFD_CONTEXT_ID_PRIMARY) {
3135 		pr_debug("Set debug trap ioctl not supported on non-primary kfd process\n");
3136 		r = -EOPNOTSUPP;
3137 		goto out;
3138 	}
3139 
3140 	/* Check if target is still PTRACED. */
3141 	rcu_read_lock();
3142 	if (target != p && args->op != KFD_IOC_DBG_TRAP_DISABLE
3143 				&& ptrace_parent(target->lead_thread) != current) {
3144 		pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid);
3145 		r = -EPERM;
3146 	}
3147 	rcu_read_unlock();
3148 
3149 	if (r)
3150 		goto out;
3151 
3152 	mutex_lock(&target->mutex);
3153 
3154 	if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) {
3155 		pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op);
3156 		r = -EINVAL;
3157 		goto unlock_out;
3158 	}
3159 
3160 	if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED &&
3161 			(args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE ||
3162 			 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE ||
3163 			 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES ||
3164 			 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES ||
3165 			 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ||
3166 			 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH ||
3167 			 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) {
3168 		r = -EPERM;
3169 		goto unlock_out;
3170 	}
3171 
3172 	if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ||
3173 	    args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) {
3174 		int user_gpu_id = kfd_process_get_user_gpu_id(target,
3175 				args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ?
3176 					args->set_node_address_watch.gpu_id :
3177 					args->clear_node_address_watch.gpu_id);
3178 
3179 		pdd = kfd_process_device_data_by_id(target, user_gpu_id);
3180 		if (user_gpu_id == -EINVAL || !pdd) {
3181 			r = -ENODEV;
3182 			goto unlock_out;
3183 		}
3184 	}
3185 
3186 	switch (args->op) {
3187 	case KFD_IOC_DBG_TRAP_ENABLE:
3188 		if (target != p)
3189 			target->debugger_process = p;
3190 
3191 		r = kfd_dbg_trap_enable(target,
3192 					args->enable.dbg_fd,
3193 					(void __user *)args->enable.rinfo_ptr,
3194 					&args->enable.rinfo_size);
3195 		if (!r)
3196 			target->exception_enable_mask = args->enable.exception_mask;
3197 
3198 		break;
3199 	case KFD_IOC_DBG_TRAP_DISABLE:
3200 		r = kfd_dbg_trap_disable(target);
3201 		break;
3202 	case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT:
3203 		r = kfd_dbg_send_exception_to_runtime(target,
3204 				args->send_runtime_event.gpu_id,
3205 				args->send_runtime_event.queue_id,
3206 				args->send_runtime_event.exception_mask);
3207 		break;
3208 	case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED:
3209 		kfd_dbg_set_enabled_debug_exception_mask(target,
3210 				args->set_exceptions_enabled.exception_mask);
3211 		break;
3212 	case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE:
3213 		r = kfd_dbg_trap_set_wave_launch_override(target,
3214 				args->launch_override.override_mode,
3215 				args->launch_override.enable_mask,
3216 				args->launch_override.support_request_mask,
3217 				&args->launch_override.enable_mask,
3218 				&args->launch_override.support_request_mask);
3219 		break;
3220 	case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE:
3221 		r = kfd_dbg_trap_set_wave_launch_mode(target,
3222 				args->launch_mode.launch_mode);
3223 		break;
3224 	case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES:
3225 		r = suspend_queues(target,
3226 				args->suspend_queues.num_queues,
3227 				args->suspend_queues.grace_period,
3228 				args->suspend_queues.exception_mask,
3229 				(uint32_t *)args->suspend_queues.queue_array_ptr);
3230 
3231 		break;
3232 	case KFD_IOC_DBG_TRAP_RESUME_QUEUES:
3233 		r = resume_queues(target, args->resume_queues.num_queues,
3234 				(uint32_t *)args->resume_queues.queue_array_ptr);
3235 		break;
3236 	case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH:
3237 		r = kfd_dbg_trap_set_dev_address_watch(pdd,
3238 				args->set_node_address_watch.address,
3239 				args->set_node_address_watch.mask,
3240 				&args->set_node_address_watch.id,
3241 				args->set_node_address_watch.mode);
3242 		break;
3243 	case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH:
3244 		r = kfd_dbg_trap_clear_dev_address_watch(pdd,
3245 				args->clear_node_address_watch.id);
3246 		break;
3247 	case KFD_IOC_DBG_TRAP_SET_FLAGS:
3248 		r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags);
3249 		break;
3250 	case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT:
3251 		r = kfd_dbg_ev_query_debug_event(target,
3252 				&args->query_debug_event.queue_id,
3253 				&args->query_debug_event.gpu_id,
3254 				args->query_debug_event.exception_mask,
3255 				&args->query_debug_event.exception_mask);
3256 		break;
3257 	case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO:
3258 		r = kfd_dbg_trap_query_exception_info(target,
3259 				args->query_exception_info.source_id,
3260 				args->query_exception_info.exception_code,
3261 				args->query_exception_info.clear_exception,
3262 				(void __user *)args->query_exception_info.info_ptr,
3263 				&args->query_exception_info.info_size);
3264 		break;
3265 	case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT:
3266 		r = pqm_get_queue_snapshot(&target->pqm,
3267 				args->queue_snapshot.exception_mask,
3268 				(void __user *)args->queue_snapshot.snapshot_buf_ptr,
3269 				&args->queue_snapshot.num_queues,
3270 				&args->queue_snapshot.entry_size);
3271 		break;
3272 	case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT:
3273 		r = kfd_dbg_trap_device_snapshot(target,
3274 				args->device_snapshot.exception_mask,
3275 				(void __user *)args->device_snapshot.snapshot_buf_ptr,
3276 				&args->device_snapshot.num_devices,
3277 				&args->device_snapshot.entry_size);
3278 		break;
3279 	default:
3280 		pr_err("Invalid option: %i\n", args->op);
3281 		r = -EINVAL;
3282 	}
3283 
3284 unlock_out:
3285 	mutex_unlock(&target->mutex);
3286 
3287 out:
3288 	if (thread)
3289 		put_task_struct(thread);
3290 
3291 	if (mm)
3292 		mmput(mm);
3293 
3294 	if (pid)
3295 		put_pid(pid);
3296 
3297 	if (target)
3298 		kfd_unref_process(target);
3299 
3300 	return r;
3301 }
3302 
3303 /* userspace programs need to invoke this ioctl explicitly on a FD to
3304  * create a secondary kfd_process which replacing its primary kfd_process
3305  */
3306 static int kfd_ioctl_create_process(struct file *filep, struct kfd_process *p, void *data)
3307 {
3308 	struct kfd_process *process;
3309 	int ret;
3310 
3311 	if (!filep->private_data || !p)
3312 		return -EINVAL;
3313 
3314 	/* Each FD owns only one kfd_process */
3315 	if (p->context_id != KFD_CONTEXT_ID_PRIMARY)
3316 		return -EINVAL;
3317 
3318 	mutex_lock(&kfd_processes_mutex);
3319 	if (p != filep->private_data) {
3320 		mutex_unlock(&kfd_processes_mutex);
3321 		return -EINVAL;
3322 	}
3323 
3324 	process = create_process(current, false);
3325 	if (IS_ERR(process)) {
3326 		mutex_unlock(&kfd_processes_mutex);
3327 		return PTR_ERR(process);
3328 	}
3329 
3330 	filep->private_data = process;
3331 	mutex_unlock(&kfd_processes_mutex);
3332 
3333 	ret = kfd_create_process_sysfs(process);
3334 	if (ret)
3335 		pr_warn("Failed to create sysfs entry for the kfd_process");
3336 
3337 	/* Each open() increases kref of the primary kfd_process,
3338 	 * so we need to reduce it here when we create a new secondary process replacing it
3339 	 */
3340 	kfd_unref_process(p);
3341 
3342 	return 0;
3343 }
3344 
3345 static inline uint32_t profile_lock_device(struct kfd_process *p,
3346 					   uint32_t gpu_id, uint32_t op)
3347 {
3348 	struct kfd_process_device *pdd;
3349 	struct kfd_dev *kfd;
3350 	int status = -EINVAL;
3351 	struct amdgpu_ptl *ptl;
3352 
3353 	if (!p)
3354 		return -EINVAL;
3355 
3356 	mutex_lock(&p->mutex);
3357 	pdd = kfd_process_device_data_by_id(p, gpu_id);
3358 	mutex_unlock(&p->mutex);
3359 
3360 	if (!pdd || !pdd->dev || !pdd->dev->kfd)
3361 		return -EINVAL;
3362 
3363 	kfd = pdd->dev->kfd;
3364 	ptl = &pdd->dev->adev->psp.ptl;
3365 
3366 	mutex_lock(&kfd->profiler_lock);
3367 	if (op == 1) {
3368 		if (!kfd->profiler_process) {
3369 			kfd->profiler_process = p;
3370 			status = 0;
3371 			mutex_unlock(&kfd->profiler_lock);
3372 			if (ptl->hw_supported) {
3373 				status = kfd_ptl_disable_request(pdd, p);
3374 				if (status != 0)
3375 					dev_err(kfd_device,
3376 						"Failed to lock device %d for profiling, error %d\n",
3377 						gpu_id, status);
3378 			}
3379 			return status;
3380 		} else if (kfd->profiler_process == p) {
3381 			status = -EALREADY;
3382 		} else {
3383 			status = -EBUSY;
3384 		}
3385 	} else if (op == 0 && kfd->profiler_process == p) {
3386 		kfd->profiler_process = NULL;
3387 		status = 0;
3388 		mutex_unlock(&kfd->profiler_lock);
3389 
3390 		if (ptl->hw_supported) {
3391 			status = kfd_ptl_disable_release(pdd, p);
3392 			if (status)
3393 				dev_err(kfd_device,
3394 						"Failed to unlock device %d for profiling, error %d\n",
3395 						gpu_id, status);
3396 		}
3397 		return status;
3398 	}
3399 	mutex_unlock(&kfd->profiler_lock);
3400 
3401 	return status;
3402 }
3403 
3404 static inline int kfd_profiler_pmc(struct kfd_process *p,
3405 				   struct kfd_ioctl_pmc_settings *args)
3406 {
3407 	struct kfd_process_device *pdd;
3408 	struct device_queue_manager *dqm;
3409 	int status;
3410 
3411 	/* Check if we have the correct permissions. */
3412 	if (!perfmon_capable())
3413 		return -EPERM;
3414 
3415 	/* Lock/Unlock the device based on the parameter given in OP */
3416 	status = profile_lock_device(p, args->gpu_id, args->lock);
3417 	if (status != 0)
3418 		return status;
3419 
3420 	/* Enable/disable perfcount if requested */
3421 	mutex_lock(&p->mutex);
3422 	pdd = kfd_process_device_data_by_id(p, args->gpu_id);
3423 	dqm = pdd->dev->dqm;
3424 	mutex_unlock(&p->mutex);
3425 
3426 	dqm->ops.set_perfcount(dqm, args->perfcount_enable);
3427 	return status;
3428 }
3429 
3430 static int kfd_ioctl_profiler(struct file *filep, struct kfd_process *p, void *data)
3431 {
3432 	struct kfd_ioctl_profiler_args *args = data;
3433 
3434 	switch (args->op) {
3435 	case KFD_IOC_PROFILER_VERSION:
3436 		args->version = KFD_IOC_PROFILER_VERSION_NUM;
3437 		return 0;
3438 	case KFD_IOC_PROFILER_PMC:
3439 		return kfd_profiler_pmc(p, &args->pmc);
3440 	case KFD_IOC_PROFILER_PTL_CONTROL:
3441 		return kfd_profiler_ptl_control(p, &args->ptl);
3442 	}
3443 	return -EINVAL;
3444 }
3445 
3446 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \
3447 	[_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \
3448 			    .validate = NULL, .cmd_drv = 0, .name = #ioctl}
3449 
3450 #define AMDKFD_IOCTL_DEF_V(ioctl, _func, _validate, _flags) \
3451 	[_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \
3452 			    .validate = _validate, .cmd_drv = 0, .name = #ioctl}
3453 
3454 /** Ioctl table */
3455 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = {
3456 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION,
3457 			kfd_ioctl_get_version, 0),
3458 
3459 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE,
3460 			kfd_ioctl_create_queue, 0),
3461 
3462 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE,
3463 			kfd_ioctl_destroy_queue, 0),
3464 
3465 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY,
3466 			kfd_ioctl_set_memory_policy, 0),
3467 
3468 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS,
3469 			kfd_ioctl_get_clock_counters, 0),
3470 
3471 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES,
3472 			kfd_ioctl_get_process_apertures, 0),
3473 
3474 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE,
3475 			kfd_ioctl_update_queue, 0),
3476 
3477 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT,
3478 			kfd_ioctl_create_event, 0),
3479 
3480 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT,
3481 			kfd_ioctl_destroy_event, 0),
3482 
3483 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT,
3484 			kfd_ioctl_set_event, 0),
3485 
3486 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT,
3487 			kfd_ioctl_reset_event, 0),
3488 
3489 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS,
3490 			kfd_ioctl_wait_events, 0),
3491 
3492 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED,
3493 			kfd_ioctl_dbg_register, 0),
3494 
3495 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED,
3496 			kfd_ioctl_dbg_unregister, 0),
3497 
3498 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED,
3499 			kfd_ioctl_dbg_address_watch, 0),
3500 
3501 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED,
3502 			kfd_ioctl_dbg_wave_control, 0),
3503 
3504 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA,
3505 			kfd_ioctl_set_scratch_backing_va, 0),
3506 
3507 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG,
3508 			kfd_ioctl_get_tile_config, 0),
3509 
3510 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER,
3511 			kfd_ioctl_set_trap_handler, 0),
3512 
3513 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW,
3514 			kfd_ioctl_get_process_apertures_new, 0),
3515 
3516 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM,
3517 			kfd_ioctl_acquire_vm, 0),
3518 
3519 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU,
3520 			kfd_ioctl_alloc_memory_of_gpu, 0),
3521 
3522 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU,
3523 			kfd_ioctl_free_memory_of_gpu, 0),
3524 
3525 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU,
3526 			kfd_ioctl_map_memory_to_gpu, 0),
3527 
3528 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU,
3529 			kfd_ioctl_unmap_memory_from_gpu, 0),
3530 
3531 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK,
3532 			kfd_ioctl_set_cu_mask, 0),
3533 
3534 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE,
3535 			kfd_ioctl_get_queue_wave_state, 0),
3536 
3537 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO,
3538 				kfd_ioctl_get_dmabuf_info, 0),
3539 
3540 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF,
3541 				kfd_ioctl_import_dmabuf, 0),
3542 
3543 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS,
3544 			kfd_ioctl_alloc_queue_gws, 0),
3545 
3546 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS,
3547 			kfd_ioctl_smi_events, 0),
3548 
3549 	AMDKFD_IOCTL_DEF_V(AMDKFD_IOC_SVM, kfd_ioctl_svm,
3550 			   kfd_ioctl_svm_validate, 0),
3551 
3552 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE,
3553 			kfd_ioctl_set_xnack_mode, 0),
3554 
3555 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP,
3556 			kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE),
3557 
3558 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY,
3559 			kfd_ioctl_get_available_memory, 0),
3560 
3561 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF,
3562 				kfd_ioctl_export_dmabuf, 0),
3563 
3564 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE,
3565 			kfd_ioctl_runtime_enable, 0),
3566 
3567 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP,
3568 			kfd_ioctl_set_debug_trap, 0),
3569 
3570 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_PROCESS,
3571 			kfd_ioctl_create_process, 0),
3572 
3573 	AMDKFD_IOCTL_DEF(AMDKFD_IOC_PROFILER,
3574 			kfd_ioctl_profiler, 0),
3575 };
3576 
3577 #define AMDKFD_CORE_IOCTL_COUNT	ARRAY_SIZE(amdkfd_ioctls)
3578 
3579 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
3580 {
3581 	struct kfd_process *process;
3582 	amdkfd_ioctl_t *func;
3583 	const struct amdkfd_ioctl_desc *ioctl = NULL;
3584 	unsigned int nr = _IOC_NR(cmd);
3585 	char stack_kdata[128];
3586 	char *kdata = NULL;
3587 	unsigned int usize, asize;
3588 	int retcode = -EINVAL;
3589 	bool ptrace_attached = false;
3590 
3591 	if (nr >= AMDKFD_CORE_IOCTL_COUNT) {
3592 		retcode = -ENOTTY;
3593 		goto err_i1;
3594 	}
3595 
3596 	if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) {
3597 		u32 amdkfd_size;
3598 
3599 		ioctl = &amdkfd_ioctls[nr];
3600 
3601 		amdkfd_size = _IOC_SIZE(ioctl->cmd);
3602 		usize = asize = _IOC_SIZE(cmd);
3603 		if (amdkfd_size > asize)
3604 			asize = amdkfd_size;
3605 
3606 		cmd = ioctl->cmd;
3607 	} else {
3608 		retcode = -ENOTTY;
3609 		goto err_i1;
3610 	}
3611 
3612 	dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg);
3613 
3614 	/* Get the process struct from the filep. Only the process
3615 	 * that opened /dev/kfd can use the file descriptor. Child
3616 	 * processes need to create their own KFD device context.
3617 	 */
3618 	process = filep->private_data;
3619 
3620 	rcu_read_lock();
3621 	if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) &&
3622 	    ptrace_parent(process->lead_thread) == current)
3623 		ptrace_attached = true;
3624 	rcu_read_unlock();
3625 
3626 	if (process->lead_thread != current->group_leader
3627 	    && !ptrace_attached) {
3628 		dev_dbg(kfd_device, "Using KFD FD in wrong process\n");
3629 		retcode = -EBADF;
3630 		goto err_i1;
3631 	}
3632 
3633 	/* Do not trust userspace, use our own definition */
3634 	func = ioctl->func;
3635 
3636 	if (unlikely(!func)) {
3637 		dev_dbg(kfd_device, "no function\n");
3638 		retcode = -EINVAL;
3639 		goto err_i1;
3640 	}
3641 
3642 	/*
3643 	 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support
3644 	 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a
3645 	 * more priviledged access.
3646 	 */
3647 	if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) {
3648 		if (!capable(CAP_CHECKPOINT_RESTORE) &&
3649 						!capable(CAP_SYS_ADMIN)) {
3650 			retcode = -EACCES;
3651 			goto err_i1;
3652 		}
3653 	}
3654 
3655 	if (cmd & (IOC_IN | IOC_OUT)) {
3656 		if (asize <= sizeof(stack_kdata)) {
3657 			kdata = stack_kdata;
3658 		} else {
3659 			kdata = kmalloc(asize, GFP_KERNEL);
3660 			if (!kdata) {
3661 				retcode = -ENOMEM;
3662 				goto err_i1;
3663 			}
3664 		}
3665 		if (asize > usize)
3666 			memset(kdata + usize, 0, asize - usize);
3667 	}
3668 
3669 	if (cmd & IOC_IN) {
3670 		if (copy_from_user(kdata, (void __user *)arg, usize) != 0) {
3671 			retcode = -EFAULT;
3672 			goto err_i1;
3673 		}
3674 	} else if (cmd & IOC_OUT) {
3675 		memset(kdata, 0, usize);
3676 	}
3677 
3678 	if (ioctl->validate) {
3679 		retcode = ioctl->validate(kdata, usize);
3680 		if (retcode)
3681 			goto err_i1;
3682 	}
3683 
3684 	retcode = func(filep, process, kdata);
3685 
3686 	if (cmd & IOC_OUT)
3687 		if (copy_to_user((void __user *)arg, kdata, usize) != 0)
3688 			retcode = -EFAULT;
3689 
3690 err_i1:
3691 	if (!ioctl)
3692 		dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n",
3693 			  task_pid_nr(current), cmd, nr);
3694 
3695 	if (kdata != stack_kdata)
3696 		kfree(kdata);
3697 
3698 	if (retcode)
3699 		dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n",
3700 				nr, arg, retcode);
3701 
3702 	return retcode;
3703 }
3704 
3705 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process,
3706 		      struct vm_area_struct *vma)
3707 {
3708 	phys_addr_t address;
3709 
3710 	if (vma->vm_end - vma->vm_start != PAGE_SIZE)
3711 		return -EINVAL;
3712 
3713 	if (PAGE_SIZE > 4096)
3714 		return -EINVAL;
3715 
3716 	address = dev->adev->rmmio_remap.bus_addr;
3717 
3718 	vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |
3719 				VM_DONTDUMP | VM_PFNMAP);
3720 
3721 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
3722 
3723 	pr_debug("process pid %d mapping mmio page\n"
3724 		 "     target user address == 0x%08llX\n"
3725 		 "     physical address    == 0x%08llX\n"
3726 		 "     vm_flags            == 0x%04lX\n"
3727 		 "     size                == 0x%04lX\n",
3728 		 process->lead_thread->pid, (unsigned long long) vma->vm_start,
3729 		 address, vma->vm_flags, PAGE_SIZE);
3730 
3731 	return io_remap_pfn_range(vma,
3732 				vma->vm_start,
3733 				address >> PAGE_SHIFT,
3734 				PAGE_SIZE,
3735 				vma->vm_page_prot);
3736 }
3737 
3738 
3739 static int kfd_mmap(struct file *filep, struct vm_area_struct *vma)
3740 {
3741 	struct kfd_process *process;
3742 	struct kfd_node *dev = NULL;
3743 	unsigned long mmap_offset;
3744 	unsigned int gpu_id;
3745 
3746 	process = filep->private_data;
3747 	if (!process)
3748 		return -ESRCH;
3749 
3750 	if (process->lead_thread != current->group_leader)
3751 		return -EBADF;
3752 
3753 	mmap_offset = vma->vm_pgoff << PAGE_SHIFT;
3754 	gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset);
3755 	if (gpu_id)
3756 		dev = kfd_device_by_id(gpu_id);
3757 
3758 	switch (mmap_offset & KFD_MMAP_TYPE_MASK) {
3759 	case KFD_MMAP_TYPE_DOORBELL:
3760 		if (!dev)
3761 			return -ENODEV;
3762 		return kfd_doorbell_mmap(dev, process, vma);
3763 
3764 	case KFD_MMAP_TYPE_EVENTS:
3765 		return kfd_event_mmap(process, vma);
3766 
3767 	case KFD_MMAP_TYPE_RESERVED_MEM:
3768 		pr_warn("KFD_MMAP_TYPE_RESERVED_MEM is no longer supported\n");
3769 		return -EINVAL;
3770 	case KFD_MMAP_TYPE_MMIO:
3771 		if (!dev)
3772 			return -ENODEV;
3773 		return kfd_mmio_mmap(dev, process, vma);
3774 	}
3775 
3776 	return -EFAULT;
3777 }
3778