1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/device.h> 25 #include <linux/export.h> 26 #include <linux/err.h> 27 #include <linux/fs.h> 28 #include <linux/file.h> 29 #include <linux/sched.h> 30 #include <linux/slab.h> 31 #include <linux/uaccess.h> 32 #include <linux/compat.h> 33 #include <uapi/linux/kfd_ioctl.h> 34 #include <linux/time.h> 35 #include <linux/mm.h> 36 #include <linux/mman.h> 37 #include <linux/ptrace.h> 38 #include <linux/dma-buf.h> 39 #include <linux/fdtable.h> 40 #include <linux/processor.h> 41 #include "kfd_priv.h" 42 #include "kfd_device_queue_manager.h" 43 #include "kfd_svm.h" 44 #include "amdgpu_amdkfd.h" 45 #include "kfd_smi_events.h" 46 #include "amdgpu_dma_buf.h" 47 #include "kfd_debug.h" 48 49 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 50 static int kfd_open(struct inode *, struct file *); 51 static int kfd_release(struct inode *, struct file *); 52 static int kfd_mmap(struct file *, struct vm_area_struct *); 53 54 static const char kfd_dev_name[] = "kfd"; 55 56 static const struct file_operations kfd_fops = { 57 .owner = THIS_MODULE, 58 .unlocked_ioctl = kfd_ioctl, 59 .compat_ioctl = compat_ptr_ioctl, 60 .open = kfd_open, 61 .release = kfd_release, 62 .mmap = kfd_mmap, 63 }; 64 65 static int kfd_char_dev_major = -1; 66 struct device *kfd_device; 67 static const struct class kfd_class = { 68 .name = kfd_dev_name, 69 }; 70 71 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 72 { 73 struct kfd_process_device *pdd; 74 75 mutex_lock(&p->mutex); 76 pdd = kfd_process_device_data_by_id(p, gpu_id); 77 78 if (pdd) 79 return pdd; 80 81 mutex_unlock(&p->mutex); 82 return NULL; 83 } 84 85 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 86 { 87 mutex_unlock(&pdd->process->mutex); 88 } 89 90 int kfd_chardev_init(void) 91 { 92 int err = 0; 93 94 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 95 err = kfd_char_dev_major; 96 if (err < 0) 97 goto err_register_chrdev; 98 99 err = class_register(&kfd_class); 100 if (err) 101 goto err_class_create; 102 103 kfd_device = device_create(&kfd_class, NULL, 104 MKDEV(kfd_char_dev_major, 0), 105 NULL, kfd_dev_name); 106 err = PTR_ERR(kfd_device); 107 if (IS_ERR(kfd_device)) 108 goto err_device_create; 109 110 return 0; 111 112 err_device_create: 113 class_unregister(&kfd_class); 114 err_class_create: 115 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 116 err_register_chrdev: 117 return err; 118 } 119 120 void kfd_chardev_exit(void) 121 { 122 device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0)); 123 class_unregister(&kfd_class); 124 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 125 kfd_device = NULL; 126 } 127 128 129 static int kfd_open(struct inode *inode, struct file *filep) 130 { 131 struct kfd_process *process; 132 bool is_32bit_user_mode; 133 134 if (iminor(inode) != 0) 135 return -ENODEV; 136 137 is_32bit_user_mode = in_compat_syscall(); 138 139 if (is_32bit_user_mode) { 140 dev_warn(kfd_device, 141 "Process %d (32-bit) failed to open /dev/kfd\n" 142 "32-bit processes are not supported by amdkfd\n", 143 current->pid); 144 return -EPERM; 145 } 146 147 process = kfd_create_process(current); 148 if (IS_ERR(process)) 149 return PTR_ERR(process); 150 151 if (kfd_process_init_cwsr_apu(process, filep)) { 152 kfd_unref_process(process); 153 return -EFAULT; 154 } 155 156 /* filep now owns the reference returned by kfd_create_process */ 157 filep->private_data = process; 158 159 dev_dbg(kfd_device, "process %d opened, compat mode (32 bit) - %d\n", 160 process->pasid, process->is_32bit_user_mode); 161 162 return 0; 163 } 164 165 static int kfd_release(struct inode *inode, struct file *filep) 166 { 167 struct kfd_process *process = filep->private_data; 168 169 if (process) 170 kfd_unref_process(process); 171 172 return 0; 173 } 174 175 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 176 void *data) 177 { 178 struct kfd_ioctl_get_version_args *args = data; 179 180 args->major_version = KFD_IOCTL_MAJOR_VERSION; 181 args->minor_version = KFD_IOCTL_MINOR_VERSION; 182 183 return 0; 184 } 185 186 static int set_queue_properties_from_user(struct queue_properties *q_properties, 187 struct kfd_ioctl_create_queue_args *args) 188 { 189 /* 190 * Repurpose queue percentage to accommodate new features: 191 * bit 0-7: queue percentage 192 * bit 8-15: pm4_target_xcc 193 */ 194 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 195 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 196 return -EINVAL; 197 } 198 199 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 200 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 201 return -EINVAL; 202 } 203 204 if ((args->ring_base_address) && 205 (!access_ok((const void __user *) args->ring_base_address, 206 sizeof(uint64_t)))) { 207 pr_err("Can't access ring base address\n"); 208 return -EFAULT; 209 } 210 211 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 212 pr_err("Ring size must be a power of 2 or 0\n"); 213 return -EINVAL; 214 } 215 216 if (!access_ok((const void __user *) args->read_pointer_address, 217 sizeof(uint32_t))) { 218 pr_err("Can't access read pointer\n"); 219 return -EFAULT; 220 } 221 222 if (!access_ok((const void __user *) args->write_pointer_address, 223 sizeof(uint32_t))) { 224 pr_err("Can't access write pointer\n"); 225 return -EFAULT; 226 } 227 228 if (args->eop_buffer_address && 229 !access_ok((const void __user *) args->eop_buffer_address, 230 sizeof(uint32_t))) { 231 pr_debug("Can't access eop buffer"); 232 return -EFAULT; 233 } 234 235 if (args->ctx_save_restore_address && 236 !access_ok((const void __user *) args->ctx_save_restore_address, 237 sizeof(uint32_t))) { 238 pr_debug("Can't access ctx save restore buffer"); 239 return -EFAULT; 240 } 241 242 q_properties->is_interop = false; 243 q_properties->is_gws = false; 244 q_properties->queue_percent = args->queue_percentage & 0xFF; 245 /* bit 8-15 are repurposed to be PM4 target XCC */ 246 q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 247 q_properties->priority = args->queue_priority; 248 q_properties->queue_address = args->ring_base_address; 249 q_properties->queue_size = args->ring_size; 250 q_properties->read_ptr = (void __user *)args->read_pointer_address; 251 q_properties->write_ptr = (void __user *)args->write_pointer_address; 252 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 253 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 254 q_properties->ctx_save_restore_area_address = 255 args->ctx_save_restore_address; 256 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 257 q_properties->ctl_stack_size = args->ctl_stack_size; 258 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 259 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 260 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 261 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 262 q_properties->type = KFD_QUEUE_TYPE_SDMA; 263 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 264 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 265 else 266 return -ENOTSUPP; 267 268 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 269 q_properties->format = KFD_QUEUE_FORMAT_AQL; 270 else 271 q_properties->format = KFD_QUEUE_FORMAT_PM4; 272 273 pr_debug("Queue Percentage: %d, %d\n", 274 q_properties->queue_percent, args->queue_percentage); 275 276 pr_debug("Queue Priority: %d, %d\n", 277 q_properties->priority, args->queue_priority); 278 279 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 280 q_properties->queue_address, args->ring_base_address); 281 282 pr_debug("Queue Size: 0x%llX, %u\n", 283 q_properties->queue_size, args->ring_size); 284 285 pr_debug("Queue r/w Pointers: %px, %px\n", 286 q_properties->read_ptr, 287 q_properties->write_ptr); 288 289 pr_debug("Queue Format: %d\n", q_properties->format); 290 291 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 292 293 pr_debug("Queue CTX save area: 0x%llX\n", 294 q_properties->ctx_save_restore_area_address); 295 296 return 0; 297 } 298 299 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 300 void *data) 301 { 302 struct kfd_ioctl_create_queue_args *args = data; 303 struct kfd_node *dev; 304 int err = 0; 305 unsigned int queue_id; 306 struct kfd_process_device *pdd; 307 struct queue_properties q_properties; 308 uint32_t doorbell_offset_in_process = 0; 309 310 memset(&q_properties, 0, sizeof(struct queue_properties)); 311 312 pr_debug("Creating queue ioctl\n"); 313 314 err = set_queue_properties_from_user(&q_properties, args); 315 if (err) 316 return err; 317 318 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 319 320 mutex_lock(&p->mutex); 321 322 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 323 if (!pdd) { 324 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 325 err = -EINVAL; 326 goto err_pdd; 327 } 328 dev = pdd->dev; 329 330 pdd = kfd_bind_process_to_device(dev, p); 331 if (IS_ERR(pdd)) { 332 err = -ESRCH; 333 goto err_bind_process; 334 } 335 336 if (!pdd->qpd.proc_doorbells) { 337 err = kfd_alloc_process_doorbells(dev->kfd, pdd); 338 if (err) { 339 pr_debug("failed to allocate process doorbells\n"); 340 goto err_bind_process; 341 } 342 } 343 344 err = kfd_queue_acquire_buffers(pdd, &q_properties); 345 if (err) { 346 pr_debug("failed to acquire user queue buffers\n"); 347 goto err_acquire_queue_buf; 348 } 349 350 pr_debug("Creating queue for PASID 0x%x on gpu 0x%x\n", 351 p->pasid, 352 dev->id); 353 354 err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, &queue_id, 355 NULL, NULL, NULL, &doorbell_offset_in_process); 356 if (err != 0) 357 goto err_create_queue; 358 359 args->queue_id = queue_id; 360 361 362 /* Return gpu_id as doorbell offset for mmap usage */ 363 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 364 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 365 if (KFD_IS_SOC15(dev)) 366 /* On SOC15 ASICs, include the doorbell offset within the 367 * process doorbell frame, which is 2 pages. 368 */ 369 args->doorbell_offset |= doorbell_offset_in_process; 370 371 mutex_unlock(&p->mutex); 372 373 pr_debug("Queue id %d was created successfully\n", args->queue_id); 374 375 pr_debug("Ring buffer address == 0x%016llX\n", 376 args->ring_base_address); 377 378 pr_debug("Read ptr address == 0x%016llX\n", 379 args->read_pointer_address); 380 381 pr_debug("Write ptr address == 0x%016llX\n", 382 args->write_pointer_address); 383 384 kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0); 385 return 0; 386 387 err_create_queue: 388 kfd_queue_release_buffers(pdd, &q_properties); 389 err_acquire_queue_buf: 390 err_bind_process: 391 err_pdd: 392 mutex_unlock(&p->mutex); 393 return err; 394 } 395 396 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 397 void *data) 398 { 399 int retval; 400 struct kfd_ioctl_destroy_queue_args *args = data; 401 402 pr_debug("Destroying queue id %d for pasid 0x%x\n", 403 args->queue_id, 404 p->pasid); 405 406 mutex_lock(&p->mutex); 407 408 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 409 410 mutex_unlock(&p->mutex); 411 return retval; 412 } 413 414 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 415 void *data) 416 { 417 int retval; 418 struct kfd_ioctl_update_queue_args *args = data; 419 struct queue_properties properties; 420 421 /* 422 * Repurpose queue percentage to accommodate new features: 423 * bit 0-7: queue percentage 424 * bit 8-15: pm4_target_xcc 425 */ 426 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 427 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 428 return -EINVAL; 429 } 430 431 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 432 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 433 return -EINVAL; 434 } 435 436 if ((args->ring_base_address) && 437 (!access_ok((const void __user *) args->ring_base_address, 438 sizeof(uint64_t)))) { 439 pr_err("Can't access ring base address\n"); 440 return -EFAULT; 441 } 442 443 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 444 pr_err("Ring size must be a power of 2 or 0\n"); 445 return -EINVAL; 446 } 447 448 properties.queue_address = args->ring_base_address; 449 properties.queue_size = args->ring_size; 450 properties.queue_percent = args->queue_percentage & 0xFF; 451 /* bit 8-15 are repurposed to be PM4 target XCC */ 452 properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 453 properties.priority = args->queue_priority; 454 455 pr_debug("Updating queue id %d for pasid 0x%x\n", 456 args->queue_id, p->pasid); 457 458 mutex_lock(&p->mutex); 459 460 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 461 462 mutex_unlock(&p->mutex); 463 464 return retval; 465 } 466 467 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 468 void *data) 469 { 470 int retval; 471 const int max_num_cus = 1024; 472 struct kfd_ioctl_set_cu_mask_args *args = data; 473 struct mqd_update_info minfo = {0}; 474 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 475 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 476 477 if ((args->num_cu_mask % 32) != 0) { 478 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 479 args->num_cu_mask); 480 return -EINVAL; 481 } 482 483 minfo.cu_mask.count = args->num_cu_mask; 484 if (minfo.cu_mask.count == 0) { 485 pr_debug("CU mask cannot be 0"); 486 return -EINVAL; 487 } 488 489 /* To prevent an unreasonably large CU mask size, set an arbitrary 490 * limit of max_num_cus bits. We can then just drop any CU mask bits 491 * past max_num_cus bits and just use the first max_num_cus bits. 492 */ 493 if (minfo.cu_mask.count > max_num_cus) { 494 pr_debug("CU mask cannot be greater than 1024 bits"); 495 minfo.cu_mask.count = max_num_cus; 496 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 497 } 498 499 minfo.cu_mask.ptr = kzalloc(cu_mask_size, GFP_KERNEL); 500 if (!minfo.cu_mask.ptr) 501 return -ENOMEM; 502 503 retval = copy_from_user(minfo.cu_mask.ptr, cu_mask_ptr, cu_mask_size); 504 if (retval) { 505 pr_debug("Could not copy CU mask from userspace"); 506 retval = -EFAULT; 507 goto out; 508 } 509 510 mutex_lock(&p->mutex); 511 512 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 513 514 mutex_unlock(&p->mutex); 515 516 out: 517 kfree(minfo.cu_mask.ptr); 518 return retval; 519 } 520 521 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 522 struct kfd_process *p, void *data) 523 { 524 struct kfd_ioctl_get_queue_wave_state_args *args = data; 525 int r; 526 527 mutex_lock(&p->mutex); 528 529 r = pqm_get_wave_state(&p->pqm, args->queue_id, 530 (void __user *)args->ctl_stack_address, 531 &args->ctl_stack_used_size, 532 &args->save_area_used_size); 533 534 mutex_unlock(&p->mutex); 535 536 return r; 537 } 538 539 static int kfd_ioctl_set_memory_policy(struct file *filep, 540 struct kfd_process *p, void *data) 541 { 542 struct kfd_ioctl_set_memory_policy_args *args = data; 543 int err = 0; 544 struct kfd_process_device *pdd; 545 enum cache_policy default_policy, alternate_policy; 546 547 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 548 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 549 return -EINVAL; 550 } 551 552 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 553 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 554 return -EINVAL; 555 } 556 557 mutex_lock(&p->mutex); 558 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 559 if (!pdd) { 560 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 561 err = -EINVAL; 562 goto err_pdd; 563 } 564 565 pdd = kfd_bind_process_to_device(pdd->dev, p); 566 if (IS_ERR(pdd)) { 567 err = -ESRCH; 568 goto out; 569 } 570 571 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 572 ? cache_policy_coherent : cache_policy_noncoherent; 573 574 alternate_policy = 575 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 576 ? cache_policy_coherent : cache_policy_noncoherent; 577 578 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 579 &pdd->qpd, 580 default_policy, 581 alternate_policy, 582 (void __user *)args->alternate_aperture_base, 583 args->alternate_aperture_size)) 584 err = -EINVAL; 585 586 out: 587 err_pdd: 588 mutex_unlock(&p->mutex); 589 590 return err; 591 } 592 593 static int kfd_ioctl_set_trap_handler(struct file *filep, 594 struct kfd_process *p, void *data) 595 { 596 struct kfd_ioctl_set_trap_handler_args *args = data; 597 int err = 0; 598 struct kfd_process_device *pdd; 599 600 mutex_lock(&p->mutex); 601 602 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 603 if (!pdd) { 604 err = -EINVAL; 605 goto err_pdd; 606 } 607 608 pdd = kfd_bind_process_to_device(pdd->dev, p); 609 if (IS_ERR(pdd)) { 610 err = -ESRCH; 611 goto out; 612 } 613 614 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 615 616 out: 617 err_pdd: 618 mutex_unlock(&p->mutex); 619 620 return err; 621 } 622 623 static int kfd_ioctl_dbg_register(struct file *filep, 624 struct kfd_process *p, void *data) 625 { 626 return -EPERM; 627 } 628 629 static int kfd_ioctl_dbg_unregister(struct file *filep, 630 struct kfd_process *p, void *data) 631 { 632 return -EPERM; 633 } 634 635 static int kfd_ioctl_dbg_address_watch(struct file *filep, 636 struct kfd_process *p, void *data) 637 { 638 return -EPERM; 639 } 640 641 /* Parse and generate fixed size data structure for wave control */ 642 static int kfd_ioctl_dbg_wave_control(struct file *filep, 643 struct kfd_process *p, void *data) 644 { 645 return -EPERM; 646 } 647 648 static int kfd_ioctl_get_clock_counters(struct file *filep, 649 struct kfd_process *p, void *data) 650 { 651 struct kfd_ioctl_get_clock_counters_args *args = data; 652 struct kfd_process_device *pdd; 653 654 mutex_lock(&p->mutex); 655 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 656 mutex_unlock(&p->mutex); 657 if (pdd) 658 /* Reading GPU clock counter from KGD */ 659 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 660 else 661 /* Node without GPU resource */ 662 args->gpu_clock_counter = 0; 663 664 /* No access to rdtsc. Using raw monotonic time */ 665 args->cpu_clock_counter = ktime_get_raw_ns(); 666 args->system_clock_counter = ktime_get_boottime_ns(); 667 668 /* Since the counter is in nano-seconds we use 1GHz frequency */ 669 args->system_clock_freq = 1000000000; 670 671 return 0; 672 } 673 674 675 static int kfd_ioctl_get_process_apertures(struct file *filp, 676 struct kfd_process *p, void *data) 677 { 678 struct kfd_ioctl_get_process_apertures_args *args = data; 679 struct kfd_process_device_apertures *pAperture; 680 int i; 681 682 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 683 684 args->num_of_nodes = 0; 685 686 mutex_lock(&p->mutex); 687 /* Run over all pdd of the process */ 688 for (i = 0; i < p->n_pdds; i++) { 689 struct kfd_process_device *pdd = p->pdds[i]; 690 691 pAperture = 692 &args->process_apertures[args->num_of_nodes]; 693 pAperture->gpu_id = pdd->dev->id; 694 pAperture->lds_base = pdd->lds_base; 695 pAperture->lds_limit = pdd->lds_limit; 696 pAperture->gpuvm_base = pdd->gpuvm_base; 697 pAperture->gpuvm_limit = pdd->gpuvm_limit; 698 pAperture->scratch_base = pdd->scratch_base; 699 pAperture->scratch_limit = pdd->scratch_limit; 700 701 dev_dbg(kfd_device, 702 "node id %u\n", args->num_of_nodes); 703 dev_dbg(kfd_device, 704 "gpu id %u\n", pdd->dev->id); 705 dev_dbg(kfd_device, 706 "lds_base %llX\n", pdd->lds_base); 707 dev_dbg(kfd_device, 708 "lds_limit %llX\n", pdd->lds_limit); 709 dev_dbg(kfd_device, 710 "gpuvm_base %llX\n", pdd->gpuvm_base); 711 dev_dbg(kfd_device, 712 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 713 dev_dbg(kfd_device, 714 "scratch_base %llX\n", pdd->scratch_base); 715 dev_dbg(kfd_device, 716 "scratch_limit %llX\n", pdd->scratch_limit); 717 718 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 719 break; 720 } 721 mutex_unlock(&p->mutex); 722 723 return 0; 724 } 725 726 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 727 struct kfd_process *p, void *data) 728 { 729 struct kfd_ioctl_get_process_apertures_new_args *args = data; 730 struct kfd_process_device_apertures *pa; 731 int ret; 732 int i; 733 734 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid); 735 736 if (args->num_of_nodes == 0) { 737 /* Return number of nodes, so that user space can alloacate 738 * sufficient memory 739 */ 740 mutex_lock(&p->mutex); 741 args->num_of_nodes = p->n_pdds; 742 goto out_unlock; 743 } 744 745 /* Fill in process-aperture information for all available 746 * nodes, but not more than args->num_of_nodes as that is 747 * the amount of memory allocated by user 748 */ 749 pa = kcalloc(args->num_of_nodes, sizeof(struct kfd_process_device_apertures), 750 GFP_KERNEL); 751 if (!pa) 752 return -ENOMEM; 753 754 mutex_lock(&p->mutex); 755 756 if (!p->n_pdds) { 757 args->num_of_nodes = 0; 758 kfree(pa); 759 goto out_unlock; 760 } 761 762 /* Run over all pdd of the process */ 763 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 764 struct kfd_process_device *pdd = p->pdds[i]; 765 766 pa[i].gpu_id = pdd->dev->id; 767 pa[i].lds_base = pdd->lds_base; 768 pa[i].lds_limit = pdd->lds_limit; 769 pa[i].gpuvm_base = pdd->gpuvm_base; 770 pa[i].gpuvm_limit = pdd->gpuvm_limit; 771 pa[i].scratch_base = pdd->scratch_base; 772 pa[i].scratch_limit = pdd->scratch_limit; 773 774 dev_dbg(kfd_device, 775 "gpu id %u\n", pdd->dev->id); 776 dev_dbg(kfd_device, 777 "lds_base %llX\n", pdd->lds_base); 778 dev_dbg(kfd_device, 779 "lds_limit %llX\n", pdd->lds_limit); 780 dev_dbg(kfd_device, 781 "gpuvm_base %llX\n", pdd->gpuvm_base); 782 dev_dbg(kfd_device, 783 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 784 dev_dbg(kfd_device, 785 "scratch_base %llX\n", pdd->scratch_base); 786 dev_dbg(kfd_device, 787 "scratch_limit %llX\n", pdd->scratch_limit); 788 } 789 mutex_unlock(&p->mutex); 790 791 args->num_of_nodes = i; 792 ret = copy_to_user( 793 (void __user *)args->kfd_process_device_apertures_ptr, 794 pa, 795 (i * sizeof(struct kfd_process_device_apertures))); 796 kfree(pa); 797 return ret ? -EFAULT : 0; 798 799 out_unlock: 800 mutex_unlock(&p->mutex); 801 return 0; 802 } 803 804 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 805 void *data) 806 { 807 struct kfd_ioctl_create_event_args *args = data; 808 int err; 809 810 /* For dGPUs the event page is allocated in user mode. The 811 * handle is passed to KFD with the first call to this IOCTL 812 * through the event_page_offset field. 813 */ 814 if (args->event_page_offset) { 815 mutex_lock(&p->mutex); 816 err = kfd_kmap_event_page(p, args->event_page_offset); 817 mutex_unlock(&p->mutex); 818 if (err) 819 return err; 820 } 821 822 err = kfd_event_create(filp, p, args->event_type, 823 args->auto_reset != 0, args->node_id, 824 &args->event_id, &args->event_trigger_data, 825 &args->event_page_offset, 826 &args->event_slot_index); 827 828 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 829 return err; 830 } 831 832 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 833 void *data) 834 { 835 struct kfd_ioctl_destroy_event_args *args = data; 836 837 return kfd_event_destroy(p, args->event_id); 838 } 839 840 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 841 void *data) 842 { 843 struct kfd_ioctl_set_event_args *args = data; 844 845 return kfd_set_event(p, args->event_id); 846 } 847 848 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 849 void *data) 850 { 851 struct kfd_ioctl_reset_event_args *args = data; 852 853 return kfd_reset_event(p, args->event_id); 854 } 855 856 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 857 void *data) 858 { 859 struct kfd_ioctl_wait_events_args *args = data; 860 861 return kfd_wait_on_events(p, args->num_events, 862 (void __user *)args->events_ptr, 863 (args->wait_for_all != 0), 864 &args->timeout, &args->wait_result); 865 } 866 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 867 struct kfd_process *p, void *data) 868 { 869 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 870 struct kfd_process_device *pdd; 871 struct kfd_node *dev; 872 long err; 873 874 mutex_lock(&p->mutex); 875 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 876 if (!pdd) { 877 err = -EINVAL; 878 goto err_pdd; 879 } 880 dev = pdd->dev; 881 882 pdd = kfd_bind_process_to_device(dev, p); 883 if (IS_ERR(pdd)) { 884 err = PTR_ERR(pdd); 885 goto bind_process_to_device_fail; 886 } 887 888 pdd->qpd.sh_hidden_private_base = args->va_addr; 889 890 mutex_unlock(&p->mutex); 891 892 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 893 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 894 dev->kfd2kgd->set_scratch_backing_va( 895 dev->adev, args->va_addr, pdd->qpd.vmid); 896 897 return 0; 898 899 bind_process_to_device_fail: 900 err_pdd: 901 mutex_unlock(&p->mutex); 902 return err; 903 } 904 905 static int kfd_ioctl_get_tile_config(struct file *filep, 906 struct kfd_process *p, void *data) 907 { 908 struct kfd_ioctl_get_tile_config_args *args = data; 909 struct kfd_process_device *pdd; 910 struct tile_config config; 911 int err = 0; 912 913 mutex_lock(&p->mutex); 914 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 915 mutex_unlock(&p->mutex); 916 if (!pdd) 917 return -EINVAL; 918 919 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 920 921 args->gb_addr_config = config.gb_addr_config; 922 args->num_banks = config.num_banks; 923 args->num_ranks = config.num_ranks; 924 925 if (args->num_tile_configs > config.num_tile_configs) 926 args->num_tile_configs = config.num_tile_configs; 927 err = copy_to_user((void __user *)args->tile_config_ptr, 928 config.tile_config_ptr, 929 args->num_tile_configs * sizeof(uint32_t)); 930 if (err) { 931 args->num_tile_configs = 0; 932 return -EFAULT; 933 } 934 935 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 936 args->num_macro_tile_configs = 937 config.num_macro_tile_configs; 938 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 939 config.macro_tile_config_ptr, 940 args->num_macro_tile_configs * sizeof(uint32_t)); 941 if (err) { 942 args->num_macro_tile_configs = 0; 943 return -EFAULT; 944 } 945 946 return 0; 947 } 948 949 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 950 void *data) 951 { 952 struct kfd_ioctl_acquire_vm_args *args = data; 953 struct kfd_process_device *pdd; 954 struct file *drm_file; 955 int ret; 956 957 drm_file = fget(args->drm_fd); 958 if (!drm_file) 959 return -EINVAL; 960 961 mutex_lock(&p->mutex); 962 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 963 if (!pdd) { 964 ret = -EINVAL; 965 goto err_pdd; 966 } 967 968 if (pdd->drm_file) { 969 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 970 goto err_drm_file; 971 } 972 973 ret = kfd_process_device_init_vm(pdd, drm_file); 974 if (ret) 975 goto err_unlock; 976 977 /* On success, the PDD keeps the drm_file reference */ 978 mutex_unlock(&p->mutex); 979 980 return 0; 981 982 err_unlock: 983 err_pdd: 984 err_drm_file: 985 mutex_unlock(&p->mutex); 986 fput(drm_file); 987 return ret; 988 } 989 990 bool kfd_dev_is_large_bar(struct kfd_node *dev) 991 { 992 if (dev->kfd->adev->debug_largebar) { 993 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 994 return true; 995 } 996 997 if (dev->local_mem_info.local_mem_size_private == 0 && 998 dev->local_mem_info.local_mem_size_public > 0) 999 return true; 1000 1001 if (dev->local_mem_info.local_mem_size_public == 0 && 1002 dev->kfd->adev->gmc.is_app_apu) { 1003 pr_debug("APP APU, Consider like a large bar system\n"); 1004 return true; 1005 } 1006 1007 return false; 1008 } 1009 1010 static int kfd_ioctl_get_available_memory(struct file *filep, 1011 struct kfd_process *p, void *data) 1012 { 1013 struct kfd_ioctl_get_available_memory_args *args = data; 1014 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 1015 1016 if (!pdd) 1017 return -EINVAL; 1018 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev, 1019 pdd->dev->node_id); 1020 kfd_unlock_pdd(pdd); 1021 return 0; 1022 } 1023 1024 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 1025 struct kfd_process *p, void *data) 1026 { 1027 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 1028 struct kfd_process_device *pdd; 1029 void *mem; 1030 struct kfd_node *dev; 1031 int idr_handle; 1032 long err; 1033 uint64_t offset = args->mmap_offset; 1034 uint32_t flags = args->flags; 1035 1036 if (args->size == 0) 1037 return -EINVAL; 1038 1039 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1040 /* Flush pending deferred work to avoid racing with deferred actions 1041 * from previous memory map changes (e.g. munmap). 1042 */ 1043 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1044 mutex_lock(&p->svms.lock); 1045 mmap_write_unlock(current->mm); 1046 if (interval_tree_iter_first(&p->svms.objects, 1047 args->va_addr >> PAGE_SHIFT, 1048 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1049 pr_err("Address: 0x%llx already allocated by SVM\n", 1050 args->va_addr); 1051 mutex_unlock(&p->svms.lock); 1052 return -EADDRINUSE; 1053 } 1054 1055 /* When register user buffer check if it has been registered by svm by 1056 * buffer cpu virtual address. 1057 */ 1058 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) && 1059 interval_tree_iter_first(&p->svms.objects, 1060 args->mmap_offset >> PAGE_SHIFT, 1061 (args->mmap_offset + args->size - 1) >> PAGE_SHIFT)) { 1062 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n", 1063 args->mmap_offset); 1064 mutex_unlock(&p->svms.lock); 1065 return -EADDRINUSE; 1066 } 1067 1068 mutex_unlock(&p->svms.lock); 1069 #endif 1070 mutex_lock(&p->mutex); 1071 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1072 if (!pdd) { 1073 err = -EINVAL; 1074 goto err_pdd; 1075 } 1076 1077 dev = pdd->dev; 1078 1079 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1080 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1081 !kfd_dev_is_large_bar(dev)) { 1082 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1083 err = -EINVAL; 1084 goto err_large_bar; 1085 } 1086 1087 pdd = kfd_bind_process_to_device(dev, p); 1088 if (IS_ERR(pdd)) { 1089 err = PTR_ERR(pdd); 1090 goto err_unlock; 1091 } 1092 1093 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1094 if (args->size != kfd_doorbell_process_slice(dev->kfd)) { 1095 err = -EINVAL; 1096 goto err_unlock; 1097 } 1098 offset = kfd_get_process_doorbells(pdd); 1099 if (!offset) { 1100 err = -ENOMEM; 1101 goto err_unlock; 1102 } 1103 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1104 if (args->size != PAGE_SIZE) { 1105 err = -EINVAL; 1106 goto err_unlock; 1107 } 1108 offset = dev->adev->rmmio_remap.bus_addr; 1109 if (!offset || (PAGE_SIZE > 4096)) { 1110 err = -ENOMEM; 1111 goto err_unlock; 1112 } 1113 } 1114 1115 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1116 dev->adev, args->va_addr, args->size, 1117 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1118 flags, false); 1119 1120 if (err) 1121 goto err_unlock; 1122 1123 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1124 if (idr_handle < 0) { 1125 err = -EFAULT; 1126 goto err_free; 1127 } 1128 1129 /* Update the VRAM usage count */ 1130 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 1131 uint64_t size = args->size; 1132 1133 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) 1134 size >>= 1; 1135 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + PAGE_ALIGN(size)); 1136 } 1137 1138 mutex_unlock(&p->mutex); 1139 1140 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1141 args->mmap_offset = offset; 1142 1143 /* MMIO is mapped through kfd device 1144 * Generate a kfd mmap offset 1145 */ 1146 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1147 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1148 | KFD_MMAP_GPU_ID(args->gpu_id); 1149 1150 return 0; 1151 1152 err_free: 1153 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1154 pdd->drm_priv, NULL); 1155 err_unlock: 1156 err_pdd: 1157 err_large_bar: 1158 mutex_unlock(&p->mutex); 1159 return err; 1160 } 1161 1162 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1163 struct kfd_process *p, void *data) 1164 { 1165 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1166 struct kfd_process_device *pdd; 1167 void *mem; 1168 int ret; 1169 uint64_t size = 0; 1170 1171 mutex_lock(&p->mutex); 1172 /* 1173 * Safeguard to prevent user space from freeing signal BO. 1174 * It will be freed at process termination. 1175 */ 1176 if (p->signal_handle && (p->signal_handle == args->handle)) { 1177 pr_err("Free signal BO is not allowed\n"); 1178 ret = -EPERM; 1179 goto err_unlock; 1180 } 1181 1182 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1183 if (!pdd) { 1184 pr_err("Process device data doesn't exist\n"); 1185 ret = -EINVAL; 1186 goto err_pdd; 1187 } 1188 1189 mem = kfd_process_device_translate_handle( 1190 pdd, GET_IDR_HANDLE(args->handle)); 1191 if (!mem) { 1192 ret = -EINVAL; 1193 goto err_unlock; 1194 } 1195 1196 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1197 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1198 1199 /* If freeing the buffer failed, leave the handle in place for 1200 * clean-up during process tear-down. 1201 */ 1202 if (!ret) 1203 kfd_process_device_remove_obj_handle( 1204 pdd, GET_IDR_HANDLE(args->handle)); 1205 1206 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size); 1207 1208 err_unlock: 1209 err_pdd: 1210 mutex_unlock(&p->mutex); 1211 return ret; 1212 } 1213 1214 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1215 struct kfd_process *p, void *data) 1216 { 1217 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1218 struct kfd_process_device *pdd, *peer_pdd; 1219 void *mem; 1220 struct kfd_node *dev; 1221 long err = 0; 1222 int i; 1223 uint32_t *devices_arr = NULL; 1224 1225 if (!args->n_devices) { 1226 pr_debug("Device IDs array empty\n"); 1227 return -EINVAL; 1228 } 1229 if (args->n_success > args->n_devices) { 1230 pr_debug("n_success exceeds n_devices\n"); 1231 return -EINVAL; 1232 } 1233 1234 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1235 GFP_KERNEL); 1236 if (!devices_arr) 1237 return -ENOMEM; 1238 1239 err = copy_from_user(devices_arr, 1240 (void __user *)args->device_ids_array_ptr, 1241 args->n_devices * sizeof(*devices_arr)); 1242 if (err != 0) { 1243 err = -EFAULT; 1244 goto copy_from_user_failed; 1245 } 1246 1247 mutex_lock(&p->mutex); 1248 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1249 if (!pdd) { 1250 err = -EINVAL; 1251 goto get_process_device_data_failed; 1252 } 1253 dev = pdd->dev; 1254 1255 pdd = kfd_bind_process_to_device(dev, p); 1256 if (IS_ERR(pdd)) { 1257 err = PTR_ERR(pdd); 1258 goto bind_process_to_device_failed; 1259 } 1260 1261 mem = kfd_process_device_translate_handle(pdd, 1262 GET_IDR_HANDLE(args->handle)); 1263 if (!mem) { 1264 err = -ENOMEM; 1265 goto get_mem_obj_from_handle_failed; 1266 } 1267 1268 for (i = args->n_success; i < args->n_devices; i++) { 1269 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1270 if (!peer_pdd) { 1271 pr_debug("Getting device by id failed for 0x%x\n", 1272 devices_arr[i]); 1273 err = -EINVAL; 1274 goto get_mem_obj_from_handle_failed; 1275 } 1276 1277 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1278 if (IS_ERR(peer_pdd)) { 1279 err = PTR_ERR(peer_pdd); 1280 goto get_mem_obj_from_handle_failed; 1281 } 1282 1283 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1284 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1285 peer_pdd->drm_priv); 1286 if (err) { 1287 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1288 1289 dev_err(dev->adev->dev, 1290 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1291 pci_domain_nr(pdev->bus), 1292 pdev->bus->number, 1293 PCI_SLOT(pdev->devfn), 1294 PCI_FUNC(pdev->devfn), 1295 ((struct kgd_mem *)mem)->domain); 1296 goto map_memory_to_gpu_failed; 1297 } 1298 args->n_success = i+1; 1299 } 1300 1301 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1302 if (err) { 1303 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1304 goto sync_memory_failed; 1305 } 1306 1307 mutex_unlock(&p->mutex); 1308 1309 /* Flush TLBs after waiting for the page table updates to complete */ 1310 for (i = 0; i < args->n_devices; i++) { 1311 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1312 if (WARN_ON_ONCE(!peer_pdd)) 1313 continue; 1314 kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY); 1315 } 1316 kfree(devices_arr); 1317 1318 return err; 1319 1320 get_process_device_data_failed: 1321 bind_process_to_device_failed: 1322 get_mem_obj_from_handle_failed: 1323 map_memory_to_gpu_failed: 1324 sync_memory_failed: 1325 mutex_unlock(&p->mutex); 1326 copy_from_user_failed: 1327 kfree(devices_arr); 1328 1329 return err; 1330 } 1331 1332 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1333 struct kfd_process *p, void *data) 1334 { 1335 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1336 struct kfd_process_device *pdd, *peer_pdd; 1337 void *mem; 1338 long err = 0; 1339 uint32_t *devices_arr = NULL, i; 1340 bool flush_tlb; 1341 1342 if (!args->n_devices) { 1343 pr_debug("Device IDs array empty\n"); 1344 return -EINVAL; 1345 } 1346 if (args->n_success > args->n_devices) { 1347 pr_debug("n_success exceeds n_devices\n"); 1348 return -EINVAL; 1349 } 1350 1351 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1352 GFP_KERNEL); 1353 if (!devices_arr) 1354 return -ENOMEM; 1355 1356 err = copy_from_user(devices_arr, 1357 (void __user *)args->device_ids_array_ptr, 1358 args->n_devices * sizeof(*devices_arr)); 1359 if (err != 0) { 1360 err = -EFAULT; 1361 goto copy_from_user_failed; 1362 } 1363 1364 mutex_lock(&p->mutex); 1365 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1366 if (!pdd) { 1367 err = -EINVAL; 1368 goto bind_process_to_device_failed; 1369 } 1370 1371 mem = kfd_process_device_translate_handle(pdd, 1372 GET_IDR_HANDLE(args->handle)); 1373 if (!mem) { 1374 err = -ENOMEM; 1375 goto get_mem_obj_from_handle_failed; 1376 } 1377 1378 for (i = args->n_success; i < args->n_devices; i++) { 1379 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1380 if (!peer_pdd) { 1381 err = -EINVAL; 1382 goto get_mem_obj_from_handle_failed; 1383 } 1384 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1385 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1386 if (err) { 1387 pr_err("Failed to unmap from gpu %d/%d\n", 1388 i, args->n_devices); 1389 goto unmap_memory_from_gpu_failed; 1390 } 1391 args->n_success = i+1; 1392 } 1393 1394 flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd); 1395 if (flush_tlb) { 1396 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1397 (struct kgd_mem *) mem, true); 1398 if (err) { 1399 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1400 goto sync_memory_failed; 1401 } 1402 } 1403 1404 /* Flush TLBs after waiting for the page table updates to complete */ 1405 for (i = 0; i < args->n_devices; i++) { 1406 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1407 if (WARN_ON_ONCE(!peer_pdd)) 1408 continue; 1409 if (flush_tlb) 1410 kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT); 1411 1412 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */ 1413 err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv); 1414 if (err) 1415 goto sync_memory_failed; 1416 } 1417 1418 mutex_unlock(&p->mutex); 1419 1420 kfree(devices_arr); 1421 1422 return 0; 1423 1424 bind_process_to_device_failed: 1425 get_mem_obj_from_handle_failed: 1426 unmap_memory_from_gpu_failed: 1427 sync_memory_failed: 1428 mutex_unlock(&p->mutex); 1429 copy_from_user_failed: 1430 kfree(devices_arr); 1431 return err; 1432 } 1433 1434 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1435 struct kfd_process *p, void *data) 1436 { 1437 int retval; 1438 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1439 struct queue *q; 1440 struct kfd_node *dev; 1441 1442 mutex_lock(&p->mutex); 1443 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1444 1445 if (q) { 1446 dev = q->device; 1447 } else { 1448 retval = -EINVAL; 1449 goto out_unlock; 1450 } 1451 1452 if (!dev->gws) { 1453 retval = -ENODEV; 1454 goto out_unlock; 1455 } 1456 1457 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1458 retval = -ENODEV; 1459 goto out_unlock; 1460 } 1461 1462 if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) || 1463 kfd_dbg_has_cwsr_workaround(dev))) { 1464 retval = -EBUSY; 1465 goto out_unlock; 1466 } 1467 1468 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1469 mutex_unlock(&p->mutex); 1470 1471 args->first_gws = 0; 1472 return retval; 1473 1474 out_unlock: 1475 mutex_unlock(&p->mutex); 1476 return retval; 1477 } 1478 1479 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1480 struct kfd_process *p, void *data) 1481 { 1482 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1483 struct kfd_node *dev = NULL; 1484 struct amdgpu_device *dmabuf_adev; 1485 void *metadata_buffer = NULL; 1486 uint32_t flags; 1487 int8_t xcp_id; 1488 unsigned int i; 1489 int r; 1490 1491 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1492 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1493 if (dev && !kfd_devcgroup_check_permission(dev)) 1494 break; 1495 if (!dev) 1496 return -EINVAL; 1497 1498 if (args->metadata_ptr) { 1499 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL); 1500 if (!metadata_buffer) 1501 return -ENOMEM; 1502 } 1503 1504 /* Get dmabuf info from KGD */ 1505 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1506 &dmabuf_adev, &args->size, 1507 metadata_buffer, args->metadata_size, 1508 &args->metadata_size, &flags, &xcp_id); 1509 if (r) 1510 goto exit; 1511 1512 if (xcp_id >= 0) 1513 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; 1514 else 1515 args->gpu_id = dev->id; 1516 args->flags = flags; 1517 1518 /* Copy metadata buffer to user mode */ 1519 if (metadata_buffer) { 1520 r = copy_to_user((void __user *)args->metadata_ptr, 1521 metadata_buffer, args->metadata_size); 1522 if (r != 0) 1523 r = -EFAULT; 1524 } 1525 1526 exit: 1527 kfree(metadata_buffer); 1528 1529 return r; 1530 } 1531 1532 static int kfd_ioctl_import_dmabuf(struct file *filep, 1533 struct kfd_process *p, void *data) 1534 { 1535 struct kfd_ioctl_import_dmabuf_args *args = data; 1536 struct kfd_process_device *pdd; 1537 int idr_handle; 1538 uint64_t size; 1539 void *mem; 1540 int r; 1541 1542 mutex_lock(&p->mutex); 1543 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1544 if (!pdd) { 1545 r = -EINVAL; 1546 goto err_unlock; 1547 } 1548 1549 pdd = kfd_bind_process_to_device(pdd->dev, p); 1550 if (IS_ERR(pdd)) { 1551 r = PTR_ERR(pdd); 1552 goto err_unlock; 1553 } 1554 1555 r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd, 1556 args->va_addr, pdd->drm_priv, 1557 (struct kgd_mem **)&mem, &size, 1558 NULL); 1559 if (r) 1560 goto err_unlock; 1561 1562 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1563 if (idr_handle < 0) { 1564 r = -EFAULT; 1565 goto err_free; 1566 } 1567 1568 mutex_unlock(&p->mutex); 1569 1570 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1571 1572 return 0; 1573 1574 err_free: 1575 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1576 pdd->drm_priv, NULL); 1577 err_unlock: 1578 mutex_unlock(&p->mutex); 1579 return r; 1580 } 1581 1582 static int kfd_ioctl_export_dmabuf(struct file *filep, 1583 struct kfd_process *p, void *data) 1584 { 1585 struct kfd_ioctl_export_dmabuf_args *args = data; 1586 struct kfd_process_device *pdd; 1587 struct dma_buf *dmabuf; 1588 struct kfd_node *dev; 1589 void *mem; 1590 int ret = 0; 1591 1592 dev = kfd_device_by_id(GET_GPU_ID(args->handle)); 1593 if (!dev) 1594 return -EINVAL; 1595 1596 mutex_lock(&p->mutex); 1597 1598 pdd = kfd_get_process_device_data(dev, p); 1599 if (!pdd) { 1600 ret = -EINVAL; 1601 goto err_unlock; 1602 } 1603 1604 mem = kfd_process_device_translate_handle(pdd, 1605 GET_IDR_HANDLE(args->handle)); 1606 if (!mem) { 1607 ret = -EINVAL; 1608 goto err_unlock; 1609 } 1610 1611 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1612 mutex_unlock(&p->mutex); 1613 if (ret) 1614 goto err_out; 1615 1616 ret = dma_buf_fd(dmabuf, args->flags); 1617 if (ret < 0) { 1618 dma_buf_put(dmabuf); 1619 goto err_out; 1620 } 1621 /* dma_buf_fd assigns the reference count to the fd, no need to 1622 * put the reference here. 1623 */ 1624 args->dmabuf_fd = ret; 1625 1626 return 0; 1627 1628 err_unlock: 1629 mutex_unlock(&p->mutex); 1630 err_out: 1631 return ret; 1632 } 1633 1634 /* Handle requests for watching SMI events */ 1635 static int kfd_ioctl_smi_events(struct file *filep, 1636 struct kfd_process *p, void *data) 1637 { 1638 struct kfd_ioctl_smi_events_args *args = data; 1639 struct kfd_process_device *pdd; 1640 1641 mutex_lock(&p->mutex); 1642 1643 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1644 mutex_unlock(&p->mutex); 1645 if (!pdd) 1646 return -EINVAL; 1647 1648 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1649 } 1650 1651 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1652 1653 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1654 struct kfd_process *p, void *data) 1655 { 1656 struct kfd_ioctl_set_xnack_mode_args *args = data; 1657 int r = 0; 1658 1659 mutex_lock(&p->mutex); 1660 if (args->xnack_enabled >= 0) { 1661 if (!list_empty(&p->pqm.queues)) { 1662 pr_debug("Process has user queues running\n"); 1663 r = -EBUSY; 1664 goto out_unlock; 1665 } 1666 1667 if (p->xnack_enabled == args->xnack_enabled) 1668 goto out_unlock; 1669 1670 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) { 1671 r = -EPERM; 1672 goto out_unlock; 1673 } 1674 1675 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled); 1676 } else { 1677 args->xnack_enabled = p->xnack_enabled; 1678 } 1679 1680 out_unlock: 1681 mutex_unlock(&p->mutex); 1682 1683 return r; 1684 } 1685 1686 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1687 { 1688 struct kfd_ioctl_svm_args *args = data; 1689 int r = 0; 1690 1691 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1692 args->start_addr, args->size, args->op, args->nattr); 1693 1694 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1695 return -EINVAL; 1696 if (!args->start_addr || !args->size) 1697 return -EINVAL; 1698 1699 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1700 args->attrs); 1701 1702 return r; 1703 } 1704 #else 1705 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1706 struct kfd_process *p, void *data) 1707 { 1708 return -EPERM; 1709 } 1710 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1711 { 1712 return -EPERM; 1713 } 1714 #endif 1715 1716 static int criu_checkpoint_process(struct kfd_process *p, 1717 uint8_t __user *user_priv_data, 1718 uint64_t *priv_offset) 1719 { 1720 struct kfd_criu_process_priv_data process_priv; 1721 int ret; 1722 1723 memset(&process_priv, 0, sizeof(process_priv)); 1724 1725 process_priv.version = KFD_CRIU_PRIV_VERSION; 1726 /* For CR, we don't consider negative xnack mode which is used for 1727 * querying without changing it, here 0 simply means disabled and 1 1728 * means enabled so retry for finding a valid PTE. 1729 */ 1730 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1731 1732 ret = copy_to_user(user_priv_data + *priv_offset, 1733 &process_priv, sizeof(process_priv)); 1734 1735 if (ret) { 1736 pr_err("Failed to copy process information to user\n"); 1737 ret = -EFAULT; 1738 } 1739 1740 *priv_offset += sizeof(process_priv); 1741 return ret; 1742 } 1743 1744 static int criu_checkpoint_devices(struct kfd_process *p, 1745 uint32_t num_devices, 1746 uint8_t __user *user_addr, 1747 uint8_t __user *user_priv_data, 1748 uint64_t *priv_offset) 1749 { 1750 struct kfd_criu_device_priv_data *device_priv = NULL; 1751 struct kfd_criu_device_bucket *device_buckets = NULL; 1752 int ret = 0, i; 1753 1754 device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL); 1755 if (!device_buckets) { 1756 ret = -ENOMEM; 1757 goto exit; 1758 } 1759 1760 device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL); 1761 if (!device_priv) { 1762 ret = -ENOMEM; 1763 goto exit; 1764 } 1765 1766 for (i = 0; i < num_devices; i++) { 1767 struct kfd_process_device *pdd = p->pdds[i]; 1768 1769 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1770 device_buckets[i].actual_gpu_id = pdd->dev->id; 1771 1772 /* 1773 * priv_data does not contain useful information for now and is reserved for 1774 * future use, so we do not set its contents. 1775 */ 1776 } 1777 1778 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1779 if (ret) { 1780 pr_err("Failed to copy device information to user\n"); 1781 ret = -EFAULT; 1782 goto exit; 1783 } 1784 1785 ret = copy_to_user(user_priv_data + *priv_offset, 1786 device_priv, 1787 num_devices * sizeof(*device_priv)); 1788 if (ret) { 1789 pr_err("Failed to copy device information to user\n"); 1790 ret = -EFAULT; 1791 } 1792 *priv_offset += num_devices * sizeof(*device_priv); 1793 1794 exit: 1795 kvfree(device_buckets); 1796 kvfree(device_priv); 1797 return ret; 1798 } 1799 1800 static uint32_t get_process_num_bos(struct kfd_process *p) 1801 { 1802 uint32_t num_of_bos = 0; 1803 int i; 1804 1805 /* Run over all PDDs of the process */ 1806 for (i = 0; i < p->n_pdds; i++) { 1807 struct kfd_process_device *pdd = p->pdds[i]; 1808 void *mem; 1809 int id; 1810 1811 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1812 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1813 1814 if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base) 1815 num_of_bos++; 1816 } 1817 } 1818 return num_of_bos; 1819 } 1820 1821 static int criu_get_prime_handle(struct kgd_mem *mem, 1822 int flags, u32 *shared_fd) 1823 { 1824 struct dma_buf *dmabuf; 1825 int ret; 1826 1827 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1828 if (ret) { 1829 pr_err("dmabuf export failed for the BO\n"); 1830 return ret; 1831 } 1832 1833 ret = dma_buf_fd(dmabuf, flags); 1834 if (ret < 0) { 1835 pr_err("dmabuf create fd failed, ret:%d\n", ret); 1836 goto out_free_dmabuf; 1837 } 1838 1839 *shared_fd = ret; 1840 return 0; 1841 1842 out_free_dmabuf: 1843 dma_buf_put(dmabuf); 1844 return ret; 1845 } 1846 1847 static int criu_checkpoint_bos(struct kfd_process *p, 1848 uint32_t num_bos, 1849 uint8_t __user *user_bos, 1850 uint8_t __user *user_priv_data, 1851 uint64_t *priv_offset) 1852 { 1853 struct kfd_criu_bo_bucket *bo_buckets; 1854 struct kfd_criu_bo_priv_data *bo_privs; 1855 int ret = 0, pdd_index, bo_index = 0, id; 1856 void *mem; 1857 1858 bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL); 1859 if (!bo_buckets) 1860 return -ENOMEM; 1861 1862 bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL); 1863 if (!bo_privs) { 1864 ret = -ENOMEM; 1865 goto exit; 1866 } 1867 1868 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 1869 struct kfd_process_device *pdd = p->pdds[pdd_index]; 1870 struct amdgpu_bo *dumper_bo; 1871 struct kgd_mem *kgd_mem; 1872 1873 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1874 struct kfd_criu_bo_bucket *bo_bucket; 1875 struct kfd_criu_bo_priv_data *bo_priv; 1876 int i, dev_idx = 0; 1877 1878 kgd_mem = (struct kgd_mem *)mem; 1879 dumper_bo = kgd_mem->bo; 1880 1881 /* Skip checkpointing BOs that are used for Trap handler 1882 * code and state. Currently, these BOs have a VA that 1883 * is less GPUVM Base 1884 */ 1885 if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base) 1886 continue; 1887 1888 bo_bucket = &bo_buckets[bo_index]; 1889 bo_priv = &bo_privs[bo_index]; 1890 1891 bo_bucket->gpu_id = pdd->user_gpu_id; 1892 bo_bucket->addr = (uint64_t)kgd_mem->va; 1893 bo_bucket->size = amdgpu_bo_size(dumper_bo); 1894 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 1895 bo_priv->idr_handle = id; 1896 1897 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 1898 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 1899 &bo_priv->user_addr); 1900 if (ret) { 1901 pr_err("Failed to obtain user address for user-pointer bo\n"); 1902 goto exit; 1903 } 1904 } 1905 if (bo_bucket->alloc_flags 1906 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 1907 ret = criu_get_prime_handle(kgd_mem, 1908 bo_bucket->alloc_flags & 1909 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 1910 &bo_bucket->dmabuf_fd); 1911 if (ret) 1912 goto exit; 1913 } else { 1914 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 1915 } 1916 1917 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 1918 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 1919 KFD_MMAP_GPU_ID(pdd->dev->id); 1920 else if (bo_bucket->alloc_flags & 1921 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1922 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 1923 KFD_MMAP_GPU_ID(pdd->dev->id); 1924 else 1925 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 1926 1927 for (i = 0; i < p->n_pdds; i++) { 1928 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem)) 1929 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 1930 } 1931 1932 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 1933 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 1934 bo_bucket->size, 1935 bo_bucket->addr, 1936 bo_bucket->offset, 1937 bo_bucket->gpu_id, 1938 bo_bucket->alloc_flags, 1939 bo_priv->idr_handle); 1940 bo_index++; 1941 } 1942 } 1943 1944 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 1945 if (ret) { 1946 pr_err("Failed to copy BO information to user\n"); 1947 ret = -EFAULT; 1948 goto exit; 1949 } 1950 1951 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 1952 if (ret) { 1953 pr_err("Failed to copy BO priv information to user\n"); 1954 ret = -EFAULT; 1955 goto exit; 1956 } 1957 1958 *priv_offset += num_bos * sizeof(*bo_privs); 1959 1960 exit: 1961 while (ret && bo_index--) { 1962 if (bo_buckets[bo_index].alloc_flags 1963 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 1964 close_fd(bo_buckets[bo_index].dmabuf_fd); 1965 } 1966 1967 kvfree(bo_buckets); 1968 kvfree(bo_privs); 1969 return ret; 1970 } 1971 1972 static int criu_get_process_object_info(struct kfd_process *p, 1973 uint32_t *num_devices, 1974 uint32_t *num_bos, 1975 uint32_t *num_objects, 1976 uint64_t *objs_priv_size) 1977 { 1978 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 1979 uint32_t num_queues, num_events, num_svm_ranges; 1980 int ret; 1981 1982 *num_devices = p->n_pdds; 1983 *num_bos = get_process_num_bos(p); 1984 1985 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 1986 if (ret) 1987 return ret; 1988 1989 num_events = kfd_get_num_events(p); 1990 1991 ret = svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 1992 if (ret) 1993 return ret; 1994 1995 *num_objects = num_queues + num_events + num_svm_ranges; 1996 1997 if (objs_priv_size) { 1998 priv_size = sizeof(struct kfd_criu_process_priv_data); 1999 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 2000 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 2001 priv_size += queues_priv_data_size; 2002 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 2003 priv_size += svm_priv_data_size; 2004 *objs_priv_size = priv_size; 2005 } 2006 return 0; 2007 } 2008 2009 static int criu_checkpoint(struct file *filep, 2010 struct kfd_process *p, 2011 struct kfd_ioctl_criu_args *args) 2012 { 2013 int ret; 2014 uint32_t num_devices, num_bos, num_objects; 2015 uint64_t priv_size, priv_offset = 0, bo_priv_offset; 2016 2017 if (!args->devices || !args->bos || !args->priv_data) 2018 return -EINVAL; 2019 2020 mutex_lock(&p->mutex); 2021 2022 if (!p->n_pdds) { 2023 pr_err("No pdd for given process\n"); 2024 ret = -ENODEV; 2025 goto exit_unlock; 2026 } 2027 2028 /* Confirm all process queues are evicted */ 2029 if (!p->queues_paused) { 2030 pr_err("Cannot dump process when queues are not in evicted state\n"); 2031 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 2032 ret = -EINVAL; 2033 goto exit_unlock; 2034 } 2035 2036 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 2037 if (ret) 2038 goto exit_unlock; 2039 2040 if (num_devices != args->num_devices || 2041 num_bos != args->num_bos || 2042 num_objects != args->num_objects || 2043 priv_size != args->priv_data_size) { 2044 2045 ret = -EINVAL; 2046 goto exit_unlock; 2047 } 2048 2049 /* each function will store private data inside priv_data and adjust priv_offset */ 2050 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 2051 if (ret) 2052 goto exit_unlock; 2053 2054 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 2055 (uint8_t __user *)args->priv_data, &priv_offset); 2056 if (ret) 2057 goto exit_unlock; 2058 2059 /* Leave room for BOs in the private data. They need to be restored 2060 * before events, but we checkpoint them last to simplify the error 2061 * handling. 2062 */ 2063 bo_priv_offset = priv_offset; 2064 priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data); 2065 2066 if (num_objects) { 2067 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 2068 &priv_offset); 2069 if (ret) 2070 goto exit_unlock; 2071 2072 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 2073 &priv_offset); 2074 if (ret) 2075 goto exit_unlock; 2076 2077 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 2078 if (ret) 2079 goto exit_unlock; 2080 } 2081 2082 /* This must be the last thing in this function that can fail. 2083 * Otherwise we leak dmabuf file descriptors. 2084 */ 2085 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 2086 (uint8_t __user *)args->priv_data, &bo_priv_offset); 2087 2088 exit_unlock: 2089 mutex_unlock(&p->mutex); 2090 if (ret) 2091 pr_err("Failed to dump CRIU ret:%d\n", ret); 2092 else 2093 pr_debug("CRIU dump ret:%d\n", ret); 2094 2095 return ret; 2096 } 2097 2098 static int criu_restore_process(struct kfd_process *p, 2099 struct kfd_ioctl_criu_args *args, 2100 uint64_t *priv_offset, 2101 uint64_t max_priv_data_size) 2102 { 2103 int ret = 0; 2104 struct kfd_criu_process_priv_data process_priv; 2105 2106 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 2107 return -EINVAL; 2108 2109 ret = copy_from_user(&process_priv, 2110 (void __user *)(args->priv_data + *priv_offset), 2111 sizeof(process_priv)); 2112 if (ret) { 2113 pr_err("Failed to copy process private information from user\n"); 2114 ret = -EFAULT; 2115 goto exit; 2116 } 2117 *priv_offset += sizeof(process_priv); 2118 2119 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 2120 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2121 process_priv.version, KFD_CRIU_PRIV_VERSION); 2122 return -EINVAL; 2123 } 2124 2125 pr_debug("Setting XNACK mode\n"); 2126 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2127 pr_err("xnack mode cannot be set\n"); 2128 ret = -EPERM; 2129 goto exit; 2130 } else { 2131 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2132 p->xnack_enabled = process_priv.xnack_mode; 2133 } 2134 2135 exit: 2136 return ret; 2137 } 2138 2139 static int criu_restore_devices(struct kfd_process *p, 2140 struct kfd_ioctl_criu_args *args, 2141 uint64_t *priv_offset, 2142 uint64_t max_priv_data_size) 2143 { 2144 struct kfd_criu_device_bucket *device_buckets; 2145 struct kfd_criu_device_priv_data *device_privs; 2146 int ret = 0; 2147 uint32_t i; 2148 2149 if (args->num_devices != p->n_pdds) 2150 return -EINVAL; 2151 2152 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2153 return -EINVAL; 2154 2155 device_buckets = kmalloc_array(args->num_devices, sizeof(*device_buckets), GFP_KERNEL); 2156 if (!device_buckets) 2157 return -ENOMEM; 2158 2159 ret = copy_from_user(device_buckets, (void __user *)args->devices, 2160 args->num_devices * sizeof(*device_buckets)); 2161 if (ret) { 2162 pr_err("Failed to copy devices buckets from user\n"); 2163 ret = -EFAULT; 2164 goto exit; 2165 } 2166 2167 for (i = 0; i < args->num_devices; i++) { 2168 struct kfd_node *dev; 2169 struct kfd_process_device *pdd; 2170 struct file *drm_file; 2171 2172 /* device private data is not currently used */ 2173 2174 if (!device_buckets[i].user_gpu_id) { 2175 pr_err("Invalid user gpu_id\n"); 2176 ret = -EINVAL; 2177 goto exit; 2178 } 2179 2180 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2181 if (!dev) { 2182 pr_err("Failed to find device with gpu_id = %x\n", 2183 device_buckets[i].actual_gpu_id); 2184 ret = -EINVAL; 2185 goto exit; 2186 } 2187 2188 pdd = kfd_get_process_device_data(dev, p); 2189 if (!pdd) { 2190 pr_err("Failed to get pdd for gpu_id = %x\n", 2191 device_buckets[i].actual_gpu_id); 2192 ret = -EINVAL; 2193 goto exit; 2194 } 2195 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2196 2197 drm_file = fget(device_buckets[i].drm_fd); 2198 if (!drm_file) { 2199 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2200 device_buckets[i].drm_fd); 2201 ret = -EINVAL; 2202 goto exit; 2203 } 2204 2205 if (pdd->drm_file) { 2206 ret = -EINVAL; 2207 goto exit; 2208 } 2209 2210 /* create the vm using render nodes for kfd pdd */ 2211 if (kfd_process_device_init_vm(pdd, drm_file)) { 2212 pr_err("could not init vm for given pdd\n"); 2213 /* On success, the PDD keeps the drm_file reference */ 2214 fput(drm_file); 2215 ret = -EINVAL; 2216 goto exit; 2217 } 2218 /* 2219 * pdd now already has the vm bound to render node so below api won't create a new 2220 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2221 * for iommu v2 binding and runtime pm. 2222 */ 2223 pdd = kfd_bind_process_to_device(dev, p); 2224 if (IS_ERR(pdd)) { 2225 ret = PTR_ERR(pdd); 2226 goto exit; 2227 } 2228 2229 if (!pdd->qpd.proc_doorbells) { 2230 ret = kfd_alloc_process_doorbells(dev->kfd, pdd); 2231 if (ret) 2232 goto exit; 2233 } 2234 } 2235 2236 /* 2237 * We are not copying device private data from user as we are not using the data for now, 2238 * but we still adjust for its private data. 2239 */ 2240 *priv_offset += args->num_devices * sizeof(*device_privs); 2241 2242 exit: 2243 kfree(device_buckets); 2244 return ret; 2245 } 2246 2247 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2248 struct kfd_criu_bo_bucket *bo_bucket, 2249 struct kfd_criu_bo_priv_data *bo_priv, 2250 struct kgd_mem **kgd_mem) 2251 { 2252 int idr_handle; 2253 int ret; 2254 const bool criu_resume = true; 2255 u64 offset; 2256 2257 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2258 if (bo_bucket->size != 2259 kfd_doorbell_process_slice(pdd->dev->kfd)) 2260 return -EINVAL; 2261 2262 offset = kfd_get_process_doorbells(pdd); 2263 if (!offset) 2264 return -ENOMEM; 2265 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2266 /* MMIO BOs need remapped bus address */ 2267 if (bo_bucket->size != PAGE_SIZE) { 2268 pr_err("Invalid page size\n"); 2269 return -EINVAL; 2270 } 2271 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2272 if (!offset || (PAGE_SIZE > 4096)) { 2273 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2274 return -ENOMEM; 2275 } 2276 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2277 offset = bo_priv->user_addr; 2278 } 2279 /* Create the BO */ 2280 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2281 bo_bucket->size, pdd->drm_priv, kgd_mem, 2282 &offset, bo_bucket->alloc_flags, criu_resume); 2283 if (ret) { 2284 pr_err("Could not create the BO\n"); 2285 return ret; 2286 } 2287 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2288 bo_bucket->size, bo_bucket->addr, offset); 2289 2290 /* Restore previous IDR handle */ 2291 pr_debug("Restoring old IDR handle for the BO"); 2292 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2293 bo_priv->idr_handle + 1, GFP_KERNEL); 2294 2295 if (idr_handle < 0) { 2296 pr_err("Could not allocate idr\n"); 2297 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2298 NULL); 2299 return -ENOMEM; 2300 } 2301 2302 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2303 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2304 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2305 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2306 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2307 bo_bucket->restored_offset = offset; 2308 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2309 bo_bucket->restored_offset = offset; 2310 /* Update the VRAM usage count */ 2311 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size); 2312 } 2313 return 0; 2314 } 2315 2316 static int criu_restore_bo(struct kfd_process *p, 2317 struct kfd_criu_bo_bucket *bo_bucket, 2318 struct kfd_criu_bo_priv_data *bo_priv) 2319 { 2320 struct kfd_process_device *pdd; 2321 struct kgd_mem *kgd_mem; 2322 int ret; 2323 int j; 2324 2325 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2326 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2327 bo_priv->idr_handle); 2328 2329 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2330 if (!pdd) { 2331 pr_err("Failed to get pdd\n"); 2332 return -ENODEV; 2333 } 2334 2335 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2336 if (ret) 2337 return ret; 2338 2339 /* now map these BOs to GPU/s */ 2340 for (j = 0; j < p->n_pdds; j++) { 2341 struct kfd_node *peer; 2342 struct kfd_process_device *peer_pdd; 2343 2344 if (!bo_priv->mapped_gpuids[j]) 2345 break; 2346 2347 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2348 if (!peer_pdd) 2349 return -EINVAL; 2350 2351 peer = peer_pdd->dev; 2352 2353 peer_pdd = kfd_bind_process_to_device(peer, p); 2354 if (IS_ERR(peer_pdd)) 2355 return PTR_ERR(peer_pdd); 2356 2357 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2358 peer_pdd->drm_priv); 2359 if (ret) { 2360 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2361 return ret; 2362 } 2363 } 2364 2365 pr_debug("map memory was successful for the BO\n"); 2366 /* create the dmabuf object and export the bo */ 2367 if (bo_bucket->alloc_flags 2368 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2369 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR, 2370 &bo_bucket->dmabuf_fd); 2371 if (ret) 2372 return ret; 2373 } else { 2374 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2375 } 2376 2377 return 0; 2378 } 2379 2380 static int criu_restore_bos(struct kfd_process *p, 2381 struct kfd_ioctl_criu_args *args, 2382 uint64_t *priv_offset, 2383 uint64_t max_priv_data_size) 2384 { 2385 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2386 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2387 int ret = 0; 2388 uint32_t i = 0; 2389 2390 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2391 return -EINVAL; 2392 2393 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2394 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2395 2396 bo_buckets = kvmalloc_array(args->num_bos, sizeof(*bo_buckets), GFP_KERNEL); 2397 if (!bo_buckets) 2398 return -ENOMEM; 2399 2400 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2401 args->num_bos * sizeof(*bo_buckets)); 2402 if (ret) { 2403 pr_err("Failed to copy BOs information from user\n"); 2404 ret = -EFAULT; 2405 goto exit; 2406 } 2407 2408 bo_privs = kvmalloc_array(args->num_bos, sizeof(*bo_privs), GFP_KERNEL); 2409 if (!bo_privs) { 2410 ret = -ENOMEM; 2411 goto exit; 2412 } 2413 2414 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2415 args->num_bos * sizeof(*bo_privs)); 2416 if (ret) { 2417 pr_err("Failed to copy BOs information from user\n"); 2418 ret = -EFAULT; 2419 goto exit; 2420 } 2421 *priv_offset += args->num_bos * sizeof(*bo_privs); 2422 2423 /* Create and map new BOs */ 2424 for (; i < args->num_bos; i++) { 2425 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i]); 2426 if (ret) { 2427 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2428 goto exit; 2429 } 2430 } /* done */ 2431 2432 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2433 ret = copy_to_user((void __user *)args->bos, 2434 bo_buckets, 2435 (args->num_bos * sizeof(*bo_buckets))); 2436 if (ret) 2437 ret = -EFAULT; 2438 2439 exit: 2440 while (ret && i--) { 2441 if (bo_buckets[i].alloc_flags 2442 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) 2443 close_fd(bo_buckets[i].dmabuf_fd); 2444 } 2445 kvfree(bo_buckets); 2446 kvfree(bo_privs); 2447 return ret; 2448 } 2449 2450 static int criu_restore_objects(struct file *filep, 2451 struct kfd_process *p, 2452 struct kfd_ioctl_criu_args *args, 2453 uint64_t *priv_offset, 2454 uint64_t max_priv_data_size) 2455 { 2456 int ret = 0; 2457 uint32_t i; 2458 2459 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2460 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2461 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2462 2463 for (i = 0; i < args->num_objects; i++) { 2464 uint32_t object_type; 2465 2466 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2467 pr_err("Invalid private data size\n"); 2468 return -EINVAL; 2469 } 2470 2471 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2472 if (ret) { 2473 pr_err("Failed to copy private information from user\n"); 2474 goto exit; 2475 } 2476 2477 switch (object_type) { 2478 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2479 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2480 priv_offset, max_priv_data_size); 2481 if (ret) 2482 goto exit; 2483 break; 2484 case KFD_CRIU_OBJECT_TYPE_EVENT: 2485 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2486 priv_offset, max_priv_data_size); 2487 if (ret) 2488 goto exit; 2489 break; 2490 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2491 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2492 priv_offset, max_priv_data_size); 2493 if (ret) 2494 goto exit; 2495 break; 2496 default: 2497 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2498 ret = -EINVAL; 2499 goto exit; 2500 } 2501 } 2502 exit: 2503 return ret; 2504 } 2505 2506 static int criu_restore(struct file *filep, 2507 struct kfd_process *p, 2508 struct kfd_ioctl_criu_args *args) 2509 { 2510 uint64_t priv_offset = 0; 2511 int ret = 0; 2512 2513 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2514 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2515 2516 if (!args->bos || !args->devices || !args->priv_data || !args->priv_data_size || 2517 !args->num_devices || !args->num_bos) 2518 return -EINVAL; 2519 2520 mutex_lock(&p->mutex); 2521 2522 /* 2523 * Set the process to evicted state to avoid running any new queues before all the memory 2524 * mappings are ready. 2525 */ 2526 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE); 2527 if (ret) 2528 goto exit_unlock; 2529 2530 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2531 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2532 if (ret) 2533 goto exit_unlock; 2534 2535 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2536 if (ret) 2537 goto exit_unlock; 2538 2539 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2540 if (ret) 2541 goto exit_unlock; 2542 2543 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2544 if (ret) 2545 goto exit_unlock; 2546 2547 if (priv_offset != args->priv_data_size) { 2548 pr_err("Invalid private data size\n"); 2549 ret = -EINVAL; 2550 } 2551 2552 exit_unlock: 2553 mutex_unlock(&p->mutex); 2554 if (ret) 2555 pr_err("Failed to restore CRIU ret:%d\n", ret); 2556 else 2557 pr_debug("CRIU restore successful\n"); 2558 2559 return ret; 2560 } 2561 2562 static int criu_unpause(struct file *filep, 2563 struct kfd_process *p, 2564 struct kfd_ioctl_criu_args *args) 2565 { 2566 int ret; 2567 2568 mutex_lock(&p->mutex); 2569 2570 if (!p->queues_paused) { 2571 mutex_unlock(&p->mutex); 2572 return -EINVAL; 2573 } 2574 2575 ret = kfd_process_restore_queues(p); 2576 if (ret) 2577 pr_err("Failed to unpause queues ret:%d\n", ret); 2578 else 2579 p->queues_paused = false; 2580 2581 mutex_unlock(&p->mutex); 2582 2583 return ret; 2584 } 2585 2586 static int criu_resume(struct file *filep, 2587 struct kfd_process *p, 2588 struct kfd_ioctl_criu_args *args) 2589 { 2590 struct kfd_process *target = NULL; 2591 struct pid *pid = NULL; 2592 int ret = 0; 2593 2594 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2595 args->pid); 2596 2597 pid = find_get_pid(args->pid); 2598 if (!pid) { 2599 pr_err("Cannot find pid info for %i\n", args->pid); 2600 return -ESRCH; 2601 } 2602 2603 pr_debug("calling kfd_lookup_process_by_pid\n"); 2604 target = kfd_lookup_process_by_pid(pid); 2605 2606 put_pid(pid); 2607 2608 if (!target) { 2609 pr_debug("Cannot find process info for %i\n", args->pid); 2610 return -ESRCH; 2611 } 2612 2613 mutex_lock(&target->mutex); 2614 ret = kfd_criu_resume_svm(target); 2615 if (ret) { 2616 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2617 goto exit; 2618 } 2619 2620 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2621 if (ret) 2622 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2623 2624 exit: 2625 mutex_unlock(&target->mutex); 2626 2627 kfd_unref_process(target); 2628 return ret; 2629 } 2630 2631 static int criu_process_info(struct file *filep, 2632 struct kfd_process *p, 2633 struct kfd_ioctl_criu_args *args) 2634 { 2635 int ret = 0; 2636 2637 mutex_lock(&p->mutex); 2638 2639 if (!p->n_pdds) { 2640 pr_err("No pdd for given process\n"); 2641 ret = -ENODEV; 2642 goto err_unlock; 2643 } 2644 2645 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT); 2646 if (ret) 2647 goto err_unlock; 2648 2649 p->queues_paused = true; 2650 2651 args->pid = task_pid_nr_ns(p->lead_thread, 2652 task_active_pid_ns(p->lead_thread)); 2653 2654 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2655 &args->num_objects, &args->priv_data_size); 2656 if (ret) 2657 goto err_unlock; 2658 2659 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2660 args->num_devices, args->num_bos, args->num_objects, 2661 args->priv_data_size); 2662 2663 err_unlock: 2664 if (ret) { 2665 kfd_process_restore_queues(p); 2666 p->queues_paused = false; 2667 } 2668 mutex_unlock(&p->mutex); 2669 return ret; 2670 } 2671 2672 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2673 { 2674 struct kfd_ioctl_criu_args *args = data; 2675 int ret; 2676 2677 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2678 switch (args->op) { 2679 case KFD_CRIU_OP_PROCESS_INFO: 2680 ret = criu_process_info(filep, p, args); 2681 break; 2682 case KFD_CRIU_OP_CHECKPOINT: 2683 ret = criu_checkpoint(filep, p, args); 2684 break; 2685 case KFD_CRIU_OP_UNPAUSE: 2686 ret = criu_unpause(filep, p, args); 2687 break; 2688 case KFD_CRIU_OP_RESTORE: 2689 ret = criu_restore(filep, p, args); 2690 break; 2691 case KFD_CRIU_OP_RESUME: 2692 ret = criu_resume(filep, p, args); 2693 break; 2694 default: 2695 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2696 ret = -EINVAL; 2697 break; 2698 } 2699 2700 if (ret) 2701 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2702 2703 return ret; 2704 } 2705 2706 static int runtime_enable(struct kfd_process *p, uint64_t r_debug, 2707 bool enable_ttmp_setup) 2708 { 2709 int i = 0, ret = 0; 2710 2711 if (p->is_runtime_retry) 2712 goto retry; 2713 2714 if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 2715 return -EBUSY; 2716 2717 for (i = 0; i < p->n_pdds; i++) { 2718 struct kfd_process_device *pdd = p->pdds[i]; 2719 2720 if (pdd->qpd.queue_count) 2721 return -EEXIST; 2722 2723 /* 2724 * Setup TTMPs by default. 2725 * Note that this call must remain here for MES ADD QUEUE to 2726 * skip_process_ctx_clear unconditionally as the first call to 2727 * SET_SHADER_DEBUGGER clears any stale process context data 2728 * saved in MES. 2729 */ 2730 if (pdd->dev->kfd->shared_resources.enable_mes) 2731 kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2732 } 2733 2734 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 2735 p->runtime_info.r_debug = r_debug; 2736 p->runtime_info.ttmp_setup = enable_ttmp_setup; 2737 2738 if (p->runtime_info.ttmp_setup) { 2739 for (i = 0; i < p->n_pdds; i++) { 2740 struct kfd_process_device *pdd = p->pdds[i]; 2741 2742 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) { 2743 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 2744 pdd->dev->kfd2kgd->enable_debug_trap( 2745 pdd->dev->adev, 2746 true, 2747 pdd->dev->vm_info.last_vmid_kfd); 2748 } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2749 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 2750 pdd->dev->adev, 2751 false, 2752 0); 2753 } 2754 } 2755 } 2756 2757 retry: 2758 if (p->debug_trap_enabled) { 2759 if (!p->is_runtime_retry) { 2760 kfd_dbg_trap_activate(p); 2761 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2762 p, NULL, 0, false, NULL, 0); 2763 } 2764 2765 mutex_unlock(&p->mutex); 2766 ret = down_interruptible(&p->runtime_enable_sema); 2767 mutex_lock(&p->mutex); 2768 2769 p->is_runtime_retry = !!ret; 2770 } 2771 2772 return ret; 2773 } 2774 2775 static int runtime_disable(struct kfd_process *p) 2776 { 2777 int i = 0, ret; 2778 bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED; 2779 2780 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED; 2781 p->runtime_info.r_debug = 0; 2782 2783 if (p->debug_trap_enabled) { 2784 if (was_enabled) 2785 kfd_dbg_trap_deactivate(p, false, 0); 2786 2787 if (!p->is_runtime_retry) 2788 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2789 p, NULL, 0, false, NULL, 0); 2790 2791 mutex_unlock(&p->mutex); 2792 ret = down_interruptible(&p->runtime_enable_sema); 2793 mutex_lock(&p->mutex); 2794 2795 p->is_runtime_retry = !!ret; 2796 if (ret) 2797 return ret; 2798 } 2799 2800 if (was_enabled && p->runtime_info.ttmp_setup) { 2801 for (i = 0; i < p->n_pdds; i++) { 2802 struct kfd_process_device *pdd = p->pdds[i]; 2803 2804 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) 2805 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 2806 } 2807 } 2808 2809 p->runtime_info.ttmp_setup = false; 2810 2811 /* disable ttmp setup */ 2812 for (i = 0; i < p->n_pdds; i++) { 2813 struct kfd_process_device *pdd = p->pdds[i]; 2814 2815 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2816 pdd->spi_dbg_override = 2817 pdd->dev->kfd2kgd->disable_debug_trap( 2818 pdd->dev->adev, 2819 false, 2820 pdd->dev->vm_info.last_vmid_kfd); 2821 2822 if (!pdd->dev->kfd->shared_resources.enable_mes) 2823 debug_refresh_runlist(pdd->dev->dqm); 2824 else 2825 kfd_dbg_set_mes_debug_mode(pdd, 2826 !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2827 } 2828 } 2829 2830 return 0; 2831 } 2832 2833 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data) 2834 { 2835 struct kfd_ioctl_runtime_enable_args *args = data; 2836 int r; 2837 2838 mutex_lock(&p->mutex); 2839 2840 if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK) 2841 r = runtime_enable(p, args->r_debug, 2842 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK)); 2843 else 2844 r = runtime_disable(p); 2845 2846 mutex_unlock(&p->mutex); 2847 2848 return r; 2849 } 2850 2851 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data) 2852 { 2853 struct kfd_ioctl_dbg_trap_args *args = data; 2854 struct task_struct *thread = NULL; 2855 struct mm_struct *mm = NULL; 2856 struct pid *pid = NULL; 2857 struct kfd_process *target = NULL; 2858 struct kfd_process_device *pdd = NULL; 2859 int r = 0; 2860 2861 if (sched_policy == KFD_SCHED_POLICY_NO_HWS) { 2862 pr_err("Debugging does not support sched_policy %i", sched_policy); 2863 return -EINVAL; 2864 } 2865 2866 pid = find_get_pid(args->pid); 2867 if (!pid) { 2868 pr_debug("Cannot find pid info for %i\n", args->pid); 2869 r = -ESRCH; 2870 goto out; 2871 } 2872 2873 thread = get_pid_task(pid, PIDTYPE_PID); 2874 if (!thread) { 2875 r = -ESRCH; 2876 goto out; 2877 } 2878 2879 mm = get_task_mm(thread); 2880 if (!mm) { 2881 r = -ESRCH; 2882 goto out; 2883 } 2884 2885 if (args->op == KFD_IOC_DBG_TRAP_ENABLE) { 2886 bool create_process; 2887 2888 rcu_read_lock(); 2889 create_process = thread && thread != current && ptrace_parent(thread) == current; 2890 rcu_read_unlock(); 2891 2892 target = create_process ? kfd_create_process(thread) : 2893 kfd_lookup_process_by_pid(pid); 2894 } else { 2895 target = kfd_lookup_process_by_pid(pid); 2896 } 2897 2898 if (IS_ERR_OR_NULL(target)) { 2899 pr_debug("Cannot find process PID %i to debug\n", args->pid); 2900 r = target ? PTR_ERR(target) : -ESRCH; 2901 target = NULL; 2902 goto out; 2903 } 2904 2905 /* Check if target is still PTRACED. */ 2906 rcu_read_lock(); 2907 if (target != p && args->op != KFD_IOC_DBG_TRAP_DISABLE 2908 && ptrace_parent(target->lead_thread) != current) { 2909 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid); 2910 r = -EPERM; 2911 } 2912 rcu_read_unlock(); 2913 2914 if (r) 2915 goto out; 2916 2917 mutex_lock(&target->mutex); 2918 2919 if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) { 2920 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op); 2921 r = -EINVAL; 2922 goto unlock_out; 2923 } 2924 2925 if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED && 2926 (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE || 2927 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE || 2928 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES || 2929 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES || 2930 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 2931 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH || 2932 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) { 2933 r = -EPERM; 2934 goto unlock_out; 2935 } 2936 2937 if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 2938 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) { 2939 int user_gpu_id = kfd_process_get_user_gpu_id(target, 2940 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ? 2941 args->set_node_address_watch.gpu_id : 2942 args->clear_node_address_watch.gpu_id); 2943 2944 pdd = kfd_process_device_data_by_id(target, user_gpu_id); 2945 if (user_gpu_id == -EINVAL || !pdd) { 2946 r = -ENODEV; 2947 goto unlock_out; 2948 } 2949 } 2950 2951 switch (args->op) { 2952 case KFD_IOC_DBG_TRAP_ENABLE: 2953 if (target != p) 2954 target->debugger_process = p; 2955 2956 r = kfd_dbg_trap_enable(target, 2957 args->enable.dbg_fd, 2958 (void __user *)args->enable.rinfo_ptr, 2959 &args->enable.rinfo_size); 2960 if (!r) 2961 target->exception_enable_mask = args->enable.exception_mask; 2962 2963 break; 2964 case KFD_IOC_DBG_TRAP_DISABLE: 2965 r = kfd_dbg_trap_disable(target); 2966 break; 2967 case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT: 2968 r = kfd_dbg_send_exception_to_runtime(target, 2969 args->send_runtime_event.gpu_id, 2970 args->send_runtime_event.queue_id, 2971 args->send_runtime_event.exception_mask); 2972 break; 2973 case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED: 2974 kfd_dbg_set_enabled_debug_exception_mask(target, 2975 args->set_exceptions_enabled.exception_mask); 2976 break; 2977 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: 2978 r = kfd_dbg_trap_set_wave_launch_override(target, 2979 args->launch_override.override_mode, 2980 args->launch_override.enable_mask, 2981 args->launch_override.support_request_mask, 2982 &args->launch_override.enable_mask, 2983 &args->launch_override.support_request_mask); 2984 break; 2985 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: 2986 r = kfd_dbg_trap_set_wave_launch_mode(target, 2987 args->launch_mode.launch_mode); 2988 break; 2989 case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES: 2990 r = suspend_queues(target, 2991 args->suspend_queues.num_queues, 2992 args->suspend_queues.grace_period, 2993 args->suspend_queues.exception_mask, 2994 (uint32_t *)args->suspend_queues.queue_array_ptr); 2995 2996 break; 2997 case KFD_IOC_DBG_TRAP_RESUME_QUEUES: 2998 r = resume_queues(target, args->resume_queues.num_queues, 2999 (uint32_t *)args->resume_queues.queue_array_ptr); 3000 break; 3001 case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH: 3002 r = kfd_dbg_trap_set_dev_address_watch(pdd, 3003 args->set_node_address_watch.address, 3004 args->set_node_address_watch.mask, 3005 &args->set_node_address_watch.id, 3006 args->set_node_address_watch.mode); 3007 break; 3008 case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH: 3009 r = kfd_dbg_trap_clear_dev_address_watch(pdd, 3010 args->clear_node_address_watch.id); 3011 break; 3012 case KFD_IOC_DBG_TRAP_SET_FLAGS: 3013 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags); 3014 break; 3015 case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT: 3016 r = kfd_dbg_ev_query_debug_event(target, 3017 &args->query_debug_event.queue_id, 3018 &args->query_debug_event.gpu_id, 3019 args->query_debug_event.exception_mask, 3020 &args->query_debug_event.exception_mask); 3021 break; 3022 case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO: 3023 r = kfd_dbg_trap_query_exception_info(target, 3024 args->query_exception_info.source_id, 3025 args->query_exception_info.exception_code, 3026 args->query_exception_info.clear_exception, 3027 (void __user *)args->query_exception_info.info_ptr, 3028 &args->query_exception_info.info_size); 3029 break; 3030 case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT: 3031 r = pqm_get_queue_snapshot(&target->pqm, 3032 args->queue_snapshot.exception_mask, 3033 (void __user *)args->queue_snapshot.snapshot_buf_ptr, 3034 &args->queue_snapshot.num_queues, 3035 &args->queue_snapshot.entry_size); 3036 break; 3037 case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT: 3038 r = kfd_dbg_trap_device_snapshot(target, 3039 args->device_snapshot.exception_mask, 3040 (void __user *)args->device_snapshot.snapshot_buf_ptr, 3041 &args->device_snapshot.num_devices, 3042 &args->device_snapshot.entry_size); 3043 break; 3044 default: 3045 pr_err("Invalid option: %i\n", args->op); 3046 r = -EINVAL; 3047 } 3048 3049 unlock_out: 3050 mutex_unlock(&target->mutex); 3051 3052 out: 3053 if (thread) 3054 put_task_struct(thread); 3055 3056 if (mm) 3057 mmput(mm); 3058 3059 if (pid) 3060 put_pid(pid); 3061 3062 if (target) 3063 kfd_unref_process(target); 3064 3065 return r; 3066 } 3067 3068 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 3069 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3070 .cmd_drv = 0, .name = #ioctl} 3071 3072 /** Ioctl table */ 3073 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 3074 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 3075 kfd_ioctl_get_version, 0), 3076 3077 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 3078 kfd_ioctl_create_queue, 0), 3079 3080 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 3081 kfd_ioctl_destroy_queue, 0), 3082 3083 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 3084 kfd_ioctl_set_memory_policy, 0), 3085 3086 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 3087 kfd_ioctl_get_clock_counters, 0), 3088 3089 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 3090 kfd_ioctl_get_process_apertures, 0), 3091 3092 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 3093 kfd_ioctl_update_queue, 0), 3094 3095 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 3096 kfd_ioctl_create_event, 0), 3097 3098 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 3099 kfd_ioctl_destroy_event, 0), 3100 3101 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 3102 kfd_ioctl_set_event, 0), 3103 3104 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 3105 kfd_ioctl_reset_event, 0), 3106 3107 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 3108 kfd_ioctl_wait_events, 0), 3109 3110 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 3111 kfd_ioctl_dbg_register, 0), 3112 3113 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 3114 kfd_ioctl_dbg_unregister, 0), 3115 3116 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 3117 kfd_ioctl_dbg_address_watch, 0), 3118 3119 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 3120 kfd_ioctl_dbg_wave_control, 0), 3121 3122 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 3123 kfd_ioctl_set_scratch_backing_va, 0), 3124 3125 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 3126 kfd_ioctl_get_tile_config, 0), 3127 3128 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 3129 kfd_ioctl_set_trap_handler, 0), 3130 3131 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 3132 kfd_ioctl_get_process_apertures_new, 0), 3133 3134 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 3135 kfd_ioctl_acquire_vm, 0), 3136 3137 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 3138 kfd_ioctl_alloc_memory_of_gpu, 0), 3139 3140 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 3141 kfd_ioctl_free_memory_of_gpu, 0), 3142 3143 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 3144 kfd_ioctl_map_memory_to_gpu, 0), 3145 3146 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 3147 kfd_ioctl_unmap_memory_from_gpu, 0), 3148 3149 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 3150 kfd_ioctl_set_cu_mask, 0), 3151 3152 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 3153 kfd_ioctl_get_queue_wave_state, 0), 3154 3155 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 3156 kfd_ioctl_get_dmabuf_info, 0), 3157 3158 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 3159 kfd_ioctl_import_dmabuf, 0), 3160 3161 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 3162 kfd_ioctl_alloc_queue_gws, 0), 3163 3164 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 3165 kfd_ioctl_smi_events, 0), 3166 3167 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SVM, kfd_ioctl_svm, 0), 3168 3169 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 3170 kfd_ioctl_set_xnack_mode, 0), 3171 3172 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 3173 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 3174 3175 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 3176 kfd_ioctl_get_available_memory, 0), 3177 3178 AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF, 3179 kfd_ioctl_export_dmabuf, 0), 3180 3181 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE, 3182 kfd_ioctl_runtime_enable, 0), 3183 3184 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP, 3185 kfd_ioctl_set_debug_trap, 0), 3186 }; 3187 3188 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 3189 3190 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 3191 { 3192 struct kfd_process *process; 3193 amdkfd_ioctl_t *func; 3194 const struct amdkfd_ioctl_desc *ioctl = NULL; 3195 unsigned int nr = _IOC_NR(cmd); 3196 char stack_kdata[128]; 3197 char *kdata = NULL; 3198 unsigned int usize, asize; 3199 int retcode = -EINVAL; 3200 bool ptrace_attached = false; 3201 3202 if (nr >= AMDKFD_CORE_IOCTL_COUNT) 3203 goto err_i1; 3204 3205 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 3206 u32 amdkfd_size; 3207 3208 ioctl = &amdkfd_ioctls[nr]; 3209 3210 amdkfd_size = _IOC_SIZE(ioctl->cmd); 3211 usize = asize = _IOC_SIZE(cmd); 3212 if (amdkfd_size > asize) 3213 asize = amdkfd_size; 3214 3215 cmd = ioctl->cmd; 3216 } else 3217 goto err_i1; 3218 3219 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 3220 3221 /* Get the process struct from the filep. Only the process 3222 * that opened /dev/kfd can use the file descriptor. Child 3223 * processes need to create their own KFD device context. 3224 */ 3225 process = filep->private_data; 3226 3227 rcu_read_lock(); 3228 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 3229 ptrace_parent(process->lead_thread) == current) 3230 ptrace_attached = true; 3231 rcu_read_unlock(); 3232 3233 if (process->lead_thread != current->group_leader 3234 && !ptrace_attached) { 3235 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 3236 retcode = -EBADF; 3237 goto err_i1; 3238 } 3239 3240 /* Do not trust userspace, use our own definition */ 3241 func = ioctl->func; 3242 3243 if (unlikely(!func)) { 3244 dev_dbg(kfd_device, "no function\n"); 3245 retcode = -EINVAL; 3246 goto err_i1; 3247 } 3248 3249 /* 3250 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 3251 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 3252 * more priviledged access. 3253 */ 3254 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 3255 if (!capable(CAP_CHECKPOINT_RESTORE) && 3256 !capable(CAP_SYS_ADMIN)) { 3257 retcode = -EACCES; 3258 goto err_i1; 3259 } 3260 } 3261 3262 if (cmd & (IOC_IN | IOC_OUT)) { 3263 if (asize <= sizeof(stack_kdata)) { 3264 kdata = stack_kdata; 3265 } else { 3266 kdata = kmalloc(asize, GFP_KERNEL); 3267 if (!kdata) { 3268 retcode = -ENOMEM; 3269 goto err_i1; 3270 } 3271 } 3272 if (asize > usize) 3273 memset(kdata + usize, 0, asize - usize); 3274 } 3275 3276 if (cmd & IOC_IN) { 3277 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 3278 retcode = -EFAULT; 3279 goto err_i1; 3280 } 3281 } else if (cmd & IOC_OUT) { 3282 memset(kdata, 0, usize); 3283 } 3284 3285 retcode = func(filep, process, kdata); 3286 3287 if (cmd & IOC_OUT) 3288 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 3289 retcode = -EFAULT; 3290 3291 err_i1: 3292 if (!ioctl) 3293 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 3294 task_pid_nr(current), cmd, nr); 3295 3296 if (kdata != stack_kdata) 3297 kfree(kdata); 3298 3299 if (retcode) 3300 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 3301 nr, arg, retcode); 3302 3303 return retcode; 3304 } 3305 3306 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, 3307 struct vm_area_struct *vma) 3308 { 3309 phys_addr_t address; 3310 3311 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 3312 return -EINVAL; 3313 3314 if (PAGE_SIZE > 4096) 3315 return -EINVAL; 3316 3317 address = dev->adev->rmmio_remap.bus_addr; 3318 3319 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 3320 VM_DONTDUMP | VM_PFNMAP); 3321 3322 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 3323 3324 pr_debug("pasid 0x%x mapping mmio page\n" 3325 " target user address == 0x%08llX\n" 3326 " physical address == 0x%08llX\n" 3327 " vm_flags == 0x%04lX\n" 3328 " size == 0x%04lX\n", 3329 process->pasid, (unsigned long long) vma->vm_start, 3330 address, vma->vm_flags, PAGE_SIZE); 3331 3332 return io_remap_pfn_range(vma, 3333 vma->vm_start, 3334 address >> PAGE_SHIFT, 3335 PAGE_SIZE, 3336 vma->vm_page_prot); 3337 } 3338 3339 3340 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma) 3341 { 3342 struct kfd_process *process; 3343 struct kfd_node *dev = NULL; 3344 unsigned long mmap_offset; 3345 unsigned int gpu_id; 3346 3347 process = kfd_get_process(current); 3348 if (IS_ERR(process)) 3349 return PTR_ERR(process); 3350 3351 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 3352 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 3353 if (gpu_id) 3354 dev = kfd_device_by_id(gpu_id); 3355 3356 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 3357 case KFD_MMAP_TYPE_DOORBELL: 3358 if (!dev) 3359 return -ENODEV; 3360 return kfd_doorbell_mmap(dev, process, vma); 3361 3362 case KFD_MMAP_TYPE_EVENTS: 3363 return kfd_event_mmap(process, vma); 3364 3365 case KFD_MMAP_TYPE_RESERVED_MEM: 3366 if (!dev) 3367 return -ENODEV; 3368 return kfd_reserved_mem_mmap(dev, process, vma); 3369 case KFD_MMAP_TYPE_MMIO: 3370 if (!dev) 3371 return -ENODEV; 3372 return kfd_mmio_mmap(dev, process, vma); 3373 } 3374 3375 return -EFAULT; 3376 } 3377