1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/device.h> 25 #include <linux/err.h> 26 #include <linux/fs.h> 27 #include <linux/file.h> 28 #include <linux/sched.h> 29 #include <linux/slab.h> 30 #include <linux/uaccess.h> 31 #include <linux/compat.h> 32 #include <uapi/linux/kfd_ioctl.h> 33 #include <linux/time.h> 34 #include <linux/mm.h> 35 #include <linux/mman.h> 36 #include <linux/ptrace.h> 37 #include <linux/dma-buf.h> 38 #include <linux/processor.h> 39 #include "kfd_priv.h" 40 #include "kfd_device_queue_manager.h" 41 #include "kfd_svm.h" 42 #include "amdgpu_amdkfd.h" 43 #include "kfd_smi_events.h" 44 #include "amdgpu_dma_buf.h" 45 #include "kfd_debug.h" 46 47 static long kfd_ioctl(struct file *, unsigned int, unsigned long); 48 static int kfd_open(struct inode *, struct file *); 49 static int kfd_release(struct inode *, struct file *); 50 static int kfd_mmap(struct file *, struct vm_area_struct *); 51 52 static const char kfd_dev_name[] = "kfd"; 53 54 static const struct file_operations kfd_fops = { 55 .owner = THIS_MODULE, 56 .unlocked_ioctl = kfd_ioctl, 57 .compat_ioctl = compat_ptr_ioctl, 58 .open = kfd_open, 59 .release = kfd_release, 60 .mmap = kfd_mmap, 61 }; 62 63 static int kfd_char_dev_major = -1; 64 struct device *kfd_device; 65 static const struct class kfd_class = { 66 .name = kfd_dev_name, 67 }; 68 69 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id) 70 { 71 struct kfd_process_device *pdd; 72 73 mutex_lock(&p->mutex); 74 pdd = kfd_process_device_data_by_id(p, gpu_id); 75 76 if (pdd) 77 return pdd; 78 79 mutex_unlock(&p->mutex); 80 return NULL; 81 } 82 83 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd) 84 { 85 mutex_unlock(&pdd->process->mutex); 86 } 87 88 int kfd_chardev_init(void) 89 { 90 int err = 0; 91 92 kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops); 93 err = kfd_char_dev_major; 94 if (err < 0) 95 goto err_register_chrdev; 96 97 err = class_register(&kfd_class); 98 if (err) 99 goto err_class_create; 100 101 kfd_device = device_create(&kfd_class, NULL, 102 MKDEV(kfd_char_dev_major, 0), 103 NULL, kfd_dev_name); 104 err = PTR_ERR(kfd_device); 105 if (IS_ERR(kfd_device)) 106 goto err_device_create; 107 108 return 0; 109 110 err_device_create: 111 class_unregister(&kfd_class); 112 err_class_create: 113 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 114 err_register_chrdev: 115 return err; 116 } 117 118 void kfd_chardev_exit(void) 119 { 120 device_destroy(&kfd_class, MKDEV(kfd_char_dev_major, 0)); 121 class_unregister(&kfd_class); 122 unregister_chrdev(kfd_char_dev_major, kfd_dev_name); 123 kfd_device = NULL; 124 } 125 126 127 static int kfd_open(struct inode *inode, struct file *filep) 128 { 129 struct kfd_process *process; 130 bool is_32bit_user_mode; 131 132 if (iminor(inode) != 0) 133 return -ENODEV; 134 135 is_32bit_user_mode = in_compat_syscall(); 136 137 if (is_32bit_user_mode) { 138 dev_warn(kfd_device, 139 "Process %d (32-bit) failed to open /dev/kfd\n" 140 "32-bit processes are not supported by amdkfd\n", 141 current->pid); 142 return -EPERM; 143 } 144 145 process = kfd_create_process(current); 146 if (IS_ERR(process)) 147 return PTR_ERR(process); 148 149 if (kfd_process_init_cwsr_apu(process, filep)) { 150 kfd_unref_process(process); 151 return -EFAULT; 152 } 153 154 /* filep now owns the reference returned by kfd_create_process */ 155 filep->private_data = process; 156 157 dev_dbg(kfd_device, "process pid %d opened kfd node, compat mode (32 bit) - %d\n", 158 process->lead_thread->pid, process->is_32bit_user_mode); 159 160 return 0; 161 } 162 163 static int kfd_release(struct inode *inode, struct file *filep) 164 { 165 struct kfd_process *process = filep->private_data; 166 167 if (process) 168 kfd_unref_process(process); 169 170 return 0; 171 } 172 173 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, 174 void *data) 175 { 176 struct kfd_ioctl_get_version_args *args = data; 177 178 args->major_version = KFD_IOCTL_MAJOR_VERSION; 179 args->minor_version = KFD_IOCTL_MINOR_VERSION; 180 181 return 0; 182 } 183 184 static int set_queue_properties_from_user(struct queue_properties *q_properties, 185 struct kfd_ioctl_create_queue_args *args) 186 { 187 /* 188 * Repurpose queue percentage to accommodate new features: 189 * bit 0-7: queue percentage 190 * bit 8-15: pm4_target_xcc 191 */ 192 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 193 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 194 return -EINVAL; 195 } 196 197 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 198 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 199 return -EINVAL; 200 } 201 202 if ((args->ring_base_address) && 203 (!access_ok((const void __user *) args->ring_base_address, 204 sizeof(uint64_t)))) { 205 pr_err("Can't access ring base address\n"); 206 return -EFAULT; 207 } 208 209 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 210 pr_err("Ring size must be a power of 2 or 0\n"); 211 return -EINVAL; 212 } 213 214 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 215 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 216 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 217 } 218 219 if (!access_ok((const void __user *) args->read_pointer_address, 220 sizeof(uint32_t))) { 221 pr_err("Can't access read pointer\n"); 222 return -EFAULT; 223 } 224 225 if (!access_ok((const void __user *) args->write_pointer_address, 226 sizeof(uint32_t))) { 227 pr_err("Can't access write pointer\n"); 228 return -EFAULT; 229 } 230 231 if (args->eop_buffer_address && 232 !access_ok((const void __user *) args->eop_buffer_address, 233 sizeof(uint32_t))) { 234 pr_debug("Can't access eop buffer"); 235 return -EFAULT; 236 } 237 238 if (args->ctx_save_restore_address && 239 !access_ok((const void __user *) args->ctx_save_restore_address, 240 sizeof(uint32_t))) { 241 pr_debug("Can't access ctx save restore buffer"); 242 return -EFAULT; 243 } 244 245 q_properties->is_interop = false; 246 q_properties->is_gws = false; 247 q_properties->queue_percent = args->queue_percentage & 0xFF; 248 /* bit 8-15 are repurposed to be PM4 target XCC */ 249 q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 250 q_properties->priority = args->queue_priority; 251 q_properties->queue_address = args->ring_base_address; 252 q_properties->queue_size = args->ring_size; 253 q_properties->read_ptr = (void __user *)args->read_pointer_address; 254 q_properties->write_ptr = (void __user *)args->write_pointer_address; 255 q_properties->eop_ring_buffer_address = args->eop_buffer_address; 256 q_properties->eop_ring_buffer_size = args->eop_buffer_size; 257 q_properties->ctx_save_restore_area_address = 258 args->ctx_save_restore_address; 259 q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size; 260 q_properties->ctl_stack_size = args->ctl_stack_size; 261 q_properties->sdma_engine_id = args->sdma_engine_id; 262 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || 263 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 264 q_properties->type = KFD_QUEUE_TYPE_COMPUTE; 265 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) 266 q_properties->type = KFD_QUEUE_TYPE_SDMA; 267 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI) 268 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI; 269 else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID) 270 q_properties->type = KFD_QUEUE_TYPE_SDMA_BY_ENG_ID; 271 else 272 return -ENOTSUPP; 273 274 if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) 275 q_properties->format = KFD_QUEUE_FORMAT_AQL; 276 else 277 q_properties->format = KFD_QUEUE_FORMAT_PM4; 278 279 pr_debug("Queue Percentage: %d, %d\n", 280 q_properties->queue_percent, args->queue_percentage); 281 282 pr_debug("Queue Priority: %d, %d\n", 283 q_properties->priority, args->queue_priority); 284 285 pr_debug("Queue Address: 0x%llX, 0x%llX\n", 286 q_properties->queue_address, args->ring_base_address); 287 288 pr_debug("Queue Size: 0x%llX, %u\n", 289 q_properties->queue_size, args->ring_size); 290 291 pr_debug("Queue r/w Pointers: %px, %px\n", 292 q_properties->read_ptr, 293 q_properties->write_ptr); 294 295 pr_debug("Queue Format: %d\n", q_properties->format); 296 297 pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address); 298 299 pr_debug("Queue CTX save area: 0x%llX\n", 300 q_properties->ctx_save_restore_area_address); 301 302 return 0; 303 } 304 305 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, 306 void *data) 307 { 308 struct kfd_ioctl_create_queue_args *args = data; 309 struct kfd_node *dev; 310 int err = 0; 311 unsigned int queue_id; 312 struct kfd_process_device *pdd; 313 struct queue_properties q_properties; 314 uint32_t doorbell_offset_in_process = 0; 315 316 memset(&q_properties, 0, sizeof(struct queue_properties)); 317 318 pr_debug("Creating queue ioctl\n"); 319 320 err = set_queue_properties_from_user(&q_properties, args); 321 if (err) 322 return err; 323 324 pr_debug("Looking for gpu id 0x%x\n", args->gpu_id); 325 326 mutex_lock(&p->mutex); 327 328 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 329 if (!pdd) { 330 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 331 err = -EINVAL; 332 goto err_pdd; 333 } 334 dev = pdd->dev; 335 336 pdd = kfd_bind_process_to_device(dev, p); 337 if (IS_ERR(pdd)) { 338 err = -ESRCH; 339 goto err_bind_process; 340 } 341 342 if (q_properties.type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) { 343 int max_sdma_eng_id = kfd_get_num_sdma_engines(dev) + 344 kfd_get_num_xgmi_sdma_engines(dev) - 1; 345 346 if (q_properties.sdma_engine_id > max_sdma_eng_id) { 347 err = -EINVAL; 348 pr_err("sdma_engine_id %i exceeds maximum id of %i\n", 349 q_properties.sdma_engine_id, max_sdma_eng_id); 350 goto err_sdma_engine_id; 351 } 352 } 353 354 if (!pdd->qpd.proc_doorbells) { 355 err = kfd_alloc_process_doorbells(dev->kfd, pdd); 356 if (err) { 357 pr_debug("failed to allocate process doorbells\n"); 358 goto err_bind_process; 359 } 360 } 361 362 err = kfd_queue_acquire_buffers(pdd, &q_properties); 363 if (err) { 364 pr_debug("failed to acquire user queue buffers\n"); 365 goto err_acquire_queue_buf; 366 } 367 368 pr_debug("Creating queue for process pid %d on gpu 0x%x\n", 369 p->lead_thread->pid, 370 dev->id); 371 372 err = pqm_create_queue(&p->pqm, dev, &q_properties, &queue_id, 373 NULL, NULL, NULL, &doorbell_offset_in_process); 374 if (err != 0) 375 goto err_create_queue; 376 377 args->queue_id = queue_id; 378 379 380 /* Return gpu_id as doorbell offset for mmap usage */ 381 args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL; 382 args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id); 383 if (KFD_IS_SOC15(dev)) 384 /* On SOC15 ASICs, include the doorbell offset within the 385 * process doorbell frame, which is 2 pages. 386 */ 387 args->doorbell_offset |= doorbell_offset_in_process; 388 389 mutex_unlock(&p->mutex); 390 391 pr_debug("Queue id %d was created successfully\n", args->queue_id); 392 393 pr_debug("Ring buffer address == 0x%016llX\n", 394 args->ring_base_address); 395 396 pr_debug("Read ptr address == 0x%016llX\n", 397 args->read_pointer_address); 398 399 pr_debug("Write ptr address == 0x%016llX\n", 400 args->write_pointer_address); 401 402 kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0); 403 return 0; 404 405 err_create_queue: 406 kfd_queue_unref_bo_vas(pdd, &q_properties); 407 kfd_queue_release_buffers(pdd, &q_properties); 408 err_acquire_queue_buf: 409 err_sdma_engine_id: 410 err_bind_process: 411 err_pdd: 412 mutex_unlock(&p->mutex); 413 return err; 414 } 415 416 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p, 417 void *data) 418 { 419 int retval; 420 struct kfd_ioctl_destroy_queue_args *args = data; 421 422 pr_debug("Destroying queue id %d for process pid %d\n", 423 args->queue_id, 424 p->lead_thread->pid); 425 426 mutex_lock(&p->mutex); 427 428 retval = pqm_destroy_queue(&p->pqm, args->queue_id); 429 430 mutex_unlock(&p->mutex); 431 return retval; 432 } 433 434 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p, 435 void *data) 436 { 437 int retval; 438 struct kfd_ioctl_update_queue_args *args = data; 439 struct queue_properties properties; 440 441 /* 442 * Repurpose queue percentage to accommodate new features: 443 * bit 0-7: queue percentage 444 * bit 8-15: pm4_target_xcc 445 */ 446 if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) { 447 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); 448 return -EINVAL; 449 } 450 451 if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) { 452 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n"); 453 return -EINVAL; 454 } 455 456 if ((args->ring_base_address) && 457 (!access_ok((const void __user *) args->ring_base_address, 458 sizeof(uint64_t)))) { 459 pr_err("Can't access ring base address\n"); 460 return -EFAULT; 461 } 462 463 if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) { 464 pr_err("Ring size must be a power of 2 or 0\n"); 465 return -EINVAL; 466 } 467 468 if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) { 469 args->ring_size = KFD_MIN_QUEUE_RING_SIZE; 470 pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE"); 471 } 472 473 properties.queue_address = args->ring_base_address; 474 properties.queue_size = args->ring_size; 475 properties.queue_percent = args->queue_percentage & 0xFF; 476 /* bit 8-15 are repurposed to be PM4 target XCC */ 477 properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF; 478 properties.priority = args->queue_priority; 479 480 pr_debug("Updating queue id %d for process pid %d\n", 481 args->queue_id, p->lead_thread->pid); 482 483 mutex_lock(&p->mutex); 484 485 retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties); 486 487 mutex_unlock(&p->mutex); 488 489 return retval; 490 } 491 492 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p, 493 void *data) 494 { 495 int retval; 496 const int max_num_cus = 1024; 497 struct kfd_ioctl_set_cu_mask_args *args = data; 498 struct mqd_update_info minfo = {0}; 499 uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr; 500 size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32); 501 502 if ((args->num_cu_mask % 32) != 0) { 503 pr_debug("num_cu_mask 0x%x must be a multiple of 32", 504 args->num_cu_mask); 505 return -EINVAL; 506 } 507 508 minfo.cu_mask.count = args->num_cu_mask; 509 if (minfo.cu_mask.count == 0) { 510 pr_debug("CU mask cannot be 0"); 511 return -EINVAL; 512 } 513 514 /* To prevent an unreasonably large CU mask size, set an arbitrary 515 * limit of max_num_cus bits. We can then just drop any CU mask bits 516 * past max_num_cus bits and just use the first max_num_cus bits. 517 */ 518 if (minfo.cu_mask.count > max_num_cus) { 519 pr_debug("CU mask cannot be greater than 1024 bits"); 520 minfo.cu_mask.count = max_num_cus; 521 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32); 522 } 523 524 minfo.cu_mask.ptr = kzalloc(cu_mask_size, GFP_KERNEL); 525 if (!minfo.cu_mask.ptr) 526 return -ENOMEM; 527 528 retval = copy_from_user(minfo.cu_mask.ptr, cu_mask_ptr, cu_mask_size); 529 if (retval) { 530 pr_debug("Could not copy CU mask from userspace"); 531 retval = -EFAULT; 532 goto out; 533 } 534 535 mutex_lock(&p->mutex); 536 537 retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo); 538 539 mutex_unlock(&p->mutex); 540 541 out: 542 kfree(minfo.cu_mask.ptr); 543 return retval; 544 } 545 546 static int kfd_ioctl_get_queue_wave_state(struct file *filep, 547 struct kfd_process *p, void *data) 548 { 549 struct kfd_ioctl_get_queue_wave_state_args *args = data; 550 int r; 551 552 mutex_lock(&p->mutex); 553 554 r = pqm_get_wave_state(&p->pqm, args->queue_id, 555 (void __user *)args->ctl_stack_address, 556 &args->ctl_stack_used_size, 557 &args->save_area_used_size); 558 559 mutex_unlock(&p->mutex); 560 561 return r; 562 } 563 564 static int kfd_ioctl_set_memory_policy(struct file *filep, 565 struct kfd_process *p, void *data) 566 { 567 struct kfd_ioctl_set_memory_policy_args *args = data; 568 int err = 0; 569 struct kfd_process_device *pdd; 570 enum cache_policy default_policy, alternate_policy; 571 572 if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT 573 && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 574 return -EINVAL; 575 } 576 577 if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT 578 && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) { 579 return -EINVAL; 580 } 581 582 mutex_lock(&p->mutex); 583 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 584 if (!pdd) { 585 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); 586 err = -EINVAL; 587 goto err_pdd; 588 } 589 590 pdd = kfd_bind_process_to_device(pdd->dev, p); 591 if (IS_ERR(pdd)) { 592 err = -ESRCH; 593 goto out; 594 } 595 596 default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT) 597 ? cache_policy_coherent : cache_policy_noncoherent; 598 599 alternate_policy = 600 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT) 601 ? cache_policy_coherent : cache_policy_noncoherent; 602 603 if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm, 604 &pdd->qpd, 605 default_policy, 606 alternate_policy, 607 (void __user *)args->alternate_aperture_base, 608 args->alternate_aperture_size, 609 args->misc_process_flag)) 610 err = -EINVAL; 611 612 out: 613 err_pdd: 614 mutex_unlock(&p->mutex); 615 616 return err; 617 } 618 619 static int kfd_ioctl_set_trap_handler(struct file *filep, 620 struct kfd_process *p, void *data) 621 { 622 struct kfd_ioctl_set_trap_handler_args *args = data; 623 int err = 0; 624 struct kfd_process_device *pdd; 625 626 mutex_lock(&p->mutex); 627 628 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 629 if (!pdd) { 630 err = -EINVAL; 631 goto err_pdd; 632 } 633 634 pdd = kfd_bind_process_to_device(pdd->dev, p); 635 if (IS_ERR(pdd)) { 636 err = -ESRCH; 637 goto out; 638 } 639 640 kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr); 641 642 out: 643 err_pdd: 644 mutex_unlock(&p->mutex); 645 646 return err; 647 } 648 649 static int kfd_ioctl_dbg_register(struct file *filep, 650 struct kfd_process *p, void *data) 651 { 652 return -EPERM; 653 } 654 655 static int kfd_ioctl_dbg_unregister(struct file *filep, 656 struct kfd_process *p, void *data) 657 { 658 return -EPERM; 659 } 660 661 static int kfd_ioctl_dbg_address_watch(struct file *filep, 662 struct kfd_process *p, void *data) 663 { 664 return -EPERM; 665 } 666 667 /* Parse and generate fixed size data structure for wave control */ 668 static int kfd_ioctl_dbg_wave_control(struct file *filep, 669 struct kfd_process *p, void *data) 670 { 671 return -EPERM; 672 } 673 674 static int kfd_ioctl_get_clock_counters(struct file *filep, 675 struct kfd_process *p, void *data) 676 { 677 struct kfd_ioctl_get_clock_counters_args *args = data; 678 struct kfd_process_device *pdd; 679 680 mutex_lock(&p->mutex); 681 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 682 mutex_unlock(&p->mutex); 683 if (pdd) 684 /* Reading GPU clock counter from KGD */ 685 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev); 686 else 687 /* Node without GPU resource */ 688 args->gpu_clock_counter = 0; 689 690 /* No access to rdtsc. Using raw monotonic time */ 691 args->cpu_clock_counter = ktime_get_raw_ns(); 692 args->system_clock_counter = ktime_get_boottime_ns(); 693 694 /* Since the counter is in nano-seconds we use 1GHz frequency */ 695 args->system_clock_freq = 1000000000; 696 697 return 0; 698 } 699 700 701 static int kfd_ioctl_get_process_apertures(struct file *filp, 702 struct kfd_process *p, void *data) 703 { 704 struct kfd_ioctl_get_process_apertures_args *args = data; 705 struct kfd_process_device_apertures *pAperture; 706 int i; 707 708 dev_dbg(kfd_device, "get apertures for process pid %d", p->lead_thread->pid); 709 710 args->num_of_nodes = 0; 711 712 mutex_lock(&p->mutex); 713 /* Run over all pdd of the process */ 714 for (i = 0; i < p->n_pdds; i++) { 715 struct kfd_process_device *pdd = p->pdds[i]; 716 717 pAperture = 718 &args->process_apertures[args->num_of_nodes]; 719 pAperture->gpu_id = pdd->dev->id; 720 pAperture->lds_base = pdd->lds_base; 721 pAperture->lds_limit = pdd->lds_limit; 722 pAperture->gpuvm_base = pdd->gpuvm_base; 723 pAperture->gpuvm_limit = pdd->gpuvm_limit; 724 pAperture->scratch_base = pdd->scratch_base; 725 pAperture->scratch_limit = pdd->scratch_limit; 726 727 dev_dbg(kfd_device, 728 "node id %u\n", args->num_of_nodes); 729 dev_dbg(kfd_device, 730 "gpu id %u\n", pdd->dev->id); 731 dev_dbg(kfd_device, 732 "lds_base %llX\n", pdd->lds_base); 733 dev_dbg(kfd_device, 734 "lds_limit %llX\n", pdd->lds_limit); 735 dev_dbg(kfd_device, 736 "gpuvm_base %llX\n", pdd->gpuvm_base); 737 dev_dbg(kfd_device, 738 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 739 dev_dbg(kfd_device, 740 "scratch_base %llX\n", pdd->scratch_base); 741 dev_dbg(kfd_device, 742 "scratch_limit %llX\n", pdd->scratch_limit); 743 744 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS) 745 break; 746 } 747 mutex_unlock(&p->mutex); 748 749 return 0; 750 } 751 752 static int kfd_ioctl_get_process_apertures_new(struct file *filp, 753 struct kfd_process *p, void *data) 754 { 755 struct kfd_ioctl_get_process_apertures_new_args *args = data; 756 struct kfd_process_device_apertures *pa; 757 int ret; 758 int i; 759 760 dev_dbg(kfd_device, "get apertures for process pid %d", 761 p->lead_thread->pid); 762 763 if (args->num_of_nodes == 0) { 764 /* Return number of nodes, so that user space can alloacate 765 * sufficient memory 766 */ 767 mutex_lock(&p->mutex); 768 args->num_of_nodes = p->n_pdds; 769 goto out_unlock; 770 } 771 772 /* Fill in process-aperture information for all available 773 * nodes, but not more than args->num_of_nodes as that is 774 * the amount of memory allocated by user 775 */ 776 pa = kcalloc(args->num_of_nodes, sizeof(struct kfd_process_device_apertures), 777 GFP_KERNEL); 778 if (!pa) 779 return -ENOMEM; 780 781 mutex_lock(&p->mutex); 782 783 if (!p->n_pdds) { 784 args->num_of_nodes = 0; 785 kfree(pa); 786 goto out_unlock; 787 } 788 789 /* Run over all pdd of the process */ 790 for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) { 791 struct kfd_process_device *pdd = p->pdds[i]; 792 793 pa[i].gpu_id = pdd->dev->id; 794 pa[i].lds_base = pdd->lds_base; 795 pa[i].lds_limit = pdd->lds_limit; 796 pa[i].gpuvm_base = pdd->gpuvm_base; 797 pa[i].gpuvm_limit = pdd->gpuvm_limit; 798 pa[i].scratch_base = pdd->scratch_base; 799 pa[i].scratch_limit = pdd->scratch_limit; 800 801 dev_dbg(kfd_device, 802 "gpu id %u\n", pdd->dev->id); 803 dev_dbg(kfd_device, 804 "lds_base %llX\n", pdd->lds_base); 805 dev_dbg(kfd_device, 806 "lds_limit %llX\n", pdd->lds_limit); 807 dev_dbg(kfd_device, 808 "gpuvm_base %llX\n", pdd->gpuvm_base); 809 dev_dbg(kfd_device, 810 "gpuvm_limit %llX\n", pdd->gpuvm_limit); 811 dev_dbg(kfd_device, 812 "scratch_base %llX\n", pdd->scratch_base); 813 dev_dbg(kfd_device, 814 "scratch_limit %llX\n", pdd->scratch_limit); 815 } 816 mutex_unlock(&p->mutex); 817 818 args->num_of_nodes = i; 819 ret = copy_to_user( 820 (void __user *)args->kfd_process_device_apertures_ptr, 821 pa, 822 (i * sizeof(struct kfd_process_device_apertures))); 823 kfree(pa); 824 return ret ? -EFAULT : 0; 825 826 out_unlock: 827 mutex_unlock(&p->mutex); 828 return 0; 829 } 830 831 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p, 832 void *data) 833 { 834 struct kfd_ioctl_create_event_args *args = data; 835 int err; 836 837 /* For dGPUs the event page is allocated in user mode. The 838 * handle is passed to KFD with the first call to this IOCTL 839 * through the event_page_offset field. 840 */ 841 if (args->event_page_offset) { 842 mutex_lock(&p->mutex); 843 err = kfd_kmap_event_page(p, args->event_page_offset); 844 mutex_unlock(&p->mutex); 845 if (err) 846 return err; 847 } 848 849 err = kfd_event_create(filp, p, args->event_type, 850 args->auto_reset != 0, args->node_id, 851 &args->event_id, &args->event_trigger_data, 852 &args->event_page_offset, 853 &args->event_slot_index); 854 855 pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__); 856 return err; 857 } 858 859 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p, 860 void *data) 861 { 862 struct kfd_ioctl_destroy_event_args *args = data; 863 864 return kfd_event_destroy(p, args->event_id); 865 } 866 867 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p, 868 void *data) 869 { 870 struct kfd_ioctl_set_event_args *args = data; 871 872 return kfd_set_event(p, args->event_id); 873 } 874 875 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p, 876 void *data) 877 { 878 struct kfd_ioctl_reset_event_args *args = data; 879 880 return kfd_reset_event(p, args->event_id); 881 } 882 883 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p, 884 void *data) 885 { 886 struct kfd_ioctl_wait_events_args *args = data; 887 888 return kfd_wait_on_events(p, args->num_events, 889 (void __user *)args->events_ptr, 890 (args->wait_for_all != 0), 891 &args->timeout, &args->wait_result); 892 } 893 static int kfd_ioctl_set_scratch_backing_va(struct file *filep, 894 struct kfd_process *p, void *data) 895 { 896 struct kfd_ioctl_set_scratch_backing_va_args *args = data; 897 struct kfd_process_device *pdd; 898 struct kfd_node *dev; 899 long err; 900 901 mutex_lock(&p->mutex); 902 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 903 if (!pdd) { 904 err = -EINVAL; 905 goto err_pdd; 906 } 907 dev = pdd->dev; 908 909 pdd = kfd_bind_process_to_device(dev, p); 910 if (IS_ERR(pdd)) { 911 err = PTR_ERR(pdd); 912 goto bind_process_to_device_fail; 913 } 914 915 pdd->qpd.sh_hidden_private_base = args->va_addr; 916 917 mutex_unlock(&p->mutex); 918 919 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS && 920 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va) 921 dev->kfd2kgd->set_scratch_backing_va( 922 dev->adev, args->va_addr, pdd->qpd.vmid); 923 924 return 0; 925 926 bind_process_to_device_fail: 927 err_pdd: 928 mutex_unlock(&p->mutex); 929 return err; 930 } 931 932 static int kfd_ioctl_get_tile_config(struct file *filep, 933 struct kfd_process *p, void *data) 934 { 935 struct kfd_ioctl_get_tile_config_args *args = data; 936 struct kfd_process_device *pdd; 937 struct tile_config config; 938 int err = 0; 939 940 mutex_lock(&p->mutex); 941 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 942 mutex_unlock(&p->mutex); 943 if (!pdd) 944 return -EINVAL; 945 946 amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config); 947 948 args->gb_addr_config = config.gb_addr_config; 949 args->num_banks = config.num_banks; 950 args->num_ranks = config.num_ranks; 951 952 if (args->num_tile_configs > config.num_tile_configs) 953 args->num_tile_configs = config.num_tile_configs; 954 err = copy_to_user((void __user *)args->tile_config_ptr, 955 config.tile_config_ptr, 956 args->num_tile_configs * sizeof(uint32_t)); 957 if (err) { 958 args->num_tile_configs = 0; 959 return -EFAULT; 960 } 961 962 if (args->num_macro_tile_configs > config.num_macro_tile_configs) 963 args->num_macro_tile_configs = 964 config.num_macro_tile_configs; 965 err = copy_to_user((void __user *)args->macro_tile_config_ptr, 966 config.macro_tile_config_ptr, 967 args->num_macro_tile_configs * sizeof(uint32_t)); 968 if (err) { 969 args->num_macro_tile_configs = 0; 970 return -EFAULT; 971 } 972 973 return 0; 974 } 975 976 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p, 977 void *data) 978 { 979 struct kfd_ioctl_acquire_vm_args *args = data; 980 struct kfd_process_device *pdd; 981 struct file *drm_file; 982 int ret; 983 984 drm_file = fget(args->drm_fd); 985 if (!drm_file) 986 return -EINVAL; 987 988 mutex_lock(&p->mutex); 989 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 990 if (!pdd) { 991 ret = -EINVAL; 992 goto err_pdd; 993 } 994 995 if (pdd->drm_file) { 996 ret = pdd->drm_file == drm_file ? 0 : -EBUSY; 997 goto err_drm_file; 998 } 999 1000 ret = kfd_process_device_init_vm(pdd, drm_file); 1001 if (ret) 1002 goto err_unlock; 1003 1004 /* On success, the PDD keeps the drm_file reference */ 1005 mutex_unlock(&p->mutex); 1006 1007 return 0; 1008 1009 err_unlock: 1010 err_pdd: 1011 err_drm_file: 1012 mutex_unlock(&p->mutex); 1013 fput(drm_file); 1014 return ret; 1015 } 1016 1017 bool kfd_dev_is_large_bar(struct kfd_node *dev) 1018 { 1019 if (dev->kfd->adev->debug_largebar) { 1020 pr_debug("Simulate large-bar allocation on non large-bar machine\n"); 1021 return true; 1022 } 1023 1024 if (dev->local_mem_info.local_mem_size_private == 0 && 1025 dev->local_mem_info.local_mem_size_public > 0) 1026 return true; 1027 1028 if (dev->local_mem_info.local_mem_size_public == 0 && 1029 dev->kfd->adev->gmc.is_app_apu) { 1030 pr_debug("APP APU, Consider like a large bar system\n"); 1031 return true; 1032 } 1033 1034 return false; 1035 } 1036 1037 static int kfd_ioctl_get_available_memory(struct file *filep, 1038 struct kfd_process *p, void *data) 1039 { 1040 struct kfd_ioctl_get_available_memory_args *args = data; 1041 struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id); 1042 1043 if (!pdd) 1044 return -EINVAL; 1045 args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev, 1046 pdd->dev->node_id); 1047 kfd_unlock_pdd(pdd); 1048 return 0; 1049 } 1050 1051 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, 1052 struct kfd_process *p, void *data) 1053 { 1054 struct kfd_ioctl_alloc_memory_of_gpu_args *args = data; 1055 struct kfd_process_device *pdd; 1056 void *mem; 1057 struct kfd_node *dev; 1058 int idr_handle; 1059 long err; 1060 uint64_t offset = args->mmap_offset; 1061 uint32_t flags = args->flags; 1062 1063 if (args->size == 0) 1064 return -EINVAL; 1065 1066 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1067 /* Flush pending deferred work to avoid racing with deferred actions 1068 * from previous memory map changes (e.g. munmap). 1069 */ 1070 svm_range_list_lock_and_flush_work(&p->svms, current->mm); 1071 mutex_lock(&p->svms.lock); 1072 mmap_write_unlock(current->mm); 1073 1074 /* Skip a special case that allocates VRAM without VA, 1075 * VA will be invalid of 0. 1076 */ 1077 if (!(!args->va_addr && (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM)) && 1078 interval_tree_iter_first(&p->svms.objects, 1079 args->va_addr >> PAGE_SHIFT, 1080 (args->va_addr + args->size - 1) >> PAGE_SHIFT)) { 1081 pr_err("Address: 0x%llx already allocated by SVM\n", 1082 args->va_addr); 1083 mutex_unlock(&p->svms.lock); 1084 return -EADDRINUSE; 1085 } 1086 1087 /* When register user buffer check if it has been registered by svm by 1088 * buffer cpu virtual address. 1089 */ 1090 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) && 1091 interval_tree_iter_first(&p->svms.objects, 1092 args->mmap_offset >> PAGE_SHIFT, 1093 (args->mmap_offset + args->size - 1) >> PAGE_SHIFT)) { 1094 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n", 1095 args->mmap_offset); 1096 mutex_unlock(&p->svms.lock); 1097 return -EADDRINUSE; 1098 } 1099 1100 mutex_unlock(&p->svms.lock); 1101 #endif 1102 mutex_lock(&p->mutex); 1103 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1104 if (!pdd) { 1105 err = -EINVAL; 1106 goto err_pdd; 1107 } 1108 1109 dev = pdd->dev; 1110 1111 if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) && 1112 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) && 1113 !kfd_dev_is_large_bar(dev)) { 1114 pr_err("Alloc host visible vram on small bar is not allowed\n"); 1115 err = -EINVAL; 1116 goto err_large_bar; 1117 } 1118 1119 pdd = kfd_bind_process_to_device(dev, p); 1120 if (IS_ERR(pdd)) { 1121 err = PTR_ERR(pdd); 1122 goto err_unlock; 1123 } 1124 1125 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 1126 if (args->size != kfd_doorbell_process_slice(dev->kfd)) { 1127 err = -EINVAL; 1128 goto err_unlock; 1129 } 1130 offset = kfd_get_process_doorbells(pdd); 1131 if (!offset) { 1132 err = -ENOMEM; 1133 goto err_unlock; 1134 } 1135 } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 1136 if (args->size != PAGE_SIZE) { 1137 err = -EINVAL; 1138 goto err_unlock; 1139 } 1140 offset = dev->adev->rmmio_remap.bus_addr; 1141 if (!offset || (PAGE_SIZE > 4096)) { 1142 err = -ENOMEM; 1143 goto err_unlock; 1144 } 1145 } 1146 1147 err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 1148 dev->adev, args->va_addr, args->size, 1149 pdd->drm_priv, (struct kgd_mem **) &mem, &offset, 1150 flags, false); 1151 1152 if (err) 1153 goto err_unlock; 1154 1155 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1156 if (idr_handle < 0) { 1157 err = -EFAULT; 1158 goto err_free; 1159 } 1160 1161 /* Update the VRAM usage count */ 1162 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 1163 uint64_t size = args->size; 1164 1165 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) 1166 size >>= 1; 1167 atomic64_add(PAGE_ALIGN(size), &pdd->vram_usage); 1168 } 1169 1170 mutex_unlock(&p->mutex); 1171 1172 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1173 args->mmap_offset = offset; 1174 1175 /* MMIO is mapped through kfd device 1176 * Generate a kfd mmap offset 1177 */ 1178 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1179 args->mmap_offset = KFD_MMAP_TYPE_MMIO 1180 | KFD_MMAP_GPU_ID(args->gpu_id); 1181 1182 return 0; 1183 1184 err_free: 1185 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem, 1186 pdd->drm_priv, NULL); 1187 err_unlock: 1188 err_pdd: 1189 err_large_bar: 1190 mutex_unlock(&p->mutex); 1191 return err; 1192 } 1193 1194 static int kfd_ioctl_free_memory_of_gpu(struct file *filep, 1195 struct kfd_process *p, void *data) 1196 { 1197 struct kfd_ioctl_free_memory_of_gpu_args *args = data; 1198 struct kfd_process_device *pdd; 1199 void *mem; 1200 int ret; 1201 uint64_t size = 0; 1202 1203 mutex_lock(&p->mutex); 1204 /* 1205 * Safeguard to prevent user space from freeing signal BO. 1206 * It will be freed at process termination. 1207 */ 1208 if (p->signal_handle && (p->signal_handle == args->handle)) { 1209 pr_err("Free signal BO is not allowed\n"); 1210 ret = -EPERM; 1211 goto err_unlock; 1212 } 1213 1214 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1215 if (!pdd) { 1216 pr_err("Process device data doesn't exist\n"); 1217 ret = -EINVAL; 1218 goto err_pdd; 1219 } 1220 1221 mem = kfd_process_device_translate_handle( 1222 pdd, GET_IDR_HANDLE(args->handle)); 1223 if (!mem) { 1224 ret = -EINVAL; 1225 goto err_unlock; 1226 } 1227 1228 ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, 1229 (struct kgd_mem *)mem, pdd->drm_priv, &size); 1230 1231 /* If freeing the buffer failed, leave the handle in place for 1232 * clean-up during process tear-down. 1233 */ 1234 if (!ret) 1235 kfd_process_device_remove_obj_handle( 1236 pdd, GET_IDR_HANDLE(args->handle)); 1237 1238 atomic64_sub(size, &pdd->vram_usage); 1239 1240 err_unlock: 1241 err_pdd: 1242 mutex_unlock(&p->mutex); 1243 return ret; 1244 } 1245 1246 static int kfd_ioctl_map_memory_to_gpu(struct file *filep, 1247 struct kfd_process *p, void *data) 1248 { 1249 struct kfd_ioctl_map_memory_to_gpu_args *args = data; 1250 struct kfd_process_device *pdd, *peer_pdd; 1251 void *mem; 1252 struct kfd_node *dev; 1253 long err = 0; 1254 int i; 1255 uint32_t *devices_arr = NULL; 1256 1257 if (!args->n_devices) { 1258 pr_debug("Device IDs array empty\n"); 1259 return -EINVAL; 1260 } 1261 if (args->n_success > args->n_devices) { 1262 pr_debug("n_success exceeds n_devices\n"); 1263 return -EINVAL; 1264 } 1265 1266 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1267 GFP_KERNEL); 1268 if (!devices_arr) 1269 return -ENOMEM; 1270 1271 err = copy_from_user(devices_arr, 1272 (void __user *)args->device_ids_array_ptr, 1273 args->n_devices * sizeof(*devices_arr)); 1274 if (err != 0) { 1275 err = -EFAULT; 1276 goto copy_from_user_failed; 1277 } 1278 1279 mutex_lock(&p->mutex); 1280 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1281 if (!pdd) { 1282 err = -EINVAL; 1283 goto get_process_device_data_failed; 1284 } 1285 dev = pdd->dev; 1286 1287 pdd = kfd_bind_process_to_device(dev, p); 1288 if (IS_ERR(pdd)) { 1289 err = PTR_ERR(pdd); 1290 goto bind_process_to_device_failed; 1291 } 1292 1293 mem = kfd_process_device_translate_handle(pdd, 1294 GET_IDR_HANDLE(args->handle)); 1295 if (!mem) { 1296 err = -ENOMEM; 1297 goto get_mem_obj_from_handle_failed; 1298 } 1299 1300 for (i = args->n_success; i < args->n_devices; i++) { 1301 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1302 if (!peer_pdd) { 1303 pr_debug("Getting device by id failed for 0x%x\n", 1304 devices_arr[i]); 1305 err = -EINVAL; 1306 goto get_mem_obj_from_handle_failed; 1307 } 1308 1309 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p); 1310 if (IS_ERR(peer_pdd)) { 1311 err = PTR_ERR(peer_pdd); 1312 goto get_mem_obj_from_handle_failed; 1313 } 1314 1315 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 1316 peer_pdd->dev->adev, (struct kgd_mem *)mem, 1317 peer_pdd->drm_priv); 1318 if (err) { 1319 struct pci_dev *pdev = peer_pdd->dev->adev->pdev; 1320 1321 dev_err(dev->adev->dev, 1322 "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n", 1323 pci_domain_nr(pdev->bus), 1324 pdev->bus->number, 1325 PCI_SLOT(pdev->devfn), 1326 PCI_FUNC(pdev->devfn), 1327 ((struct kgd_mem *)mem)->domain); 1328 goto map_memory_to_gpu_failed; 1329 } 1330 args->n_success = i+1; 1331 } 1332 1333 err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true); 1334 if (err) { 1335 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1336 goto sync_memory_failed; 1337 } 1338 1339 mutex_unlock(&p->mutex); 1340 1341 /* Flush TLBs after waiting for the page table updates to complete */ 1342 for (i = 0; i < args->n_devices; i++) { 1343 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1344 if (WARN_ON_ONCE(!peer_pdd)) 1345 continue; 1346 kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY); 1347 } 1348 kfree(devices_arr); 1349 1350 return err; 1351 1352 get_process_device_data_failed: 1353 bind_process_to_device_failed: 1354 get_mem_obj_from_handle_failed: 1355 map_memory_to_gpu_failed: 1356 sync_memory_failed: 1357 mutex_unlock(&p->mutex); 1358 copy_from_user_failed: 1359 kfree(devices_arr); 1360 1361 return err; 1362 } 1363 1364 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 1365 struct kfd_process *p, void *data) 1366 { 1367 struct kfd_ioctl_unmap_memory_from_gpu_args *args = data; 1368 struct kfd_process_device *pdd, *peer_pdd; 1369 void *mem; 1370 long err = 0; 1371 uint32_t *devices_arr = NULL, i; 1372 bool flush_tlb; 1373 1374 if (!args->n_devices) { 1375 pr_debug("Device IDs array empty\n"); 1376 return -EINVAL; 1377 } 1378 if (args->n_success > args->n_devices) { 1379 pr_debug("n_success exceeds n_devices\n"); 1380 return -EINVAL; 1381 } 1382 1383 devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr), 1384 GFP_KERNEL); 1385 if (!devices_arr) 1386 return -ENOMEM; 1387 1388 err = copy_from_user(devices_arr, 1389 (void __user *)args->device_ids_array_ptr, 1390 args->n_devices * sizeof(*devices_arr)); 1391 if (err != 0) { 1392 err = -EFAULT; 1393 goto copy_from_user_failed; 1394 } 1395 1396 mutex_lock(&p->mutex); 1397 pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle)); 1398 if (!pdd) { 1399 err = -EINVAL; 1400 goto bind_process_to_device_failed; 1401 } 1402 1403 mem = kfd_process_device_translate_handle(pdd, 1404 GET_IDR_HANDLE(args->handle)); 1405 if (!mem) { 1406 err = -ENOMEM; 1407 goto get_mem_obj_from_handle_failed; 1408 } 1409 1410 for (i = args->n_success; i < args->n_devices; i++) { 1411 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1412 if (!peer_pdd) { 1413 err = -EINVAL; 1414 goto get_mem_obj_from_handle_failed; 1415 } 1416 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 1417 peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv); 1418 if (err) { 1419 pr_debug("Failed to unmap from gpu %d/%d\n", i, args->n_devices); 1420 goto unmap_memory_from_gpu_failed; 1421 } 1422 args->n_success = i+1; 1423 } 1424 1425 flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd); 1426 if (flush_tlb) { 1427 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev, 1428 (struct kgd_mem *) mem, true); 1429 if (err) { 1430 pr_debug("Sync memory failed, wait interrupted by user signal\n"); 1431 goto sync_memory_failed; 1432 } 1433 } 1434 1435 /* Flush TLBs after waiting for the page table updates to complete */ 1436 for (i = 0; i < args->n_devices; i++) { 1437 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]); 1438 if (WARN_ON_ONCE(!peer_pdd)) 1439 continue; 1440 if (flush_tlb) 1441 kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT); 1442 1443 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */ 1444 err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv); 1445 if (err) 1446 goto sync_memory_failed; 1447 } 1448 1449 mutex_unlock(&p->mutex); 1450 1451 kfree(devices_arr); 1452 1453 return 0; 1454 1455 bind_process_to_device_failed: 1456 get_mem_obj_from_handle_failed: 1457 unmap_memory_from_gpu_failed: 1458 sync_memory_failed: 1459 mutex_unlock(&p->mutex); 1460 copy_from_user_failed: 1461 kfree(devices_arr); 1462 return err; 1463 } 1464 1465 static int kfd_ioctl_alloc_queue_gws(struct file *filep, 1466 struct kfd_process *p, void *data) 1467 { 1468 int retval; 1469 struct kfd_ioctl_alloc_queue_gws_args *args = data; 1470 struct queue *q; 1471 struct kfd_node *dev; 1472 1473 mutex_lock(&p->mutex); 1474 q = pqm_get_user_queue(&p->pqm, args->queue_id); 1475 1476 if (q) { 1477 dev = q->device; 1478 } else { 1479 retval = -EINVAL; 1480 goto out_unlock; 1481 } 1482 1483 if (!dev->gws) { 1484 retval = -ENODEV; 1485 goto out_unlock; 1486 } 1487 1488 if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { 1489 retval = -ENODEV; 1490 goto out_unlock; 1491 } 1492 1493 if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) || 1494 kfd_dbg_has_cwsr_workaround(dev))) { 1495 retval = -EBUSY; 1496 goto out_unlock; 1497 } 1498 1499 retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); 1500 mutex_unlock(&p->mutex); 1501 1502 args->first_gws = 0; 1503 return retval; 1504 1505 out_unlock: 1506 mutex_unlock(&p->mutex); 1507 return retval; 1508 } 1509 1510 static int kfd_ioctl_get_dmabuf_info(struct file *filep, 1511 struct kfd_process *p, void *data) 1512 { 1513 struct kfd_ioctl_get_dmabuf_info_args *args = data; 1514 struct kfd_node *dev = NULL; 1515 struct amdgpu_device *dmabuf_adev; 1516 void *metadata_buffer = NULL; 1517 uint32_t flags; 1518 int8_t xcp_id; 1519 unsigned int i; 1520 int r; 1521 1522 /* Find a KFD GPU device that supports the get_dmabuf_info query */ 1523 for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) 1524 if (dev && !kfd_devcgroup_check_permission(dev)) 1525 break; 1526 if (!dev) 1527 return -EINVAL; 1528 1529 if (args->metadata_ptr) { 1530 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL); 1531 if (!metadata_buffer) 1532 return -ENOMEM; 1533 } 1534 1535 /* Get dmabuf info from KGD */ 1536 r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd, 1537 &dmabuf_adev, &args->size, 1538 metadata_buffer, args->metadata_size, 1539 &args->metadata_size, &flags, &xcp_id); 1540 if (r) 1541 goto exit; 1542 1543 if (xcp_id >= 0) 1544 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; 1545 else 1546 args->gpu_id = dev->id; 1547 args->flags = flags; 1548 1549 /* Copy metadata buffer to user mode */ 1550 if (metadata_buffer) { 1551 r = copy_to_user((void __user *)args->metadata_ptr, 1552 metadata_buffer, args->metadata_size); 1553 if (r != 0) 1554 r = -EFAULT; 1555 } 1556 1557 exit: 1558 kfree(metadata_buffer); 1559 1560 return r; 1561 } 1562 1563 static int kfd_ioctl_import_dmabuf(struct file *filep, 1564 struct kfd_process *p, void *data) 1565 { 1566 struct kfd_ioctl_import_dmabuf_args *args = data; 1567 struct kfd_process_device *pdd; 1568 int idr_handle; 1569 uint64_t size; 1570 void *mem; 1571 int r; 1572 1573 mutex_lock(&p->mutex); 1574 pdd = kfd_process_device_data_by_id(p, args->gpu_id); 1575 if (!pdd) { 1576 r = -EINVAL; 1577 goto err_unlock; 1578 } 1579 1580 pdd = kfd_bind_process_to_device(pdd->dev, p); 1581 if (IS_ERR(pdd)) { 1582 r = PTR_ERR(pdd); 1583 goto err_unlock; 1584 } 1585 1586 r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd, 1587 args->va_addr, pdd->drm_priv, 1588 (struct kgd_mem **)&mem, &size, 1589 NULL); 1590 if (r) 1591 goto err_unlock; 1592 1593 idr_handle = kfd_process_device_create_obj_handle(pdd, mem); 1594 if (idr_handle < 0) { 1595 r = -EFAULT; 1596 goto err_free; 1597 } 1598 1599 mutex_unlock(&p->mutex); 1600 1601 args->handle = MAKE_HANDLE(args->gpu_id, idr_handle); 1602 1603 return 0; 1604 1605 err_free: 1606 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem, 1607 pdd->drm_priv, NULL); 1608 err_unlock: 1609 mutex_unlock(&p->mutex); 1610 return r; 1611 } 1612 1613 static int kfd_ioctl_export_dmabuf(struct file *filep, 1614 struct kfd_process *p, void *data) 1615 { 1616 struct kfd_ioctl_export_dmabuf_args *args = data; 1617 struct kfd_process_device *pdd; 1618 struct dma_buf *dmabuf; 1619 struct kfd_node *dev; 1620 void *mem; 1621 int ret = 0; 1622 1623 dev = kfd_device_by_id(GET_GPU_ID(args->handle)); 1624 if (!dev) 1625 return -EINVAL; 1626 1627 mutex_lock(&p->mutex); 1628 1629 pdd = kfd_get_process_device_data(dev, p); 1630 if (!pdd) { 1631 ret = -EINVAL; 1632 goto err_unlock; 1633 } 1634 1635 mem = kfd_process_device_translate_handle(pdd, 1636 GET_IDR_HANDLE(args->handle)); 1637 if (!mem) { 1638 ret = -EINVAL; 1639 goto err_unlock; 1640 } 1641 1642 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1643 mutex_unlock(&p->mutex); 1644 if (ret) 1645 goto err_out; 1646 1647 ret = dma_buf_fd(dmabuf, args->flags); 1648 if (ret < 0) { 1649 dma_buf_put(dmabuf); 1650 goto err_out; 1651 } 1652 /* dma_buf_fd assigns the reference count to the fd, no need to 1653 * put the reference here. 1654 */ 1655 args->dmabuf_fd = ret; 1656 1657 return 0; 1658 1659 err_unlock: 1660 mutex_unlock(&p->mutex); 1661 err_out: 1662 return ret; 1663 } 1664 1665 /* Handle requests for watching SMI events */ 1666 static int kfd_ioctl_smi_events(struct file *filep, 1667 struct kfd_process *p, void *data) 1668 { 1669 struct kfd_ioctl_smi_events_args *args = data; 1670 struct kfd_process_device *pdd; 1671 1672 mutex_lock(&p->mutex); 1673 1674 pdd = kfd_process_device_data_by_id(p, args->gpuid); 1675 mutex_unlock(&p->mutex); 1676 if (!pdd) 1677 return -EINVAL; 1678 1679 return kfd_smi_event_open(pdd->dev, &args->anon_fd); 1680 } 1681 1682 #if IS_ENABLED(CONFIG_HSA_AMD_SVM) 1683 1684 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1685 struct kfd_process *p, void *data) 1686 { 1687 struct kfd_ioctl_set_xnack_mode_args *args = data; 1688 int r = 0; 1689 1690 mutex_lock(&p->mutex); 1691 if (args->xnack_enabled >= 0) { 1692 if (!list_empty(&p->pqm.queues)) { 1693 pr_debug("Process has user queues running\n"); 1694 r = -EBUSY; 1695 goto out_unlock; 1696 } 1697 1698 if (p->xnack_enabled == args->xnack_enabled) 1699 goto out_unlock; 1700 1701 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) { 1702 r = -EPERM; 1703 goto out_unlock; 1704 } 1705 1706 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled); 1707 } else { 1708 args->xnack_enabled = p->xnack_enabled; 1709 } 1710 1711 out_unlock: 1712 mutex_unlock(&p->mutex); 1713 1714 return r; 1715 } 1716 1717 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1718 { 1719 struct kfd_ioctl_svm_args *args = data; 1720 int r = 0; 1721 1722 pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n", 1723 args->start_addr, args->size, args->op, args->nattr); 1724 1725 if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK)) 1726 return -EINVAL; 1727 if (!args->start_addr || !args->size) 1728 return -EINVAL; 1729 1730 r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr, 1731 args->attrs); 1732 1733 return r; 1734 } 1735 #else 1736 static int kfd_ioctl_set_xnack_mode(struct file *filep, 1737 struct kfd_process *p, void *data) 1738 { 1739 return -EPERM; 1740 } 1741 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data) 1742 { 1743 return -EPERM; 1744 } 1745 #endif 1746 1747 static int criu_checkpoint_process(struct kfd_process *p, 1748 uint8_t __user *user_priv_data, 1749 uint64_t *priv_offset) 1750 { 1751 struct kfd_criu_process_priv_data process_priv; 1752 int ret; 1753 1754 memset(&process_priv, 0, sizeof(process_priv)); 1755 1756 process_priv.version = KFD_CRIU_PRIV_VERSION; 1757 /* For CR, we don't consider negative xnack mode which is used for 1758 * querying without changing it, here 0 simply means disabled and 1 1759 * means enabled so retry for finding a valid PTE. 1760 */ 1761 process_priv.xnack_mode = p->xnack_enabled ? 1 : 0; 1762 1763 ret = copy_to_user(user_priv_data + *priv_offset, 1764 &process_priv, sizeof(process_priv)); 1765 1766 if (ret) { 1767 pr_err("Failed to copy process information to user\n"); 1768 ret = -EFAULT; 1769 } 1770 1771 *priv_offset += sizeof(process_priv); 1772 return ret; 1773 } 1774 1775 static int criu_checkpoint_devices(struct kfd_process *p, 1776 uint32_t num_devices, 1777 uint8_t __user *user_addr, 1778 uint8_t __user *user_priv_data, 1779 uint64_t *priv_offset) 1780 { 1781 struct kfd_criu_device_priv_data *device_priv = NULL; 1782 struct kfd_criu_device_bucket *device_buckets = NULL; 1783 int ret = 0, i; 1784 1785 device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL); 1786 if (!device_buckets) { 1787 ret = -ENOMEM; 1788 goto exit; 1789 } 1790 1791 device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL); 1792 if (!device_priv) { 1793 ret = -ENOMEM; 1794 goto exit; 1795 } 1796 1797 for (i = 0; i < num_devices; i++) { 1798 struct kfd_process_device *pdd = p->pdds[i]; 1799 1800 device_buckets[i].user_gpu_id = pdd->user_gpu_id; 1801 device_buckets[i].actual_gpu_id = pdd->dev->id; 1802 1803 /* 1804 * priv_data does not contain useful information for now and is reserved for 1805 * future use, so we do not set its contents. 1806 */ 1807 } 1808 1809 ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets)); 1810 if (ret) { 1811 pr_err("Failed to copy device information to user\n"); 1812 ret = -EFAULT; 1813 goto exit; 1814 } 1815 1816 ret = copy_to_user(user_priv_data + *priv_offset, 1817 device_priv, 1818 num_devices * sizeof(*device_priv)); 1819 if (ret) { 1820 pr_err("Failed to copy device information to user\n"); 1821 ret = -EFAULT; 1822 } 1823 *priv_offset += num_devices * sizeof(*device_priv); 1824 1825 exit: 1826 kvfree(device_buckets); 1827 kvfree(device_priv); 1828 return ret; 1829 } 1830 1831 static uint32_t get_process_num_bos(struct kfd_process *p) 1832 { 1833 uint32_t num_of_bos = 0; 1834 int i; 1835 1836 /* Run over all PDDs of the process */ 1837 for (i = 0; i < p->n_pdds; i++) { 1838 struct kfd_process_device *pdd = p->pdds[i]; 1839 void *mem; 1840 int id; 1841 1842 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1843 struct kgd_mem *kgd_mem = (struct kgd_mem *)mem; 1844 1845 if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base) 1846 num_of_bos++; 1847 } 1848 } 1849 return num_of_bos; 1850 } 1851 1852 static int criu_get_prime_handle(struct kgd_mem *mem, 1853 int flags, u32 *shared_fd, 1854 struct file **file) 1855 { 1856 struct dma_buf *dmabuf; 1857 int ret; 1858 1859 ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf); 1860 if (ret) { 1861 pr_err("dmabuf export failed for the BO\n"); 1862 return ret; 1863 } 1864 1865 ret = get_unused_fd_flags(flags); 1866 if (ret < 0) { 1867 pr_err("dmabuf create fd failed, ret:%d\n", ret); 1868 goto out_free_dmabuf; 1869 } 1870 1871 *shared_fd = ret; 1872 *file = dmabuf->file; 1873 return 0; 1874 1875 out_free_dmabuf: 1876 dma_buf_put(dmabuf); 1877 return ret; 1878 } 1879 1880 static void commit_files(struct file **files, 1881 struct kfd_criu_bo_bucket *bo_buckets, 1882 unsigned int count, 1883 int err) 1884 { 1885 while (count--) { 1886 struct file *file = files[count]; 1887 1888 if (!file) 1889 continue; 1890 if (err) { 1891 fput(file); 1892 put_unused_fd(bo_buckets[count].dmabuf_fd); 1893 } else { 1894 fd_install(bo_buckets[count].dmabuf_fd, file); 1895 } 1896 } 1897 } 1898 1899 static int criu_checkpoint_bos(struct kfd_process *p, 1900 uint32_t num_bos, 1901 uint8_t __user *user_bos, 1902 uint8_t __user *user_priv_data, 1903 uint64_t *priv_offset) 1904 { 1905 struct kfd_criu_bo_bucket *bo_buckets; 1906 struct kfd_criu_bo_priv_data *bo_privs; 1907 struct file **files = NULL; 1908 int ret = 0, pdd_index, bo_index = 0, id; 1909 void *mem; 1910 1911 bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL); 1912 if (!bo_buckets) 1913 return -ENOMEM; 1914 1915 bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL); 1916 if (!bo_privs) { 1917 ret = -ENOMEM; 1918 goto exit; 1919 } 1920 1921 files = kvzalloc(num_bos * sizeof(struct file *), GFP_KERNEL); 1922 if (!files) { 1923 ret = -ENOMEM; 1924 goto exit; 1925 } 1926 1927 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) { 1928 struct kfd_process_device *pdd = p->pdds[pdd_index]; 1929 struct amdgpu_bo *dumper_bo; 1930 struct kgd_mem *kgd_mem; 1931 1932 idr_for_each_entry(&pdd->alloc_idr, mem, id) { 1933 struct kfd_criu_bo_bucket *bo_bucket; 1934 struct kfd_criu_bo_priv_data *bo_priv; 1935 int i, dev_idx = 0; 1936 1937 kgd_mem = (struct kgd_mem *)mem; 1938 dumper_bo = kgd_mem->bo; 1939 1940 /* Skip checkpointing BOs that are used for Trap handler 1941 * code and state. Currently, these BOs have a VA that 1942 * is less GPUVM Base 1943 */ 1944 if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base) 1945 continue; 1946 1947 bo_bucket = &bo_buckets[bo_index]; 1948 bo_priv = &bo_privs[bo_index]; 1949 1950 bo_bucket->gpu_id = pdd->user_gpu_id; 1951 bo_bucket->addr = (uint64_t)kgd_mem->va; 1952 bo_bucket->size = amdgpu_bo_size(dumper_bo); 1953 bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags; 1954 bo_priv->idr_handle = id; 1955 1956 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 1957 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo, 1958 &bo_priv->user_addr); 1959 if (ret) { 1960 pr_err("Failed to obtain user address for user-pointer bo\n"); 1961 goto exit; 1962 } 1963 } 1964 if (bo_bucket->alloc_flags 1965 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 1966 ret = criu_get_prime_handle(kgd_mem, 1967 bo_bucket->alloc_flags & 1968 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0, 1969 &bo_bucket->dmabuf_fd, &files[bo_index]); 1970 if (ret) 1971 goto exit; 1972 } else { 1973 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 1974 } 1975 1976 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 1977 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL | 1978 KFD_MMAP_GPU_ID(pdd->dev->id); 1979 else if (bo_bucket->alloc_flags & 1980 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) 1981 bo_bucket->offset = KFD_MMAP_TYPE_MMIO | 1982 KFD_MMAP_GPU_ID(pdd->dev->id); 1983 else 1984 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo); 1985 1986 for (i = 0; i < p->n_pdds; i++) { 1987 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->drm_priv, kgd_mem)) 1988 bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id; 1989 } 1990 1991 pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n" 1992 "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x", 1993 bo_bucket->size, 1994 bo_bucket->addr, 1995 bo_bucket->offset, 1996 bo_bucket->gpu_id, 1997 bo_bucket->alloc_flags, 1998 bo_priv->idr_handle); 1999 bo_index++; 2000 } 2001 } 2002 2003 ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets)); 2004 if (ret) { 2005 pr_err("Failed to copy BO information to user\n"); 2006 ret = -EFAULT; 2007 goto exit; 2008 } 2009 2010 ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs)); 2011 if (ret) { 2012 pr_err("Failed to copy BO priv information to user\n"); 2013 ret = -EFAULT; 2014 goto exit; 2015 } 2016 2017 *priv_offset += num_bos * sizeof(*bo_privs); 2018 2019 exit: 2020 commit_files(files, bo_buckets, bo_index, ret); 2021 kvfree(files); 2022 kvfree(bo_buckets); 2023 kvfree(bo_privs); 2024 return ret; 2025 } 2026 2027 static int criu_get_process_object_info(struct kfd_process *p, 2028 uint32_t *num_devices, 2029 uint32_t *num_bos, 2030 uint32_t *num_objects, 2031 uint64_t *objs_priv_size) 2032 { 2033 uint64_t queues_priv_data_size, svm_priv_data_size, priv_size; 2034 uint32_t num_queues, num_events, num_svm_ranges; 2035 int ret; 2036 2037 *num_devices = p->n_pdds; 2038 *num_bos = get_process_num_bos(p); 2039 2040 ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size); 2041 if (ret) 2042 return ret; 2043 2044 num_events = kfd_get_num_events(p); 2045 2046 svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size); 2047 2048 *num_objects = num_queues + num_events + num_svm_ranges; 2049 2050 if (objs_priv_size) { 2051 priv_size = sizeof(struct kfd_criu_process_priv_data); 2052 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data); 2053 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data); 2054 priv_size += queues_priv_data_size; 2055 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data); 2056 priv_size += svm_priv_data_size; 2057 *objs_priv_size = priv_size; 2058 } 2059 return 0; 2060 } 2061 2062 static int criu_checkpoint(struct file *filep, 2063 struct kfd_process *p, 2064 struct kfd_ioctl_criu_args *args) 2065 { 2066 int ret; 2067 uint32_t num_devices, num_bos, num_objects; 2068 uint64_t priv_size, priv_offset = 0, bo_priv_offset; 2069 2070 if (!args->devices || !args->bos || !args->priv_data) 2071 return -EINVAL; 2072 2073 mutex_lock(&p->mutex); 2074 2075 if (!p->n_pdds) { 2076 pr_err("No pdd for given process\n"); 2077 ret = -ENODEV; 2078 goto exit_unlock; 2079 } 2080 2081 /* Confirm all process queues are evicted */ 2082 if (!p->queues_paused) { 2083 pr_err("Cannot dump process when queues are not in evicted state\n"); 2084 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */ 2085 ret = -EINVAL; 2086 goto exit_unlock; 2087 } 2088 2089 ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size); 2090 if (ret) 2091 goto exit_unlock; 2092 2093 if (num_devices != args->num_devices || 2094 num_bos != args->num_bos || 2095 num_objects != args->num_objects || 2096 priv_size != args->priv_data_size) { 2097 2098 ret = -EINVAL; 2099 goto exit_unlock; 2100 } 2101 2102 /* each function will store private data inside priv_data and adjust priv_offset */ 2103 ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset); 2104 if (ret) 2105 goto exit_unlock; 2106 2107 ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices, 2108 (uint8_t __user *)args->priv_data, &priv_offset); 2109 if (ret) 2110 goto exit_unlock; 2111 2112 /* Leave room for BOs in the private data. They need to be restored 2113 * before events, but we checkpoint them last to simplify the error 2114 * handling. 2115 */ 2116 bo_priv_offset = priv_offset; 2117 priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data); 2118 2119 if (num_objects) { 2120 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data, 2121 &priv_offset); 2122 if (ret) 2123 goto exit_unlock; 2124 2125 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data, 2126 &priv_offset); 2127 if (ret) 2128 goto exit_unlock; 2129 2130 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset); 2131 if (ret) 2132 goto exit_unlock; 2133 } 2134 2135 /* This must be the last thing in this function that can fail. 2136 * Otherwise we leak dmabuf file descriptors. 2137 */ 2138 ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos, 2139 (uint8_t __user *)args->priv_data, &bo_priv_offset); 2140 2141 exit_unlock: 2142 mutex_unlock(&p->mutex); 2143 if (ret) 2144 pr_err("Failed to dump CRIU ret:%d\n", ret); 2145 else 2146 pr_debug("CRIU dump ret:%d\n", ret); 2147 2148 return ret; 2149 } 2150 2151 static int criu_restore_process(struct kfd_process *p, 2152 struct kfd_ioctl_criu_args *args, 2153 uint64_t *priv_offset, 2154 uint64_t max_priv_data_size) 2155 { 2156 int ret = 0; 2157 struct kfd_criu_process_priv_data process_priv; 2158 2159 if (*priv_offset + sizeof(process_priv) > max_priv_data_size) 2160 return -EINVAL; 2161 2162 ret = copy_from_user(&process_priv, 2163 (void __user *)(args->priv_data + *priv_offset), 2164 sizeof(process_priv)); 2165 if (ret) { 2166 pr_err("Failed to copy process private information from user\n"); 2167 ret = -EFAULT; 2168 goto exit; 2169 } 2170 *priv_offset += sizeof(process_priv); 2171 2172 if (process_priv.version != KFD_CRIU_PRIV_VERSION) { 2173 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n", 2174 process_priv.version, KFD_CRIU_PRIV_VERSION); 2175 return -EINVAL; 2176 } 2177 2178 pr_debug("Setting XNACK mode\n"); 2179 if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) { 2180 pr_err("xnack mode cannot be set\n"); 2181 ret = -EPERM; 2182 goto exit; 2183 } else { 2184 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode); 2185 p->xnack_enabled = process_priv.xnack_mode; 2186 } 2187 2188 exit: 2189 return ret; 2190 } 2191 2192 static int criu_restore_devices(struct kfd_process *p, 2193 struct kfd_ioctl_criu_args *args, 2194 uint64_t *priv_offset, 2195 uint64_t max_priv_data_size) 2196 { 2197 struct kfd_criu_device_bucket *device_buckets; 2198 struct kfd_criu_device_priv_data *device_privs; 2199 int ret = 0; 2200 uint32_t i; 2201 2202 if (args->num_devices != p->n_pdds) 2203 return -EINVAL; 2204 2205 if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size) 2206 return -EINVAL; 2207 2208 device_buckets = kmalloc_array(args->num_devices, sizeof(*device_buckets), GFP_KERNEL); 2209 if (!device_buckets) 2210 return -ENOMEM; 2211 2212 ret = copy_from_user(device_buckets, (void __user *)args->devices, 2213 args->num_devices * sizeof(*device_buckets)); 2214 if (ret) { 2215 pr_err("Failed to copy devices buckets from user\n"); 2216 ret = -EFAULT; 2217 goto exit; 2218 } 2219 2220 for (i = 0; i < args->num_devices; i++) { 2221 struct kfd_node *dev; 2222 struct kfd_process_device *pdd; 2223 struct file *drm_file; 2224 2225 /* device private data is not currently used */ 2226 2227 if (!device_buckets[i].user_gpu_id) { 2228 pr_err("Invalid user gpu_id\n"); 2229 ret = -EINVAL; 2230 goto exit; 2231 } 2232 2233 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id); 2234 if (!dev) { 2235 pr_err("Failed to find device with gpu_id = %x\n", 2236 device_buckets[i].actual_gpu_id); 2237 ret = -EINVAL; 2238 goto exit; 2239 } 2240 2241 pdd = kfd_get_process_device_data(dev, p); 2242 if (!pdd) { 2243 pr_err("Failed to get pdd for gpu_id = %x\n", 2244 device_buckets[i].actual_gpu_id); 2245 ret = -EINVAL; 2246 goto exit; 2247 } 2248 pdd->user_gpu_id = device_buckets[i].user_gpu_id; 2249 2250 drm_file = fget(device_buckets[i].drm_fd); 2251 if (!drm_file) { 2252 pr_err("Invalid render node file descriptor sent from plugin (%d)\n", 2253 device_buckets[i].drm_fd); 2254 ret = -EINVAL; 2255 goto exit; 2256 } 2257 2258 if (pdd->drm_file) { 2259 ret = -EINVAL; 2260 goto exit; 2261 } 2262 2263 /* create the vm using render nodes for kfd pdd */ 2264 if (kfd_process_device_init_vm(pdd, drm_file)) { 2265 pr_err("could not init vm for given pdd\n"); 2266 /* On success, the PDD keeps the drm_file reference */ 2267 fput(drm_file); 2268 ret = -EINVAL; 2269 goto exit; 2270 } 2271 /* 2272 * pdd now already has the vm bound to render node so below api won't create a new 2273 * exclusive kfd mapping but use existing one with renderDXXX but is still needed 2274 * for iommu v2 binding and runtime pm. 2275 */ 2276 pdd = kfd_bind_process_to_device(dev, p); 2277 if (IS_ERR(pdd)) { 2278 ret = PTR_ERR(pdd); 2279 goto exit; 2280 } 2281 2282 if (!pdd->qpd.proc_doorbells) { 2283 ret = kfd_alloc_process_doorbells(dev->kfd, pdd); 2284 if (ret) 2285 goto exit; 2286 } 2287 } 2288 2289 /* 2290 * We are not copying device private data from user as we are not using the data for now, 2291 * but we still adjust for its private data. 2292 */ 2293 *priv_offset += args->num_devices * sizeof(*device_privs); 2294 2295 exit: 2296 kfree(device_buckets); 2297 return ret; 2298 } 2299 2300 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, 2301 struct kfd_criu_bo_bucket *bo_bucket, 2302 struct kfd_criu_bo_priv_data *bo_priv, 2303 struct kgd_mem **kgd_mem) 2304 { 2305 int idr_handle; 2306 int ret; 2307 const bool criu_resume = true; 2308 u64 offset; 2309 2310 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) { 2311 if (bo_bucket->size != 2312 kfd_doorbell_process_slice(pdd->dev->kfd)) 2313 return -EINVAL; 2314 2315 offset = kfd_get_process_doorbells(pdd); 2316 if (!offset) 2317 return -ENOMEM; 2318 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2319 /* MMIO BOs need remapped bus address */ 2320 if (bo_bucket->size != PAGE_SIZE) { 2321 pr_err("Invalid page size\n"); 2322 return -EINVAL; 2323 } 2324 offset = pdd->dev->adev->rmmio_remap.bus_addr; 2325 if (!offset || (PAGE_SIZE > 4096)) { 2326 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); 2327 return -ENOMEM; 2328 } 2329 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) { 2330 offset = bo_priv->user_addr; 2331 } 2332 /* Create the BO */ 2333 ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr, 2334 bo_bucket->size, pdd->drm_priv, kgd_mem, 2335 &offset, bo_bucket->alloc_flags, criu_resume); 2336 if (ret) { 2337 pr_err("Could not create the BO\n"); 2338 return ret; 2339 } 2340 pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n", 2341 bo_bucket->size, bo_bucket->addr, offset); 2342 2343 /* Restore previous IDR handle */ 2344 pr_debug("Restoring old IDR handle for the BO"); 2345 idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle, 2346 bo_priv->idr_handle + 1, GFP_KERNEL); 2347 2348 if (idr_handle < 0) { 2349 pr_err("Could not allocate idr\n"); 2350 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv, 2351 NULL); 2352 return -ENOMEM; 2353 } 2354 2355 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) 2356 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id); 2357 if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) { 2358 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id); 2359 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) { 2360 bo_bucket->restored_offset = offset; 2361 } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { 2362 bo_bucket->restored_offset = offset; 2363 /* Update the VRAM usage count */ 2364 atomic64_add(bo_bucket->size, &pdd->vram_usage); 2365 } 2366 return 0; 2367 } 2368 2369 static int criu_restore_bo(struct kfd_process *p, 2370 struct kfd_criu_bo_bucket *bo_bucket, 2371 struct kfd_criu_bo_priv_data *bo_priv, 2372 struct file **file) 2373 { 2374 struct kfd_process_device *pdd; 2375 struct kgd_mem *kgd_mem; 2376 int ret; 2377 int j; 2378 2379 pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n", 2380 bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags, 2381 bo_priv->idr_handle); 2382 2383 pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id); 2384 if (!pdd) { 2385 pr_err("Failed to get pdd\n"); 2386 return -ENODEV; 2387 } 2388 2389 ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem); 2390 if (ret) 2391 return ret; 2392 2393 /* now map these BOs to GPU/s */ 2394 for (j = 0; j < p->n_pdds; j++) { 2395 struct kfd_node *peer; 2396 struct kfd_process_device *peer_pdd; 2397 2398 if (!bo_priv->mapped_gpuids[j]) 2399 break; 2400 2401 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]); 2402 if (!peer_pdd) 2403 return -EINVAL; 2404 2405 peer = peer_pdd->dev; 2406 2407 peer_pdd = kfd_bind_process_to_device(peer, p); 2408 if (IS_ERR(peer_pdd)) 2409 return PTR_ERR(peer_pdd); 2410 2411 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem, 2412 peer_pdd->drm_priv); 2413 if (ret) { 2414 pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds); 2415 return ret; 2416 } 2417 } 2418 2419 pr_debug("map memory was successful for the BO\n"); 2420 /* create the dmabuf object and export the bo */ 2421 if (bo_bucket->alloc_flags 2422 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) { 2423 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR, 2424 &bo_bucket->dmabuf_fd, file); 2425 if (ret) 2426 return ret; 2427 } else { 2428 bo_bucket->dmabuf_fd = KFD_INVALID_FD; 2429 } 2430 2431 return 0; 2432 } 2433 2434 static int criu_restore_bos(struct kfd_process *p, 2435 struct kfd_ioctl_criu_args *args, 2436 uint64_t *priv_offset, 2437 uint64_t max_priv_data_size) 2438 { 2439 struct kfd_criu_bo_bucket *bo_buckets = NULL; 2440 struct kfd_criu_bo_priv_data *bo_privs = NULL; 2441 struct file **files = NULL; 2442 int ret = 0; 2443 uint32_t i = 0; 2444 2445 if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size) 2446 return -EINVAL; 2447 2448 /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */ 2449 amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info); 2450 2451 bo_buckets = kvmalloc_array(args->num_bos, sizeof(*bo_buckets), GFP_KERNEL); 2452 if (!bo_buckets) 2453 return -ENOMEM; 2454 2455 files = kvzalloc(args->num_bos * sizeof(struct file *), GFP_KERNEL); 2456 if (!files) { 2457 ret = -ENOMEM; 2458 goto exit; 2459 } 2460 2461 ret = copy_from_user(bo_buckets, (void __user *)args->bos, 2462 args->num_bos * sizeof(*bo_buckets)); 2463 if (ret) { 2464 pr_err("Failed to copy BOs information from user\n"); 2465 ret = -EFAULT; 2466 goto exit; 2467 } 2468 2469 bo_privs = kvmalloc_array(args->num_bos, sizeof(*bo_privs), GFP_KERNEL); 2470 if (!bo_privs) { 2471 ret = -ENOMEM; 2472 goto exit; 2473 } 2474 2475 ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset, 2476 args->num_bos * sizeof(*bo_privs)); 2477 if (ret) { 2478 pr_err("Failed to copy BOs information from user\n"); 2479 ret = -EFAULT; 2480 goto exit; 2481 } 2482 *priv_offset += args->num_bos * sizeof(*bo_privs); 2483 2484 /* Create and map new BOs */ 2485 for (; i < args->num_bos; i++) { 2486 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i], &files[i]); 2487 if (ret) { 2488 pr_debug("Failed to restore BO[%d] ret%d\n", i, ret); 2489 goto exit; 2490 } 2491 } /* done */ 2492 2493 /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */ 2494 ret = copy_to_user((void __user *)args->bos, 2495 bo_buckets, 2496 (args->num_bos * sizeof(*bo_buckets))); 2497 if (ret) 2498 ret = -EFAULT; 2499 2500 exit: 2501 commit_files(files, bo_buckets, i, ret); 2502 kvfree(files); 2503 kvfree(bo_buckets); 2504 kvfree(bo_privs); 2505 return ret; 2506 } 2507 2508 static int criu_restore_objects(struct file *filep, 2509 struct kfd_process *p, 2510 struct kfd_ioctl_criu_args *args, 2511 uint64_t *priv_offset, 2512 uint64_t max_priv_data_size) 2513 { 2514 int ret = 0; 2515 uint32_t i; 2516 2517 BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type)); 2518 BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type)); 2519 BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type)); 2520 2521 for (i = 0; i < args->num_objects; i++) { 2522 uint32_t object_type; 2523 2524 if (*priv_offset + sizeof(object_type) > max_priv_data_size) { 2525 pr_err("Invalid private data size\n"); 2526 return -EINVAL; 2527 } 2528 2529 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset)); 2530 if (ret) { 2531 pr_err("Failed to copy private information from user\n"); 2532 goto exit; 2533 } 2534 2535 switch (object_type) { 2536 case KFD_CRIU_OBJECT_TYPE_QUEUE: 2537 ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data, 2538 priv_offset, max_priv_data_size); 2539 if (ret) 2540 goto exit; 2541 break; 2542 case KFD_CRIU_OBJECT_TYPE_EVENT: 2543 ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data, 2544 priv_offset, max_priv_data_size); 2545 if (ret) 2546 goto exit; 2547 break; 2548 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE: 2549 ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data, 2550 priv_offset, max_priv_data_size); 2551 if (ret) 2552 goto exit; 2553 break; 2554 default: 2555 pr_err("Invalid object type:%u at index:%d\n", object_type, i); 2556 ret = -EINVAL; 2557 goto exit; 2558 } 2559 } 2560 exit: 2561 return ret; 2562 } 2563 2564 static int criu_restore(struct file *filep, 2565 struct kfd_process *p, 2566 struct kfd_ioctl_criu_args *args) 2567 { 2568 uint64_t priv_offset = 0; 2569 int ret = 0; 2570 2571 pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n", 2572 args->num_devices, args->num_bos, args->num_objects, args->priv_data_size); 2573 2574 if ((args->num_bos > 0 && !args->bos) || !args->devices || !args->priv_data || 2575 !args->priv_data_size || !args->num_devices) 2576 return -EINVAL; 2577 2578 mutex_lock(&p->mutex); 2579 2580 /* 2581 * Set the process to evicted state to avoid running any new queues before all the memory 2582 * mappings are ready. 2583 */ 2584 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE); 2585 if (ret) 2586 goto exit_unlock; 2587 2588 /* Each function will adjust priv_offset based on how many bytes they consumed */ 2589 ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size); 2590 if (ret) 2591 goto exit_unlock; 2592 2593 ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size); 2594 if (ret) 2595 goto exit_unlock; 2596 2597 ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size); 2598 if (ret) 2599 goto exit_unlock; 2600 2601 ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size); 2602 if (ret) 2603 goto exit_unlock; 2604 2605 if (priv_offset != args->priv_data_size) { 2606 pr_err("Invalid private data size\n"); 2607 ret = -EINVAL; 2608 } 2609 2610 exit_unlock: 2611 mutex_unlock(&p->mutex); 2612 if (ret) 2613 pr_err("Failed to restore CRIU ret:%d\n", ret); 2614 else 2615 pr_debug("CRIU restore successful\n"); 2616 2617 return ret; 2618 } 2619 2620 static int criu_unpause(struct file *filep, 2621 struct kfd_process *p, 2622 struct kfd_ioctl_criu_args *args) 2623 { 2624 int ret; 2625 2626 mutex_lock(&p->mutex); 2627 2628 if (!p->queues_paused) { 2629 mutex_unlock(&p->mutex); 2630 return -EINVAL; 2631 } 2632 2633 ret = kfd_process_restore_queues(p); 2634 if (ret) 2635 pr_err("Failed to unpause queues ret:%d\n", ret); 2636 else 2637 p->queues_paused = false; 2638 2639 mutex_unlock(&p->mutex); 2640 2641 return ret; 2642 } 2643 2644 static int criu_resume(struct file *filep, 2645 struct kfd_process *p, 2646 struct kfd_ioctl_criu_args *args) 2647 { 2648 struct kfd_process *target = NULL; 2649 struct pid *pid = NULL; 2650 int ret = 0; 2651 2652 pr_debug("Inside %s, target pid for criu restore: %d\n", __func__, 2653 args->pid); 2654 2655 pid = find_get_pid(args->pid); 2656 if (!pid) { 2657 pr_err("Cannot find pid info for %i\n", args->pid); 2658 return -ESRCH; 2659 } 2660 2661 pr_debug("calling kfd_lookup_process_by_pid\n"); 2662 target = kfd_lookup_process_by_pid(pid); 2663 2664 put_pid(pid); 2665 2666 if (!target) { 2667 pr_debug("Cannot find process info for %i\n", args->pid); 2668 return -ESRCH; 2669 } 2670 2671 mutex_lock(&target->mutex); 2672 ret = kfd_criu_resume_svm(target); 2673 if (ret) { 2674 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid); 2675 goto exit; 2676 } 2677 2678 ret = amdgpu_amdkfd_criu_resume(target->kgd_process_info); 2679 if (ret) 2680 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid); 2681 2682 exit: 2683 mutex_unlock(&target->mutex); 2684 2685 kfd_unref_process(target); 2686 return ret; 2687 } 2688 2689 static int criu_process_info(struct file *filep, 2690 struct kfd_process *p, 2691 struct kfd_ioctl_criu_args *args) 2692 { 2693 int ret = 0; 2694 2695 mutex_lock(&p->mutex); 2696 2697 if (!p->n_pdds) { 2698 pr_err("No pdd for given process\n"); 2699 ret = -ENODEV; 2700 goto err_unlock; 2701 } 2702 2703 ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT); 2704 if (ret) 2705 goto err_unlock; 2706 2707 p->queues_paused = true; 2708 2709 args->pid = task_pid_nr_ns(p->lead_thread, 2710 task_active_pid_ns(p->lead_thread)); 2711 2712 ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos, 2713 &args->num_objects, &args->priv_data_size); 2714 if (ret) 2715 goto err_unlock; 2716 2717 dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n", 2718 args->num_devices, args->num_bos, args->num_objects, 2719 args->priv_data_size); 2720 2721 err_unlock: 2722 if (ret) { 2723 kfd_process_restore_queues(p); 2724 p->queues_paused = false; 2725 } 2726 mutex_unlock(&p->mutex); 2727 return ret; 2728 } 2729 2730 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data) 2731 { 2732 struct kfd_ioctl_criu_args *args = data; 2733 int ret; 2734 2735 dev_dbg(kfd_device, "CRIU operation: %d\n", args->op); 2736 switch (args->op) { 2737 case KFD_CRIU_OP_PROCESS_INFO: 2738 ret = criu_process_info(filep, p, args); 2739 break; 2740 case KFD_CRIU_OP_CHECKPOINT: 2741 ret = criu_checkpoint(filep, p, args); 2742 break; 2743 case KFD_CRIU_OP_UNPAUSE: 2744 ret = criu_unpause(filep, p, args); 2745 break; 2746 case KFD_CRIU_OP_RESTORE: 2747 ret = criu_restore(filep, p, args); 2748 break; 2749 case KFD_CRIU_OP_RESUME: 2750 ret = criu_resume(filep, p, args); 2751 break; 2752 default: 2753 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op); 2754 ret = -EINVAL; 2755 break; 2756 } 2757 2758 if (ret) 2759 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret); 2760 2761 return ret; 2762 } 2763 2764 static int runtime_enable(struct kfd_process *p, uint64_t r_debug, 2765 bool enable_ttmp_setup) 2766 { 2767 int i = 0, ret = 0; 2768 2769 if (p->is_runtime_retry) 2770 goto retry; 2771 2772 if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) 2773 return -EBUSY; 2774 2775 for (i = 0; i < p->n_pdds; i++) { 2776 struct kfd_process_device *pdd = p->pdds[i]; 2777 2778 if (pdd->qpd.queue_count) 2779 return -EEXIST; 2780 2781 /* 2782 * Setup TTMPs by default. 2783 * Note that this call must remain here for MES ADD QUEUE to 2784 * skip_process_ctx_clear unconditionally as the first call to 2785 * SET_SHADER_DEBUGGER clears any stale process context data 2786 * saved in MES. 2787 */ 2788 if (pdd->dev->kfd->shared_resources.enable_mes) 2789 kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2790 } 2791 2792 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; 2793 p->runtime_info.r_debug = r_debug; 2794 p->runtime_info.ttmp_setup = enable_ttmp_setup; 2795 2796 if (p->runtime_info.ttmp_setup) { 2797 for (i = 0; i < p->n_pdds; i++) { 2798 struct kfd_process_device *pdd = p->pdds[i]; 2799 2800 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) { 2801 amdgpu_gfx_off_ctrl(pdd->dev->adev, false); 2802 pdd->dev->kfd2kgd->enable_debug_trap( 2803 pdd->dev->adev, 2804 true, 2805 pdd->dev->vm_info.last_vmid_kfd); 2806 } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2807 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap( 2808 pdd->dev->adev, 2809 false, 2810 0); 2811 } 2812 } 2813 } 2814 2815 retry: 2816 if (p->debug_trap_enabled) { 2817 if (!p->is_runtime_retry) { 2818 kfd_dbg_trap_activate(p); 2819 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2820 p, NULL, 0, false, NULL, 0); 2821 } 2822 2823 mutex_unlock(&p->mutex); 2824 ret = down_interruptible(&p->runtime_enable_sema); 2825 mutex_lock(&p->mutex); 2826 2827 p->is_runtime_retry = !!ret; 2828 } 2829 2830 return ret; 2831 } 2832 2833 static int runtime_disable(struct kfd_process *p) 2834 { 2835 int i = 0, ret; 2836 bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED; 2837 2838 p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED; 2839 p->runtime_info.r_debug = 0; 2840 2841 if (p->debug_trap_enabled) { 2842 if (was_enabled) 2843 kfd_dbg_trap_deactivate(p, false, 0); 2844 2845 if (!p->is_runtime_retry) 2846 kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME), 2847 p, NULL, 0, false, NULL, 0); 2848 2849 mutex_unlock(&p->mutex); 2850 ret = down_interruptible(&p->runtime_enable_sema); 2851 mutex_lock(&p->mutex); 2852 2853 p->is_runtime_retry = !!ret; 2854 if (ret) 2855 return ret; 2856 } 2857 2858 if (was_enabled && p->runtime_info.ttmp_setup) { 2859 for (i = 0; i < p->n_pdds; i++) { 2860 struct kfd_process_device *pdd = p->pdds[i]; 2861 2862 if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) 2863 amdgpu_gfx_off_ctrl(pdd->dev->adev, true); 2864 } 2865 } 2866 2867 p->runtime_info.ttmp_setup = false; 2868 2869 /* disable ttmp setup */ 2870 for (i = 0; i < p->n_pdds; i++) { 2871 struct kfd_process_device *pdd = p->pdds[i]; 2872 2873 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) { 2874 pdd->spi_dbg_override = 2875 pdd->dev->kfd2kgd->disable_debug_trap( 2876 pdd->dev->adev, 2877 false, 2878 pdd->dev->vm_info.last_vmid_kfd); 2879 2880 if (!pdd->dev->kfd->shared_resources.enable_mes) 2881 debug_refresh_runlist(pdd->dev->dqm); 2882 else 2883 kfd_dbg_set_mes_debug_mode(pdd, 2884 !kfd_dbg_has_cwsr_workaround(pdd->dev)); 2885 } 2886 } 2887 2888 return 0; 2889 } 2890 2891 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data) 2892 { 2893 struct kfd_ioctl_runtime_enable_args *args = data; 2894 int r; 2895 2896 mutex_lock(&p->mutex); 2897 2898 if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK) 2899 r = runtime_enable(p, args->r_debug, 2900 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK)); 2901 else 2902 r = runtime_disable(p); 2903 2904 mutex_unlock(&p->mutex); 2905 2906 return r; 2907 } 2908 2909 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data) 2910 { 2911 struct kfd_ioctl_dbg_trap_args *args = data; 2912 struct task_struct *thread = NULL; 2913 struct mm_struct *mm = NULL; 2914 struct pid *pid = NULL; 2915 struct kfd_process *target = NULL; 2916 struct kfd_process_device *pdd = NULL; 2917 int r = 0; 2918 2919 if (sched_policy == KFD_SCHED_POLICY_NO_HWS) { 2920 pr_err("Debugging does not support sched_policy %i", sched_policy); 2921 return -EINVAL; 2922 } 2923 2924 pid = find_get_pid(args->pid); 2925 if (!pid) { 2926 pr_debug("Cannot find pid info for %i\n", args->pid); 2927 r = -ESRCH; 2928 goto out; 2929 } 2930 2931 thread = get_pid_task(pid, PIDTYPE_PID); 2932 if (!thread) { 2933 r = -ESRCH; 2934 goto out; 2935 } 2936 2937 mm = get_task_mm(thread); 2938 if (!mm) { 2939 r = -ESRCH; 2940 goto out; 2941 } 2942 2943 if (args->op == KFD_IOC_DBG_TRAP_ENABLE) { 2944 bool create_process; 2945 2946 rcu_read_lock(); 2947 create_process = thread && thread != current && ptrace_parent(thread) == current; 2948 rcu_read_unlock(); 2949 2950 target = create_process ? kfd_create_process(thread) : 2951 kfd_lookup_process_by_pid(pid); 2952 } else { 2953 target = kfd_lookup_process_by_pid(pid); 2954 } 2955 2956 if (IS_ERR_OR_NULL(target)) { 2957 pr_debug("Cannot find process PID %i to debug\n", args->pid); 2958 r = target ? PTR_ERR(target) : -ESRCH; 2959 target = NULL; 2960 goto out; 2961 } 2962 2963 /* Check if target is still PTRACED. */ 2964 rcu_read_lock(); 2965 if (target != p && args->op != KFD_IOC_DBG_TRAP_DISABLE 2966 && ptrace_parent(target->lead_thread) != current) { 2967 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid); 2968 r = -EPERM; 2969 } 2970 rcu_read_unlock(); 2971 2972 if (r) 2973 goto out; 2974 2975 mutex_lock(&target->mutex); 2976 2977 if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) { 2978 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op); 2979 r = -EINVAL; 2980 goto unlock_out; 2981 } 2982 2983 if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED && 2984 (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE || 2985 args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE || 2986 args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES || 2987 args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES || 2988 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 2989 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH || 2990 args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) { 2991 r = -EPERM; 2992 goto unlock_out; 2993 } 2994 2995 if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH || 2996 args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) { 2997 int user_gpu_id = kfd_process_get_user_gpu_id(target, 2998 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ? 2999 args->set_node_address_watch.gpu_id : 3000 args->clear_node_address_watch.gpu_id); 3001 3002 pdd = kfd_process_device_data_by_id(target, user_gpu_id); 3003 if (user_gpu_id == -EINVAL || !pdd) { 3004 r = -ENODEV; 3005 goto unlock_out; 3006 } 3007 } 3008 3009 switch (args->op) { 3010 case KFD_IOC_DBG_TRAP_ENABLE: 3011 if (target != p) 3012 target->debugger_process = p; 3013 3014 r = kfd_dbg_trap_enable(target, 3015 args->enable.dbg_fd, 3016 (void __user *)args->enable.rinfo_ptr, 3017 &args->enable.rinfo_size); 3018 if (!r) 3019 target->exception_enable_mask = args->enable.exception_mask; 3020 3021 break; 3022 case KFD_IOC_DBG_TRAP_DISABLE: 3023 r = kfd_dbg_trap_disable(target); 3024 break; 3025 case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT: 3026 r = kfd_dbg_send_exception_to_runtime(target, 3027 args->send_runtime_event.gpu_id, 3028 args->send_runtime_event.queue_id, 3029 args->send_runtime_event.exception_mask); 3030 break; 3031 case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED: 3032 kfd_dbg_set_enabled_debug_exception_mask(target, 3033 args->set_exceptions_enabled.exception_mask); 3034 break; 3035 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: 3036 r = kfd_dbg_trap_set_wave_launch_override(target, 3037 args->launch_override.override_mode, 3038 args->launch_override.enable_mask, 3039 args->launch_override.support_request_mask, 3040 &args->launch_override.enable_mask, 3041 &args->launch_override.support_request_mask); 3042 break; 3043 case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: 3044 r = kfd_dbg_trap_set_wave_launch_mode(target, 3045 args->launch_mode.launch_mode); 3046 break; 3047 case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES: 3048 r = suspend_queues(target, 3049 args->suspend_queues.num_queues, 3050 args->suspend_queues.grace_period, 3051 args->suspend_queues.exception_mask, 3052 (uint32_t *)args->suspend_queues.queue_array_ptr); 3053 3054 break; 3055 case KFD_IOC_DBG_TRAP_RESUME_QUEUES: 3056 r = resume_queues(target, args->resume_queues.num_queues, 3057 (uint32_t *)args->resume_queues.queue_array_ptr); 3058 break; 3059 case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH: 3060 r = kfd_dbg_trap_set_dev_address_watch(pdd, 3061 args->set_node_address_watch.address, 3062 args->set_node_address_watch.mask, 3063 &args->set_node_address_watch.id, 3064 args->set_node_address_watch.mode); 3065 break; 3066 case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH: 3067 r = kfd_dbg_trap_clear_dev_address_watch(pdd, 3068 args->clear_node_address_watch.id); 3069 break; 3070 case KFD_IOC_DBG_TRAP_SET_FLAGS: 3071 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags); 3072 break; 3073 case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT: 3074 r = kfd_dbg_ev_query_debug_event(target, 3075 &args->query_debug_event.queue_id, 3076 &args->query_debug_event.gpu_id, 3077 args->query_debug_event.exception_mask, 3078 &args->query_debug_event.exception_mask); 3079 break; 3080 case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO: 3081 r = kfd_dbg_trap_query_exception_info(target, 3082 args->query_exception_info.source_id, 3083 args->query_exception_info.exception_code, 3084 args->query_exception_info.clear_exception, 3085 (void __user *)args->query_exception_info.info_ptr, 3086 &args->query_exception_info.info_size); 3087 break; 3088 case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT: 3089 r = pqm_get_queue_snapshot(&target->pqm, 3090 args->queue_snapshot.exception_mask, 3091 (void __user *)args->queue_snapshot.snapshot_buf_ptr, 3092 &args->queue_snapshot.num_queues, 3093 &args->queue_snapshot.entry_size); 3094 break; 3095 case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT: 3096 r = kfd_dbg_trap_device_snapshot(target, 3097 args->device_snapshot.exception_mask, 3098 (void __user *)args->device_snapshot.snapshot_buf_ptr, 3099 &args->device_snapshot.num_devices, 3100 &args->device_snapshot.entry_size); 3101 break; 3102 default: 3103 pr_err("Invalid option: %i\n", args->op); 3104 r = -EINVAL; 3105 } 3106 3107 unlock_out: 3108 mutex_unlock(&target->mutex); 3109 3110 out: 3111 if (thread) 3112 put_task_struct(thread); 3113 3114 if (mm) 3115 mmput(mm); 3116 3117 if (pid) 3118 put_pid(pid); 3119 3120 if (target) 3121 kfd_unref_process(target); 3122 3123 return r; 3124 } 3125 3126 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \ 3127 [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \ 3128 .cmd_drv = 0, .name = #ioctl} 3129 3130 /** Ioctl table */ 3131 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { 3132 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION, 3133 kfd_ioctl_get_version, 0), 3134 3135 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE, 3136 kfd_ioctl_create_queue, 0), 3137 3138 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE, 3139 kfd_ioctl_destroy_queue, 0), 3140 3141 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY, 3142 kfd_ioctl_set_memory_policy, 0), 3143 3144 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS, 3145 kfd_ioctl_get_clock_counters, 0), 3146 3147 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES, 3148 kfd_ioctl_get_process_apertures, 0), 3149 3150 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE, 3151 kfd_ioctl_update_queue, 0), 3152 3153 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT, 3154 kfd_ioctl_create_event, 0), 3155 3156 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT, 3157 kfd_ioctl_destroy_event, 0), 3158 3159 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT, 3160 kfd_ioctl_set_event, 0), 3161 3162 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT, 3163 kfd_ioctl_reset_event, 0), 3164 3165 AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS, 3166 kfd_ioctl_wait_events, 0), 3167 3168 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED, 3169 kfd_ioctl_dbg_register, 0), 3170 3171 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED, 3172 kfd_ioctl_dbg_unregister, 0), 3173 3174 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED, 3175 kfd_ioctl_dbg_address_watch, 0), 3176 3177 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED, 3178 kfd_ioctl_dbg_wave_control, 0), 3179 3180 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA, 3181 kfd_ioctl_set_scratch_backing_va, 0), 3182 3183 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG, 3184 kfd_ioctl_get_tile_config, 0), 3185 3186 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER, 3187 kfd_ioctl_set_trap_handler, 0), 3188 3189 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW, 3190 kfd_ioctl_get_process_apertures_new, 0), 3191 3192 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM, 3193 kfd_ioctl_acquire_vm, 0), 3194 3195 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU, 3196 kfd_ioctl_alloc_memory_of_gpu, 0), 3197 3198 AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU, 3199 kfd_ioctl_free_memory_of_gpu, 0), 3200 3201 AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU, 3202 kfd_ioctl_map_memory_to_gpu, 0), 3203 3204 AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU, 3205 kfd_ioctl_unmap_memory_from_gpu, 0), 3206 3207 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK, 3208 kfd_ioctl_set_cu_mask, 0), 3209 3210 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE, 3211 kfd_ioctl_get_queue_wave_state, 0), 3212 3213 AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO, 3214 kfd_ioctl_get_dmabuf_info, 0), 3215 3216 AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, 3217 kfd_ioctl_import_dmabuf, 0), 3218 3219 AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, 3220 kfd_ioctl_alloc_queue_gws, 0), 3221 3222 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS, 3223 kfd_ioctl_smi_events, 0), 3224 3225 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SVM, kfd_ioctl_svm, 0), 3226 3227 AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE, 3228 kfd_ioctl_set_xnack_mode, 0), 3229 3230 AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP, 3231 kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE), 3232 3233 AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY, 3234 kfd_ioctl_get_available_memory, 0), 3235 3236 AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF, 3237 kfd_ioctl_export_dmabuf, 0), 3238 3239 AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE, 3240 kfd_ioctl_runtime_enable, 0), 3241 3242 AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP, 3243 kfd_ioctl_set_debug_trap, 0), 3244 }; 3245 3246 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) 3247 3248 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 3249 { 3250 struct kfd_process *process; 3251 amdkfd_ioctl_t *func; 3252 const struct amdkfd_ioctl_desc *ioctl = NULL; 3253 unsigned int nr = _IOC_NR(cmd); 3254 char stack_kdata[128]; 3255 char *kdata = NULL; 3256 unsigned int usize, asize; 3257 int retcode = -EINVAL; 3258 bool ptrace_attached = false; 3259 3260 if (nr >= AMDKFD_CORE_IOCTL_COUNT) { 3261 retcode = -ENOTTY; 3262 goto err_i1; 3263 } 3264 3265 if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) { 3266 u32 amdkfd_size; 3267 3268 ioctl = &amdkfd_ioctls[nr]; 3269 3270 amdkfd_size = _IOC_SIZE(ioctl->cmd); 3271 usize = asize = _IOC_SIZE(cmd); 3272 if (amdkfd_size > asize) 3273 asize = amdkfd_size; 3274 3275 cmd = ioctl->cmd; 3276 } else { 3277 retcode = -ENOTTY; 3278 goto err_i1; 3279 } 3280 3281 dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg); 3282 3283 /* Get the process struct from the filep. Only the process 3284 * that opened /dev/kfd can use the file descriptor. Child 3285 * processes need to create their own KFD device context. 3286 */ 3287 process = filep->private_data; 3288 3289 rcu_read_lock(); 3290 if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) && 3291 ptrace_parent(process->lead_thread) == current) 3292 ptrace_attached = true; 3293 rcu_read_unlock(); 3294 3295 if (process->lead_thread != current->group_leader 3296 && !ptrace_attached) { 3297 dev_dbg(kfd_device, "Using KFD FD in wrong process\n"); 3298 retcode = -EBADF; 3299 goto err_i1; 3300 } 3301 3302 /* Do not trust userspace, use our own definition */ 3303 func = ioctl->func; 3304 3305 if (unlikely(!func)) { 3306 dev_dbg(kfd_device, "no function\n"); 3307 retcode = -EINVAL; 3308 goto err_i1; 3309 } 3310 3311 /* 3312 * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support 3313 * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a 3314 * more priviledged access. 3315 */ 3316 if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) { 3317 if (!capable(CAP_CHECKPOINT_RESTORE) && 3318 !capable(CAP_SYS_ADMIN)) { 3319 retcode = -EACCES; 3320 goto err_i1; 3321 } 3322 } 3323 3324 if (cmd & (IOC_IN | IOC_OUT)) { 3325 if (asize <= sizeof(stack_kdata)) { 3326 kdata = stack_kdata; 3327 } else { 3328 kdata = kmalloc(asize, GFP_KERNEL); 3329 if (!kdata) { 3330 retcode = -ENOMEM; 3331 goto err_i1; 3332 } 3333 } 3334 if (asize > usize) 3335 memset(kdata + usize, 0, asize - usize); 3336 } 3337 3338 if (cmd & IOC_IN) { 3339 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) { 3340 retcode = -EFAULT; 3341 goto err_i1; 3342 } 3343 } else if (cmd & IOC_OUT) { 3344 memset(kdata, 0, usize); 3345 } 3346 3347 retcode = func(filep, process, kdata); 3348 3349 if (cmd & IOC_OUT) 3350 if (copy_to_user((void __user *)arg, kdata, usize) != 0) 3351 retcode = -EFAULT; 3352 3353 err_i1: 3354 if (!ioctl) 3355 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n", 3356 task_pid_nr(current), cmd, nr); 3357 3358 if (kdata != stack_kdata) 3359 kfree(kdata); 3360 3361 if (retcode) 3362 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n", 3363 nr, arg, retcode); 3364 3365 return retcode; 3366 } 3367 3368 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, 3369 struct vm_area_struct *vma) 3370 { 3371 phys_addr_t address; 3372 3373 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 3374 return -EINVAL; 3375 3376 if (PAGE_SIZE > 4096) 3377 return -EINVAL; 3378 3379 address = dev->adev->rmmio_remap.bus_addr; 3380 3381 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | 3382 VM_DONTDUMP | VM_PFNMAP); 3383 3384 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 3385 3386 pr_debug("process pid %d mapping mmio page\n" 3387 " target user address == 0x%08llX\n" 3388 " physical address == 0x%08llX\n" 3389 " vm_flags == 0x%04lX\n" 3390 " size == 0x%04lX\n", 3391 process->lead_thread->pid, (unsigned long long) vma->vm_start, 3392 address, vma->vm_flags, PAGE_SIZE); 3393 3394 return io_remap_pfn_range(vma, 3395 vma->vm_start, 3396 address >> PAGE_SHIFT, 3397 PAGE_SIZE, 3398 vma->vm_page_prot); 3399 } 3400 3401 3402 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma) 3403 { 3404 struct kfd_process *process; 3405 struct kfd_node *dev = NULL; 3406 unsigned long mmap_offset; 3407 unsigned int gpu_id; 3408 3409 process = kfd_get_process(current); 3410 if (IS_ERR(process)) 3411 return PTR_ERR(process); 3412 3413 mmap_offset = vma->vm_pgoff << PAGE_SHIFT; 3414 gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset); 3415 if (gpu_id) 3416 dev = kfd_device_by_id(gpu_id); 3417 3418 switch (mmap_offset & KFD_MMAP_TYPE_MASK) { 3419 case KFD_MMAP_TYPE_DOORBELL: 3420 if (!dev) 3421 return -ENODEV; 3422 return kfd_doorbell_mmap(dev, process, vma); 3423 3424 case KFD_MMAP_TYPE_EVENTS: 3425 return kfd_event_mmap(process, vma); 3426 3427 case KFD_MMAP_TYPE_RESERVED_MEM: 3428 if (!dev) 3429 return -ENODEV; 3430 return kfd_reserved_mem_mmap(dev, process, vma); 3431 case KFD_MMAP_TYPE_MMIO: 3432 if (!dev) 3433 return -ENODEV; 3434 return kfd_mmio_mmap(dev, process, vma); 3435 } 3436 3437 return -EFAULT; 3438 } 3439