1 /* 2 * Copyright 2024 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #ifndef __UMC_V8_14_H__ 24 #define __UMC_V8_14_H__ 25 26 #include "soc15_common.h" 27 #include "amdgpu.h" 28 29 /* number of umc channel instance with memory map register access */ 30 #define UMC_V8_14_CHANNEL_INSTANCE_NUM 2 31 /* number of umc instance with memory map register access */ 32 #define UMC_V8_14_UMC_INSTANCE_NUM(adev) ((adev)->umc.node_inst_num) 33 34 /* Total channel instances for all available umc nodes */ 35 #define UMC_V8_14_TOTAL_CHANNEL_NUM(adev) \ 36 (UMC_V8_14_CHANNEL_INSTANCE_NUM * (adev)->gmc.num_umc) 37 38 /* UMC register per channel offset */ 39 #define UMC_V8_14_PER_CHANNEL_OFFSET 0x400 40 41 #define UMC_V8_14_INST_DIST 0x40000 42 43 /* EccErrCnt max value */ 44 #define UMC_V8_14_CE_CNT_MAX 0xffff 45 /* umc ce interrupt threshold */ 46 #define UMC_V8_14_CE_INT_THRESHOLD 0xffff 47 /* umc ce count initial value */ 48 #define UMC_V8_14_CE_CNT_INIT (UMC_V8_14_CE_CNT_MAX - UMC_V8_14_CE_INT_THRESHOLD) 49 50 extern struct amdgpu_umc_ras umc_v8_14_ras; 51 #endif 52