1 /* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #include "amdgpu.h" 24 #include "smuio_v13_0_3.h" 25 #include "soc15_common.h" 26 #include "smuio/smuio_13_0_3_offset.h" 27 #include "smuio/smuio_13_0_3_sh_mask.h" 28 29 #define PKG_TYPE_MASK 0x00000003L 30 31 /** 32 * smuio_v13_0_3_get_die_id - query die id from FCH. 33 * 34 * @adev: amdgpu device pointer 35 * 36 * Returns die id 37 */ 38 static u32 smuio_v13_0_3_get_die_id(struct amdgpu_device *adev) 39 { 40 u32 data, die_id; 41 42 data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG); 43 die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID); 44 45 return die_id; 46 } 47 48 /** 49 * smuio_v13_0_3_get_socket_id - query socket id from FCH 50 * 51 * @adev: amdgpu device pointer 52 * 53 * Returns socket id 54 */ 55 static u32 smuio_v13_0_3_get_socket_id(struct amdgpu_device *adev) 56 { 57 u32 data, socket_id; 58 59 data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG); 60 socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID); 61 62 return socket_id; 63 } 64 65 /** 66 * smuio_v13_0_3_get_pkg_type - query package type set by MP1/bootcode 67 * 68 * @adev: amdgpu device pointer 69 * 70 * Returns package type 71 */ 72 73 static enum amdgpu_pkg_type smuio_v13_0_3_get_pkg_type(struct amdgpu_device *adev) 74 { 75 enum amdgpu_pkg_type pkg_type; 76 u32 data; 77 78 data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG); 79 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE); 80 /* pkg_type[4:0] 81 * 82 * bit 1 == 1 APU form factor 83 * 84 * b0100 - b1111 - Reserved 85 */ 86 switch (data & PKG_TYPE_MASK) { 87 case 0x0: 88 pkg_type = AMDGPU_PKG_TYPE_CEM; 89 break; 90 case 0x1: 91 pkg_type = AMDGPU_PKG_TYPE_OAM; 92 break; 93 case 0x2: 94 pkg_type = AMDGPU_PKG_TYPE_APU; 95 break; 96 default: 97 pkg_type = AMDGPU_PKG_TYPE_UNKNOWN; 98 break; 99 } 100 101 return pkg_type; 102 } 103 104 105 const struct amdgpu_smuio_funcs smuio_v13_0_3_funcs = { 106 .get_die_id = smuio_v13_0_3_get_die_id, 107 .get_socket_id = smuio_v13_0_3_get_socket_id, 108 .get_pkg_type = smuio_v13_0_3_get_pkg_type, 109 }; 110