xref: /linux/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.h (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e)
1*4aeaf3cbSSaleemkhan Jamadar /*
2*4aeaf3cbSSaleemkhan Jamadar  * Copyright 2025 Advanced Micro Devices, Inc.
3*4aeaf3cbSSaleemkhan Jamadar  *
4*4aeaf3cbSSaleemkhan Jamadar  * Permission is hereby granted, free of charge, to any person obtaining a
5*4aeaf3cbSSaleemkhan Jamadar  * copy of this software and associated documentation files (the "Software"),
6*4aeaf3cbSSaleemkhan Jamadar  * to deal in the Software without restriction, including without limitation
7*4aeaf3cbSSaleemkhan Jamadar  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4aeaf3cbSSaleemkhan Jamadar  * and/or sell copies of the Software, and to permit persons to whom the
9*4aeaf3cbSSaleemkhan Jamadar  * Software is furnished to do so, subject to the following conditions:
10*4aeaf3cbSSaleemkhan Jamadar  *
11*4aeaf3cbSSaleemkhan Jamadar  * The above copyright notice and this permission notice shall be included in
12*4aeaf3cbSSaleemkhan Jamadar  * all copies or substantial portions of the Software.
13*4aeaf3cbSSaleemkhan Jamadar  *
14*4aeaf3cbSSaleemkhan Jamadar  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4aeaf3cbSSaleemkhan Jamadar  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4aeaf3cbSSaleemkhan Jamadar  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4aeaf3cbSSaleemkhan Jamadar  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4aeaf3cbSSaleemkhan Jamadar  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4aeaf3cbSSaleemkhan Jamadar  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4aeaf3cbSSaleemkhan Jamadar  * OTHER DEALINGS IN THE SOFTWARE.
21*4aeaf3cbSSaleemkhan Jamadar  *
22*4aeaf3cbSSaleemkhan Jamadar  */
23*4aeaf3cbSSaleemkhan Jamadar 
24*4aeaf3cbSSaleemkhan Jamadar #ifndef __JPEG_V5_3_0_H__
25*4aeaf3cbSSaleemkhan Jamadar #define __JPEG_V5_3_0_H__
26*4aeaf3cbSSaleemkhan Jamadar 
27*4aeaf3cbSSaleemkhan Jamadar #define vcnipJPEG_CGC_GATE                                 0x4160
28*4aeaf3cbSSaleemkhan Jamadar #define vcnipJPEG_CGC_CTRL                                 0x4161
29*4aeaf3cbSSaleemkhan Jamadar #define vcnipJPEG_SYS_INT_EN                               0x4141
30*4aeaf3cbSSaleemkhan Jamadar #define vcnipUVD_NO_OP                                     0x0029
31*4aeaf3cbSSaleemkhan Jamadar #define vcnipJPEG_DEC_GFX10_ADDR_CONFIG                    0x404A
32*4aeaf3cbSSaleemkhan Jamadar 
33*4aeaf3cbSSaleemkhan Jamadar extern const struct amdgpu_ip_block_version jpeg_v5_3_0_ip_block;
34*4aeaf3cbSSaleemkhan Jamadar 
35*4aeaf3cbSSaleemkhan Jamadar #endif /* __JPEG_V5_0_0_H__ */
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