1 /* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #include "amdgpu.h" 24 #include "df_v4_3.h" 25 26 #include "df/df_4_3_offset.h" 27 #include "df/df_4_3_sh_mask.h" 28 29 static bool df_v4_3_query_ras_poison_mode(struct amdgpu_device *adev) 30 { 31 uint32_t hw_assert_msklo, hw_assert_mskhi; 32 uint32_t v0, v1, v28, v31; 33 34 hw_assert_msklo = RREG32_SOC15(DF, 0, 35 regDF_CS_UMC_AON0_HardwareAssertMaskLow); 36 hw_assert_mskhi = RREG32_SOC15(DF, 0, 37 regDF_NCS_PG0_HardwareAssertMaskHigh); 38 39 v0 = REG_GET_FIELD(hw_assert_msklo, 40 DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk0); 41 v1 = REG_GET_FIELD(hw_assert_msklo, 42 DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk1); 43 v28 = REG_GET_FIELD(hw_assert_mskhi, 44 DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk28); 45 v31 = REG_GET_FIELD(hw_assert_mskhi, 46 DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk31); 47 48 if (v0 && v1 && v28 && v31) 49 return true; 50 else if (!v0 && !v1 && !v28 && !v31) 51 return false; 52 else { 53 dev_warn(adev->dev, "DF poison setting is inconsistent(%d:%d:%d:%d)!\n", 54 v0, v1, v28, v31); 55 return false; 56 } 57 } 58 59 const struct amdgpu_df_funcs df_v4_3_funcs = { 60 .query_ras_poison_mode = df_v4_3_query_ras_poison_mode, 61 }; 62