1d38ceaf9SAlex Deucher /* 2d38ceaf9SAlex Deucher * Copyright 2008 Advanced Micro Devices, Inc. 3d38ceaf9SAlex Deucher * 4d38ceaf9SAlex Deucher * Permission is hereby granted, free of charge, to any person obtaining a 5d38ceaf9SAlex Deucher * copy of this software and associated documentation files (the "Software"), 6d38ceaf9SAlex Deucher * to deal in the Software without restriction, including without limitation 7d38ceaf9SAlex Deucher * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8d38ceaf9SAlex Deucher * and/or sell copies of the Software, and to permit persons to whom the 9d38ceaf9SAlex Deucher * Software is furnished to do so, subject to the following conditions: 10d38ceaf9SAlex Deucher * 11d38ceaf9SAlex Deucher * The above copyright notice and this permission notice shall be included in 12d38ceaf9SAlex Deucher * all copies or substantial portions of the Software. 13d38ceaf9SAlex Deucher * 14d38ceaf9SAlex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15d38ceaf9SAlex Deucher * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16d38ceaf9SAlex Deucher * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17d38ceaf9SAlex Deucher * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18d38ceaf9SAlex Deucher * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19d38ceaf9SAlex Deucher * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20d38ceaf9SAlex Deucher * OTHER DEALINGS IN THE SOFTWARE. 21d38ceaf9SAlex Deucher * 22d38ceaf9SAlex Deucher * Author: Stanislaw Skowronek 23d38ceaf9SAlex Deucher */ 24d38ceaf9SAlex Deucher 25d38ceaf9SAlex Deucher #ifndef ATOM_H 26d38ceaf9SAlex Deucher #define ATOM_H 27d38ceaf9SAlex Deucher 28d38ceaf9SAlex Deucher #include <linux/types.h> 29841d0023SSam Ravnborg 30841d0023SSam Ravnborg struct drm_device; 31d38ceaf9SAlex Deucher 32d38ceaf9SAlex Deucher #define ATOM_BIOS_MAGIC 0xAA55 33d38ceaf9SAlex Deucher #define ATOM_ATI_MAGIC_PTR 0x30 34d38ceaf9SAlex Deucher #define ATOM_ATI_MAGIC " 761295520" 35d38ceaf9SAlex Deucher #define ATOM_ROM_TABLE_PTR 0x48 36d38ceaf9SAlex Deucher 37d38ceaf9SAlex Deucher #define ATOM_ROM_MAGIC "ATOM" 38d38ceaf9SAlex Deucher #define ATOM_ROM_MAGIC_PTR 4 39d38ceaf9SAlex Deucher 40d38ceaf9SAlex Deucher #define ATOM_ROM_MSG_PTR 0x10 41d38ceaf9SAlex Deucher #define ATOM_ROM_CMD_PTR 0x1E 42d38ceaf9SAlex Deucher #define ATOM_ROM_DATA_PTR 0x20 43d38ceaf9SAlex Deucher 44d38ceaf9SAlex Deucher #define ATOM_CMD_INIT 0 45d38ceaf9SAlex Deucher #define ATOM_CMD_SETSCLK 0x0A 46d38ceaf9SAlex Deucher #define ATOM_CMD_SETMCLK 0x0B 47d38ceaf9SAlex Deucher #define ATOM_CMD_SETPCLK 0x0C 48d38ceaf9SAlex Deucher #define ATOM_CMD_SPDFANCNTL 0x39 49d38ceaf9SAlex Deucher 50d38ceaf9SAlex Deucher #define ATOM_DATA_FWI_PTR 0xC 51d38ceaf9SAlex Deucher #define ATOM_DATA_IIO_PTR 0x32 52d38ceaf9SAlex Deucher 53d38ceaf9SAlex Deucher #define ATOM_FWI_DEFSCLK_PTR 8 54d38ceaf9SAlex Deucher #define ATOM_FWI_DEFMCLK_PTR 0xC 55d38ceaf9SAlex Deucher #define ATOM_FWI_MAXSCLK_PTR 0x24 56d38ceaf9SAlex Deucher #define ATOM_FWI_MAXMCLK_PTR 0x28 57d38ceaf9SAlex Deucher 58d38ceaf9SAlex Deucher #define ATOM_CT_SIZE_PTR 0 59d38ceaf9SAlex Deucher #define ATOM_CT_WS_PTR 4 60d38ceaf9SAlex Deucher #define ATOM_CT_PS_PTR 5 61d38ceaf9SAlex Deucher #define ATOM_CT_PS_MASK 0x7F 62d38ceaf9SAlex Deucher #define ATOM_CT_CODE_PTR 6 63d38ceaf9SAlex Deucher 64c2fe16aaSAlex Deucher #define ATOM_OP_CNT 127 65d38ceaf9SAlex Deucher #define ATOM_OP_EOT 91 66d38ceaf9SAlex Deucher 67d38ceaf9SAlex Deucher #define ATOM_CASE_MAGIC 0x63 68d38ceaf9SAlex Deucher #define ATOM_CASE_END 0x5A5A 69d38ceaf9SAlex Deucher 70d38ceaf9SAlex Deucher #define ATOM_ARG_REG 0 71d38ceaf9SAlex Deucher #define ATOM_ARG_PS 1 72d38ceaf9SAlex Deucher #define ATOM_ARG_WS 2 73d38ceaf9SAlex Deucher #define ATOM_ARG_FB 3 74d38ceaf9SAlex Deucher #define ATOM_ARG_ID 4 75d38ceaf9SAlex Deucher #define ATOM_ARG_IMM 5 76d38ceaf9SAlex Deucher #define ATOM_ARG_PLL 6 77d38ceaf9SAlex Deucher #define ATOM_ARG_MC 7 78d38ceaf9SAlex Deucher 79d38ceaf9SAlex Deucher #define ATOM_SRC_DWORD 0 80d38ceaf9SAlex Deucher #define ATOM_SRC_WORD0 1 81d38ceaf9SAlex Deucher #define ATOM_SRC_WORD8 2 82d38ceaf9SAlex Deucher #define ATOM_SRC_WORD16 3 83d38ceaf9SAlex Deucher #define ATOM_SRC_BYTE0 4 84d38ceaf9SAlex Deucher #define ATOM_SRC_BYTE8 5 85d38ceaf9SAlex Deucher #define ATOM_SRC_BYTE16 6 86d38ceaf9SAlex Deucher #define ATOM_SRC_BYTE24 7 87d38ceaf9SAlex Deucher 88d38ceaf9SAlex Deucher #define ATOM_WS_QUOTIENT 0x40 89d38ceaf9SAlex Deucher #define ATOM_WS_REMAINDER 0x41 90d38ceaf9SAlex Deucher #define ATOM_WS_DATAPTR 0x42 91d38ceaf9SAlex Deucher #define ATOM_WS_SHIFT 0x43 92d38ceaf9SAlex Deucher #define ATOM_WS_OR_MASK 0x44 93d38ceaf9SAlex Deucher #define ATOM_WS_AND_MASK 0x45 94d38ceaf9SAlex Deucher #define ATOM_WS_FB_WINDOW 0x46 95d38ceaf9SAlex Deucher #define ATOM_WS_ATTRIBUTES 0x47 96d38ceaf9SAlex Deucher #define ATOM_WS_REGPTR 0x48 97d38ceaf9SAlex Deucher 98d38ceaf9SAlex Deucher #define ATOM_IIO_NOP 0 99d38ceaf9SAlex Deucher #define ATOM_IIO_START 1 100d38ceaf9SAlex Deucher #define ATOM_IIO_READ 2 101d38ceaf9SAlex Deucher #define ATOM_IIO_WRITE 3 102d38ceaf9SAlex Deucher #define ATOM_IIO_CLEAR 4 103d38ceaf9SAlex Deucher #define ATOM_IIO_SET 5 104d38ceaf9SAlex Deucher #define ATOM_IIO_MOVE_INDEX 6 105d38ceaf9SAlex Deucher #define ATOM_IIO_MOVE_ATTR 7 106d38ceaf9SAlex Deucher #define ATOM_IIO_MOVE_DATA 8 107d38ceaf9SAlex Deucher #define ATOM_IIO_END 9 108d38ceaf9SAlex Deucher 109d38ceaf9SAlex Deucher #define ATOM_IO_MM 0 110d38ceaf9SAlex Deucher #define ATOM_IO_PCI 1 111d38ceaf9SAlex Deucher #define ATOM_IO_SYSIO 2 112d38ceaf9SAlex Deucher #define ATOM_IO_IIO 0x80 113d38ceaf9SAlex Deucher 11429b4c589SJiawei Gu #define STRLEN_NORMAL 32 11529b4c589SJiawei Gu #define STRLEN_LONG 64 11629b4c589SJiawei Gu #define STRLEN_VERYLONG 254 11729b4c589SJiawei Gu 118d38ceaf9SAlex Deucher struct card_info { 119d38ceaf9SAlex Deucher struct drm_device *dev; 120d0d69280SSrinivasan Shanmugam void (*reg_write)(struct card_info *info, 121d0d69280SSrinivasan Shanmugam u32 reg, uint32_t val); /* filled by driver */ 122d0d69280SSrinivasan Shanmugam uint32_t (*reg_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 123d0d69280SSrinivasan Shanmugam void (*mc_write)(struct card_info *info, 124d0d69280SSrinivasan Shanmugam u32 reg, uint32_t val); /* filled by driver */ 125d0d69280SSrinivasan Shanmugam uint32_t (*mc_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 126d0d69280SSrinivasan Shanmugam void (*pll_write)(struct card_info *info, 127d0d69280SSrinivasan Shanmugam u32 reg, uint32_t val); /* filled by driver */ 128d0d69280SSrinivasan Shanmugam uint32_t (*pll_read)(struct card_info *info, uint32_t reg); /* filled by driver */ 129d38ceaf9SAlex Deucher }; 130d38ceaf9SAlex Deucher 131d38ceaf9SAlex Deucher struct atom_context { 132d38ceaf9SAlex Deucher struct card_info *card; 133d38ceaf9SAlex Deucher struct mutex mutex; 134d38ceaf9SAlex Deucher void *bios; 135d38ceaf9SAlex Deucher uint32_t cmd_table, data_table; 136d38ceaf9SAlex Deucher uint16_t *iio; 137d38ceaf9SAlex Deucher 138d38ceaf9SAlex Deucher uint16_t data_block; 139d38ceaf9SAlex Deucher uint32_t fb_base; 140d38ceaf9SAlex Deucher uint32_t divmul[2]; 141d38ceaf9SAlex Deucher uint16_t io_attr; 142d38ceaf9SAlex Deucher uint16_t reg_block; 143d38ceaf9SAlex Deucher uint8_t shift; 144d38ceaf9SAlex Deucher int cs_equal, cs_above; 145d38ceaf9SAlex Deucher int io_mode; 146d38ceaf9SAlex Deucher uint32_t *scratch; 147d38ceaf9SAlex Deucher int scratch_size_bytes; 14829b4c589SJiawei Gu 14929b4c589SJiawei Gu uint8_t name[STRLEN_LONG]; 15029b4c589SJiawei Gu uint8_t vbios_pn[STRLEN_LONG]; 15129b4c589SJiawei Gu uint32_t version; 15229b4c589SJiawei Gu uint8_t vbios_ver_str[STRLEN_NORMAL]; 15329b4c589SJiawei Gu uint8_t date[STRLEN_NORMAL]; 154d38ceaf9SAlex Deucher }; 155d38ceaf9SAlex Deucher 156d38ceaf9SAlex Deucher extern int amdgpu_atom_debug; 157d38ceaf9SAlex Deucher 158d0d69280SSrinivasan Shanmugam struct atom_context *amdgpu_atom_parse(struct card_info *card, void *bios); 159*4630d503SAlexander Richards int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size); 160d0d69280SSrinivasan Shanmugam int amdgpu_atom_asic_init(struct atom_context *ctx); 161d0d69280SSrinivasan Shanmugam void amdgpu_atom_destroy(struct atom_context *ctx); 162d38ceaf9SAlex Deucher bool amdgpu_atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, 163d38ceaf9SAlex Deucher uint8_t *frev, uint8_t *crev, uint16_t *data_start); 164d38ceaf9SAlex Deucher bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index, 165d38ceaf9SAlex Deucher uint8_t *frev, uint8_t *crev); 166d38ceaf9SAlex Deucher #include "atom-types.h" 167d38ceaf9SAlex Deucher #include "atombios.h" 168d38ceaf9SAlex Deucher #include "ObjectID.h" 169d38ceaf9SAlex Deucher 170d38ceaf9SAlex Deucher #endif 171