xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c (revision 7a5f1cd22d47f8ca4b760b6334378ae42c1bd24b)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #include "amdgpu_vm.h"
24 #include "amdgpu.h"
25 #include "amdgpu_reset.h"
26 #include "amdgpu_object.h"
27 #include "amdgpu_trace.h"
28 
29 /**
30  * amdgpu_vm_cpu_map_table - make sure new PDs/PTs are kmapped
31  *
32  * @table: newly allocated or validated PD/PT
33  */
34 static int amdgpu_vm_cpu_map_table(struct amdgpu_bo_vm *table)
35 {
36 	table->bo.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
37 	return amdgpu_bo_kmap(&table->bo, NULL);
38 }
39 
40 /**
41  * amdgpu_vm_cpu_prepare - prepare page table update with the CPU
42  *
43  * @p: see amdgpu_vm_update_params definition
44  * @sync: sync obj with fences to wait on
45  * @k_job_id: the id for tracing/debug purposes
46  *
47  * Returns:
48  * Negativ errno, 0 for success.
49  */
50 static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
51 				 struct amdgpu_sync *sync,
52 				 u64 k_job_id)
53 {
54 	if (!sync)
55 		return 0;
56 
57 	return amdgpu_sync_wait(sync, true);
58 }
59 
60 /**
61  * amdgpu_vm_cpu_update - helper to update page tables via CPU
62  *
63  * @p: see amdgpu_vm_update_params definition
64  * @vmbo: PD/PT to update
65  * @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB
66  * @addr: dst addr to write into pe
67  * @count: number of page entries to update
68  * @incr: increase next addr by incr bytes
69  * @flags: hw access flags
70  *
71  * Write count number of PT/PD entries directly.
72  */
73 static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
74 				struct amdgpu_bo_vm *vmbo, uint64_t pe,
75 				uint64_t addr, unsigned count, uint32_t incr,
76 				uint64_t flags)
77 {
78 	unsigned int i;
79 	uint64_t value;
80 	long r;
81 
82 	r = dma_resv_wait_timeout(vmbo->bo.tbo.base.resv, DMA_RESV_USAGE_KERNEL,
83 				  true, MAX_SCHEDULE_TIMEOUT);
84 	if (r < 0)
85 		return r;
86 
87 	pe += (unsigned long)amdgpu_bo_kptr(&vmbo->bo);
88 
89 	trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate);
90 
91 	for (i = 0; i < count; i++) {
92 		value = p->pages_addr ?
93 			amdgpu_vm_map_gart(p->pages_addr, addr) :
94 			addr;
95 		amdgpu_gmc_set_pte_pde(p->adev, (void *)(uintptr_t)pe,
96 				       i, value, flags);
97 		addr += incr;
98 	}
99 	return 0;
100 }
101 
102 /**
103  * amdgpu_vm_cpu_commit - commit page table update to the HW
104  *
105  * @p: see amdgpu_vm_update_params definition
106  * @fence: unused
107  *
108  * Make sure that the hardware sees the page table updates.
109  */
110 static int amdgpu_vm_cpu_commit(struct amdgpu_vm_update_params *p,
111 				struct dma_fence **fence)
112 {
113 	struct amdgpu_device *adev = p->adev;
114 
115 	if (p->needs_flush)
116 		atomic64_inc(&p->vm->tlb_seq);
117 
118 	mb();
119 	/* A reset flushed the HDP anyway, so that here can be skipped when a reset is ongoing */
120 	if (!down_read_trylock(&adev->reset_domain->sem))
121 		return 0;
122 
123 	amdgpu_device_flush_hdp(adev, NULL);
124 	up_read(&adev->reset_domain->sem);
125 
126 	return 0;
127 }
128 
129 const struct amdgpu_vm_update_funcs amdgpu_vm_cpu_funcs = {
130 	.map_table = amdgpu_vm_cpu_map_table,
131 	.prepare = amdgpu_vm_cpu_prepare,
132 	.update = amdgpu_vm_cpu_update,
133 	.commit = amdgpu_vm_cpu_commit
134 };
135