1*1f9ba8eaSLijo Lazar /* SPDX-License-Identifier: MIT */ 2*1f9ba8eaSLijo Lazar /* 3*1f9ba8eaSLijo Lazar * Copyright 2025 Advanced Micro Devices, Inc. 4*1f9ba8eaSLijo Lazar * 5*1f9ba8eaSLijo Lazar * Permission is hereby granted, free of charge, to any person obtaining a 6*1f9ba8eaSLijo Lazar * copy of this software and associated documentation files (the "Software"), 7*1f9ba8eaSLijo Lazar * to deal in the Software without restriction, including without limitation 8*1f9ba8eaSLijo Lazar * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9*1f9ba8eaSLijo Lazar * and/or sell copies of the Software, and to permit persons to whom the 10*1f9ba8eaSLijo Lazar * Software is furnished to do so, subject to the following conditions: 11*1f9ba8eaSLijo Lazar * 12*1f9ba8eaSLijo Lazar * The above copyright notice and this permission notice shall be included in 13*1f9ba8eaSLijo Lazar * all copies or substantial portions of the Software. 14*1f9ba8eaSLijo Lazar * 15*1f9ba8eaSLijo Lazar * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16*1f9ba8eaSLijo Lazar * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17*1f9ba8eaSLijo Lazar * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18*1f9ba8eaSLijo Lazar * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19*1f9ba8eaSLijo Lazar * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20*1f9ba8eaSLijo Lazar * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21*1f9ba8eaSLijo Lazar * OTHER DEALINGS IN THE SOFTWARE. 22*1f9ba8eaSLijo Lazar * 23*1f9ba8eaSLijo Lazar */ 24*1f9ba8eaSLijo Lazar 25*1f9ba8eaSLijo Lazar #ifndef AMDGPU_UTILS_H_ 26*1f9ba8eaSLijo Lazar #define AMDGPU_UTILS_H_ 27*1f9ba8eaSLijo Lazar 28*1f9ba8eaSLijo Lazar /* ---------- Generic 2‑bit capability attribute encoding ---------- 29*1f9ba8eaSLijo Lazar * 00 INVALID, 01 RO, 10 WO, 11 RW 30*1f9ba8eaSLijo Lazar */ 31*1f9ba8eaSLijo Lazar enum amdgpu_cap_attr { 32*1f9ba8eaSLijo Lazar AMDGPU_CAP_ATTR_INVALID = 0, 33*1f9ba8eaSLijo Lazar AMDGPU_CAP_ATTR_RO = 1 << 0, 34*1f9ba8eaSLijo Lazar AMDGPU_CAP_ATTR_WO = 1 << 1, 35*1f9ba8eaSLijo Lazar AMDGPU_CAP_ATTR_RW = (AMDGPU_CAP_ATTR_RO | AMDGPU_CAP_ATTR_WO), 36*1f9ba8eaSLijo Lazar }; 37*1f9ba8eaSLijo Lazar 38*1f9ba8eaSLijo Lazar #define AMDGPU_CAP_ATTR_BITS 2 39*1f9ba8eaSLijo Lazar #define AMDGPU_CAP_ATTR_MAX ((1U << AMDGPU_CAP_ATTR_BITS) - 1) 40*1f9ba8eaSLijo Lazar 41*1f9ba8eaSLijo Lazar /* Internal helper to build helpers for a given enum NAME */ 42*1f9ba8eaSLijo Lazar #define DECLARE_ATTR_CAP_CLASS_HELPERS(NAME) \ 43*1f9ba8eaSLijo Lazar enum { NAME##_BITMAP_BITS = NAME##_COUNT * AMDGPU_CAP_ATTR_BITS }; \ 44*1f9ba8eaSLijo Lazar struct NAME##_caps { \ 45*1f9ba8eaSLijo Lazar DECLARE_BITMAP(bmap, NAME##_BITMAP_BITS); \ 46*1f9ba8eaSLijo Lazar }; \ 47*1f9ba8eaSLijo Lazar static inline unsigned int NAME##_ATTR_START(enum NAME##_cap_id cap) \ 48*1f9ba8eaSLijo Lazar { return (unsigned int)cap * AMDGPU_CAP_ATTR_BITS; } \ 49*1f9ba8eaSLijo Lazar static inline void NAME##_attr_init(struct NAME##_caps *c) \ 50*1f9ba8eaSLijo Lazar { if (c) bitmap_zero(c->bmap, NAME##_BITMAP_BITS); } \ 51*1f9ba8eaSLijo Lazar static inline int NAME##_attr_set(struct NAME##_caps *c, \ 52*1f9ba8eaSLijo Lazar enum NAME##_cap_id cap, enum amdgpu_cap_attr attr) \ 53*1f9ba8eaSLijo Lazar { \ 54*1f9ba8eaSLijo Lazar if (!c) \ 55*1f9ba8eaSLijo Lazar return -EINVAL; \ 56*1f9ba8eaSLijo Lazar if (cap >= NAME##_COUNT) \ 57*1f9ba8eaSLijo Lazar return -EINVAL; \ 58*1f9ba8eaSLijo Lazar if ((unsigned int)attr > AMDGPU_CAP_ATTR_MAX) \ 59*1f9ba8eaSLijo Lazar return -EINVAL; \ 60*1f9ba8eaSLijo Lazar bitmap_write(c->bmap, (unsigned long)attr, \ 61*1f9ba8eaSLijo Lazar NAME##_ATTR_START(cap), AMDGPU_CAP_ATTR_BITS); \ 62*1f9ba8eaSLijo Lazar return 0; \ 63*1f9ba8eaSLijo Lazar } \ 64*1f9ba8eaSLijo Lazar static inline int NAME##_attr_get(const struct NAME##_caps *c, \ 65*1f9ba8eaSLijo Lazar enum NAME##_cap_id cap, enum amdgpu_cap_attr *out) \ 66*1f9ba8eaSLijo Lazar { \ 67*1f9ba8eaSLijo Lazar unsigned long v; \ 68*1f9ba8eaSLijo Lazar if (!c || !out) \ 69*1f9ba8eaSLijo Lazar return -EINVAL; \ 70*1f9ba8eaSLijo Lazar if (cap >= NAME##_COUNT) \ 71*1f9ba8eaSLijo Lazar return -EINVAL; \ 72*1f9ba8eaSLijo Lazar v = bitmap_read(c->bmap, NAME##_ATTR_START(cap), AMDGPU_CAP_ATTR_BITS); \ 73*1f9ba8eaSLijo Lazar *out = (enum amdgpu_cap_attr)v; \ 74*1f9ba8eaSLijo Lazar return 0; \ 75*1f9ba8eaSLijo Lazar } \ 76*1f9ba8eaSLijo Lazar static inline bool NAME##_cap_is_ro(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 77*1f9ba8eaSLijo Lazar { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_RO; } \ 78*1f9ba8eaSLijo Lazar static inline bool NAME##_cap_is_wo(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 79*1f9ba8eaSLijo Lazar { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_WO; } \ 80*1f9ba8eaSLijo Lazar static inline bool NAME##_cap_is_rw(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 81*1f9ba8eaSLijo Lazar { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_RW; } 82*1f9ba8eaSLijo Lazar 83*1f9ba8eaSLijo Lazar /* Element expander for enum creation */ 84*1f9ba8eaSLijo Lazar #define _CAP_ENUM_ELEM(x) x, 85*1f9ba8eaSLijo Lazar 86*1f9ba8eaSLijo Lazar /* Public macro: declare enum + helpers from an X‑macro list */ 87*1f9ba8eaSLijo Lazar #define DECLARE_ATTR_CAP_CLASS(NAME, LIST_MACRO) \ 88*1f9ba8eaSLijo Lazar enum NAME##_cap_id { LIST_MACRO(_CAP_ENUM_ELEM) NAME##_COUNT }; \ 89*1f9ba8eaSLijo Lazar DECLARE_ATTR_CAP_CLASS_HELPERS(NAME) 90*1f9ba8eaSLijo Lazar 91*1f9ba8eaSLijo Lazar #endif /* AMDGPU_UTILS_H_ */ 92