1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __AMDGPU_TTM_H__ 25 #define __AMDGPU_TTM_H__ 26 27 #include <linux/dma-direction.h> 28 #include <drm/gpu_scheduler.h> 29 #include "amdgpu.h" 30 31 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0) 32 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1) 33 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2) 34 35 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512 36 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2 37 38 #define AMDGPU_POISON 0xd0bed0be 39 40 struct amdgpu_vram_mgr { 41 struct ttm_resource_manager manager; 42 struct drm_mm mm; 43 spinlock_t lock; 44 struct list_head reservations_pending; 45 struct list_head reserved_pages; 46 atomic64_t usage; 47 atomic64_t vis_usage; 48 }; 49 50 struct amdgpu_gtt_mgr { 51 struct ttm_resource_manager manager; 52 struct drm_mm mm; 53 spinlock_t lock; 54 atomic64_t available; 55 }; 56 57 struct amdgpu_mman { 58 struct ttm_device bdev; 59 bool initialized; 60 void __iomem *aper_base_kaddr; 61 62 /* buffer handling */ 63 const struct amdgpu_buffer_funcs *buffer_funcs; 64 struct amdgpu_ring *buffer_funcs_ring; 65 bool buffer_funcs_enabled; 66 67 struct mutex gtt_window_lock; 68 /* Scheduler entity for buffer moves */ 69 struct drm_sched_entity entity; 70 71 struct amdgpu_vram_mgr vram_mgr; 72 struct amdgpu_gtt_mgr gtt_mgr; 73 74 uint64_t stolen_vga_size; 75 struct amdgpu_bo *stolen_vga_memory; 76 uint64_t stolen_extended_size; 77 struct amdgpu_bo *stolen_extended_memory; 78 bool keep_stolen_vga_memory; 79 80 /* discovery */ 81 uint8_t *discovery_bin; 82 uint32_t discovery_tmr_size; 83 struct amdgpu_bo *discovery_memory; 84 85 /* firmware VRAM reservation */ 86 u64 fw_vram_usage_start_offset; 87 u64 fw_vram_usage_size; 88 struct amdgpu_bo *fw_vram_usage_reserved_bo; 89 void *fw_vram_usage_va; 90 }; 91 92 struct amdgpu_copy_mem { 93 struct ttm_buffer_object *bo; 94 struct ttm_resource *mem; 95 unsigned long offset; 96 }; 97 98 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size); 99 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev); 100 int amdgpu_vram_mgr_init(struct amdgpu_device *adev); 101 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev); 102 103 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem); 104 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man); 105 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man); 106 107 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo); 108 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev, 109 struct ttm_resource *mem, 110 u64 offset, u64 size, 111 struct device *dev, 112 enum dma_data_direction dir, 113 struct sg_table **sgt); 114 void amdgpu_vram_mgr_free_sgt(struct device *dev, 115 enum dma_data_direction dir, 116 struct sg_table *sgt); 117 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man); 118 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man); 119 int amdgpu_vram_mgr_reserve_range(struct ttm_resource_manager *man, 120 uint64_t start, uint64_t size); 121 int amdgpu_vram_mgr_query_page_status(struct ttm_resource_manager *man, 122 uint64_t start); 123 124 int amdgpu_ttm_init(struct amdgpu_device *adev); 125 void amdgpu_ttm_fini(struct amdgpu_device *adev); 126 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, 127 bool enable); 128 129 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, 130 uint64_t dst_offset, uint32_t byte_count, 131 struct dma_resv *resv, 132 struct dma_fence **fence, bool direct_submit, 133 bool vm_needs_flush, bool tmz); 134 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, 135 const struct amdgpu_copy_mem *src, 136 const struct amdgpu_copy_mem *dst, 137 uint64_t size, bool tmz, 138 struct dma_resv *resv, 139 struct dma_fence **f); 140 int amdgpu_fill_buffer(struct amdgpu_bo *bo, 141 uint32_t src_data, 142 struct dma_resv *resv, 143 struct dma_fence **fence); 144 145 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); 146 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); 147 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type); 148 149 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR) 150 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages); 151 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm); 152 #else 153 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, 154 struct page **pages) 155 { 156 return -EPERM; 157 } 158 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm) 159 { 160 return false; 161 } 162 #endif 163 164 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages); 165 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo, 166 uint64_t addr, uint32_t flags); 167 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm); 168 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm); 169 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start, 170 unsigned long end); 171 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm, 172 int *last_invalidated); 173 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm); 174 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm); 175 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem); 176 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, 177 struct ttm_resource *mem); 178 179 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev); 180 181 #endif 182