1 /* 2 * Copyright 2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 25 #define _AMDGPU_TRACE_H_ 26 27 #include <linux/stringify.h> 28 #include <linux/types.h> 29 #include <linux/tracepoint.h> 30 31 #include "amdgpu_userq_fence.h" 32 33 #undef TRACE_SYSTEM 34 #define TRACE_SYSTEM amdgpu 35 #define TRACE_INCLUDE_FILE amdgpu_trace 36 37 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 38 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 39 40 TRACE_EVENT(amdgpu_device_rreg, 41 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 42 TP_ARGS(did, reg, value), 43 TP_STRUCT__entry( 44 __field(unsigned, did) 45 __field(uint32_t, reg) 46 __field(uint32_t, value) 47 ), 48 TP_fast_assign( 49 __entry->did = did; 50 __entry->reg = reg; 51 __entry->value = value; 52 ), 53 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 54 (unsigned long)__entry->did, 55 (unsigned long)__entry->reg, 56 (unsigned long)__entry->value) 57 ); 58 59 TRACE_EVENT(amdgpu_device_wreg, 60 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 61 TP_ARGS(did, reg, value), 62 TP_STRUCT__entry( 63 __field(unsigned, did) 64 __field(uint32_t, reg) 65 __field(uint32_t, value) 66 ), 67 TP_fast_assign( 68 __entry->did = did; 69 __entry->reg = reg; 70 __entry->value = value; 71 ), 72 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 73 (unsigned long)__entry->did, 74 (unsigned long)__entry->reg, 75 (unsigned long)__entry->value) 76 ); 77 78 TRACE_EVENT(amdgpu_iv, 79 TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv), 80 TP_ARGS(ih, iv), 81 TP_STRUCT__entry( 82 __field(unsigned, ih) 83 __field(unsigned, client_id) 84 __field(unsigned, src_id) 85 __field(unsigned, ring_id) 86 __field(unsigned, vmid) 87 __field(unsigned, vmid_src) 88 __field(uint64_t, timestamp) 89 __field(unsigned, timestamp_src) 90 __field(unsigned, pasid) 91 __array(unsigned, src_data, 4) 92 ), 93 TP_fast_assign( 94 __entry->ih = ih; 95 __entry->client_id = iv->client_id; 96 __entry->src_id = iv->src_id; 97 __entry->ring_id = iv->ring_id; 98 __entry->vmid = iv->vmid; 99 __entry->vmid_src = iv->vmid_src; 100 __entry->timestamp = iv->timestamp; 101 __entry->timestamp_src = iv->timestamp_src; 102 __entry->pasid = iv->pasid; 103 __entry->src_data[0] = iv->src_data[0]; 104 __entry->src_data[1] = iv->src_data[1]; 105 __entry->src_data[2] = iv->src_data[2]; 106 __entry->src_data[3] = iv->src_data[3]; 107 ), 108 TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u " 109 "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x", 110 __entry->ih, __entry->client_id, __entry->src_id, 111 __entry->ring_id, __entry->vmid, 112 __entry->timestamp, __entry->pasid, 113 __entry->src_data[0], __entry->src_data[1], 114 __entry->src_data[2], __entry->src_data[3]) 115 ); 116 117 118 TRACE_EVENT(amdgpu_bo_create, 119 TP_PROTO(struct amdgpu_bo *bo), 120 TP_ARGS(bo), 121 TP_STRUCT__entry( 122 __field(struct amdgpu_bo *, bo) 123 __field(u32, pages) 124 __field(u32, type) 125 __field(u32, prefer) 126 __field(u32, allow) 127 __field(u32, visible) 128 ), 129 130 TP_fast_assign( 131 __entry->bo = bo; 132 __entry->pages = PFN_UP(bo->tbo.resource->size); 133 __entry->type = bo->tbo.resource->mem_type; 134 __entry->prefer = bo->preferred_domains; 135 __entry->allow = bo->allowed_domains; 136 __entry->visible = bo->flags; 137 ), 138 139 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 140 __entry->bo, __entry->pages, __entry->type, 141 __entry->prefer, __entry->allow, __entry->visible) 142 ); 143 144 TRACE_EVENT(amdgpu_cs, 145 TP_PROTO(struct amdgpu_cs_parser *p, 146 struct amdgpu_job *job, 147 struct amdgpu_ib *ib), 148 TP_ARGS(p, job, ib), 149 TP_STRUCT__entry( 150 __field(struct drm_gpu_scheduler *, sched) 151 __field(struct amdgpu_bo_list *, bo_list) 152 __field(u32, ring) 153 __field(u32, dw) 154 __field(u32, fences) 155 ), 156 157 TP_fast_assign( 158 __entry->sched = container_of(job->base.entity->rq, 159 typeof(*__entry->sched), 160 rq); 161 __entry->bo_list = p->bo_list; 162 __entry->ring = to_amdgpu_ring(__entry->sched)->idx; 163 __entry->dw = ib->length_dw; 164 __entry->fences = amdgpu_fence_count_emitted( 165 to_amdgpu_ring(__entry->sched)); 166 ), 167 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 168 __entry->bo_list, __entry->ring, __entry->dw, 169 __entry->fences) 170 ); 171 172 TRACE_EVENT(amdgpu_cs_ioctl, 173 TP_PROTO(struct amdgpu_job *job), 174 TP_ARGS(job), 175 TP_STRUCT__entry( 176 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 177 __field(u64, context) 178 __field(u64, seqno) 179 __field(struct dma_fence *, fence) 180 __string(ring, to_amdgpu_ring(job->base.sched)->name) 181 __field(u32, num_ibs) 182 ), 183 184 TP_fast_assign( 185 __assign_str(timeline); 186 __entry->context = job->base.s_fence->finished.context; 187 __entry->seqno = job->base.s_fence->finished.seqno; 188 __assign_str(ring); 189 __entry->num_ibs = job->num_ibs; 190 ), 191 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 192 __get_str(timeline), __entry->context, 193 __entry->seqno, __get_str(ring), __entry->num_ibs) 194 ); 195 196 TRACE_EVENT(amdgpu_sched_run_job, 197 TP_PROTO(struct amdgpu_job *job), 198 TP_ARGS(job), 199 TP_STRUCT__entry( 200 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 201 __field(u64, context) 202 __field(u64, seqno) 203 __string(ring, to_amdgpu_ring(job->base.sched)->name) 204 __field(u32, num_ibs) 205 ), 206 207 TP_fast_assign( 208 __assign_str(timeline); 209 __entry->context = job->base.s_fence->finished.context; 210 __entry->seqno = job->base.s_fence->finished.seqno; 211 __assign_str(ring); 212 __entry->num_ibs = job->num_ibs; 213 ), 214 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 215 __get_str(timeline), __entry->context, 216 __entry->seqno, __get_str(ring), __entry->num_ibs) 217 ); 218 219 220 TRACE_EVENT(amdgpu_vm_grab_id, 221 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 222 struct amdgpu_job *job), 223 TP_ARGS(vm, ring, job), 224 TP_STRUCT__entry( 225 __field(u32, pasid) 226 __string(ring, ring->name) 227 __field(u32, ring) 228 __field(u32, vmid) 229 __field(u32, vm_hub) 230 __field(u64, pd_addr) 231 __field(u32, needs_flush) 232 ), 233 234 TP_fast_assign( 235 __entry->pasid = vm->pasid; 236 __assign_str(ring); 237 __entry->vmid = job->vmid; 238 __entry->vm_hub = ring->vm_hub, 239 __entry->pd_addr = job->vm_pd_addr; 240 __entry->needs_flush = job->vm_needs_flush; 241 ), 242 TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 243 __entry->pasid, __get_str(ring), __entry->vmid, 244 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 245 ); 246 247 TRACE_EVENT(amdgpu_vm_bo_map, 248 TP_PROTO(struct amdgpu_bo_va *bo_va, 249 struct amdgpu_bo_va_mapping *mapping), 250 TP_ARGS(bo_va, mapping), 251 TP_STRUCT__entry( 252 __field(struct amdgpu_bo *, bo) 253 __field(long, start) 254 __field(long, last) 255 __field(u64, offset) 256 __field(u64, flags) 257 ), 258 259 TP_fast_assign( 260 __entry->bo = bo_va ? bo_va->base.bo : NULL; 261 __entry->start = mapping->start; 262 __entry->last = mapping->last; 263 __entry->offset = mapping->offset; 264 __entry->flags = mapping->flags; 265 ), 266 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 267 __entry->bo, __entry->start, __entry->last, 268 __entry->offset, __entry->flags) 269 ); 270 271 TRACE_EVENT(amdgpu_vm_bo_unmap, 272 TP_PROTO(struct amdgpu_bo_va *bo_va, 273 struct amdgpu_bo_va_mapping *mapping), 274 TP_ARGS(bo_va, mapping), 275 TP_STRUCT__entry( 276 __field(struct amdgpu_bo *, bo) 277 __field(long, start) 278 __field(long, last) 279 __field(u64, offset) 280 __field(u64, flags) 281 ), 282 283 TP_fast_assign( 284 __entry->bo = bo_va ? bo_va->base.bo : NULL; 285 __entry->start = mapping->start; 286 __entry->last = mapping->last; 287 __entry->offset = mapping->offset; 288 __entry->flags = mapping->flags; 289 ), 290 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 291 __entry->bo, __entry->start, __entry->last, 292 __entry->offset, __entry->flags) 293 ); 294 295 DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 296 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 297 TP_ARGS(mapping), 298 TP_STRUCT__entry( 299 __field(u64, soffset) 300 __field(u64, eoffset) 301 __field(u64, flags) 302 ), 303 304 TP_fast_assign( 305 __entry->soffset = mapping->start; 306 __entry->eoffset = mapping->last + 1; 307 __entry->flags = mapping->flags; 308 ), 309 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 310 __entry->soffset, __entry->eoffset, __entry->flags) 311 ); 312 313 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 314 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 315 TP_ARGS(mapping) 316 ); 317 318 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 319 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 320 TP_ARGS(mapping) 321 ); 322 323 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs, 324 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 325 TP_ARGS(mapping) 326 ); 327 328 TRACE_EVENT(amdgpu_vm_update_ptes, 329 TP_PROTO(struct amdgpu_vm_update_params *p, 330 uint64_t start, uint64_t end, 331 unsigned int nptes, uint64_t dst, 332 uint64_t incr, uint64_t flags, 333 pid_t pid, uint64_t vm_ctx), 334 TP_ARGS(p, start, end, nptes, dst, incr, flags, pid, vm_ctx), 335 TP_STRUCT__entry( 336 __field(u64, start) 337 __field(u64, end) 338 __field(u64, flags) 339 __field(unsigned int, nptes) 340 __field(u64, incr) 341 __field(pid_t, pid) 342 __field(u64, vm_ctx) 343 __dynamic_array(u64, dst, nptes) 344 ), 345 346 TP_fast_assign( 347 unsigned int i; 348 349 __entry->start = start; 350 __entry->end = end; 351 __entry->flags = flags; 352 __entry->incr = incr; 353 __entry->nptes = nptes; 354 __entry->pid = pid; 355 __entry->vm_ctx = vm_ctx; 356 for (i = 0; i < nptes; ++i) { 357 u64 addr = p->pages_addr ? amdgpu_vm_map_gart( 358 p->pages_addr, dst) : dst; 359 360 ((u64 *)__get_dynamic_array(dst))[i] = addr; 361 dst += incr; 362 } 363 ), 364 TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx," 365 " flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid, 366 __entry->vm_ctx, __entry->start, __entry->end, 367 __entry->flags, __entry->incr, __print_array( 368 __get_dynamic_array(dst), __entry->nptes, 8)) 369 ); 370 371 TRACE_EVENT(amdgpu_vm_set_ptes, 372 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 373 uint32_t incr, uint64_t flags, bool immediate), 374 TP_ARGS(pe, addr, count, incr, flags, immediate), 375 TP_STRUCT__entry( 376 __field(u64, pe) 377 __field(u64, addr) 378 __field(u32, count) 379 __field(u32, incr) 380 __field(u64, flags) 381 __field(bool, immediate) 382 ), 383 384 TP_fast_assign( 385 __entry->pe = pe; 386 __entry->addr = addr; 387 __entry->count = count; 388 __entry->incr = incr; 389 __entry->flags = flags; 390 __entry->immediate = immediate; 391 ), 392 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, " 393 "immediate=%d", __entry->pe, __entry->addr, __entry->incr, 394 __entry->flags, __entry->count, __entry->immediate) 395 ); 396 397 TRACE_EVENT(amdgpu_vm_copy_ptes, 398 TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool immediate), 399 TP_ARGS(pe, src, count, immediate), 400 TP_STRUCT__entry( 401 __field(u64, pe) 402 __field(u64, src) 403 __field(u32, count) 404 __field(bool, immediate) 405 ), 406 407 TP_fast_assign( 408 __entry->pe = pe; 409 __entry->src = src; 410 __entry->count = count; 411 __entry->immediate = immediate; 412 ), 413 TP_printk("pe=%010Lx, src=%010Lx, count=%u, immediate=%d", 414 __entry->pe, __entry->src, __entry->count, 415 __entry->immediate) 416 ); 417 418 TRACE_EVENT(amdgpu_vm_flush, 419 TP_PROTO(struct amdgpu_ring *ring, unsigned vmid, 420 uint64_t pd_addr), 421 TP_ARGS(ring, vmid, pd_addr), 422 TP_STRUCT__entry( 423 __string(ring, ring->name) 424 __field(u32, vmid) 425 __field(u32, vm_hub) 426 __field(u64, pd_addr) 427 ), 428 429 TP_fast_assign( 430 __assign_str(ring); 431 __entry->vmid = vmid; 432 __entry->vm_hub = ring->vm_hub; 433 __entry->pd_addr = pd_addr; 434 ), 435 TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx", 436 __get_str(ring), __entry->vmid, 437 __entry->vm_hub, __entry->pd_addr) 438 ); 439 440 DECLARE_EVENT_CLASS(amdgpu_pasid, 441 TP_PROTO(unsigned pasid), 442 TP_ARGS(pasid), 443 TP_STRUCT__entry( 444 __field(unsigned, pasid) 445 ), 446 TP_fast_assign( 447 __entry->pasid = pasid; 448 ), 449 TP_printk("pasid=%u", __entry->pasid) 450 ); 451 452 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated, 453 TP_PROTO(unsigned pasid), 454 TP_ARGS(pasid) 455 ); 456 457 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed, 458 TP_PROTO(unsigned pasid), 459 TP_ARGS(pasid) 460 ); 461 462 TRACE_EVENT(amdgpu_isolation, 463 TP_PROTO(void *prev, void *next), 464 TP_ARGS(prev, next), 465 TP_STRUCT__entry( 466 __field(void *, prev) 467 __field(void *, next) 468 ), 469 470 TP_fast_assign( 471 __entry->prev = prev; 472 __entry->next = next; 473 ), 474 TP_printk("prev=%p, next=%p", 475 __entry->prev, 476 __entry->next) 477 ); 478 479 TRACE_EVENT(amdgpu_cleaner_shader, 480 TP_PROTO(struct amdgpu_ring *ring, struct dma_fence *fence), 481 TP_ARGS(ring, fence), 482 TP_STRUCT__entry( 483 __string(ring, ring->name) 484 __field(u64, seqno) 485 ), 486 487 TP_fast_assign( 488 __assign_str(ring); 489 __entry->seqno = fence->seqno; 490 ), 491 TP_printk("ring=%s, seqno=%Lu", __get_str(ring), __entry->seqno) 492 ); 493 494 TRACE_EVENT(amdgpu_bo_list_set, 495 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 496 TP_ARGS(list, bo), 497 TP_STRUCT__entry( 498 __field(struct amdgpu_bo_list *, list) 499 __field(struct amdgpu_bo *, bo) 500 __field(u64, bo_size) 501 ), 502 503 TP_fast_assign( 504 __entry->list = list; 505 __entry->bo = bo; 506 __entry->bo_size = amdgpu_bo_size(bo); 507 ), 508 TP_printk("list=%p, bo=%p, bo_size=%Ld", 509 __entry->list, 510 __entry->bo, 511 __entry->bo_size) 512 ); 513 514 TRACE_EVENT(amdgpu_cs_bo_status, 515 TP_PROTO(uint64_t total_bo, uint64_t total_size), 516 TP_ARGS(total_bo, total_size), 517 TP_STRUCT__entry( 518 __field(u64, total_bo) 519 __field(u64, total_size) 520 ), 521 522 TP_fast_assign( 523 __entry->total_bo = total_bo; 524 __entry->total_size = total_size; 525 ), 526 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 527 __entry->total_bo, __entry->total_size) 528 ); 529 530 TRACE_EVENT(amdgpu_bo_move, 531 TP_PROTO(struct amdgpu_bo *bo, uint32_t new_placement, uint32_t old_placement), 532 TP_ARGS(bo, new_placement, old_placement), 533 TP_STRUCT__entry( 534 __field(struct amdgpu_bo *, bo) 535 __field(u64, bo_size) 536 __field(u32, new_placement) 537 __field(u32, old_placement) 538 ), 539 540 TP_fast_assign( 541 __entry->bo = bo; 542 __entry->bo_size = amdgpu_bo_size(bo); 543 __entry->new_placement = new_placement; 544 __entry->old_placement = old_placement; 545 ), 546 TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 547 __entry->bo, __entry->old_placement, 548 __entry->new_placement, __entry->bo_size) 549 ); 550 551 TRACE_EVENT(amdgpu_ib_pipe_sync, 552 TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence), 553 TP_ARGS(sched_job, fence), 554 TP_STRUCT__entry( 555 __string(ring, sched_job->base.sched->name) 556 __field(struct dma_fence *, fence) 557 __field(u64, ctx) 558 __field(u64, seqno) 559 ), 560 561 TP_fast_assign( 562 __assign_str(ring); 563 __entry->fence = fence; 564 __entry->ctx = fence->context; 565 __entry->seqno = fence->seqno; 566 ), 567 TP_printk("job ring=%s need pipe sync to fence=%llu:%llu", 568 __get_str(ring), __entry->ctx, __entry->seqno) 569 ); 570 571 TRACE_EVENT(amdgpu_reset_reg_dumps, 572 TP_PROTO(uint32_t address, uint32_t value), 573 TP_ARGS(address, value), 574 TP_STRUCT__entry( 575 __field(uint32_t, address) 576 __field(uint32_t, value) 577 ), 578 TP_fast_assign( 579 __entry->address = address; 580 __entry->value = value; 581 ), 582 TP_printk("amdgpu register dump 0x%x: 0x%x", 583 __entry->address, 584 __entry->value) 585 ); 586 587 DECLARE_EVENT_CLASS(amdgpu_userq_queue, 588 TP_PROTO(struct amdgpu_usermode_queue *queue), 589 TP_ARGS(queue), 590 TP_STRUCT__entry( 591 __field(void *, queue) 592 __field(u64, doorbell_index) 593 __field(int, queue_type) 594 __field(int, state) 595 __field(u32, xcp_id) 596 ), 597 TP_fast_assign( 598 __entry->queue = queue; 599 __entry->doorbell_index = queue->doorbell_index; 600 __entry->queue_type = queue->queue_type; 601 __entry->state = queue->state; 602 __entry->xcp_id = queue->xcp_id; 603 ), 604 TP_printk("queue=%p, doorbell=%llu, type=%d, state=%d, xcp_id=%u", 605 __entry->queue, __entry->doorbell_index, 606 __entry->queue_type, __entry->state, __entry->xcp_id) 607 ); 608 DEFINE_EVENT(amdgpu_userq_queue, amdgpu_userq_create_start, 609 TP_PROTO(struct amdgpu_usermode_queue *queue), 610 TP_ARGS(queue)); 611 DEFINE_EVENT(amdgpu_userq_queue, amdgpu_userq_destroy_start, 612 TP_PROTO(struct amdgpu_usermode_queue *queue), 613 TP_ARGS(queue)); 614 DECLARE_EVENT_CLASS(amdgpu_userq_queue_result, 615 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 616 TP_ARGS(queue, result), 617 TP_STRUCT__entry( 618 __field(void *, queue) 619 __field(u64, doorbell_index) 620 __field(int, queue_type) 621 __field(int, state) 622 __field(u32, xcp_id) 623 __field(int, result) 624 ), 625 TP_fast_assign( 626 __entry->queue = queue; 627 __entry->doorbell_index = queue->doorbell_index; 628 __entry->queue_type = queue->queue_type; 629 __entry->state = queue->state; 630 __entry->xcp_id = queue->xcp_id; 631 __entry->result = result; 632 ), 633 TP_printk("queue=%p, doorbell=%llu, type=%d, state=%d, xcp_id=%u, result=%d", 634 __entry->queue, __entry->doorbell_index, 635 __entry->queue_type, __entry->state, 636 __entry->xcp_id, __entry->result) 637 ); 638 DEFINE_EVENT(amdgpu_userq_queue_result, amdgpu_userq_create_end, 639 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 640 TP_ARGS(queue, result)); 641 DEFINE_EVENT(amdgpu_userq_queue_result, amdgpu_userq_destroy_end, 642 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 643 TP_ARGS(queue, result)); 644 645 TRACE_EVENT(amdgpu_userq_emit_fence, 646 TP_PROTO(struct device *device, struct amdgpu_usermode_queue *queue, struct amdgpu_userq_fence *fence), 647 TP_ARGS(device, queue, fence), 648 TP_STRUCT__entry( 649 __field(u64, fence_context) 650 __field(u64, fence_seqno) 651 __string(dev, dev_name(device)) 652 __field(u64, doorbell_index) 653 __field(u64, client_id) 654 __field(u32, queue_type) 655 ), 656 TP_fast_assign( 657 __entry->fence_context = fence->base.context; 658 __entry->fence_seqno = fence->base.seqno; 659 __assign_str(dev); 660 __entry->doorbell_index = queue->doorbell_index; 661 __entry->client_id = queue->userq_mgr->file->client_id; 662 __entry->queue_type = queue->queue_type; 663 ), 664 TP_printk("dev=%s, client_id=%llu, type=%u, doorbell=%llu, fence=%llu:%llu", 665 __get_str(dev), __entry->client_id, __entry->queue_type, __entry->doorbell_index, 666 __entry->fence_context, 667 __entry->fence_seqno) 668 ); 669 670 TRACE_EVENT(amdgpu_userq_wait_deps, 671 TP_PROTO(struct device *device, struct amdgpu_usermode_queue *queue, struct amdgpu_userq_fence *dep), 672 TP_ARGS(device, queue, dep), 673 TP_STRUCT__entry( 674 __field(u64, context) 675 __field(u64, dep_context) 676 __field(u64, dep_seqno) 677 __string(dev, dev_name(device)) 678 __field(u64, doorbell_index) 679 __field(u64, client_id) 680 __field(u32, queue_type) 681 ), 682 TP_fast_assign( 683 __assign_str(dev); 684 __entry->doorbell_index = queue->doorbell_index; 685 __entry->queue_type = queue->queue_type; 686 __entry->client_id = queue->userq_mgr->file->client_id; 687 __entry->context = queue->fence_drv->context; 688 __entry->dep_context = dep->base.context; 689 __entry->dep_seqno = dep->base.seqno; 690 ), 691 TP_printk("dev=%s, client_id=%llu, type=%u, doorbell=%llu, context=%llu depends on fence=%llu:%llu", 692 __get_str(dev), __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->context, 693 __entry->dep_context, 694 __entry->dep_seqno) 695 ); 696 697 TRACE_EVENT(amdgpu_userq_state_start, 698 TP_PROTO(struct amdgpu_usermode_queue *queue), 699 TP_ARGS(queue), 700 TP_STRUCT__entry( 701 __field(u64, doorbell_index) 702 __field(u64, client_id) 703 __field(u32, queue_type) 704 __field(u32, from) 705 ), 706 TP_fast_assign( 707 __entry->doorbell_index = queue->doorbell_index; 708 __entry->queue_type = queue->queue_type; 709 __entry->client_id = queue->userq_mgr->file->client_id; 710 __entry->from = queue->state; 711 ), 712 TP_printk("client_id=%llu, type=%u, doorbell=%llu, from=%d", 713 __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->from) 714 ); 715 716 TRACE_EVENT(amdgpu_userq_state_changed, 717 TP_PROTO(struct amdgpu_usermode_queue *queue, enum amdgpu_userq_state new_state), 718 TP_ARGS(queue, new_state), 719 TP_STRUCT__entry( 720 __field(u64, doorbell_index) 721 __field(u64, client_id) 722 __field(u32, queue_type) 723 __field(u32, to) 724 ), 725 TP_fast_assign( 726 __entry->doorbell_index = queue->doorbell_index; 727 __entry->queue_type = queue->queue_type; 728 __entry->client_id = queue->userq_mgr->file->client_id; 729 __entry->to = new_state; 730 ), 731 TP_printk("client_id=%llu, type=%u, doorbell=%llu, to=%d", 732 __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->to) 733 ); 734 735 #undef AMDGPU_JOB_GET_TIMELINE_NAME 736 #endif 737 738 /* This part must be outside protection */ 739 #undef TRACE_INCLUDE_PATH 740 #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu 741 #include <trace/define_trace.h> 742