1 /* 2 * Copyright 2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 25 #define _AMDGPU_TRACE_H_ 26 27 #include <linux/stringify.h> 28 #include <linux/types.h> 29 #include <linux/tracepoint.h> 30 31 #include "amdgpu_userq_fence.h" 32 33 #undef TRACE_SYSTEM 34 #define TRACE_SYSTEM amdgpu 35 #define TRACE_INCLUDE_FILE amdgpu_trace 36 37 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 38 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 39 40 struct amdgpu_vm_update_params; 41 42 TRACE_EVENT(amdgpu_device_rreg, 43 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 44 TP_ARGS(did, reg, value), 45 TP_STRUCT__entry( 46 __field(unsigned, did) 47 __field(uint32_t, reg) 48 __field(uint32_t, value) 49 ), 50 TP_fast_assign( 51 __entry->did = did; 52 __entry->reg = reg; 53 __entry->value = value; 54 ), 55 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 56 (unsigned long)__entry->did, 57 (unsigned long)__entry->reg, 58 (unsigned long)__entry->value) 59 ); 60 61 TRACE_EVENT(amdgpu_device_wreg, 62 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 63 TP_ARGS(did, reg, value), 64 TP_STRUCT__entry( 65 __field(unsigned, did) 66 __field(uint32_t, reg) 67 __field(uint32_t, value) 68 ), 69 TP_fast_assign( 70 __entry->did = did; 71 __entry->reg = reg; 72 __entry->value = value; 73 ), 74 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 75 (unsigned long)__entry->did, 76 (unsigned long)__entry->reg, 77 (unsigned long)__entry->value) 78 ); 79 80 TRACE_EVENT(amdgpu_iv, 81 TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv), 82 TP_ARGS(ih, iv), 83 TP_STRUCT__entry( 84 __field(unsigned, ih) 85 __field(unsigned, client_id) 86 __field(unsigned, src_id) 87 __field(unsigned, ring_id) 88 __field(unsigned, vmid) 89 __field(unsigned, vmid_src) 90 __field(uint64_t, timestamp) 91 __field(unsigned, timestamp_src) 92 __field(unsigned, pasid) 93 __array(unsigned, src_data, 4) 94 ), 95 TP_fast_assign( 96 __entry->ih = ih; 97 __entry->client_id = iv->client_id; 98 __entry->src_id = iv->src_id; 99 __entry->ring_id = iv->ring_id; 100 __entry->vmid = iv->vmid; 101 __entry->vmid_src = iv->vmid_src; 102 __entry->timestamp = iv->timestamp; 103 __entry->timestamp_src = iv->timestamp_src; 104 __entry->pasid = iv->pasid; 105 __entry->src_data[0] = iv->src_data[0]; 106 __entry->src_data[1] = iv->src_data[1]; 107 __entry->src_data[2] = iv->src_data[2]; 108 __entry->src_data[3] = iv->src_data[3]; 109 ), 110 TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u " 111 "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x", 112 __entry->ih, __entry->client_id, __entry->src_id, 113 __entry->ring_id, __entry->vmid, 114 __entry->timestamp, __entry->pasid, 115 __entry->src_data[0], __entry->src_data[1], 116 __entry->src_data[2], __entry->src_data[3]) 117 ); 118 119 120 TRACE_EVENT(amdgpu_bo_create, 121 TP_PROTO(struct amdgpu_bo *bo), 122 TP_ARGS(bo), 123 TP_STRUCT__entry( 124 __field(struct amdgpu_bo *, bo) 125 __field(u32, pages) 126 __field(u32, type) 127 __field(u32, prefer) 128 __field(u32, allow) 129 __field(u32, visible) 130 ), 131 132 TP_fast_assign( 133 __entry->bo = bo; 134 __entry->pages = PFN_UP(bo->tbo.resource->size); 135 __entry->type = bo->tbo.resource->mem_type; 136 __entry->prefer = bo->preferred_domains; 137 __entry->allow = bo->allowed_domains; 138 __entry->visible = bo->flags; 139 ), 140 141 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 142 __entry->bo, __entry->pages, __entry->type, 143 __entry->prefer, __entry->allow, __entry->visible) 144 ); 145 146 TRACE_EVENT(amdgpu_cs, 147 TP_PROTO(struct amdgpu_cs_parser *p, 148 struct amdgpu_job *job, 149 struct amdgpu_ib *ib), 150 TP_ARGS(p, job, ib), 151 TP_STRUCT__entry( 152 __field(struct amdgpu_bo_list *, bo_list) 153 __field(u32, ring) 154 __field(u32, dw) 155 __field(u32, fences) 156 ), 157 158 TP_fast_assign( 159 __entry->bo_list = p->bo_list; 160 __entry->ring = to_amdgpu_ring(job->base.entity->rq->sched)->idx; 161 __entry->dw = ib->length_dw; 162 __entry->fences = amdgpu_fence_count_emitted( 163 to_amdgpu_ring(job->base.entity->rq->sched)); 164 ), 165 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 166 __entry->bo_list, __entry->ring, __entry->dw, 167 __entry->fences) 168 ); 169 170 TRACE_EVENT(amdgpu_cs_ioctl, 171 TP_PROTO(struct amdgpu_job *job), 172 TP_ARGS(job), 173 TP_STRUCT__entry( 174 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 175 __field(u64, context) 176 __field(u64, seqno) 177 __field(struct dma_fence *, fence) 178 __string(ring, to_amdgpu_ring(job->base.sched)->name) 179 __field(u32, num_ibs) 180 ), 181 182 TP_fast_assign( 183 __assign_str(timeline); 184 __entry->context = job->base.s_fence->finished.context; 185 __entry->seqno = job->base.s_fence->finished.seqno; 186 __assign_str(ring); 187 __entry->num_ibs = job->num_ibs; 188 ), 189 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 190 __get_str(timeline), __entry->context, 191 __entry->seqno, __get_str(ring), __entry->num_ibs) 192 ); 193 194 TRACE_EVENT(amdgpu_sched_run_job, 195 TP_PROTO(struct amdgpu_job *job), 196 TP_ARGS(job), 197 TP_STRUCT__entry( 198 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 199 __field(u64, context) 200 __field(u64, seqno) 201 __string(ring, to_amdgpu_ring(job->base.sched)->name) 202 __field(u32, num_ibs) 203 ), 204 205 TP_fast_assign( 206 __assign_str(timeline); 207 __entry->context = job->base.s_fence->finished.context; 208 __entry->seqno = job->base.s_fence->finished.seqno; 209 __assign_str(ring); 210 __entry->num_ibs = job->num_ibs; 211 ), 212 TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u", 213 __get_str(timeline), __entry->context, 214 __entry->seqno, __get_str(ring), __entry->num_ibs) 215 ); 216 217 218 TRACE_EVENT(amdgpu_vm_grab_id, 219 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 220 struct amdgpu_job *job), 221 TP_ARGS(vm, ring, job), 222 TP_STRUCT__entry( 223 __field(u32, pasid) 224 __string(ring, ring->name) 225 __field(u32, ring) 226 __field(u32, vmid) 227 __field(u32, vm_hub) 228 __field(u64, pd_addr) 229 __field(u32, needs_flush) 230 ), 231 232 TP_fast_assign( 233 __entry->pasid = vm->pasid; 234 __assign_str(ring); 235 __entry->vmid = job->vmid; 236 __entry->vm_hub = ring->vm_hub, 237 __entry->pd_addr = job->vm_pd_addr; 238 __entry->needs_flush = job->vm_needs_flush; 239 ), 240 TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 241 __entry->pasid, __get_str(ring), __entry->vmid, 242 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 243 ); 244 245 TRACE_EVENT(amdgpu_vm_bo_map, 246 TP_PROTO(struct amdgpu_bo_va *bo_va, 247 struct amdgpu_bo_va_mapping *mapping), 248 TP_ARGS(bo_va, mapping), 249 TP_STRUCT__entry( 250 __field(struct amdgpu_bo *, bo) 251 __field(long, start) 252 __field(long, last) 253 __field(u64, offset) 254 __field(u64, flags) 255 ), 256 257 TP_fast_assign( 258 __entry->bo = bo_va ? bo_va->base.bo : NULL; 259 __entry->start = mapping->start; 260 __entry->last = mapping->last; 261 __entry->offset = mapping->offset; 262 __entry->flags = mapping->flags; 263 ), 264 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 265 __entry->bo, __entry->start, __entry->last, 266 __entry->offset, __entry->flags) 267 ); 268 269 TRACE_EVENT(amdgpu_vm_bo_unmap, 270 TP_PROTO(struct amdgpu_bo_va *bo_va, 271 struct amdgpu_bo_va_mapping *mapping), 272 TP_ARGS(bo_va, mapping), 273 TP_STRUCT__entry( 274 __field(struct amdgpu_bo *, bo) 275 __field(long, start) 276 __field(long, last) 277 __field(u64, offset) 278 __field(u64, flags) 279 ), 280 281 TP_fast_assign( 282 __entry->bo = bo_va ? bo_va->base.bo : NULL; 283 __entry->start = mapping->start; 284 __entry->last = mapping->last; 285 __entry->offset = mapping->offset; 286 __entry->flags = mapping->flags; 287 ), 288 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 289 __entry->bo, __entry->start, __entry->last, 290 __entry->offset, __entry->flags) 291 ); 292 293 DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 294 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 295 TP_ARGS(mapping), 296 TP_STRUCT__entry( 297 __field(u64, soffset) 298 __field(u64, eoffset) 299 __field(u64, flags) 300 ), 301 302 TP_fast_assign( 303 __entry->soffset = mapping->start; 304 __entry->eoffset = mapping->last + 1; 305 __entry->flags = mapping->flags; 306 ), 307 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 308 __entry->soffset, __entry->eoffset, __entry->flags) 309 ); 310 311 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 312 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 313 TP_ARGS(mapping) 314 ); 315 316 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 317 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 318 TP_ARGS(mapping) 319 ); 320 321 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs, 322 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 323 TP_ARGS(mapping) 324 ); 325 326 TRACE_EVENT(amdgpu_vm_update_ptes, 327 TP_PROTO(struct amdgpu_vm_update_params *p, 328 uint64_t start, uint64_t end, 329 unsigned int nptes, uint64_t dst, 330 uint64_t incr, uint64_t flags), 331 TP_ARGS(p, start, end, nptes, dst, incr, flags), 332 TP_STRUCT__entry( 333 __field(u64, start) 334 __field(u64, end) 335 __field(u64, flags) 336 __field(unsigned int, nptes) 337 __field(u64, incr) 338 __field(pid_t, pid) 339 __field(u64, vm_ctx) 340 __dynamic_array(u64, dst, nptes) 341 ), 342 343 TP_fast_assign( 344 unsigned int i; 345 346 __entry->start = start; 347 __entry->end = end; 348 __entry->flags = flags; 349 __entry->incr = incr; 350 __entry->nptes = nptes; 351 __entry->pid = p->vm->task_info ? 352 p->vm->task_info->tgid : 0; 353 __entry->vm_ctx = p->vm->immediate.fence_context; 354 for (i = 0; i < nptes; ++i) { 355 u64 addr = p->pages_addr ? amdgpu_vm_map_gart( 356 p->pages_addr, dst) : dst; 357 358 ((u64 *)__get_dynamic_array(dst))[i] = addr; 359 dst += incr; 360 } 361 ), 362 TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx," 363 " flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid, 364 __entry->vm_ctx, __entry->start, __entry->end, 365 __entry->flags, __entry->incr, __print_array( 366 __get_dynamic_array(dst), __entry->nptes, 8)) 367 ); 368 369 TRACE_EVENT(amdgpu_vm_set_ptes, 370 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 371 uint32_t incr, uint64_t flags, bool immediate), 372 TP_ARGS(pe, addr, count, incr, flags, immediate), 373 TP_STRUCT__entry( 374 __field(u64, pe) 375 __field(u64, addr) 376 __field(u32, count) 377 __field(u32, incr) 378 __field(u64, flags) 379 __field(bool, immediate) 380 ), 381 382 TP_fast_assign( 383 __entry->pe = pe; 384 __entry->addr = addr; 385 __entry->count = count; 386 __entry->incr = incr; 387 __entry->flags = flags; 388 __entry->immediate = immediate; 389 ), 390 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, " 391 "immediate=%d", __entry->pe, __entry->addr, __entry->incr, 392 __entry->flags, __entry->count, __entry->immediate) 393 ); 394 395 TRACE_EVENT(amdgpu_vm_copy_ptes, 396 TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool immediate), 397 TP_ARGS(pe, src, count, immediate), 398 TP_STRUCT__entry( 399 __field(u64, pe) 400 __field(u64, src) 401 __field(u32, count) 402 __field(bool, immediate) 403 ), 404 405 TP_fast_assign( 406 __entry->pe = pe; 407 __entry->src = src; 408 __entry->count = count; 409 __entry->immediate = immediate; 410 ), 411 TP_printk("pe=%010Lx, src=%010Lx, count=%u, immediate=%d", 412 __entry->pe, __entry->src, __entry->count, 413 __entry->immediate) 414 ); 415 416 TRACE_EVENT(amdgpu_vm_flush, 417 TP_PROTO(struct amdgpu_ring *ring, unsigned vmid, 418 uint64_t pd_addr), 419 TP_ARGS(ring, vmid, pd_addr), 420 TP_STRUCT__entry( 421 __string(ring, ring->name) 422 __field(u32, vmid) 423 __field(u32, vm_hub) 424 __field(u64, pd_addr) 425 ), 426 427 TP_fast_assign( 428 __assign_str(ring); 429 __entry->vmid = vmid; 430 __entry->vm_hub = ring->vm_hub; 431 __entry->pd_addr = pd_addr; 432 ), 433 TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx", 434 __get_str(ring), __entry->vmid, 435 __entry->vm_hub, __entry->pd_addr) 436 ); 437 438 DECLARE_EVENT_CLASS(amdgpu_pasid, 439 TP_PROTO(unsigned pasid), 440 TP_ARGS(pasid), 441 TP_STRUCT__entry( 442 __field(unsigned, pasid) 443 ), 444 TP_fast_assign( 445 __entry->pasid = pasid; 446 ), 447 TP_printk("pasid=%u", __entry->pasid) 448 ); 449 450 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated, 451 TP_PROTO(unsigned pasid), 452 TP_ARGS(pasid) 453 ); 454 455 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed, 456 TP_PROTO(unsigned pasid), 457 TP_ARGS(pasid) 458 ); 459 460 TRACE_EVENT(amdgpu_isolation, 461 TP_PROTO(void *prev, void *next), 462 TP_ARGS(prev, next), 463 TP_STRUCT__entry( 464 __field(void *, prev) 465 __field(void *, next) 466 ), 467 468 TP_fast_assign( 469 __entry->prev = prev; 470 __entry->next = next; 471 ), 472 TP_printk("prev=%p, next=%p", 473 __entry->prev, 474 __entry->next) 475 ); 476 477 TRACE_EVENT(amdgpu_cleaner_shader, 478 TP_PROTO(struct amdgpu_ring *ring, struct dma_fence *fence), 479 TP_ARGS(ring, fence), 480 TP_STRUCT__entry( 481 __string(ring, ring->name) 482 __field(u64, seqno) 483 ), 484 485 TP_fast_assign( 486 __assign_str(ring); 487 __entry->seqno = fence->seqno; 488 ), 489 TP_printk("ring=%s, seqno=%Lu", __get_str(ring), __entry->seqno) 490 ); 491 492 TRACE_EVENT(amdgpu_bo_list_set, 493 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 494 TP_ARGS(list, bo), 495 TP_STRUCT__entry( 496 __field(struct amdgpu_bo_list *, list) 497 __field(struct amdgpu_bo *, bo) 498 __field(u64, bo_size) 499 ), 500 501 TP_fast_assign( 502 __entry->list = list; 503 __entry->bo = bo; 504 __entry->bo_size = amdgpu_bo_size(bo); 505 ), 506 TP_printk("list=%p, bo=%p, bo_size=%Ld", 507 __entry->list, 508 __entry->bo, 509 __entry->bo_size) 510 ); 511 512 TRACE_EVENT(amdgpu_cs_bo_status, 513 TP_PROTO(uint64_t total_bo, uint64_t total_size), 514 TP_ARGS(total_bo, total_size), 515 TP_STRUCT__entry( 516 __field(u64, total_bo) 517 __field(u64, total_size) 518 ), 519 520 TP_fast_assign( 521 __entry->total_bo = total_bo; 522 __entry->total_size = total_size; 523 ), 524 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 525 __entry->total_bo, __entry->total_size) 526 ); 527 528 TRACE_EVENT(amdgpu_bo_move, 529 TP_PROTO(struct amdgpu_bo *bo, uint32_t new_placement, uint32_t old_placement), 530 TP_ARGS(bo, new_placement, old_placement), 531 TP_STRUCT__entry( 532 __field(struct amdgpu_bo *, bo) 533 __field(u64, bo_size) 534 __field(u32, new_placement) 535 __field(u32, old_placement) 536 ), 537 538 TP_fast_assign( 539 __entry->bo = bo; 540 __entry->bo_size = amdgpu_bo_size(bo); 541 __entry->new_placement = new_placement; 542 __entry->old_placement = old_placement; 543 ), 544 TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 545 __entry->bo, __entry->old_placement, 546 __entry->new_placement, __entry->bo_size) 547 ); 548 549 TRACE_EVENT(amdgpu_ib_pipe_sync, 550 TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence), 551 TP_ARGS(sched_job, fence), 552 TP_STRUCT__entry( 553 __string(ring, sched_job->base.sched->name) 554 __field(struct dma_fence *, fence) 555 __field(u64, ctx) 556 __field(u64, seqno) 557 ), 558 559 TP_fast_assign( 560 __assign_str(ring); 561 __entry->fence = fence; 562 __entry->ctx = fence->context; 563 __entry->seqno = fence->seqno; 564 ), 565 TP_printk("job ring=%s need pipe sync to fence=%llu:%llu", 566 __get_str(ring), __entry->ctx, __entry->seqno) 567 ); 568 569 TRACE_EVENT(amdgpu_reset_reg_dumps, 570 TP_PROTO(uint32_t address, uint32_t value), 571 TP_ARGS(address, value), 572 TP_STRUCT__entry( 573 __field(uint32_t, address) 574 __field(uint32_t, value) 575 ), 576 TP_fast_assign( 577 __entry->address = address; 578 __entry->value = value; 579 ), 580 TP_printk("amdgpu register dump 0x%x: 0x%x", 581 __entry->address, 582 __entry->value) 583 ); 584 585 DECLARE_EVENT_CLASS(amdgpu_userq_queue, 586 TP_PROTO(struct amdgpu_usermode_queue *queue), 587 TP_ARGS(queue), 588 TP_STRUCT__entry( 589 __field(void *, queue) 590 __field(u64, doorbell_index) 591 __field(int, queue_type) 592 __field(int, state) 593 __field(u32, xcp_id) 594 ), 595 TP_fast_assign( 596 __entry->queue = queue; 597 __entry->doorbell_index = queue->doorbell_index; 598 __entry->queue_type = queue->queue_type; 599 __entry->state = queue->state; 600 __entry->xcp_id = queue->xcp_id; 601 ), 602 TP_printk("queue=%p, doorbell=%llu, type=%d, state=%d, xcp_id=%u", 603 __entry->queue, __entry->doorbell_index, 604 __entry->queue_type, __entry->state, __entry->xcp_id) 605 ); 606 DEFINE_EVENT(amdgpu_userq_queue, amdgpu_userq_create_start, 607 TP_PROTO(struct amdgpu_usermode_queue *queue), 608 TP_ARGS(queue)); 609 DEFINE_EVENT(amdgpu_userq_queue, amdgpu_userq_destroy_start, 610 TP_PROTO(struct amdgpu_usermode_queue *queue), 611 TP_ARGS(queue)); 612 DECLARE_EVENT_CLASS(amdgpu_userq_queue_result, 613 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 614 TP_ARGS(queue, result), 615 TP_STRUCT__entry( 616 __field(void *, queue) 617 __field(u64, doorbell_index) 618 __field(int, queue_type) 619 __field(int, state) 620 __field(u32, xcp_id) 621 __field(int, result) 622 ), 623 TP_fast_assign( 624 __entry->queue = queue; 625 __entry->doorbell_index = queue->doorbell_index; 626 __entry->queue_type = queue->queue_type; 627 __entry->state = queue->state; 628 __entry->xcp_id = queue->xcp_id; 629 __entry->result = result; 630 ), 631 TP_printk("queue=%p, doorbell=%llu, type=%d, state=%d, xcp_id=%u, result=%d", 632 __entry->queue, __entry->doorbell_index, 633 __entry->queue_type, __entry->state, 634 __entry->xcp_id, __entry->result) 635 ); 636 DEFINE_EVENT(amdgpu_userq_queue_result, amdgpu_userq_create_end, 637 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 638 TP_ARGS(queue, result)); 639 DEFINE_EVENT(amdgpu_userq_queue_result, amdgpu_userq_destroy_end, 640 TP_PROTO(struct amdgpu_usermode_queue *queue, int result), 641 TP_ARGS(queue, result)); 642 643 TRACE_EVENT(amdgpu_userq_emit_fence, 644 TP_PROTO(struct device *device, struct amdgpu_usermode_queue *queue, struct amdgpu_userq_fence *fence), 645 TP_ARGS(device, queue, fence), 646 TP_STRUCT__entry( 647 __field(u64, fence_context) 648 __field(u64, fence_seqno) 649 __string(dev, dev_name(device)) 650 __field(u64, doorbell_index) 651 __field(u64, client_id) 652 __field(u32, queue_type) 653 ), 654 TP_fast_assign( 655 __entry->fence_context = fence->base.context; 656 __entry->fence_seqno = fence->base.seqno; 657 __assign_str(dev); 658 __entry->doorbell_index = queue->doorbell_index; 659 __entry->client_id = queue->userq_mgr->file->client_id; 660 __entry->queue_type = queue->queue_type; 661 ), 662 TP_printk("dev=%s, client_id=%llu, type=%u, doorbell=%llu, fence=%llu:%llu", 663 __get_str(dev), __entry->client_id, __entry->queue_type, __entry->doorbell_index, 664 __entry->fence_context, 665 __entry->fence_seqno) 666 ); 667 668 TRACE_EVENT(amdgpu_userq_wait_deps, 669 TP_PROTO(struct device *device, struct amdgpu_usermode_queue *queue, struct amdgpu_userq_fence *dep), 670 TP_ARGS(device, queue, dep), 671 TP_STRUCT__entry( 672 __field(u64, context) 673 __field(u64, dep_context) 674 __field(u64, dep_seqno) 675 __string(dev, dev_name(device)) 676 __field(u64, doorbell_index) 677 __field(u64, client_id) 678 __field(u32, queue_type) 679 ), 680 TP_fast_assign( 681 __assign_str(dev); 682 __entry->doorbell_index = queue->doorbell_index; 683 __entry->queue_type = queue->queue_type; 684 __entry->client_id = queue->userq_mgr->file->client_id; 685 __entry->context = queue->fence_drv->context; 686 __entry->dep_context = dep->base.context; 687 __entry->dep_seqno = dep->base.seqno; 688 ), 689 TP_printk("dev=%s, client_id=%llu, type=%u, doorbell=%llu, context=%llu depends on fence=%llu:%llu", 690 __get_str(dev), __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->context, 691 __entry->dep_context, 692 __entry->dep_seqno) 693 ); 694 695 TRACE_EVENT(amdgpu_userq_state_start, 696 TP_PROTO(struct amdgpu_usermode_queue *queue), 697 TP_ARGS(queue), 698 TP_STRUCT__entry( 699 __field(u64, doorbell_index) 700 __field(u64, client_id) 701 __field(u32, queue_type) 702 __field(u32, from) 703 ), 704 TP_fast_assign( 705 __entry->doorbell_index = queue->doorbell_index; 706 __entry->queue_type = queue->queue_type; 707 __entry->client_id = queue->userq_mgr->file->client_id; 708 __entry->from = queue->state; 709 ), 710 TP_printk("client_id=%llu, type=%u, doorbell=%llu, from=%d", 711 __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->from) 712 ); 713 714 TRACE_EVENT(amdgpu_userq_state_changed, 715 TP_PROTO(struct amdgpu_usermode_queue *queue, enum amdgpu_userq_state new_state), 716 TP_ARGS(queue, new_state), 717 TP_STRUCT__entry( 718 __field(u64, doorbell_index) 719 __field(u64, client_id) 720 __field(u32, queue_type) 721 __field(u32, to) 722 ), 723 TP_fast_assign( 724 __entry->doorbell_index = queue->doorbell_index; 725 __entry->queue_type = queue->queue_type; 726 __entry->client_id = queue->userq_mgr->file->client_id; 727 __entry->to = new_state; 728 ), 729 TP_printk("client_id=%llu, type=%u, doorbell=%llu, to=%d", 730 __entry->client_id, __entry->queue_type, __entry->doorbell_index, __entry->to) 731 ); 732 733 TRACE_EVENT(amdgpu_register_pid, 734 TP_PROTO(uint32_t pid, int major, int minor), 735 TP_ARGS(pid, major, minor), 736 TP_STRUCT__entry( 737 __field(u32, pid) 738 __field(int, major) 739 __field(int, minor) 740 ), 741 TP_fast_assign( 742 __entry->pid = pid; 743 __entry->major = major; 744 __entry->minor = minor; 745 ), 746 TP_printk("amdgpu register pid %d render %d:%d", 747 __entry->pid, __entry->major, __entry->minor) 748 ); 749 TRACE_EVENT(amdgpu_deregister_pid, 750 TP_PROTO(uint32_t pid, int major, int minor), 751 TP_ARGS(pid, major, minor), 752 TP_STRUCT__entry( 753 __field(u32, pid) 754 __field(int, major) 755 __field(int, minor) 756 ), 757 TP_fast_assign( 758 __entry->pid = pid; 759 __entry->major = major; 760 __entry->minor = minor; 761 ), 762 TP_printk("amdgpu deregister pid %d render %d:%d", 763 __entry->pid, __entry->major, __entry->minor) 764 ); 765 766 #undef AMDGPU_JOB_GET_TIMELINE_NAME 767 #endif 768 769 /* This part must be outside protection */ 770 #undef TRACE_INCLUDE_PATH 771 #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu 772 #include <trace/define_trace.h> 773